Temperature adjustment device and test device for integrated chip

Abstract

The present application discloses a temperature adjustment device and a test device for an integrated chip. The temperature adjustment device is applied to an integrated chip test scene. The temperature adjustment device comprises: a first thermoelectric cooler, wherein the first thermoelectric cooler has a first end surface configured to be attached to one side of an integrated chip under test, and is used for absorbing heat of said integrated chip or transferring heat to said integrated chip; and a heat exchange assembly, attached to a second end surface of the first thermoelectric cooler and used for performing heat exchange with the first thermoelectric cooler. The solution can increase the speed of refrigerating or heating said integrated chip by the thermoelectric cooler, so that said integrated chip is cooled or heated more quickly.

Description

Temperature regulating device and integrated chip testing device

Technical field

[0001] The present application relates to the technical field of integrated chip testing, and in particular to a temperature regulating device and an integrated chip testing device. [Background Technology]

[0002] In today's technology, after integrated chips (such as processing unit chips and memory chips) are manufactured and processed, they must undergo a series of tests to determine whether they meet requirements. Some integrated chips need to operate normally in both high and low temperature environments, so they require high and low temperature aging tests.

[0003] Currently, the conventional method for high and low temperature testing of integrated chips is to place the integrated chips in a high and low temperature aging test chamber. The common high and low temperature aging test chambers currently have defects such as poor temperature balance, inability to be miniaturized, and easy wear of internal mechanical components.

[0004] [Summary of the invention]

[0005] The present application provides a temperature regulating device and a testing device for an integrated chip.

[0006] A technical solution adopted in this application is to provide a temperature regulating device, which is applied to the integrated chip testing scenario. The temperature regulating device includes:

[0007] a first semiconductor refrigeration plate, wherein a first end surface of the first semiconductor refrigeration plate is configured to be attached to a side of the integrated chip to be tested, and is used to absorb heat from the integrated chip to be tested or transfer heat to the integrated chip to be tested;

[0008] The heat exchange component is attached to the second end surface of the first semiconductor refrigeration plate and is used for exchanging heat with the first semiconductor refrigeration plate.

[0009] The heat exchange components include:

[0010] A first heat-conducting member, the first heat-conducting member is attached to the second end surface of the first semiconductor refrigeration plate;

[0011] Liquid cooling component, part of the liquid cooling circuit of the liquid cooling component is set on the first heat conducting member, which is used to circulate the coolant in the liquid cooling circuit and exchange heat with the first heat conducting member according to the test requirements of the integrated chip.

[0012] The liquid cooling component includes a second semiconductor refrigeration plate, which is in contact with another part of the liquid cooling circuit of the liquid cooling component. The second semiconductor refrigeration plate is used to exchange heat with the liquid cooling circuit.

[0013] The liquid cooling assembly further includes a radiator, which is used to further dissipate the heat absorbed by the cooling liquid when the cooling liquid absorbs the heat in the first heat-conducting member.

[0014] The temperature regulating device further comprises:

[0015] The second heat conducting member, the first end surface of the second heat conducting member is configured to be attached to one side of the integrated chip to be tested, for exchanging heat with the integrated chip to be tested, and the second end surface of the second heat conducting member is attached to the first end surface of the first semiconductor cooling plate.

[0016] A thermal conductive material is coated between the second end surface of the second heat conducting member and the first end surface of the first semiconductor refrigeration plate, and / or a thermal conductive material is coated between the first end surface of the second heat conducting member and one side of the integrated chip to be tested.

[0017] Wherein, the first semiconductor refrigeration piece is a single-stage Peltier element;

[0018] When dissipating heat absorbed from the integrated chip to be tested, the first end surface of the first semiconductor refrigeration plate is a cold surface, and the second end surface of the first semiconductor refrigeration plate is a hot surface;

[0019] When heat is conducted to the integrated chip to be tested through the first semiconductor refrigeration plate, the first end surface of the first semiconductor refrigeration plate is a hot surface, and the second end surface of the first semiconductor refrigeration plate is a cold surface.

[0020] The temperature regulating device further comprises:

[0021] The temperature control unit is configured to reverse the voltage on the first end surface and the second end surface of the first semiconductor refrigeration plate to achieve switching between the cold surface and the hot surface.

[0022] Another technical solution adopted by the present application is to provide a testing device for an integrated chip, the testing device comprising:

[0023] Test socket, used to place the integrated chip to be tested;

[0024] The test board is coupled to the test socket to test the integrated chip to be tested;

[0025] The temperature regulating device is used to regulate the temperature when testing the integrated chip to be tested, wherein the temperature regulating device is such as the temperature regulating device mentioned above.

[0026] The test device also includes:

[0027] First Space;

[0028] The second space is accommodated in the first space and is used to accommodate the integrated chip to be tested, the test socket and the first semiconductor refrigeration plate, so that the integrated chip to be tested meets the test requirements at the target temperature.

[0029] The beneficial effects of the present application are as follows: the temperature regulating device includes a first semiconductor refrigeration plate, the first end surface of the first semiconductor refrigeration plate is configured to be attached to one side of the integrated chip to be tested, and is used to absorb heat from the integrated chip to be tested or transfer heat to the integrated chip to be tested; a heat exchange component is attached to the second end surface of the first semiconductor refrigeration plate, and is used to reduce the temperature of the second end surface of the first semiconductor refrigeration plate when dissipating the heat absorbed from the integrated chip to be tested, or to increase the temperature of the second end surface of the first semiconductor refrigeration plate when conducting heat to the integrated chip to be tested through the first semiconductor refrigeration plate according to the test requirements of the integrated chip to be tested. The temperature regulating device of the present application utilizes the semiconductor refrigeration plate attached to one side of the integrated chip to be tested to independently achieve cooling or heating of the integrated chip to be tested, and further utilizes the heat exchange component attached to the first semiconductor refrigeration plate to accelerate the speed at which the first semiconductor refrigeration plate absorbs heat from the integrated chip to be tested or accelerate the speed at which the first semiconductor refrigeration plate conducts heat to the integrated chip to be tested, so that the integrated chip to be tested is quickly cooled or heated, thereby improving the test efficiency of the integrated chip to be tested.

Brief Description of the Drawings

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0031] FIG1 is a schematic structural diagram of an embodiment of a temperature regulating device provided by the present application;

[0032] FIG2 is a schematic structural diagram of FIG1 when the first semiconductor refrigeration sheet and the first heat conducting member are not in contact;

[0033] FIG3 is a schematic structural diagram of the first semiconductor refrigeration sheet and the first heat conducting member in FIG1 when they are in contact;

[0034] FIG4 is a schematic structural diagram of FIG1 when the first semiconductor refrigeration plate and the second heat conducting member are not in contact;

[0035] FIG5 is a schematic structural diagram of the first semiconductor refrigeration plate in FIG1 when the second heat conducting member is in contact;

[0036] FIG6 is a schematic structural diagram of the integrated chip to be tested in FIG1 when the second heat conducting member is not in contact;

[0037] FIG7 is a schematic structural diagram of the integrated chip to be tested in FIG1 when it contacts the second heat conducting member;

[0038] FIG8 is a schematic structural diagram of an embodiment of an integrated chip testing device provided by the present application;

[0039] FIG9 is a schematic structural diagram of another embodiment of the integrated chip testing device provided by the present application;

[0040] FIG10 is a schematic structural diagram of another embodiment of the integrated chip testing device provided by the present application;

[0041] FIG11 is a schematic structural diagram of another embodiment of the integrated chip testing device provided by the present application;

[0042] FIG12 is a schematic structural diagram of another embodiment of the integrated chip testing device provided by the present application;

[0043] FIG13 is a flow chart of an embodiment of an integrated chip testing method provided in the present application. [Specific implementation method]

[0044] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0045] For integrated chips that have high operational reliability in both extremely cold and high temperature environments, R&D verification, system testing, reliability testing or production testing must be carried out in a temperature environment of -45℃ to 150℃.

[0046] Taking the aging test of integrated chips as an example, it is necessary to perform functional testing, performance testing and accelerated aging testing on the integrated chips in high temperature (such as 110℃, 125℃ or 150℃), room temperature (such as 20℃, 25℃ or 30℃) and low temperature (such as -25℃, -40℃, -50℃) environments to screen out defective products that do not meet the requirements.

[0047] Currently, the common devices for high and low temperature testing of integrated chips mainly include: high and low temperature chambers using compressor cooling and electric heating, and high and low temperature chambers using liquid nitrogen cooling and electric heating strips for heating.

[0048] Among them, the high and low temperature thermostat uses compressor cooling and electric heating, and the ambient temperature in the high and low temperature thermostat can reach -70℃~150℃. At the same time, the ambient temperature in the high and low temperature thermostat can be dynamically adjusted.

[0049] The high and low temperature incubator is cooled by liquid nitrogen and heated by electric heating strips. The ambient temperature in the incubator can reach -150℃~150℃, and the ambient temperature in the incubator can be dynamically adjusted.

[0050] The inventors of this application have discovered that the currently common high and low temperature incubators have the defect of low heating and cooling efficiency. It takes more than ten minutes to half an hour to adjust the temperature in the incubator to the specified temperature. After reaching the specified temperature, it takes a long time to wait for the temperature of each area in the incubator to be balanced. Common high and low temperature incubators use compressors or liquid nitrogen for refrigeration and electric hot air for heating, which results in loss of mechanical components and loss of refrigerant. Furthermore, when the chip to be tested is subjected to high and low temperature tests in the high and low temperature incubator, since the test board is also placed in the high and low temperature incubator, some of the current test boards are not resistant to high and low temperatures and cannot test the chip to be tested. Although the components of the test board are made of high and low temperature resistant materials, the stability of the test board in long-term high and low temperature environments cannot be guaranteed. After several high and low temperature tests on the integrated chip to be tested, in order to ensure the stability of the test of the integrated chip to be tested, the test board needs to be replaced, thereby greatly increasing the testing cost.

[0051] This application mainly designs a temperature control device that independently controls the temperature of the integrated chip to be tested. Unlike traditional methods, the temperature control device designed in this application does not require the installation of additional mechanical components to assist in cooling or heating when the integrated chip to be tested is subjected to high and low temperature tests, thereby further improving the operational reliability of the temperature control device.

[0052] Please refer to FIG1 for details. FIG1 is a schematic structural diagram of an embodiment of a temperature regulating device provided by the present application.

[0053] As shown in FIG1 , the temperature adjustment device 10 according to the embodiment of the present application includes a first semiconductor refrigeration plate 11 and a heat exchange component 12 .

[0054] The first end surface 111 of the first semiconductor cooling plate 11 is configured to be attached to a side end surface of the integrated chip under test 1, and is used to absorb heat from the integrated chip under test 1 or transfer heat to the integrated chip under test. It can be understood that the first semiconductor cooling plate 11 is used to heat or cool the integrated chip under test 1.

[0055] In some embodiments, the integrated chip 1 to be tested is a processor device. In some application scenarios, the processor device may be a CPU (Central Processing Unit). In some application scenarios, the processor device may be a GPU (Graphic Processing Unit). In some application scenarios, the processor device may be an integrated circuit chip with signal processing capabilities. In some application scenarios, the processor device may also be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The general-purpose processor may be a microprocessor or the processor device may also be any conventional processor, etc.

[0056] In some embodiments, the integrated chip 1 under test is a storage medium, such as a flash memory chip. In some application scenarios, the storage medium can be a USB flash drive, a mobile hard drive, a read-only memory (ROM), a random access memory (RAM), a flash memory card, or a disk.

[0057] Specifically, the tests performed on the integrated chip under test may include functional testing, performance testing, and / or reliability testing of the chip under test at different temperatures. Further, the reliability test may include (high / low temperature) temperature cycling test, high temperature aging life test (HTOL), temperature and humidity test (TH / THB), and / or high temperature storage test (HTSL).

[0058] In some application scenarios, the temperature regulating device 10 can also be used in the operation scenario of the integrated chip 1 to be tested. For example, the normal operating temperature of some integrated chips 1 to be tested is lower than minus 100 degrees Celsius. The temperature regulating device 10 can maintain the integrated chip 1 to be tested within its normal operating temperature range.

[0059] In some embodiments, the first semiconductor refrigeration plate 11 can use the Peltier effect to perform any one of cooling, heating, and temperature maintenance operations on the integrated chip 1 to be tested.

[0060] The Peltier effect principle is that a thermocouple pair is formed by connecting a plate of an N-type semiconductor (electron-type semiconductor) material to a plate of a P-type semiconductor (hole-type semiconductor) material. When current passes through, heat transfer occurs between the outer end faces of the two semiconductors, and the heat is transferred from one end face to the other end face, thereby generating a temperature difference to form a cold end face and a hot end face. It can be understood that the heat on the cold end face is transferred to the hot end face. However, due to the resistance of the semiconductor material itself, heat is generated when current flows through the semiconductor material, thereby affecting heat transfer. Furthermore, the heat between the two plates can also be reversely transferred through the air and / or the semiconductor material itself. When the cold end face and the hot end face reach a certain temperature difference, the heat transferred in the forward direction is equal to the heat transferred in the reverse direction, and the temperature of the cold end face and the hot end face will not continue to change.

[0061] Taking the first semiconductor refrigeration plate 11 cooling the integrated chip 1 to be tested as an example, at this time, the temperature of the first end face 111 in contact with one side of the integrated chip 1 to be tested is lower than the temperature of the second end face 112, that is, the first end face 111 forms a cold surface and the second end face 112 forms a hot surface; in order to lower the temperature of the first end face 111, it is necessary to further lower the temperature of the second end face 112, that is, in order to speed up the speed at which the first semiconductor refrigeration plate 11 absorbs the heat of the integrated chip 1 to be tested, it is necessary to promptly conduct the heat of the second end face 112 to other components whose heat is lower than that of the second end face 112.

[0062] Taking the first semiconductor refrigeration plate 11 as an example of heating the integrated chip 1 to be tested, at this time, the temperature of the first end face 111 in contact with one side of the integrated chip 1 to be tested is higher than the temperature of the second end face 112, that is, the first end face 111 forms a hot surface and the second end face 112 forms a cold surface; in order to increase the temperature of the first end face 111, it is necessary to further increase the temperature of the second end face 112, that is, in order to speed up the speed of transferring heat from the first semiconductor refrigeration plate 11 to the integrated chip to be tested, it is necessary to promptly use other components with higher heat than the second end face 112 to transfer heat to the second end face 112.

[0063] The heat exchange component 12 is attached to the second end surface 112 of the first semiconductor refrigeration plate 11 . The heat exchange component 12 is used to exchange heat with the first semiconductor refrigeration plate 11 .

[0064] In some applications, the first semiconductor refrigeration plate 11 is used to cool the integrated chip 1 under test. When the first semiconductor refrigeration plate 11 dissipates the heat absorbed from the integrated chip 1 under test, the heat on the first end surface 111 increases, and the temperature of the first end surface 111 rises. Furthermore, the temperature of the second end surface 112 also rises. At this time, the heat exchange component 12 attached to the second end surface 112 absorbs the heat from the second end surface 112, thereby lowering the temperature of the second end surface 112, accelerating heat conduction in the first semiconductor refrigeration plate 11, and rapidly cooling the integrated chip 1 under test.

[0065] In some applications, the first semiconductor refrigeration plate 11 is used to heat the integrated chip under test 1. When the first semiconductor refrigeration plate 11 conducts heat to the integrated chip under test 1, the heat on the first end surface 111 decreases, and the temperature of the first end surface 111 drops. Furthermore, the temperature of the second end surface 112 also decreases. At this time, the heat exchange component 12 attached to the second end surface 112 conducts heat to the second end surface 112, thereby increasing the temperature of the second end surface 112 and accelerating the heat conduction of the first semiconductor refrigeration plate 11, so that the integrated chip under test 1 is quickly heated up.

[0066] In some application scenarios, the first semiconductor refrigeration plate 11 is also used to maintain the temperature of the integrated chip 1 to be tested, and the heat exchange component 12 is used to maintain the heat of the first semiconductor refrigeration plate 11.

[0067] Optionally, the heat exchange component 12 is an air cooling component. Exemplarily, the air cooling component can be an air conditioner or an air cooling radiator, which is not limited here.

[0068] Optionally, the heat exchange component 12 is a liquid cooling component. Exemplarily, the liquid cooling component can be a water cooling radiator or an oil cooling radiator, which is not limited here.

[0069] Optionally, the temperature regulating device 10 further includes a temperature sensor (not shown). In some embodiments, the temperature sensor is attached between the first end surface 111 of the first semiconductor refrigeration plate 11 and the surface of the integrated chip 1 to be tested. In some embodiments, the temperature sensor is attached to the surface of the integrated chip 1 to be tested.

[0070] Exemplarily, the temperature sensor is used to obtain the current temperature value of the integrated chip 1 to be tested. Further, the difference between the current temperature value and the preset temperature value is used to determine the control parameters of the first semiconductor refrigeration chip 11, thereby controlling the first semiconductor refrigeration chip 11 to perform a temperature increase or decrease operation.

[0071] Optionally, the heat exchange assembly 12 includes a first heat conductor 121 and a liquid cooling assembly 13. The first heat conductor 121 is attached to the second end surface 112 and is used to conduct heat from the liquid cooling assembly 13 to the second end surface 112, that is, to conduct heat from the liquid cooling assembly 13 to the first semiconductor cooling plate 11. Alternatively, the first heat conductor 121 is used to conduct heat from the second end surface 112 to the liquid cooling assembly 13, that is, to conduct heat from the first semiconductor cooling plate 11 to the liquid cooling assembly 13.

[0072] In some application scenarios, the first heat conductor 121 can be a metal with good thermal conductivity (such as copper, aluminum, platinum), metal oxide or alloy, or a thermal conductive material represented by graphene, phase change thermal insulating material, thermal conductive pad, thermal conductive filler or thermal conductive pad, etc., which is not limited here.

[0073] Furthermore, part of the liquid cooling circuit of the liquid cooling assembly 13 is disposed in the first heat conducting member 121 , and the coolant circulates in the liquid cooling circuit to exchange heat with the first heat conducting member 121 .

[0074] Optionally, the heat exchange between the liquid cooling component 13 and the first heat conducting member 121 includes any one of absorbing heat in the first heat conducting member 121 , conducting heat to the first heat conducting member 121 , and maintaining heat in the first heat conducting member 121 .

[0075] In some application scenarios, the first semiconductor refrigeration plate 11 is used to absorb heat from the integrated chip 1 to be tested. Part or all of the heat absorbed by the first semiconductor refrigeration plate 11 is transferred to the first heat conductor 121, causing the heat in the first heat conductor 121 to increase, that is, the temperature of the first heat conductor 121 rises, and the rate at which the first heat conductor 121 absorbs heat from the first semiconductor refrigeration plate 11 gradually decreases; at this time, the temperature of the coolant in the liquid cooling component 13 is lower than the temperature of the first heat conductor 121, then the coolant in the liquid cooling component 13 performs heat exchange with the first heat conductor 121, absorbing the heat from the first heat conductor 121, and the temperature of the first heat conductor 121 decreases. Furthermore, the rate at which the first heat conductor 121, whose temperature has dropped, absorbs heat from the first semiconductor refrigeration plate 11 gradually increases.

[0076] In some application scenarios, the first semiconductor refrigeration plate 11 is used to transfer heat to the integrated chip 1 under test. The first heat conductor 121 transfers heat to the first semiconductor refrigeration plate 11, reducing the heat of the first heat conductor 121. That is, the temperature of the first heat conductor 121 drops, and the rate at which the first heat conductor 121 transfers heat to the first semiconductor refrigeration plate 11 gradually decreases. At this time, the temperature of the coolant in the liquid cooling assembly 13 is higher than the temperature of the first heat conductor 121. The coolant in the liquid cooling assembly 13 then transfers heat to the first heat conductor 121, causing the temperature of the first heat conductor 121 to rise. Furthermore, the rate at which the first heat conductor 121, whose temperature has risen, transfers heat to the first semiconductor refrigeration plate 11 gradually increases.

[0077] In some application scenarios, the first semiconductor cooling plate 11 is used to maintain the heat of the integrated chip under test 1. The first heat conducting member 121 does not transfer heat to the first semiconductor cooling plate 11, nor does it absorb heat from the first semiconductor cooling plate 11. Similarly, the coolant in the liquid cooling assembly 13 does not transfer heat to the first heat conducting member 121, nor does it absorb heat from the first heat conducting member 121.

[0078] Optionally, the coolant in the liquid cooling component 13 is a liquid with strong heat absorption capacity, such as pure water, ethylene glycol aqueous solution, ethylene glycol water-based antifreeze, glycerol aqueous solution or glycerol water-based antifreeze, which is not limited here.

[0079] After long-term research, the inventors of this application have found that the current conventional heat exchange component types include air-cooled components and conventional liquid-cooled components. The radiator of the conventional liquid-cooled component needs to be equipped with a cooling fan. Taking the cooling scenario as an example, the air-cooled component has the defect of poor cooling efficiency and the inability to further reduce the temperature of the second end face (hot side) of the semiconductor refrigeration plate. The conventional air-cooled component can only maintain the temperature of the first end face (cold side) of the semiconductor refrigeration plate at 0°C or above; compared with the air-cooled component, the conventional liquid-cooled component has a higher heat dissipation efficiency, but the conventional liquid-cooled component can only maintain the temperature of the first end face (cold side) of the semiconductor refrigeration plate at -20°C or above. At the same time, the above-mentioned air-cooled component and conventional liquid-cooled component cannot make the semiconductor refrigeration plate heat the second end face (cold side) of the semiconductor refrigeration plate in the heating scenario.

[0080] In response to the shortcomings of the above conventional technical means, the inventors of the present application additionally arranged a second semiconductor refrigeration plate 131 on the liquid cooling component 13. The second semiconductor refrigeration plate 131 is in contact with the liquid cooling circuit of another part of the liquid cooling component 13. The second semiconductor refrigeration plate 131 is used to exchange heat with the liquid cooling circuit.

[0081] Optionally, the heat exchange between the second semiconductor refrigeration plate 131 and the liquid cooling circuit includes any one of absorbing heat from the coolant in the liquid cooling circuit, releasing heat to the coolant in the liquid cooling circuit, and maintaining heat of the coolant in the liquid cooling circuit.

[0082] In some application scenarios, the first end surface 111 is used to absorb heat from the integrated chip 1 under test, and the liquid cooling assembly 13 absorbs heat from the second end surface 112 through the second semiconductor cooling plate 131, thereby reducing the temperature of the second end surface 112. In this case, the heat content of the coolant in the liquid cooling assembly 13 increases, and the second semiconductor cooling plate 131 is used to absorb the heat of the coolant.

[0083] In some application scenarios, the first end surface 111 is used to dissipate heat to the integrated chip under test 1, and the liquid cooling assembly 13 releases heat to the second end surface 112 through the second semiconductor cooling plate 131, thereby increasing the temperature of the second end surface 112. At this time, the heat content of the coolant in the liquid cooling assembly 13 decreases, and the second semiconductor cooling plate 131 is used to release heat to the coolant.

[0084] In some application scenarios, if the test requirements of the integrated chip 1 to be tested are to neither absorb the heat of the integrated chip 1 to be tested nor transfer heat to the integrated chip 1 to be tested, any one or more of the first semiconductor refrigeration plate 11, the second semiconductor refrigeration plate 131, and the liquid cooling component 13 may not work.

[0085] By installing a second semiconductor cooler in the liquid cooling assembly, which contacts another portion of the cooling circuit within the liquid cooling assembly, the second cooler absorbs heat from the coolant when the coolant heat level in the cooling circuit increases, according to the test requirements of the integrated chip under test. Alternatively, the second cooler releases heat to the coolant when the coolant heat level in the cooling circuit decreases. Furthermore, by reversing the voltage applied across the second semiconductor cooler, the switching between absorbing and releasing heat to the coolant can be achieved.

[0086] In some embodiments, a heat-conducting member (not shown) with high thermal conductivity is partially or completely coated on the outer surface of another portion of the cooling circuit in the liquid cooling assembly 13, and a second semiconductor cooling plate 131 is attached to the outer surface of the heat-conducting member. Optionally, the heat-conducting member can be a metal (such as copper, aluminum, platinum), a metal oxide or alloy with good thermal conductivity, or a heat-conducting material represented by graphene, phase-change thermal insulation material, thermal pad, thermal filler, or thermal pad, etc., which is not limited here.

[0087] In some embodiments, the second semiconductor refrigeration sheet 131 is attached to the outer surface of another portion of the cooling circuit in the liquid cooling assembly 13 .

[0088] Optionally, the liquid cooling assembly 13 is further provided with a radiator 14. The radiator 14 is used to further dissipate the heat absorbed by the cooling liquid when the cooling liquid absorbs the heat of the first heat conducting member 121.

[0089] Exemplarily, the radiator 14 is an air-cooled radiator.

[0090] In some application scenarios, the first end surface 111 is used to absorb heat from the integrated chip 1 under test, and the liquid cooling assembly 13 absorbs heat from the second end surface 112 through the first heat conductor 121, thereby reducing the temperature of the second end surface 112. At this time, the heat content of the coolant in the liquid cooling assembly 13 increases. After absorbing heat, the coolant first passes through the radiator 14, which dissipates part of the heat absorbed by the coolant to the surrounding environment, i.e., the coolant undergoes partial cooling. Furthermore, the partially cooled coolant passes through the second semiconductor refrigeration plate 131 for a second cooling, thereby lowering the coolant temperature and further improving the coolant's ability to absorb heat.

[0091] In some application scenarios, when the coolant releases heat to the first heat conductor 121 , the radiator 14 may not work.

[0092] Optionally, to improve the heat transfer efficiency between the integrated chip under test 1 and the first semiconductor refrigeration plate 11, the temperature regulating device 10 further includes a second heat conducting member 15. As shown in Figures 4 to 7, a first end surface 151 of the second heat conducting member 15 is configured to be attached to a side of the integrated chip under test 1. The second heat conducting member 15 is used to exchange heat with the integrated chip under test 1. Optionally, the heat exchange between the second heat conducting member 15 and the integrated chip under test 1 includes any one of absorbing heat from the integrated chip under test 1, transferring heat to the integrated chip under test 1, and maintaining the heat of the integrated chip under test 1.

[0093] Furthermore, the second end surface 152 of the second heat conducting member 15 is attached to the second end surface 112 of the first semiconductor refrigeration plate 11 .

[0094] Optionally, the second thermal conductor 15 can be a metal with good thermal conductivity (such as copper, aluminum, platinum), metal oxide or alloy, or a thermal conductive material represented by graphene, phase change thermal insulating material, thermal conductive pad, thermal conductive filler or thermal conductive pad, etc., which is not limited here.

[0095] In some embodiments, the hardness of the second end surface 152 of the second heat conducting member 15 is less than or equal to the hardness of one side surface of the integrated chip 1 to be tested, so as to prevent the second heat conducting member 15 from scratching the surface of the integrated chip 1 to be tested.

[0096] By arranging a second heat conducting member on one side of the integrated chip to be tested and on the second end surface of the first semiconductor cooling plate, the heat transfer efficiency between the integrated chip to be tested and the first semiconductor cooling plate is further improved.

[0097] Optionally, a heat conducting material is coated between the second end surface 152 of the second heat conducting member 15 and the first end surface 111 of the first semiconductor refrigeration plate 11 .

[0098] Optionally, a heat-conducting material is coated between the first end surface 151 of the second heat-conducting member 15 and one side of the integrated chip 1 to be tested.

[0099] Optionally, the thermally conductive material can be a metal with good thermal conductivity (such as copper, aluminum, platinum), metal oxide or alloy, or graphene, phase change thermal insulating material, thermal pad, thermal filler or thermal pad, etc., which is not limited here.

[0100] Optionally, the first semiconductor refrigeration plate 11 is a single-stage Peltier element.

[0101] In some embodiments, when dissipating heat absorbed from the integrated chip 1 under test, the first end surface 111 serves as a cold surface, and the second end surface 112 serves as a hot surface.

[0102] In some embodiments, when heat is conducted to the integrated chip 1 under test through the first semiconductor cooling plate 11 , the first end surface 111 is a hot surface, and the second end surface 112 is a cold surface.

[0103] After a period of research, the inventors of this application have found that the current semiconductor refrigeration equipment uses a multi-stage Peltier cooling plate to further reduce the temperature of the cold surface in contact with the integrated chip to be tested. For example, a three-stage Peltier cooling plate can produce a low temperature of -107°C. However, the above conventional technical means have the disadvantage of low heat dissipation efficiency. Since the heat dissipation efficiency of the hot surface of each stage of the Peltier cooling plate is limited by the heat transfer power of the cascaded Peltier cooling plates on the hot surface, it is impossible to maintain a sufficiently large cooling capacity while lowering the temperature. Taking a three-stage Peltier cooling plate as an example, while producing a low temperature of -107°C, the cooling power is only 17W. Considering that the integrated chip test scenario involves the integrated chip running a stress test in a low temperature environment (such as in the range of -50°C to 0°C), the above-mentioned multi-stage Peltier cooling plate solution cannot continuously keep the integrated chip to be tested at a low temperature when the integrated chip with a large thermal design power consumption (such as greater than 50W or greater than 100W) is subjected to stress testing.

[0104] It is worth noting that in the multi-stage Peltier cooling sheet solution, the first surface of the first-stage Peltier cooling sheet is attached to one side of the chip under test, the second-stage Peltier cooling sheet is attached to the second surface of the first-stage Peltier, and so on. Moreover, as the number of stages increases, the area of ​​the Peltier cooling sheet becomes smaller. If the multi-stage Peltier cooling sheet needs to transfer heat to the integrated chip under test, the heat absorbed by the second surface of the first-stage Peltier is greater than the heat generated by the first surface of the second-stage Peltier, which has a smaller area than the first-stage Peltier. Furthermore, because the logarithm of the bismuth telluride particles on the cold and hot surfaces of the Peltier in the multi-stage Peltier cooling sheet solution is different, the function of heating by reversing the voltage applied to the Peltier cooling sheet cannot be achieved. Therefore, the multi-stage Peltier cooling sheet solution cannot achieve both cooling and heating functions without adding other heating devices.

[0105] By using a single-stage Peltier element, heat can be dissipated from the IC under test while also being transferred to the IC under test. Furthermore, the cooling power of a single-stage Peltier element can reach 200W, enabling rapid cooling of ICs under test that generate more than 20W.

[0106] Optionally, the temperature regulating device 10 is further provided with a temperature regulating unit 16. The temperature regulating unit 16 is configured to perform voltage inversion on the first end surface 111 and the second end surface 112 of the first semiconductor refrigeration plate 11 to achieve conversion between the cold surface and the hot surface.

[0107] In some embodiments, the temperature adjustment unit 16 is further configured to perform voltage inversion on two end surfaces of the second semiconductor refrigeration plate 131 to achieve conversion between the cold surface and the hot surface.

[0108] In some application scenarios, the temperature adjustment unit 16 may also be a part of an MCU microcontroller (not shown).

[0109] The above scheme, on the one hand, utilizes the semiconductor refrigeration chip attached to one side of the integrated chip to be tested to independently realize cooling or heating of the integrated chip to be tested. Furthermore, the heat exchange component attached to the first semiconductor refrigeration plate is utilized to accelerate the speed at which the first semiconductor refrigeration plate absorbs the heat of the integrated chip to be tested or conducts heat to the integrated chip to be tested, so that the integrated chip to be tested can be quickly cooled or heated, thereby improving the test efficiency of the integrated chip to be tested.

[0110] On the other hand, by setting up a second semiconductor refrigeration plate in contact with the liquid cooling circuit in the heat exchange component, the heat of the coolant in the liquid cooling circuit is absorbed or heat is transferred to the coolant, thereby further reducing or increasing the temperature of the second end face of the first semiconductor refrigeration plate, so that its first end face can reach a lower or higher temperature, thereby allowing the integrated chip to be tested to heat up or cool down faster, and its surface temperature can easily reach below -40°C or above 100°C.

[0111] Please refer to FIG8 , which is a schematic structural diagram of an embodiment of an integrated chip testing device provided by the present application.

[0112] As shown in FIG8 , the integrated chip testing device 20 includes a test socket 21 , a temperature adjustment device 22 , a first space 23 and a second space 24 .

[0113] The test socket 21 is used to place the integrated chip 2 to be tested. In some embodiments, the test socket 21 is called a chip test base.

[0114] Furthermore, the integrated chip testing device further includes a testing board (not shown), which is coupled to the test socket 21 to test the integrated chip 2 to be tested.

[0115] In some embodiments, the test socket 21 is part of a test board. Furthermore, the test socket 21 is used to test the integrated chip 2 to be tested. In some embodiments, the test socket 21 may not be directly mounted on the test board. The test board may be coupled to the test socket 21 via leads / wires. The separation of the test socket 21 from the test board eliminates the need for the test board to be tested simultaneously with the integrated chip 2 to be tested at high or low temperatures.

[0116] The integrated chip 2 to be tested corresponds to the integrated chip 1 to be tested above, and will not be described in detail here.

[0117] The temperature regulating device 22 is used to regulate the temperature when the integrated chip 2 to be tested is tested.

[0118] The temperature regulating device 22 further includes a first semiconductor refrigeration plate 221 , a heat exchange component 222 , a first heat conducting member 2221 , a liquid cooling component 223 , a second semiconductor refrigeration plate 2231 , a radiator 224 , and a second heat conducting member 225 .

[0119] Among them, the first semiconductor refrigeration plate 221, the heat exchange component 222, the first heat conductor 2221, the liquid cooling component 223, the second semiconductor refrigeration plate 2231, the radiator 224, and the second heat conductor 225 respectively correspond to the first semiconductor refrigeration plate 11, the heat exchange component 12, the first heat conductor 121, the liquid cooling component 13, the second semiconductor refrigeration plate 131, the radiator 14, and the second heat conductor 15 mentioned above, and are not repeated here.

[0120] Furthermore, the second space 24 is accommodated in the first space 23. In some embodiments, the second space 24 is used to accommodate the integrated chip 2 to be tested, the test socket 21, the first semiconductor cooling plate 221, and the second heat conducting member 225, so that the integrated chip 2 to be tested meets the test requirements at the target temperature.

[0121] In some embodiments, the test board is disposed in the second space 24 , so that the distance between the test board and the test socket 21 is shortened, thereby meeting the high-speed transmission requirement between the integrated chip 2 to be tested and the test board.

[0122] In some embodiments, the test board is disposed in the first space 23 .

[0123] In some embodiments, the first space 23 may be a test cabinet. In some embodiments, the first space 23 may be a test room.

[0124] In some embodiments, the second space 24 is a test box.

[0125] It can be understood that the volume of the first space 23 is greater than the volume of the second space 24 .

[0126] In some application scenarios, the target temperature may be any one or more of the temperature ranges of -60°C to -20°C, -20°C to 30°C, 30°C to 105°C, and 105°C to 160°C, without limitation herein. For example, the target temperature is -50°C, -40°C, -20°C, 0°C, 10°C, 20°C, 25°C, 30°C, 60°C, 80°C, 90°C, 100°C, 105°C, 110°C, 120°C, or 150°C.

[0127] In this embodiment, the first space 23 is used to accommodate the liquid cooling component 223 .

[0128] In some application scenarios, considering that the heat exchange component 222 may occupy a larger space, some components of the heat exchange component 222 can be partially accommodated in the second space 24, and other components of the heat exchange component 222 can be accommodated in the first space 23. For example, the first heat conductor 2221 is accommodated in the second space 24, and other components of the heat exchange component 222, including the second semiconductor refrigeration plate 2231 and the radiator 224, are accommodated in the first space 23.

[0129] In some application scenarios, when the volume of the first space 23 is too small to completely accommodate the heat exchange component 222 , the second semiconductor refrigeration plate 2231 and the radiator 224 in the heat exchange component 222 may be disposed outside the first space 23 .

[0130] In some application scenarios, when the heat exchange component 222 is installed in the first space 23 and there may be a problem of insufficient heat dissipation capacity, the second semiconductor refrigeration plate 2231 and the radiator 224 in the heat exchange component 222 can be set outside the first space 23 to further improve the heat dissipation capacity of the heat exchange component 222.

[0131] In some application scenarios, a dehumidifier (not shown) and a humidifier (not shown) are provided in the second space 24. The humidifier is provided to adjust the humidity when the integrated chip 2 under test is subjected to high temperature and high humidity testing; the dehumidifier is provided to adjust the humidity when the integrated chip 2 under test is subjected to other tests.

[0132] The above scheme, on the one hand, utilizes the semiconductor refrigeration chip attached to one side of the integrated chip to be tested to independently cool down or heat up the integrated chip to be tested. Furthermore, it utilizes the heat exchange component attached to the first semiconductor refrigeration plate to accelerate the speed at which the first semiconductor refrigeration plate absorbs the heat of the integrated chip to be tested or conducts heat to the integrated chip to be tested, so that the integrated chip to be tested can be quickly cooled down or heated up, thereby improving the test efficiency of the integrated chip to be tested.

[0133] On the other hand, by setting up a second semiconductor refrigeration plate in contact with the liquid cooling circuit in the heat exchange component, the heat of the coolant in the liquid cooling circuit is absorbed or heat is transferred to the coolant, thereby further reducing or increasing the temperature of the second end face of the first semiconductor refrigeration plate, so that its first end face can reach a lower or higher temperature, thereby allowing the integrated chip to be tested to heat up or cool down faster, and its surface temperature can easily reach below -40°C or above 100°C.

[0134] Please refer to FIG. 9 , which is a schematic structural diagram of another embodiment of the integrated chip testing device provided by the present application.

[0135] As shown in FIG9 , the integrated chip testing device 30 in this embodiment may specifically include:

[0136] A test seat 31 , a temperature adjustment device 32 , a first space 33 , a second space 34 , a first dehumidification device 35 and a second dehumidification device 36 .

[0137] The test socket 31 and the temperature regulating device 32 correspond to the above-mentioned test socket 21 and the temperature regulating device 22 respectively, and are not described in detail here.

[0138] The first space 33 is used to accommodate the second space 34 .

[0139] In some embodiments, the second space 34 is used to accommodate the test socket 31 and the integrated chip 3 to be tested. Furthermore, the second space 34 partially accommodates the temperature adjustment device 32. More specifically, the first space 33 is used to accommodate the structure of the temperature adjustment device 32 that cannot be accommodated in the second space 34.

[0140] The first dehumidification device 35 is disposed in the first space 33. The first dehumidification device 35 is used to reduce the humidity in the first space 33 according to a first dehumidification degree, or to reduce the humidity in the first space 33 and the second space 34 according to the first dehumidification degree.

[0141] Optionally, the first dehumidification device 35 can be any one of an air conditioner and a dehumidifier, or a combination of multiple types, which is not limited here.

[0142] In some embodiments, a second dehumidifier 36 is disposed within the first space 33. The second dehumidifier 36 interacts with the second space 34. More specifically, the second dehumidifier 36 interacts with the second space 34 via a first air intake channel 361 and a first air exhaust channel 362. The second dehumidifier 36 is configured to reduce the humidity within the second space 34 to a target humidity according to a second dehumidification level. The humidity of the first air within the first air intake channel 361 is greater than the humidity of the second air within the first air exhaust channel 362.

[0143] The first dehumidification degree is lower than the second dehumidification degree.

[0144] In some embodiments, the first dehumidification degree is characterized by the ability of the first dehumidification device 35 to adjust the humidity of the first space 33 and / or the second space 34, for example, reducing the humidity of the first space 33 and / or the second space 34 to 45%, 40%, 39%, 38%, 37%, 36%, 35%, 34%, 33%, 32%, 31%, 30%, 25% or 20%, etc., which is not limited here.

[0145] In some embodiments, the second dehumidification degree is characterized by the ability of the second dehumidification device 36 to adjust the humidity of the second space 34, for example, reducing the humidity of the second space 34 to 20%, 15%, 10%, 9%, 8%, 7%, 6%, 5%, 4%, 3%, 2%, 1% or 0.1%, etc., which is not limited here.

[0146] In some application scenarios, the target humidity is less than 20%. In some application scenarios, the target humidity is less than 10%. In some application scenarios, the target humidity is less than 5%. In some application scenarios, the target humidity is less than 3%.

[0147] Optionally, the second dehumidification device 36 contains a solid hygroscopic material for absorbing water molecules in the air. Optionally, the solid hygroscopic material includes any one or more of activated carbon, activated alumina, silica gel, carbon molecular sieve, and zeolite molecular sieve.

[0148] After a period of research, the inventors of this application have discovered that if the surface temperature of a low-temperature object (such as the integrated chip 3 under test in this embodiment) is below the dew point of the air and the water saturation of the air reaches 100%, condensation and / or frosting will occur on the surface of the low-temperature object. The degree of frosting and / or condensation on the surface of the integrated chip under test depends on the surface temperature of the integrated chip under test, the relative humidity of the environment, or the water content of the air.

[0149] Understandably, in some application scenarios, the integrated chip 3 to be tested needs to be mounted on the test socket 31 to undergo low-temperature operation testing. If the humidity in the air is high, as the temperature drops, frost and / or condensation may appear on the surface of the integrated chip 3 to be tested or the test socket 31. Frost and / or condensation on the surface of the integrated chip 3 to be tested or the test socket 31 can easily cause damage to the integrated chip 3 to be tested or the test socket 31 due to a short circuit.

[0150] Methods used by those skilled in the art to prevent frost on the integrated chip to be tested at low temperatures mainly include using a heating element to heat the surface of the integrated chip to be tested, applying an anti-frost coating on the surface of the integrated chip to be tested, using a dehumidifier or air conditioner to control the ambient humidity, or vibrating the integrated chip to be tested to prevent water vapor from adhering.

[0151] The inventors of the present application have discovered that the above-mentioned conventional technical means all have certain deficiencies: the method of using a heating element to heat the surface of the integrated chip to be tested makes it difficult to maintain the integrated chip to be tested at a preset temperature, thereby failing to meet the testing requirements of the integrated chip to be tested; the method of coating the surface of the integrated chip to be tested may cause damage to the integrated chip to be tested. If the number of integrated chips to be tested is large, it is also difficult to coat the surface of the integrated chips to be tested in large quantities; the use of a dehumidifier commonly used in this field can only control the ambient humidity to above 10%. If the target temperature is lower than -40 degrees Celsius, frost will still form on the surface of the integrated chip to be tested; mechanically vibrating the integrated chip to be tested is not suitable for integrated chips to be tested that are not resistant to vibration.

[0152] In response to the shortcomings of the above-mentioned means, the inventors of the present application use a first dehumidification device and a second dehumidification device to adjust the humidity in the first space and the second space respectively, without the assistance of other auxiliary dehumidification methods, so that the humidity in the second space is controlled within a very small range (for example, the humidity is controlled below 5%), so that frost and / or condensation does not occur on the surface of the target object at the target temperature.

[0153] Furthermore, the first air in the second space 34 is sucked into the second dehumidification device 36 through the first air inlet channel 361, and the second air is obtained after dehumidification by the second dehumidification device 36. The second air is injected into the second space 34 through the first exhaust channel 362, thereby realizing dehumidification in the second space 34.

[0154] Since the dehumidification capacity of the solid dehumidifier in the second dehumidification device 36 is limited, the water molecules adsorbed exceeding a certain threshold value can no longer dehumidify the first air. That is, the second dehumidification device 36 cannot meet the dehumidification conditions at this time, so the solid dehumidifier in the second dehumidification device 36 needs to be regenerated.

[0155] In some application scenarios, the second dehumidifier 36 can selectively interact with the first space 33. More specifically, the second dehumidifier 36 can selectively interact with the first space 33. In some embodiments, the air in the first space 33 can be heated and then passed into the second dehumidifier 36 through the second air inlet channel 363. This allows the water molecules in the second dehumidifier 36 to evaporate and then re-enter the first space 33 through the second exhaust channel 364. After the solid dehumidifier in the second dehumidifier 36 completes the regeneration operation, it can resume dehumidifying the air in the second space 34.

[0156] It is worth noting that when the second dehumidification device 36 exchanges air with the first space 33, the second dehumidification device 36 does not exchange air with the second space.

[0157] After a period of research, the inventors of the present application found that using only a second dehumidifier to dehumidify the first and second spaces requires a significant amount of time and energy to reduce the humidity in the second space to the target humidity due to the limited dehumidification capacity of the second dehumidifier per unit time. Considering the need to save energy and improve efficiency, a first dehumidifier is used to perform a first-stage humidity adjustment on the first and / or second spaces, reducing the humidity in the first and / or second spaces to below a certain range (e.g., any one of 10%-15%, 15%-20%, 20%-25%, 20%-30%, or 25-30%). Thereafter, a second dehumidifier is used to perform a second-stage humidity adjustment on the second space, further adjusting the humidity within the above range to the target humidity (any one of below 10%, below 5%, below 3%, or below 1%), so that the integrated chip under test does not frost and / or condense in an environment below 0°C.

[0158] Optionally, a humidifying device (not shown) is further provided in the second space 34 for increasing the humidity of the second space 34 according to chip testing requirements.

[0159] The above scheme, on the one hand, utilizes the semiconductor refrigeration chip attached to one side of the integrated chip to be tested to independently cool down or heat up the integrated chip to be tested. Furthermore, it utilizes the heat exchange component attached to the first semiconductor refrigeration plate to accelerate the speed at which the first semiconductor refrigeration plate absorbs the heat of the integrated chip to be tested or conducts heat to the integrated chip to be tested, so that the integrated chip to be tested can be quickly cooled down or heated up, thereby improving the test efficiency of the integrated chip to be tested.

[0160] On the other hand, by setting up a second semiconductor refrigeration plate in contact with the liquid cooling circuit in the heat exchange component, the heat of the coolant in the liquid cooling circuit is absorbed or heat is transferred to the coolant, thereby further reducing or increasing the temperature of the second end face of the first semiconductor refrigeration plate, so that its first end face can reach a lower or higher temperature, thereby allowing the integrated chip to be tested to heat up or cool down faster, and its surface temperature can easily reach below -40°C or above 100°C.

[0161] Furthermore, by setting up a second dehumidification device in the second space accommodating the integrated chip to be tested, the humidity of the second space is reduced to below 10% before the integrated chip to be tested undergoes low-temperature testing, thereby alleviating the condensation and frost problem of the integrated chip to be tested at an ambient temperature below 0°C.

[0162] Please refer to FIG. 10 , which is a schematic structural diagram of another embodiment of the integrated chip testing device provided in the present application.

[0163] As shown in FIG10 , the integrated chip testing device 40 provided in this application may specifically include:

[0164] Semiconductor refrigeration plate 41, metal heat exchanger 42, first-level liquid cooling module 43, second-level liquid cooling module 44, metal heat conductive block 45, temperature sensor 46, chip test socket 47, chip test board 48, temperature control board 49, first space 401, second space 402.

[0165] Among them, the semiconductor refrigeration plate 41, the metal heat exchanger 42 and the metal heat conductive block 45 respectively correspond to the first semiconductor refrigeration plate 11, the second heat conductive member 15 and the first heat conductive member 121 mentioned above, and are not described in detail here.

[0166] In some embodiments, cooling liquid may be circulated between the primary liquid cooling module 43 and the secondary liquid cooling module 44 .

[0167] In this embodiment, the first-stage liquid cooling module 43 and the second-stage liquid cooling module 44 correspond to the above-mentioned radiator 14 and the second semiconductor cooling plate 131, respectively, and are not described in detail here.

[0168] Specifically, the integrated chip to be tested 4 , the semiconductor cooling plate 41 , the metal heat exchanger 42 , the metal heat conductive block 45 , the temperature sensor 46 , and the chip test socket 47 are accommodated in the second space 402 .

[0169] Optionally, the first space 401 may partially or completely accommodate the primary liquid cooling module 43 and / or the secondary liquid cooling module 44. In this embodiment, the first space 401 is used to partially accommodate the primary liquid cooling module 43 and the secondary liquid cooling module 44.

[0170] Furthermore, the first space 401 is also used to accommodate a chip testing board 48 and a temperature control board 49 .

[0171] The temperature control board 49 is connected to the temperature sensor 46 and the semiconductor refrigeration chip 41 in communication with each other. Optionally, the communication connection includes a wired connection or a wireless connection. In this embodiment, the temperature control board 49 is connected to the temperature sensor 46 and the semiconductor refrigeration chip 41 in a wired manner. The temperature control board 49 is used to obtain the current temperature measured by the temperature sensor 46, determine the difference between the current temperature and the target temperature of the integrated circuit 4 under test in the test requirements, and determine whether to increase the cooling capacity or heating amount of the semiconductor refrigeration chip 41.

[0172] The chip test board 48 is coupled to the chip test socket 47 . The chip test board 48 is used to perform a test on the integrated chip 4 to be tested that is coupled to the chip test socket 47 .

[0173] Optionally, the chip test board 48 and the temperature control board 49 are further coupled to a host computer (not shown) disposed outside the first space 401 via a control bus. In some embodiments, the host computer is used to issue test instructions to the chip test board 48 and the temperature control board 49.

[0174] The above scheme, on the one hand, utilizes the semiconductor refrigeration chip attached to one side of the integrated chip to be tested to independently cool down or heat up the integrated chip to be tested. Furthermore, it utilizes the heat exchange component attached to the first semiconductor refrigeration plate to accelerate the speed at which the first semiconductor refrigeration plate absorbs the heat of the integrated chip to be tested or conducts heat to the integrated chip to be tested, so that the integrated chip to be tested can be quickly cooled down or heated up, thereby improving the test efficiency of the integrated chip to be tested.

[0175] Please refer to FIG. 11 , which is a schematic structural diagram of another embodiment of the integrated chip testing device provided in the present application.

[0176] As shown in Figure 11, the integrated chip testing device 50 specifically includes: a semiconductor refrigeration plate 51, a temperature sensor 52, a multi-stage hybrid low-temperature liquid cooling module 53, a chip test socket 54, a second space 55, a first space 56, a chip test board 57, an MCU microcontroller 58, a power supply 501 and a voltage conversion module 502.

[0177] In this embodiment, the chip testing board 57 is electrically connected to the chip testing socket 54 and the integrated chip to be tested 5 respectively.

[0178] The semiconductor refrigeration plate 51 corresponds to the first semiconductor refrigeration plate 11 mentioned above, and will not be described in detail here.

[0179] In some embodiments, the first surface of the semiconductor refrigeration plate 51 contacts a portion of the surface of the integrated chip 5 under test, the first surface of the temperature sensor 52 contacts the first surface of the semiconductor refrigeration plate 51, and the second surface of the temperature sensor 52 contacts a portion of the surface of the integrated chip 5 under test. The temperature sensor is used to obtain the current temperature of the integrated chip 5 under test and adjust the cooling power or heating power of the semiconductor refrigeration plate 51 based on the difference between the current temperature and the set temperature. Optionally, there can be one or more temperature sensors 52 to more accurately obtain the current temperature of the integrated chip 5 under test.

[0180] Among them, the multi-stage hybrid low-temperature liquid cooling module 53 and the chip test socket 54 correspond to the above-mentioned temperature adjustment device 10 and the test socket 21 respectively, and are not described here in detail.

[0181] The power supply 501 is electrically connected to the voltage conversion module 502 , and the voltage conversion module 502 is further electrically connected to the semiconductor cooling plate 51 . The voltage conversion module 502 is used to provide the converted voltage to the semiconductor cooling plate 51 .

[0182] In some embodiments, the power supply 501 provides 380V or 240V AC power. In some embodiments, the power supply 501 provides 5V, 12V, 24V, 36V, 48V, 60V, 110V, or 220V DC power.

[0183] Optionally, the input voltage of the semiconductor refrigeration chip 51 is a DC power lower than 100V. Exemplarily, the input voltage of the semiconductor refrigeration chip is 5V, 12V, 24V, 36V, or 48V. In some application scenarios, the voltage conversion module 502 can be used to convert the AC power input from the power supply into DC power, and can also be used to reduce the DC power higher than 100V to a DC power suitable for the semiconductor refrigeration chip 51. In addition, it can be used to adjust the voltage value applied to the semiconductor refrigeration chip 51, thereby adjusting the cooling / heating power of the semiconductor refrigeration chip 51.

[0184] Optionally, the MCU microcontroller 58 is respectively communicated with the temperature sensor 52, the multi-stage hybrid low-temperature liquid cooling module 53, the chip test board 57, and the voltage conversion module 502. Specifically, the MCU microcontroller 58 can perform functions including current temperature acquisition, adjusting the voltage value applied to the semiconductor refrigeration plate 51 to achieve temperature regulation of the semiconductor refrigeration plate 51, controlling the liquid cooling module, and obtaining the current operating status of the test board. In some application scenarios, the MCU microcontroller 58 can also be communicated with a second dehumidification device (not shown) that interacts with the second space 55 to control the humidity in the second space 55, so as to avoid frost and / or condensation of the integrated chip 5 to be tested and / or the chip test seat 54 due to excessive humidity in the second space 55 when the internal temperature of the second space 55 is lower than 0°C.

[0185] In some application scenarios, the MCU controller 59 can perform some or all of the functions of the temperature control board 49 described above.

[0186] The above scheme, on the one hand, utilizes the semiconductor refrigeration chip attached to one side of the integrated chip to be tested to independently cool down or heat up the integrated chip to be tested. Furthermore, it utilizes the heat exchange component attached to the first semiconductor refrigeration plate to accelerate the speed at which the first semiconductor refrigeration plate absorbs the heat of the integrated chip to be tested or conducts heat to the integrated chip to be tested, so that the integrated chip to be tested can be quickly cooled down or heated up, thereby improving the test efficiency of the integrated chip to be tested.

[0187] On the other hand, by setting up a second semiconductor refrigeration plate in contact with the liquid cooling circuit in the heat exchange component, the heat of the coolant in the liquid cooling circuit is absorbed or heat is transferred to the coolant, thereby further reducing or increasing the temperature of the second end face of the first semiconductor refrigeration plate, so that its first end face can reach a lower or higher temperature, thereby allowing the integrated chip to be tested to heat up or cool down faster, and its surface temperature can easily reach below -40°C or above 100°C.

[0188] Furthermore, by setting up a second dehumidification device in the second space accommodating the integrated chip to be tested, the humidity of the second space is reduced to below 10% before the integrated chip to be tested undergoes low-temperature testing, thereby alleviating the condensation and frost problem of the integrated chip to be tested at an ambient temperature below 0°C.

[0189] Please refer to FIG. 12 , which is a schematic structural diagram of another embodiment of the integrated chip testing device provided in the present application.

[0190] As shown in FIG12 , the chip integrated test device 80 specifically includes a first semiconductor refrigeration plate 81 , a metal heat exchanger 82 , a cooling liquid channel 83 , a liquid cooling module 84 , a metal heat conducting block 85 , and a chip test seat 86 .

[0191] Among them, the chip to be tested 8, the first semiconductor refrigeration plate 81, the metal heat exchanger 82, the metal heat conductive block 85, and the chip test seat 86 respectively correspond to the chip to be tested 4, the first semiconductor 11, the first heat conductive member 15, and the chip test seat 47 mentioned above, and will not be repeated here.

[0192] Specifically, the cooling liquid channel 83 further includes a cooling liquid inlet channel 831 and a cooling liquid outlet channel 832. The cooling liquid inlet channel 831 is used to circulate the cooling liquid from the liquid cooling circuit (not shown) in the metal heat exchanger 82 to the liquid cooling module 85, and the cooling liquid outlet channel 832 is used to circulate the cooling liquid from the liquid cooling module 85 to the liquid cooling circuit of the metal heat exchanger 82.

[0193] In some embodiments, the cooling liquid inlet channel 831 and / or the cooling liquid outlet channel 832 are further provided with a liquid pump (not shown).

[0194] In some embodiments, the outer surface of the coolant inlet channel 831 is partially or entirely provided with heat dissipation fins (not shown). In some application scenarios, when the metal heat exchanger 82 is used to absorb heat from the first semiconductor refrigeration plate 81, that is, the coolant in the coolant inlet channel 831 absorbs heat, in order to reduce the temperature of the coolant entering the liquid cooling module 85, the heat dissipation fins can be used to absorb part of the heat of the coolant. Furthermore, a cooling fan (not shown) can be used to blow air toward the heat dissipation fins to accelerate the cooling rate of the coolant in the coolant inlet channel 831.

[0195] Furthermore, the liquid cooling module 84 is used to absorb heat from the coolant in the coolant inlet channel 831 , or to release heat to the coolant in the coolant inlet channel 831 .

[0196] Optionally, the liquid cooling module 84 may specifically include a heat exchanger 841 , a second semiconductor cooling plate 842 , a metal base 843 , a heat pipe 844 , heat dissipation fins 845 and a cooling fan 846 .

[0197] In some embodiments, a liquid cooling circuit (not shown) is further provided in the heat exchanger 841, and the second semiconductor refrigeration plate 842 is used to absorb heat from the coolant in the liquid cooling circuit, or to release heat to the coolant in the liquid cooling circuit.

[0198] Specifically, one end surface of the second semiconductor refrigeration plate 842 is in contact with the heat exchanger 841 , and the other end surface of the second semiconductor refrigeration plate 842 is in contact with the metal base 843 .

[0199] In some application scenarios, the metal base 843 is also provided with a heating wire (not shown in the figure). When the second semiconductor refrigeration plate 842 is used to release heat to the coolant in the liquid cooling circuit, the heating wire is used to provide heat to the second semiconductor refrigeration plate 842.

[0200] Optionally, the heat pipe 844 is partially inserted into the metal base 843 to increase the contact area between the heat pipe 844 and the metal base 843, further increasing the heat dissipation capacity of the liquid cooling module 84. In some embodiments, the heat pipe 844 is attached to the outer surface of the metal base 843.

[0201] Optionally, heat pipe 844 is provided with heat dissipation fins 845. When second semiconductor refrigeration plate 842 is used to absorb heat from the coolant in the liquid cooling circuit within heat exchanger 841, metal base 843, heat pipe 844, and heat dissipation fins 845 cooperate with each other to dissipate the heat absorbed by second semiconductor refrigeration plate 842 into the environment.

[0202] Furthermore, a cooling fan 846 is attached to the heat sink fins 845. When the second semiconductor fins 842 are absorbing heat from the coolant in the liquid cooling circuit within the heat exchanger 841, the rate at which the heat absorbed by the second semiconductor fins 842 is dissipated to the environment is increased. In some applications, the cooling fan 846 may not be operated when the second semiconductor fins 842 are releasing heat to the coolant in the liquid cooling circuit within the heat exchanger 841.

[0203] It can be understood that the number of metal base 843, heat pipe 844, heat dissipation fins 845 and cooling fan 846 can be multiple. When the second semiconductor refrigeration plate 842 is used to absorb the heat of the coolant in the liquid cooling circuit in the heat exchanger 841, the rate at which the heat absorbed by the second semiconductor refrigeration plate is dissipated to the environment is further improved.

[0204] The above scheme, on the one hand, utilizes the semiconductor refrigeration chip attached to one side of the integrated chip to be tested to independently cool down or heat up the integrated chip to be tested. Furthermore, it utilizes the heat exchange component attached to the first semiconductor refrigeration plate to accelerate the speed at which the first semiconductor refrigeration plate absorbs the heat of the integrated chip to be tested or conducts heat to the integrated chip to be tested, so that the integrated chip to be tested can be quickly cooled down or heated up, thereby improving the test efficiency of the integrated chip to be tested.

[0205] On the other hand, by setting up a second semiconductor refrigeration plate in contact with the liquid cooling circuit in the heat exchange component, the heat of the coolant in the liquid cooling circuit is absorbed or heat is transferred to the coolant, thereby further reducing or increasing the temperature of the second end face of the first semiconductor refrigeration plate, so that its first end face can reach a lower or higher temperature, thereby allowing the integrated chip to be tested to heat up or cool down faster, and its surface temperature can easily reach below -40°C or above 100°C.

[0206] Please refer to FIG. 13 , which is a flow chart of an embodiment of an integrated chip testing method provided in the present application.

[0207] The integrated chip test method provided in the present application is specifically performed by an integrated chip test module. In some application scenarios, the integrated chip test module can be the integrated chip test device itself above. In some application scenarios, the integrated chip test module can be an embedded device connected to the integrated chip test device wired communication or wireless communication above, or it can be user equipment (User Equipment, UE), mobile device, user terminal, terminal, cellular phone, cordless phone, personal digital processing (Personal Digital Assistant, PDA), handheld device, computing device, vehicle-mounted device, wearable device or glasses for augmented reality or virtual reality, helmet and other products, etc., are not limited here.

[0208] In some application scenarios, the integrated chip test module may be the MCU microcontroller 58 in the above-mentioned integrated chip test device.

[0209] As shown in FIG12 , an embodiment of the integrated chip testing method provided in this application may specifically include the following steps:

[0210] S101, issue temperature control instructions.

[0211] Specifically, the user sends a temperature setting instruction to the temperature control module through the integrated chip test module.

[0212] The temperature control module may correspond to the temperature regulating device 10 mentioned above, which will not be described in detail here.

[0213] Optionally, the temperature setting instruction includes a preset temperature value.

[0214] S102, adjusting the ambient humidity to a preset humidity.

[0215] Before adjusting the temperature of the integrated chip to be tested, the integrated chip test module first adjusts the ambient humidity in the second space using the humidity control module.

[0216] It will be appreciated that adjusting the ambient humidity may include reducing the humidity or increasing the humidity.

[0217] In some embodiments, when the integrated chip to be tested needs to be tested at a temperature below 0°C, if the ambient humidity is not controlled below 20%, the surface temperature of the cold surface of the first semiconductor refrigeration plate and / or the integrated chip to be tested may be lower than the temperature in the second space, and frost and / or condensation may occur on the surface of the integrated chip to be tested. Such phenomenon may cause the integrated chip to be tested to be damaged by a short circuit. To avoid the occurrence of such phenomenon, a first dehumidification device disposed in the first space and a second dehumidification device disposed in the second space are utilized to further reduce the humidity in the second space to below 10%, thereby preventing frost or condensation from forming on the surface of the integrated chip to be tested when the temperature is below 0°C.

[0218] In some embodiments, when the integrated chip to be tested needs to undergo a high temperature and high humidity test, a humidifying device in the second space can be used to increase the ambient humidity.

[0219] S103, humidity control successful.

[0220] In some embodiments, a humidity sensor is further provided in the second space. When the humidity sensor obtains that the current humidity is equal to the preset humidity and maintains it for a certain period of time, the humidity control module feeds back a humidity control success signal to the integrated chip test module.

[0221] S104, collecting the current temperature value.

[0222] Specifically, since the cooling and heating power of the first semiconductor refrigeration plate in the temperature regulation device provided in the present application exceeds 100W, that is, the temperature regulation rate of the first semiconductor refrigeration plate is very high, in order to improve the accuracy of temperature regulation, the integrated chip test module first uses the temperature sensors that are in contact with the first semiconductor refrigeration plate and the integrated chip to be tested to collect the current temperature value of the integrated chip to be tested before performing temperature regulation.

[0223] S105, returning the current temperature value.

[0224] Specifically, the temperature sensor returns the collected current temperature value to the integrated chip test module.

[0225] In some embodiments, the number of temperature sensors is greater than one, and the integrated chip test module may perform numerical processing such as averaging and median processing on the temperature values ​​currently collected by the multiple temperature sensors to obtain the current temperature value.

[0226] S106, cooling or heating according to the current temperature value.

[0227] Specifically, the integrated chip test module uses the temperature generation module to perform cooling or heating according to the difference between the current temperature value and the preset temperature value.

[0228] Among them, the temperature generation module corresponds to the MCU microcontroller mentioned above and will not be described here in detail.

[0229] S107, temperature maintenance.

[0230] Optionally, in the process of executing S106-S107, in order to improve the efficiency and accuracy of temperature regulation, the integrated chip test module can apply a combination of one or more algorithms including proportional-integral-derivative (PID) control, fuzzy control, neural network control, adaptive control, sliding film control, linear quadratic regulator control (LQR) or reinforcement learning-based control algorithms, which are not limited here.

[0231] S108, completing temperature control.

[0232] When the temperature value of the surface of the chip to be tested collected by the temperature sensor is maintained at a preset temperature value for a period of time (for example, 5 minutes, 10 minutes, or 15 minutes), the temperature control is completed.

[0233] S109, start chip testing.

[0234] Specifically, the integrated chip test module sends chip test instructions to the chip test board.

[0235] The chip test board corresponds to the chip test board 48 mentioned above, and will not be described in detail here.

[0236] S110, performing chip testing.

[0237] Specifically, the chip testing board tests the integrated chip to be tested.

[0238] S111, obtain chip information.

[0239] Specifically, the chip testing board obtains the operation information of the chip to be tested during the process of testing the integrated chip to be tested.

[0240] S112, returning chip information.

[0241] S113, chip testing is completed.

[0242] The above scheme, on the one hand, utilizes the semiconductor refrigeration chip attached to one side of the integrated chip to be tested to independently cool down or heat up the integrated chip to be tested. Furthermore, it utilizes the heat exchange component attached to the first semiconductor refrigeration plate to accelerate the speed at which the first semiconductor refrigeration plate absorbs the heat of the integrated chip to be tested or conducts heat to the integrated chip to be tested, so that the integrated chip to be tested can be quickly cooled down or heated up, thereby improving the test efficiency of the integrated chip to be tested.

[0243] On the other hand, by setting up a second semiconductor refrigeration plate in contact with the liquid cooling circuit in the heat exchange component, the heat of the coolant in the liquid cooling circuit is absorbed or heat is transferred to the coolant, thereby further reducing or increasing the temperature of the second end face of the first semiconductor refrigeration plate, so that its first end face can reach a lower or higher temperature, thereby allowing the integrated chip to be tested to heat up or cool down faster, and its surface temperature can easily reach below -40°C or above 100°C.

[0244] Furthermore, by setting up a second dehumidification device in the second space accommodating the integrated chip to be tested, the humidity of the second space is reduced to below 10% before the integrated chip to be tested undergoes low-temperature testing, thereby alleviating the condensation and frost problem of the integrated chip to be tested at an ambient temperature below 0°C.

[0245] The above description is only an implementation method of the present application and does not limit the patent scope of the present application. Equivalent structures or equivalent process changes made by utilizing the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A temperature regulating device, characterized in that: The temperature regulating device is applied to the integrated chip testing scenario, and the temperature regulating device comprises: A first semiconductor refrigeration sheet, wherein a first end surface of the first semiconductor refrigeration sheet is configured to be attached to a side of the integrated chip to be tested, and is used to absorb heat from the integrated chip to be tested or transfer heat to the integrated chip to be tested; The heat exchange component is attached to the second end surface of the first semiconductor refrigeration plate and is used for exchanging heat with the first semiconductor refrigeration plate.

2. The temperature adjustment device according to claim 1, characterized in that: The heat exchange component comprises: A first heat-conducting member, wherein the first heat-conducting member is attached to the second end surface of the first semiconductor cooling sheet; A liquid cooling component, wherein part of the liquid cooling circuit of the liquid cooling component is arranged on the first heat conducting member, and is used to circulate the coolant in the liquid cooling circuit to exchange heat with the first heat conducting member according to the test requirements of the integrated chip.

3. The temperature adjustment device according to claim 2, characterized in that: The liquid cooling component includes a second semiconductor refrigeration plate, which is in contact with another part of the liquid cooling circuit of the liquid cooling component. The second semiconductor refrigeration plate is used for exchanging heat with the liquid cooling circuit.

4. The temperature adjustment device according to claim 2, characterized in that: The liquid cooling assembly further includes a radiator, which is used to further dissipate the heat absorbed by the cooling liquid when the cooling liquid absorbs the heat in the first heat conductor.

5. The temperature adjustment device according to claim 1, characterized in that: The temperature regulating device also includes: A second heat-conducting member, wherein the first end surface of the second heat-conducting member is configured to be attached to one side of the integrated chip to be tested, for exchanging heat with the integrated chip to be tested, and the second end surface of the second heat-conducting member is attached to the first end surface of the first semiconductor cooling plate.

6. The temperature adjustment device according to claim 5, characterized in that: A heat-conducting material is coated between the second end surface of the second heat-conducting member and the first end surface of the first semiconductor cooling plate, and / or a heat-conducting material is coated between the first end surface of the second heat-conducting member and one side of the integrated chip to be tested.

7. The temperature adjustment device according to claim 1, characterized in that: The first semiconductor refrigeration sheet is a single-stage Peltier element; When dissipating the heat absorbed from the integrated chip to be tested, the first end surface of the first semiconductor cooling sheet is a cold surface, and the second end surface of the first semiconductor cooling sheet is a hot surface; When heat is conducted to the integrated chip to be tested through the first semiconductor cooling sheet, the first end surface of the first semiconductor cooling sheet is a hot surface, and the second end surface of the first semiconductor cooling sheet is a cold surface.

8. The temperature adjustment device according to claim 1, characterized in that: The temperature regulating device also includes: The temperature control unit is configured to perform voltage inversion on the first end surface and the second end surface of the first semiconductor refrigeration plate to achieve switching between the cold surface and the hot surface.

9. A testing device for an integrated chip, characterized in that: The testing device comprises: A test socket, used for placing the integrated chip to be tested; A test board, coupled to the test socket, to test the integrated chip to be tested; A temperature regulating device, used for regulating the temperature when testing an integrated chip to be tested, wherein the temperature regulating device is the temperature regulating device as described in any one of claims 1-8.

10. The testing device according to claim 9, characterized in that: The testing device also includes: First Space; The second space is contained in the first space, and the second space is used to contain the integrated chip to be tested, the test socket and the first semiconductor cooling plate, so that the integrated chip to be tested meets the test requirements at a target temperature.

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