ANPC three-level inverter circuit and modulation method therefor

Abstract

The present invention provides an ANPC three-level inverter circuit and a modulation method therefor. The ANPC three-level inverter circuit comprises a three-phase bridge arm, and each phase bridge arm comprises six switching devices. The modulation method comprises: alternately implementing a first modulation mode and a second modulation mode in a total modulation period, the first modulation mode and the second modulation mode respectively having power frequency modulation periods having the same duration, and the duration of the total modulation period being three times the duration of the power frequency modulation period; wherein the first modulation mode comprises controlling four of the six switching devices to be in a high-frequency on / off state in a half power frequency modulation period; and the second modulation mode comprises controlling the other two of the six switching devices to be in a high-frequency on / off state in one power frequency modulation period. According to the ANPC three-level inverter circuit and the modulation method therefor of the present invention, the temperature balance of the ANPC three-level inverter circuit can be maintained without the need to monitor the temperature in real time and dynamically adjust a zero-level output state, thereby reducing the difficulty in heat dissipation design.

Description

ANPC type three-level inverter circuit and modulation method thereof Technical Field

[0001] The present invention mainly relates to the field of electronics, and in particular to an ANPC type three-level inverter circuit and a modulation method thereof. Background Art

[0002] Compared to traditional diode neutral point clamped (NPC) three-level inverters, the active neutral point clamped (ANPC) topology uses fully controllable devices in place of clamping diodes to generate redundant zero-voltage states. By properly switching these redundant zero-voltage states during the commutation process, the loss distribution of power devices can be adjusted, thereby achieving balanced control of junction temperature. Common temperature control methods in the prior art primarily involve real-time temperature acquisition of each switching device and targeted selection of an appropriate zero-voltage output state. Alternatively, they model the switching device losses to obtain a piecewise function related to the modulation index and load impedance angle or power factor, then calculate in real time the device with the highest current power loss and select the appropriate zero-voltage output state.

[0003] However, the approach of dynamically selecting the zero-level output state after determining the current module temperature distribution has technical drawbacks: frequent switching to zero-level output imposes strict constraints on the switching timing logic of the ANPC three-level inverter circuit. Improper handling can directly cause some power devices to fail due to excessive voltage stress, leading to system failure. Therefore, a modulation method that can maintain temperature balance in ANPC three-level inverter circuits without the need for dynamic monitoring and adjustment is urgently needed.

[0004] Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide an ANPC type three-level inverter circuit and a modulation method thereof, which can maintain the temperature balance of the ANPC type three-level inverter circuit without the need for dynamic monitoring and adjustment.

[0006] To solve the above technical problems, the present invention provides a modulation method for an ANPC type three-level inverter circuit, wherein the inverter circuit includes a three-phase bridge arm, each phase bridge arm includes six switching devices, namely a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device and a sixth switching device, the first switching device and the fifth switching device share a first half-bridge module, the fourth switching device and the sixth switching device share a second half-bridge module, and the second switching device and the third switching device share a third half-bridge module, the modulation method includes alternatingly implementing a first modulation mode and a second modulation mode within a total modulation period, the first modulation mode and the second modulation mode each having an industrial frequency modulation period of the same length, and the total modulation period is three times the length of the industrial frequency modulation period; wherein the first modulation mode includes controlling four of the six switching devices to be in a high-frequency on-off state within half of the industrial frequency modulation period; and the second modulation mode includes controlling the other two of the six switching devices to be in a high-frequency on-off state within one industrial frequency modulation period.

[0007] In one embodiment of the present invention, the modulation method includes sequentially adopting a first modulation mode, a second modulation mode, and the first modulation mode in a total modulation period.

[0008] In one embodiment of the present invention, the first modulation mode further includes controlling the second switching device and the third switching device to be in the power frequency on-off state within the same power frequency modulation cycle; and controlling the first switching device, the fourth switching device, the fifth switching device and the sixth switching device to be in the high frequency on-off state within half of the power frequency modulation cycle, and to be in the power frequency on-off state within the other half of the power frequency modulation cycle.

[0009] In one embodiment of the present invention, the first modulation mode specifically includes, within one power frequency modulation cycle: controlling the second switching device and the third switching device to be in the power frequency on-off state; controlling the first switching device and the fifth switching device to be in the high frequency on-off state in the first half of the power frequency modulation cycle in the same power frequency modulation cycle, and to be in the power frequency on-off state in the second half of the power frequency modulation cycle; controlling the fourth switching device and the sixth switching device to be in the high frequency on-off state in the second half of the power frequency modulation cycle in the same power frequency modulation cycle, and to be in the power frequency on-off state in the first half of the power frequency modulation cycle.

[0010] In one embodiment of the present invention, the modulation method further includes: controlling the second switching device and the sixth switching device to be in the on state and the third switching device and the fourth switching device to be in the off state during the first half of the power frequency modulation period when the first switching device and the fifth switching device are in the high-frequency on-off state; and controlling the third switching device and the fifth switching device to be in the on state and the first switching device and the second switching device to be in the off state during the second half of the power frequency modulation period when the fourth switching device and the sixth switching device are in the high-frequency on-off state.

[0011] In one embodiment of the present invention, the second modulation mode specifically includes: controlling the second switching device and the third switching device to be in a high-frequency on-off state in the same industrial frequency modulation cycle; and controlling the first switching device, the fourth switching device, the fifth switching device and the sixth switching device to be in an industrial frequency on-off state in the same industrial frequency modulation cycle.

[0012] The present invention also provides an ANPC type three-level inverter circuit, which is applicable to the modulation method of the ANPC type three-level inverter circuit as in any of the previous embodiments. The inverter circuit includes three-phase bridge arms, and each phase bridge arm includes six switching devices, namely a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device and a sixth switching device; wherein the first switching device and the fifth switching device share a first half-bridge module, the fourth switching device and the sixth switching device share a second half-bridge module, and the second switching device and the third switching device share a third half-bridge module; the inverter circuit is configured to adopt a modulation method, which includes alternatingly implementing a first modulation mode and a second modulation mode within a total modulation period, and in the first modulation mode, four of the six switching devices are in a high-frequency on-off state within half an industrial frequency modulation period, and in the second modulation mode, the other two of the six switching devices are in a high-frequency on-off state within one industrial frequency modulation period.

[0013] In one embodiment of the present invention, the conduction conditions of the switching devices in the first modulation mode are as follows: within the same power frequency modulation cycle, the second switching device and the third switching device are in the power frequency on-off state, the first switching device, the fourth switching device, the fifth switching device and the sixth switching device are in the high frequency on-off state within half of the power frequency modulation cycle, and are in the power frequency on-off state within the other half of the power frequency modulation cycle.

[0014] In one embodiment of the present invention, within the same power frequency modulation cycle, the conduction conditions of the switching devices are as follows: the second switching device and the third switching device are in the power frequency on-off state; the first switching device and the fifth switching device are in the high frequency on-off state in the first half of the power frequency modulation cycle and in the power frequency on-off state in the second half of the power frequency modulation cycle; the fourth switching device and the sixth switching device are in the high frequency on-off state in the second half of the power frequency modulation cycle and in the power frequency on-off state in the first half of the power frequency modulation cycle.

[0015] In one embodiment of the present invention, within one power frequency modulation cycle, the conduction conditions of the switching devices are as follows: within the first half of the power frequency modulation cycle when the first switching device and the fifth switching device are in the high-frequency on-off state, the second switching device and the sixth switching device are in the on state, and the third switching device and the fourth switching device are in the off state; within the second half of the power frequency modulation cycle when the fourth switching device and the sixth switching device are in the high-frequency on-off state, the third switching device and the fifth switching device are in the on state, and the first switching device and the second switching device are in the off state.

[0016] In one embodiment of the present invention, the conduction conditions of the switching devices in the second modulation mode are as follows: within the same industrial frequency modulation cycle, the second switching device and the third switching device are in the high-frequency on-off state, and the first switching device, the fourth switching device, the fifth switching device and the sixth switching device are in the industrial frequency on-off state.

[0017] Compared with the existing technology, the modulation scheme provided by the present invention does not require real-time monitoring of the temperature of various components and dynamic adjustment of the zero-level output state of the ANPC type three-level inverter circuit, but can still maintain the temperature balance of the ANPC type three-level inverter circuit. This overcomes the phenomenon of unbalanced losses among power devices when the traditional ANPC type topology is operating, reduces the difficulty of ANPC type inverter heat dissipation design, and enables the ANPC type topology to be promoted and applied to higher power density converter products.

[0018] Summary of the Figures

[0019] The accompanying drawings are included to provide a further understanding of the present application. They are incorporated into and constitute a part of this application. The accompanying drawings illustrate embodiments of the present application and together with the description serve to explain the principle of the present invention.

[0020] In the attached figure:

[0021] FIG1 is a schematic diagram of a single-phase bridge arm structure of an ANPC three-level inverter circuit according to an embodiment of the present application;

[0022] FIG2 is a state table of a single-phase bridge arm switch device of an ANPC type three-level inverter circuit according to an embodiment of the present application;

[0023] FIG3 is a waveform diagram of a switching device in a modulation method of an ANPC type three-level inverter circuit according to an embodiment of the present application; and

[0024] FIG4 is a flow chart of a modulation method for an ANPC type three-level inverter circuit according to an embodiment of the present application.

[0025] Preferred embodiments of the present invention

[0026] To more clearly illustrate the technical solutions of the embodiments of this application, the following is a brief introduction to the drawings required for describing the embodiments. Obviously, the drawings described below are merely examples or embodiments of this application. Those skilled in the art can apply this application to other similar scenarios based on these drawings without inventive effort. Unless otherwise apparent from the context or otherwise noted, the same reference numerals in the figures represent the same structure or operation.

[0027] As used in this application and the claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not intended to refer to the singular and may include the plural. Generally speaking, the terms "comprises" and "include" only indicate the inclusion of the steps or elements specifically identified, and these steps and elements do not constitute an exclusive list. A method or apparatus may also include additional steps or elements.

[0028] Unless otherwise specifically stated, the relative arrangement of the parts and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the drawings are not drawn according to actual proportional relationships. The techniques, methods and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the techniques, methods and equipment should be considered as part of the authorization specification. In all examples shown and discussed here, any specific values ​​should be interpreted as being merely exemplary and not as limitations. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that similar numbers and letters represent similar items in the following figures, and therefore, once an item is defined in one figure, it does not need to be further discussed in subsequent figures.

[0029] In the description of this application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "horizontal, vertical, vertical, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction. Therefore, they cannot be understood as limiting the scope of protection of this application; the directional words "inside and outside" refer to the inside and outside relative to the outline of each component itself.

[0030] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used herein to describe the spatial positional relationship of a device or feature to other devices or features as shown in the figures. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figures. For example, if the device in the drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0031] Furthermore, it should be noted that the use of terms such as "first" and "second" to define components is solely for the purpose of distinguishing the corresponding components. Unless otherwise stated, these terms have no special meaning and therefore should not be construed as limiting the scope of protection of this application. Furthermore, while the terms used in this application are selected from commonly known and commonly used terms, some terms mentioned in this specification may have been selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant sections of this description. Furthermore, this application should be understood not only by the actual terms used, but also by the meaning implied by each term.

[0032] It should be understood that when a component is referred to as being “on another component,” “connected to another component,” “coupled to another component,” or “contacting another component,” it can be directly on, connected to, coupled to, or contacting the other component, or intervening components may be present. In contrast, when a component is referred to as being “directly on another component,” “directly connected to,” “directly coupled to,” or “directly contacting” another component, there are no intervening components. Similarly, when a first component is referred to as being “electrically in contact with” or “electrically coupled to” a second component, an electrical path exists between the first and second components that allows current to flow. This electrical path may include capacitors, coupled inductors, and / or other components that allow current to flow, even without direct contact between the conductive components.

[0033] This application proposes a modulation method for an ANPC-type three-level inverter circuit, and also proposes an ANPC-type three-level inverter circuit. Figure 1 is a schematic diagram of a single-phase bridge arm structure of an ANPC-type three-level inverter circuit according to one embodiment of the present application. The ANPC-type three-level inverter circuit provided by the present invention includes the three-phase bridge arm structure shown in Figure 1. The following describes the structure of a single-phase bridge arm of an ANPC-type three-level inverter circuit according to one embodiment of the present application, using Figure 1 as an example.

[0034] 1 , each phase bridge arm includes six switching devices. Specifically, in the embodiment shown in FIG1 , the six switching devices are the first switching device S a1 , the second switching device S a2 , the third switching device S a3 , the fourth switching device S a4 , the fifth switching device S a5 and the sixth switching device S a6 Among them, the first switching device S a1 and the fifth switching device S a5 Share the first half-bridge module, the fourth switch device S a4 and the sixth switching device S a6 Share the second half-bridge module, the second switch device S a2 and the third switching device S a3 The third half-bridge module is shared. As shown in FIG1 , the first switch device S in this embodiment a1 , the fifth switching device S a5 , the sixth switching device S a6 , the fourth switching device S a4 connected in series, and the first switch device S a1 The input end is connected to the DC positive bus terminal P, and the fourth switching device S a4 The output end is connected to the DC negative bus terminal N, and the fifth switching device S a5The output terminal and the sixth switching device S a6 The input end of the second switching device S is connected to the DC bus midpoint O; a2 The input terminal and the fifth switching device S a5 The input terminal of the third switching device S a3 The output terminal of the sixth switching device S a6 The output terminal is connected, and the DC bus voltage value is U dc .

[0035] Furthermore, in this embodiment, each switching device has a diode connected in anti-parallel therewith. a1 , the second switching device S a2 , the third switching device S a3 , the fourth switching device S a4 , the fifth switching device S a5 and the sixth switching device S a6 Corresponding to the first diode D shown in FIG1 a1 , the second diode D a2 , the third diode D a3 , the fourth diode D a4 , the fifth diode D a5 and the sixth diode D a6 .

[0036] Furthermore, in this embodiment, the ANPC three-level inverter circuit further includes a first supporting capacitor C1 and a second supporting capacitor C2, the first supporting capacitor C1 is located between the DC positive bus P and the DC bus midpoint O, and the second supporting capacitor is located between the DC negative bus N and the DC bus midpoint O.

[0037] The ANPC-type three-level inverter circuit comprising the bridge arm structure shown in FIG1 can be applied to the modulation method of the ANPC-type three-level inverter circuit proposed in any embodiment of the present application. FIG2 is a state table of the switching devices in a single-phase bridge arm of an ANPC-type three-level inverter circuit according to an embodiment of the present application. FIG3 is a schematic diagram of the waveforms of the switching devices in the modulation method of the ANPC-type three-level inverter circuit according to an embodiment of the present application. The ANPC-type three-level inverter circuit and its modulation method proposed in the present application will be described in detail below with reference to FIG1-3.

[0038] It can be understood that the six switching devices S included in the bridge arm structure shown in FIG1 a1 -S a6 The on and off states are both included. At the same time, the on state of all the switching devices is a switching state, and at the same time, the switching devices S a1 -S a6Three of them are turned on, and the other three are turned off. As shown in Figure 2, there are 6 switch states, namely P, OU1, OU2, OL1, OL2, and N. "1" represents on and "0" represents off. Referring to Figure 2, in the switch state P: S a1 、S a2 、S a6 In the on state, S a3 、S a4 、S a5 In the closed state; in the switch state OU1: S a2 、S a5 、S a6 In the on state, S a1 、S a3 、S a4 The switch states OU2, OL1, OL2 and N are not described here one by one. When the switch states are P and N, the output voltage of the bridge arm structure shown in Figure 1 is U dc When the switch states are OU1, OU2, OL1, and OL2, the output voltage of the bridge arm structure shown in FIG1 is 0.

[0039] Taking the 0~0.5T part shown in FIG3 as an example, the switching device S a1 -S a6 High-frequency switching is performed between the switching states P and OU1, and the switching device S a1 and S a5 It is "0" and "1" alternately, so S a1 and S a5 It shows a high frequency on-off state. a1 and S a5 The conduction states of the two switching devices are opposite, so the alternating order of "0" and "1" is also opposite. This is reflected in the waveform diagram shown in Figure 3. Although both are in the high-frequency on-off state, their conduction and non-conduction are mutually exclusive within the range of 0 to 0.5T. Furthermore, the conduction and non-conduction of the remaining switching devices are the same in switching states P and OU1. Therefore, from 0 to 0.5T, the waveform diagrams of the four devices appear as straight lines, that is, they remain either on or off.

[0040] FIG4 is a flow chart of a modulation method for an ANPC type three-level inverter circuit according to an embodiment of the present application. Referring to FIG4 , a modulation method for an ANPC type three-level inverter circuit provided by the present invention includes step S10: alternately implementing a first modulation mode and a second modulation mode within a total modulation period, and the first modulation mode and the second modulation mode each have an industrial frequency modulation period of the same length, and the total modulation period is three times the length of the industrial frequency modulation period. Taking FIG3 as an example, FIG3 shows that the first modulation mode (0~T and 2~3T) and the second modulation mode (1~2T) are alternately implemented within a total modulation period of 3T, that is, the first modulation mode and the second modulation mode each have an industrial frequency modulation period of T, and the total modulation period of the modulation method is 3T.

[0041] Furthermore, the first modulation mode includes controlling the six switching devices S as shown in FIG1 a1 -S a6 The four of them are in high frequency on-off state within half the power frequency modulation period 0.5T; the second modulation mode includes controlling the six switching devices S as shown in FIG1 a1 -S a6 The other two are in high-frequency on-off state within one power frequency modulation period T.

[0042] FIG1-3 shows a specific embodiment of the present invention. In this embodiment, the modulation method includes sequentially using the first modulation mode, the second modulation mode, and the first modulation mode in the total modulation period 3T. It can be understood that in the two time periods of 0~T and 2T~3T, in the first modulation mode, the switching device S a1 -S a6 The conduction mode is the same, where 0~T is taken as an example, the first modulation mode controls the six switching devices S as shown in FIG1 a1 -S a6 The first switching device S in a1 , the fourth switching device S a4 , the fifth switching device S a5 and the sixth switching device S a6 In the half power frequency modulation period 0.5T, it is in the high frequency on-off state. In this embodiment, in the time of T to 2T, the second modulation mode controls the six switching devices S shown in FIG1 a1 -S a6 The other two switching devices, namely the second switching device S a2 and the third switching device S a3 In high frequency on-off state.

[0043] Furthermore, in the embodiment shown in FIG1-3, the first modulation mode further includes controlling the six switching devices S shown in FIG1 within the same power frequency modulation period T (i.e., within the time of 0 to T or 2T to 3T as shown in FIG3). a1 -S a6 The other two switching devices (i.e. the second switching device S a2 and the third switching device S a3 ) is in the power frequency on-off state.

[0044] Furthermore, in the embodiment shown in FIG1-3, the second modulation mode further includes controlling the six switching devices S shown in FIG1 within the same power frequency modulation period T (i.e., within the time period T to 2T as shown in FIG3). a1 -S a6 The four switching devices (i.e. S a1 、S a4 、S a5 and S a6 ) is in the power frequency on-off state.

[0045] It can be understood that the switching devices in the high-frequency on-off state generate more heat than those in the industrial frequency on-off state. In order to achieve the technical effect of balancing the overall temperature of the ANPC three-level inverter circuit, in the same embodiment, the four switching devices controlled by the first modulation mode and in the high-frequency on-off state within 0.5T and the two switching devices controlled by the second modulation mode and in the high-frequency on-off state within T are mutually exclusive.

[0046] As shown in FIG1-3, a specific embodiment of the present invention is shown. In this embodiment, the first modulation mode further includes controlling the first switching device S within the same power frequency modulation period T (i.e., within the time of 0 to T or 2T to 3T as shown in FIG3). a1 and the fifth switching device S a5 In the same power frequency modulation cycle T, the first half of the power frequency modulation cycle (i.e., 0-0.5T, 2T-2.5T as shown in FIG3 ) is in the high frequency on-off state, and the second half of the power frequency modulation cycle (i.e., 0.5T-T, 2.5T-3T as shown in FIG3 ) is in the power frequency on-off state; the fourth switching device S is controlled a4 and the sixth switching device S a6 In the same power frequency modulation cycle T, the second half of the power frequency modulation cycle (i.e., 0.5T~T, 2.5T~3T as shown in Figure 3) is in the high-frequency on-off state, and the first half of the power frequency modulation cycle (i.e., 0~0.5T, 2T~2.5T as shown in Figure 3) is in the power frequency on-off state.

[0047] Furthermore, in this embodiment, the first modulation mode also includes controlling the second switching device S within the same power frequency modulation period T (ie, within the time of 0 to T or 2T to 3T as shown in FIG3 ). a2 In the same power frequency modulation cycle T, the first half of the power frequency modulation cycle (i.e., 0-0.5T, 2T-2.5T as shown in FIG3 ) is in the on state, and the second half of the power frequency modulation cycle (i.e., 0.5T-T, 2.5T-3T as shown in FIG3 ) is in the off state; the third switching device S is controlled a3 In the same power frequency modulation cycle T, it is in the off state in the first half of the power frequency modulation cycle (i.e., 0~0.5T, 2T~2.5T as shown in Figure 3), and is in the on state in the second half of the power frequency modulation cycle (i.e., 0.5T~T, 2.5T~3T as shown in Figure 3).

[0048] It can be understood that, referring to FIG1-3, since all the switching devices (such as S a1 -S a6 ) receives a synchronous clock frequency signal. In this embodiment, the switching device S a1 -S a6 The conduction states of the first switching device S shown in FIG1 correspond to each other in each half power frequency modulation period (eg 0 to 0.5T). In other words, if the clock frequency signal changes and causes the first switching device S shown in FIG1 to a1 When the conduction states of 0~0.5T and 0.5T~T are interchanged, the remaining switching devices S a2 -S a6 The conduction states between 0~0.5T and 0.5T~T will be interchanged accordingly.

[0049] Specifically, in another embodiment of the present invention, the modulation method still includes sequentially adopting the first modulation mode, the second modulation mode and the first modulation mode in the total modulation period 3T. Compared with the previous embodiment, in this embodiment, the switching device S a1 -S a6 During the three time periods of 0 to T, T to 2T, and 2T to 3T, the conduction states in the first half of the power frequency modulation cycle and the second half of the power frequency modulation cycle are interchanged.

[0050] It can be understood that, referring to Figures 1-3, the waveform diagrams of each switching device in this embodiment can be obtained by simultaneously replacing 0~0.5T and 0.5T~T, T~1.5T and 1.5T~2T, 2T~2.5T and 2.5T~3T in Figure 3.

[0051] It should be noted that, in any embodiment provided by the present invention, in the time length of 0 to T, 2 to 3 T, a total of 2 T under the control of the first modulation mode, the switching device S a1 、S a4 、Sa5 and S a6 They are both in the high frequency on-off state during the total length T, and in the power frequency on-off state during the other total length T; in T~2T under the control of the second modulation mode, the switching device S a2 and S a3 They are both in the high-frequency on-off state for a total time of T. As mentioned above, the switching devices in the high-frequency on-off state generate more heat than when they are in the power frequency on-off state. The modulation method provided by the present invention can maintain the temperature balance of the ANPC type three-level inverter circuit without the need to monitor the temperature of each component in real time and dynamically adjust the zero-level output state of the ANPC type three-level inverter circuit.

[0052] The basic concepts have been described above. It will be apparent to those skilled in the art that the above disclosures are merely illustrative and do not constitute limitations on this application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and amendments to this application. Such modifications, improvements, and amendments are suggested in this application and remain within the spirit and scope of the exemplary embodiments of this application.

[0053] At the same time, this application uses specific terms to describe the embodiments of this application. For example, "one embodiment," "an embodiment," and / or "some embodiments" refer to a certain feature, structure, or characteristic related to at least one embodiment of this application. Therefore, it should be emphasized and noted that "one embodiment," "an embodiment," or "an alternative embodiment" mentioned twice or multiple times in different locations in this specification does not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of this application may be appropriately combined.

[0054] Some aspects of the present application can be performed entirely by hardware, entirely by software (including firmware, resident software, microcode, etc.), or by a combination of hardware and software. The above hardware or software can be referred to as "data blocks", "modules", "engines", "units", "components" or "systems". The processor can be one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DAPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors or combinations thereof. In addition, various aspects of the present application may be expressed as computer products located in one or more computer-readable media, which include computer-readable program code. For example, computer-readable media may include, but are not limited to, magnetic storage devices (e.g., hard disks, floppy disks, tapes...), optical disks (e.g., compact disks CDs, digital versatile disks DVDs...), smart cards, and flash memory devices (e.g., cards, sticks, key drives...).

[0055] A computer-readable medium may include a propagated data signal embodying computer program code, for example, in baseband or as part of a carrier wave. The propagated signal may be in a variety of forms, including electromagnetic, optical, etc., or a suitable combination thereof. A computer-readable medium may be any computer-readable medium other than a computer-readable storage medium that can be connected to an instruction execution system, apparatus, or device to communicate, propagate, or transmit the program for use. The program code on the computer-readable medium may be transmitted via any suitable medium, including radio, cable, fiber optic cable, radio frequency signal, or similar medium, or any combination of the above.

[0056] Similarly, it should be noted that, in order to simplify the presentation of this application and thus facilitate understanding of one or more embodiments of the invention, the foregoing descriptions of the embodiments of this application sometimes combine multiple features into a single embodiment, figure, or description thereof. However, this disclosure method does not mean that the subject matter of this application requires more features than those recited in the claims. In fact, an embodiment may have fewer features than all of the features of a single embodiment disclosed above.

[0057] In some embodiments, numbers are used to describe the quantity of components and attributes. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise stated, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the description and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining digits. Although the numerical domains and parameters used to confirm the breadth of their range in some embodiments of the present application are approximate values, in specific embodiments, the settings of such numerical values ​​are as accurate as possible within the feasible range.

[0058] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions can be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the scope of the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. A modulation method for an ANPC type three-level inverter circuit, wherein the inverter circuit comprises a three-phase bridge arm, each phase bridge arm comprises six switch devices, namely a first switch device, a second switch device, a third switch device, a fourth switch device, a fifth switch device and a sixth switch device, wherein the first switch device and the fifth switch device share a first half-bridge module, the fourth switch device and the sixth switch device share a second half-bridge module, and the second switch device and the third switch device share a third half-bridge module, wherein: The modulation method includes alternately implementing a first modulation mode and a second modulation mode within a total modulation period, wherein the first modulation mode and the second modulation mode each have an industrial frequency modulation period of the same duration, and the duration of the total modulation period is three times the duration of the industrial frequency modulation period; wherein, The first modulation mode includes controlling four of the six switching devices to be in a high-frequency on-off state within half of the power frequency modulation cycle; The second modulation mode includes controlling the other two of the six switching devices to be in a high-frequency on-off state within one power frequency modulation cycle.

2. The modulation method according to claim 1, characterized in that: It includes sequentially adopting the first modulation mode, the second modulation mode and the first modulation mode in the total modulation cycle.

3. The modulation method according to claim 1, characterized in that: The first modulation mode further includes controlling the second switching device and the third switching device to be in the power frequency on-off state within the same power frequency modulation cycle; and controlling the first switching device, the fourth switching device, the fifth switching device and the sixth switching device to be in the high frequency on-off state within half of the power frequency modulation cycle, and to be in the power frequency on-off state within the other half of the power frequency modulation cycle.

4. The modulation method according to claim 3, characterized in that: The first modulation mode specifically includes, within one power frequency modulation cycle: Controlling the second switch device and the third switch device to be in a power frequency on-off state; Controlling the first switching device and the fifth switching device to be in a high-frequency on-off state in the first half of the power frequency modulation cycle in the same power frequency modulation cycle, and to be in a power frequency on-off state in the second half of the power frequency modulation cycle; Control the fourth switch device and the sixth switch device to be in a high frequency on-off state in the second half of the power frequency modulation cycle in the same power frequency modulation cycle, and to be in a high frequency on-off state in the first half of the power frequency modulation cycle During this period, it is in the power frequency on-off state.

5. The modulation method according to claim 4, characterized in that: Also includes: In the first half of the power frequency modulation period when the first switching device and the fifth switching device are in the high frequency on-off state, the second switching device and the sixth switching device are controlled to be in the on state, and the third switching device and the fourth switching device are in the off state; In the second half of the power frequency modulation period when the fourth switching device and the sixth switching device are in the high-frequency on-off state, the third switching device and the fifth switching device are controlled to be in the on state, and the first switching device and the second switching device are in the off state.

6. The modulation method according to any one of claims 3 to 5, characterized in that: The second modulation mode specifically includes: Controlling the second switching device and the third switching device to be in a high-frequency on-off state in the same power frequency modulation cycle; and The first switch device, the fourth switch device, the fifth switch device and the sixth switch device are controlled to be in the power frequency on-off state in the same power frequency modulation cycle.

7. An ANPC type three-level inverter circuit, applicable to the modulation method of the ANPC type three-level inverter circuit as claimed in any one of claims 1 to 6, characterized in that: The inverter circuit includes a three-phase bridge arm, each phase bridge arm includes six switching devices, namely a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device and a sixth switching device; wherein, The first switch device and the fifth switch device share a first half-bridge module, the fourth switch device and the sixth switch device share a second half-bridge module, and the second switch device and the third switch device share a third half-bridge module; The inverter circuit is configured to adopt the modulation method, which includes alternatingly implementing a first modulation mode and a second modulation mode within a total modulation cycle, and in the first modulation mode, four of the six switching devices are in a high-frequency on-off state within half of the industrial frequency modulation cycle, and in the second modulation mode, the other two of the six switching devices are in a high-frequency on-off state within one of the industrial frequency modulation cycles.

8. The ANPC type three-level inverter circuit according to claim 7, characterized in that: The conduction condition of the switch device in the first modulation mode is as follows: In the same power frequency modulation cycle, the second switching device and the third switching device are in power The first switching device, the fourth switching device, the fifth switching device and the sixth switching device are in the high frequency on-off state in half of the power frequency modulation cycle, and are in the power frequency on-off state in the other half of the power frequency modulation cycle.

9. The ANPC type three-level inverter circuit according to claim 8, characterized in that: In the same power frequency modulation cycle, the conduction condition of the switch device is as follows: The second switch device and the third switch device are in a power frequency on-off state; The first switching device and the fifth switching device are in a high-frequency on-off state in the first half of the power frequency modulation cycle, and in a power frequency on-off state in the second half of the power frequency modulation cycle; The fourth switch device and the sixth switch device are in a high-frequency on-off state in the second half of the power frequency modulation cycle, and are in a power frequency on-off state in the first half of the power frequency modulation cycle.

10. The ANPC type three-level inverter circuit according to claim 9, characterized in that: In one power frequency modulation cycle, the conduction condition of the switch device is as follows: In the first half of the power frequency modulation period when the first switching device and the fifth switching device are in the high frequency on-off state, the second switching device and the sixth switching device are in the on state, and the third switching device and the fourth switching device are in the off state; In the second half of the power frequency modulation period when the fourth switching device and the sixth switching device are in the high-frequency on-off state, the third switching device and the fifth switching device are in the on state, and the first switching device and the second switching device are in the off state.

11. The ANPC type three-level inverter circuit according to any one of claims 8 to 10, characterized in that: The conduction condition of the switch device in the second modulation mode is as follows: In the same power frequency modulation cycle, the second switching device and the third switching device are in a high frequency on-off state, and the first switching device, the fourth switching device, the fifth switching device and the sixth switching device are in a power frequency on-off state.

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