Method for remotely calling memory, network card, electronic device and storage medium

Abstract

The present application provides a method for remotely calling memory, a network card, an electronic device, and a storage medium. After acquiring a memory access request from a first computing device, an intermediate device searches for a memory address of a lending memory section of a second computing device, accesses the memory address of the lending memory section, forwards the memory access request to the second computing device by means of a target transmission link corresponding to the lending memory section, and then forwards to the first computing device a result of processing the memory access request using the lending memory section of the second computing device. It can thus be seen that the lending memory section in the second computing device can be allocated to the first computing device, and data of the first computing device can be processed by means of accessing the lending memory section of the second computing device. Flexible memory allocation between computing devices improves the processing capability of the first computing device, which is equivalent to increasing the upper limit of available memory of the first computing device, which needs to borrow memory, so that computing device memory costs can be reduced.

Description

Memory remote calling method, network card, electronic device and storage medium

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on August 29, 2023, with application number 202311101531.5 and application name “Memory remote call method, network card, electronic device and storage medium”, all contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of cloud computing technology, and in particular to a memory remote calling method, a network card, an electronic device, and a storage medium. Background Art

[0003] Memory is a vital component of computing devices, used to temporarily store computational data in the processor and data exchanged with external storage devices such as hard disks. All programs in a computing device run in memory, and the strength of memory performance affects the performance of the computing device. If the memory usage is excessive, the computing device is prone to freezes and crashes, affecting the operation of related services.

[0004] When a single computing device has limited memory, memory utilization can be improved by reusing the device's memory. However, due to the existing memory capacity of a single computing device, its usage limit cannot be broken. Therefore, a new memory call mechanism is needed.

[0005] Summary of the Invention

[0006] Embodiments of the present application provide a memory remote call method, a network card, an electronic device, and a storage medium to solve one or more of the above-mentioned technical problems.

[0007] In a first aspect, the present application provides a memory remote call method, which is applied to an intermediate device connected to multiple computing devices, the method comprising: obtaining a memory access request from a first computing device, searching for a memory address of a borrowed memory from a second computing device allocated to the first computing device; accessing the memory address of the borrowed memory, and forwarding the memory access request to the second computing device through a target transmission link corresponding to the borrowed memory; obtaining a processing result of the borrowed memory of the second computing device for the memory access request, and forwarding the processing result to the first computing device.

[0008] In a second aspect, the present application provides a memory remote call method, which is applied to a first computing device, and the method includes: sending a memory access request to an intermediate device connected to multiple computing devices; receiving a processing result of the memory access request forwarded by the intermediate device; wherein the processing result is obtained by processing the memory access request by the borrowed memory of the second computing device, the memory access request is obtained by the intermediate device accessing the memory address of the borrowed memory, and the memory access request is forwarded to the second computing device through the target transmission link corresponding to the borrowed memory, and after obtaining the memory access request of the first computing device, the intermediate device searches for the memory address of the borrowed memory from the second computing device allocated to the first computing device.

[0009] In a third aspect, the present application provides a network card, which is connected to multiple computing devices, and includes:

[0010] a memory access request acquisition module, configured to acquire a memory access request from a first computing device and search for a memory address of a borrowed memory from a second computing device allocated to the first computing device;

[0011] an address access module, configured to access a memory address of the borrowed memory and forward the memory access request to the second computing device via a target transmission link corresponding to the borrowed memory;

[0012] The result acquisition module is configured to acquire a processing result of the borrowed memory of the second computing device for the memory access request, and forward the processing result to the first computing device.

[0013] In a fourth aspect, the present application provides an electronic device comprising a memory, a processor, and a computer program stored in the memory, wherein the processor implements any of the above methods when executing the computer program.

[0014] In a fifth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, it implements any of the methods described above.

[0015] Compared with the related art, this application has the following advantages:

[0016] The embodiment of the present application is based on an intermediate device connected to multiple computing devices to implement a memory call mechanism between multiple computing devices. The intermediate device can allocate borrowed memory from a second computing device to meet the needs of a first computing device. After the intermediate device obtains a memory access request from the first computing device, it searches for the memory address of the borrowed memory of the second computing device, accesses the memory address of the borrowed memory, and forwards the memory access request to the second computing device via the target transmission link corresponding to the borrowed memory. Correspondingly, after obtaining the processing result of the borrowed memory of the second computing device for the memory access request, the processing result is forwarded to the first computing device. It can be seen that according to the above scheme, when the first computing device needs to call memory, especially when the memory of the first computing device is insufficient, it can allocate borrowed memory to the first computing device from the second computing device and process data of the first computing device by accessing the borrowed memory of the second computing device. Through the flexible allocation of memory between computing devices, the processing capacity of the first computing device is improved, which is equivalent to increasing the upper limit of memory available to the first computing device with borrowed memory demand, and can reduce the memory cost of the computing device. In addition, the idle memory of the second computing device providing the borrowed memory is fully utilized, improving resource utilization and achieving optimized scheduling of device resources.

[0017] The above description is only an overview of the technical solution of this application. In order to more clearly understand the technical means of this application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of this application more obvious and easy to understand, the specific implementation methods of this application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar components or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments according to the present application and should not be regarded as limiting the scope of the present application.

[0019] FIG1 is a schematic diagram showing an application example of a memory remote call solution provided in an embodiment of the present application;

[0020] FIG2 shows a flow chart of a memory remote calling method provided in an embodiment of the present application;

[0021] FIG3 shows a flowchart of another memory remote calling method provided in an embodiment of the present application;

[0022] FIG4 shows a structural block diagram of a memory remote calling device provided in an embodiment of the present application;

[0023] FIG5 shows a structural block diagram of another memory remote calling device provided in an embodiment of the present application;

[0024] FIG6 shows a structural block diagram of a network card provided in an embodiment of the present application; and

[0025] FIG7 shows a block diagram of an electronic device for implementing an embodiment of the present application. DETAILED DESCRIPTION

[0026] Hereinafter, only certain exemplary embodiments are briefly described. As will be appreciated by those skilled in the art, the described embodiments may be modified in various ways without departing from the spirit or scope of the present application. Therefore, the drawings and description are to be regarded as illustrative in nature and not restrictive.

[0027] To facilitate understanding of the technical solutions of the embodiments of the present application, the following describes the related technologies of the embodiments of the present application. The following related technologies can be combined with the technical solutions of the embodiments of the present application as optional solutions, and all of them fall within the scope of protection of the embodiments of the present application.

[0028] The embodiment of the present application provides a solution for remotely calling memory. One of its core concepts is to deploy a device (referred to as an intermediate device) that can communicate with multiple computing devices, and manage the memory resources of each computing device through the intermediate device, so that the computing device can call idle memory resources across computing devices through remote access, so as to supplement the insufficient memory of some computing devices and make full use of the idle memory of other computing devices. Figure 1 is a schematic diagram of an application example for implementing the batch operation processing solution of the embodiment of the present application. In this application example, the intermediate device can be a network card, and the computing devices are respectively recorded as CN (server) -1, CN-2 and CN-3. The network card is respectively connected to each computing device, and the MEM-HUB function is realized through the network card MOC. The so-called MEM-HUB is to use the network card as a management terminal borrowed between each computing device, and realize the process of calling memory resources across devices through communication between the computing devices and the network card.

[0029] Taking CN-1 borrowing memory from outside as an example, when the current memory is insufficient or a certain type of memory is missing, memory can be borrowed from other computing devices. A memory borrowing request can be sent to the network card, and the management interface of the network card determines the memory that matches the memory borrowing request from CN-2 and CN-3, and forwards the memory borrowing request to the computing device that provides the borrowed memory. The computing device that provides the borrowed memory marks the borrowed memory as borrowed. Referring to Figure 1, the network card simulates a PCI device on the computing device for each computing device with a communication connection, which is equivalent to configuring a driver on the computing device to communicate with the network card, so as to realize the communication between the computing device and the network card. The process implemented in this application can be divided into the stage of allocating borrowed memory and the stage of accessing borrowed memory, corresponding to the preparation path (shown with CN-2) and the data path in Figure 1.

[0030] During the borrowed memory allocation phase, CN-1 communicates with the network card through their respective management interfaces, corresponding to the preparation path in Figure 1. Based on the memory size and type indicated in CN-1's memory borrow request, the network card allocates borrowed memory from CN-2 and CN-3. CN-2's borrowed memory is high-speed memory, accessed via an RDMA (Remote Direct Memory Access) transmission link (transmission channel), while CN-3's borrowed memory is low-speed or regular memory, accessed via a DMA (Direct Memory Access) transmission link. In one case, CN-1 may need to access different types of memory, so different types of memory are allocated from CN-2 and CN-3. In another case, CN-1 may need more memory than can be satisfied by calling only one computing device, and may need to borrow portions of memory from each of CN-2 and CN-3. In order to enable the network card to obtain computing devices that can borrow memory, each computing device can synchronize its memory status to the network card side regularly or when the free memory changes, so that the network card can determine the computing devices that can borrow memory based on the memory usage of each computing device.

[0031] The network card records the memory address corresponding to the memory borrowed from CN-2 and CN-3, and establishes a mapping relationship between this memory address and the physical address of the PCI bus register. Furthermore, the physical address of the PCI bus register is notified to CN-1 through the preparation path formed by the management interface corresponding to CN1 and the network card. This physical address is the address of the physical memory in CN-1 mapped to the PCI bus register using MMIO (Memory-Mapped I / O) technology. CN-1 converts the physical address of the PCI bus register into the corresponding virtual address in the virtual machine, facilitating subsequent access to the borrowed memory based on this virtual address.

[0032] When the processing task of the virtual machine (VM) running on CN-1 generates a need for memory access, an access request for borrowed memory is sent to the network card. Specifically, it is initiated by accessing the virtual address (VM / APP address space) of the PCI bus register. The memory management module (MMU) of CN-1 maps the virtual address to the corresponding physical address, so that it can initiate access to the PCI bus register based on the physical address. The PCI bus register is equivalent to the communication channel between CN-1 and the network card. By accessing the PCI bus register, the memory access request for the borrowed memory can be further forwarded to the network card through the simulated PCI device.

[0033] The address encoding conversion module of the network card searches the address mapping relationship for the memory address of the borrowed memory corresponding to the physical address of the PCI bus register, thereby forwarding the memory access request to CN-2 and CN-3 that provide the borrowed memory by accessing the memory address of the borrowed memory. Since the types of borrowed memory corresponding to CN-2 and CN-3 are different, the memory borrowing request is forwarded to CN-2 via the RDMA transmission link, and the memory borrowing request is forwarded to CN-3 via the DMA transmission link. Specifically, the data sent by the RDMA transmission link is sent to CN-2 through the RDMA NIC (network card controller) corresponding to the network card and CN-2 respectively. CN-2 and CN-3 process the memory access request through the borrowed memory and obtain the processing result, and further send the processing result to the network card, which forwards it to CN-1.

[0034] After CN-1 completes memory borrowing, it can send a memory deactivation request to the network card. The network card determines CN-2 and CN-3 that provide borrowed memory to CN-1, and notifies CN-2 and CN-3 to stop borrowing the borrowed memory. CN-2 and CN-3 can then cancel the borrowed memory mark.

[0035] Based on the above example, it can be seen that memory resources can be borrowed between different computing devices. When CN-1 needs to call memory, especially when CN-1's memory is insufficient, it can allocate borrowed memory to CN-1 from CN-2 and process CN-1's data by accessing CN-2's borrowed memory. Through the flexible allocation of memory between computing devices, the processing capacity of CN-1 is improved, which is equivalent to increasing the upper limit of memory available to CN-1 with borrowed memory requirements, which can reduce CN-1's memory cost. In addition, the idle memory of CN-2, which provides borrowed memory, is fully utilized, improving resource utilization and achieving optimized scheduling of device resources. In one memory borrowing, CN-2 provides borrowed memory to CN-1, and in another memory borrowing, CN-1 can also provide borrowed memory to CN-2. From the perspective of the network card, symmetric calls between devices are achieved. The embodiments of the present application are particularly suitable for the processing of cold data. When the computing device processes data, the original memory resources can be allocated to the processing of hot data with higher usage frequency. For cold data with lower usage frequency, when memory resources are insufficient, remote borrowed memory can be called to complete data processing.

[0036] The above is an example of a remote call process for memory. In a specific implementation, one network card can be deployed to implement one-to-many management between the network card and the computing device, or multiple network cards can be deployed to implement many-to-many management between the network card and the computing device. When multiple network cards are deployed, the borrowing request of the computing device is assigned to one of the network cards according to certain rules or randomly, and the network card is used to manage the borrowing process. In a specific implementation, memory can be borrowed from one or more computing devices, and the borrowed memory type can correspond to one or more types. In a possible implementation method, the borrowed memory can also come from the memory resources in the network card, such as calling the memory resources of MOC DDR (Double Data Rate, double-rate synchronous dynamic random access memory) through memory management through the Memory channel in Figure 1. This application does not limit the above situations.

[0037] Computing devices have memory-based computing capabilities and can be physical servers or smart terminals. A physical server can serve as a host machine, hosting one or more virtual machines. Smart terminals can include smart home devices, smart appliances (such as smart cameras), in-vehicle devices, wearable devices, user phones, tablets, laptops, ultra mobile personal computers (UMPCs), personal digital assistants (PDAs), and other devices.

[0038] The intermediate device that implements memory call management between computing devices can be a network card, or other devices or hardware, such as DPU (Data Processing Unit, a new generation of processors for data-centric computing), or CIPU (Cloud Infrastructure Processing Unit), or other hardware devices (such as servers or terminal devices) or hardware chips (such as CPU, GPU, FPGA, NPU or AI acceleration card). This application does not limit the specific implementation on which subject. In one implementation method, the intermediate device can be a PCI device that communicates with other devices based on the PCI (Peripheral Component Interconnect) communication protocol, and the intermediate device and the computing device communicate based on the PCI communication protocol. In the case that the computing device is not a PCI device, a virtual PCI device can be created on the computing device, that is, a driver for communication between the computing device and the intermediate device is configured on the computing device to achieve communication between the intermediate device and the computing device based on the PCI communication protocol.

[0039] It should be noted that the various data involved in this application, such as user information (including but not limited to user device information, user personal information, etc.) and processed data (including but not limited to data used for analysis, stored data, displayed data, etc.), are all data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0040] The following describes in detail the technical solution of this application and how it solves the aforementioned technical problems using specific embodiments. The several specific embodiments listed can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments. The following describes the embodiments of this application in detail with reference to the accompanying drawings.

[0041] An embodiment of the present application provides a memory remote call method, which is applied to an intermediate device connected to multiple computing devices. FIG2 is a flowchart of a memory remote call method 200 according to an embodiment of the present application. The method 200 may include:

[0042] In step S201, a memory access request from a first computing device is obtained, and a memory address of a borrowed memory from a second computing device allocated to the first computing device is searched.

[0043] The first computing device requests the intermediate device to allocate borrowed memory in advance. After allocating the borrowed memory, the intermediate device saves the memory address of the borrowed memory. When the first computing device needs to access the borrowed memory, it searches for the pre-saved memory address of the borrowed memory based on the access request for the borrowed memory, and further initiates access to the borrowed memory based on the memory address. There can be one or more second computing devices, that is, the borrowed memory provided to the first computing device can be borrowed memory from one second computing device, or multiple borrowed memories from different computing devices. For example, in the example of Figure 1, the second computing devices are CN-2 and CN-3. In the case where the second computing device includes multiple devices, the memory address of the borrowed memory is the memory address of the borrowed memory provided by each second computing device.

[0044] In step S202, the memory address of the borrowed memory is accessed, and the memory access request is forwarded to the second computing device through a target transmission link corresponding to the borrowed memory.

[0045] By accessing the memory address of the borrowed memory, the intermediary device can further forward the memory access request from the first computing device to the second computing device. The intermediary device accesses the borrowed memory through the target transmission link corresponding to the borrowed memory. A transmission link is a transmission channel between devices that identifies the access method used by the intermediary device to access the borrowed memory of the second computing device. In one example, the transmission link includes a DMA transmission link or an RDMA transmission link.

[0046] In the traditional I / O data transmission process, since the CPU is involved in the data transfer process, it needs to occupy a certain amount of CPU resources. For scenarios that require large-scale data transmission, it has a relatively large impact on the CPU performance. DMA is a direct data transmission technology that copies data from one address space to another by establishing DMA transmission links at both ends of the data transmission. Specifically, when transmitting data through the DMA transmission link, a request is sent to the DMA controller, and the DMA controller obtains the transmitted data and stores it in the DMA transmission link. The bus of the DMA controller coordinates with the bus matrix and uses the system bus to store the transmitted data through the DMA transmission link to the destination. Compared with traditional data transmission methods, it provides high-speed data transmission performance, and the data transfer work is all implemented by the DMA-related control module. The CPU only directs and controls the network card related processing, interrupt processing, message encapsulation and parsing, etc., saving a large part of the CPU resources. RDMA, a remote direct access technology, can transfer data from one device to another. It's specifically designed to address processing delays in data transfers between devices. The CPUs on both devices only participate in the control plane and rarely participate in the data transfer process. During the transfer process, the network card directly copies data from user-space memory to internal storage via DMA. The hardware then assembles the packets at each layer before sending it to the peer network card via the physical link. After receiving the data, the receiving RDMA network card strips off the packet headers and checksums at each layer and copies the data directly to user-space memory via DMA. This achieves both higher bandwidth and lower latency. When combined with high-speed memory for data transfer, it significantly improves data transfer efficiency.

[0047] In the stage of allocating borrowed memory, after allocating the borrowed memory, the second computing device can shake hands with the intermediate device through protocol communication to provide a specific method for memory access. Taking the RDMA communication link as an example, during the handshake stage, the IP address and physical port address and other information of the second computing device need to be provided to the intermediate device, so that when data is subsequently transmitted through the RDMA communication link, the data transmission is completed based on the information provided during the handshake. The IP address and physical port address can be stored in the above-mentioned address mapping relationship, so that data transmission can be directly performed based on the IP address and physical port address during the data transmission process. Taking the DMA communication link as an example, during the handshake stage, information such as PCI port information is provided to the intermediate device. Correspondingly, information such as PCI port information can also be provided to the intermediate device and stored in the above-mentioned address mapping relationship.

[0048] The correspondence between the borrowed memory and the target transmission link can be configured according to specific needs, and this application does not limit this. For example, the corresponding transmission link can be configured according to the memory type of the borrowed memory.

[0049] In step S203 , a processing result of the borrowed memory of the second computing device for the memory access request is obtained, and the processing result is forwarded to the first computing device.

[0050] The second computing device calls the borrowed memory to process the memory access request forwarded by the intermediate device, and the processing result is sent to the intermediate device, which further sends the processing result to the first computing device.

[0051] As can be seen, according to the above solution, when the first computing device needs to access memory, especially when the first computing device's memory is insufficient, it can allocate borrowed memory from the second computing device to the first computing device, and access the borrowed memory of the second computing device to process data on the first computing device. This flexible allocation of memory between computing devices improves the processing capacity of the first computing device, which is equivalent to increasing the upper limit of memory available to the first computing device that needs to borrow memory, thereby reducing the memory cost of the computing device. Furthermore, the idle memory of the second computing device that provides the borrowed memory is fully utilized, improving resource utilization and achieving optimized scheduling of device resources.

[0052] Before determining that a memory access request originates from a first computing device, borrowed memory must be allocated to the first computing device. Based on demand, the first computing device can issue a memory borrowing request to an intermediate device. The intermediate device receives the memory borrowing request from the first computing device, identifies a second computing device that matches the memory borrowing request from at least one other computing device, and forwards the memory borrowing request to the second computing device. The memory borrowing request can include the required memory type and the size of the borrowed memory. The intermediate device further determines which computing devices to borrow memory from based on the memory type and size of the borrowed memory. For example, if the memory types are high-speed memory and low-speed memory, a computing device with both high-speed memory and low-speed memory can be identified as the second computing device, or computing devices with both high-speed memory and low-speed memory can be identified as the second computing device, such as CN-2 and CN-3 in Figure 1. If a computing device is determined to meet the demand based on its memory size, it is identified as the second computing device providing the borrowed memory. If one computing device is insufficient to meet the required memory size, borrowed memory can be obtained from multiple computing devices, and multiple computing devices can be identified as the second computing devices. After allocating the borrowed memory according to the memory borrowing request of the first computing device, the second computing device may notify the intermediate device of the memory address of the borrowed memory so that the corresponding borrowed memory can be accessed according to the memory address during the memory access phase.

[0053] In the case where both the intermediate device and the computing device are PCI devices, the two PCI devices can communicate with each other based on the PCI protocol. In the case where the intermediate device is a PCI device and the computing device is not a PCI device, in one possible implementation, the intermediate device simulates a PCI device for each computing device on the computing device, that is, deploys a driver so that the computing device communicates with the intermediate device in the mode of a PCI device, then the first computing device can access the intermediate device by accessing the PCI bus register, which is equivalent to the interaction between the two PCI devices. The data exchange between PCI devices is completed by accessing the physical address of the PCI bus register. When the PCI device configuration space is initialized, the PCI device has an independent PCI bus address space stored on the bus register on the current PCI bus tree. In one example, there are 6 registers in the configuration space of the PCI device, each of which corresponds to the physical address of a set of PCI bus registers used by the PCI device. When multiple virtual machines are deployed on the computing device, each virtual machine can communicate with other PCI devices through different physical addresses of PCI bus registers.

[0054] In one implementation, the physical address of the PCI bus register is mapped to the address of the physical memory in CN-1 through MMIO technology, so that the PCI bus register is accessed by accessing the physical address of the physical memory. Compared with the traditional method of accessing registers, it has the advantages of fast access speed and high flexibility.

[0055] In an embodiment of the present application, in the process of obtaining a memory access request from the first computing device, the intermediate device obtains a memory access request initiated by the first computing device by accessing a PCI bus register, and the memory access request carries the physical address of the PCI bus register. Accordingly, when searching for the memory address of the borrowed memory from the second computing device allocated to the first computing device, the memory address of the borrowed memory corresponding to the physical address of the PCI bus register carried by the memory access request can be searched from the address mapping relationship corresponding to the borrowed memory, and then the borrowed memory can be accessed based on the memory address of the borrowed memory.

[0056] The address mapping relationship stores a mapping relationship between the physical address of the PCI bus register and the memory address of the borrowed memory. This corresponding relationship can be created after the borrowed memory of the second computing device is allocated to the first computing device. Specifically, in the stage of allocating the borrowed memory, the memory borrowing request sent by the first computing device to the intermediate device carries the physical address of the PCI bus register. After the intermediate device obtains the memory address of the borrowed memory allocated by the second computing device in response to the memory borrowing request of the first computing device, it establishes an address mapping relationship between the memory address of the borrowed memory and the physical address of the PCI bus register carried in the memory borrowing request. In the stage of accessing the borrowed memory, after the intermediate device obtains the physical address of the PCI bus register carried in the memory borrowing request of the first computing device, it determines the memory address of the borrowed memory according to the address mapping relationship.

[0057] In the stage of allocating borrowed memory, after establishing the address mapping relationship, a notification message of successful borrowing can be further sent to the first computing device. The notification message can carry the physical address of the PCI bus register, so that the first computing device is informed that the memory borrowing request initiated for the PCI bus register has successfully allocated the borrowed memory, and can subsequently access the intermediate device by accessing the physical address of the PCI bus register to further achieve access to the borrowed memory.

[0058] An example of address mapping is given below:

[0059] Table 1

[0060] In this example, the address mapping relationship is stored in a data table, and the physical address of the PCI bus register and the memory address of the borrowed memory are both expressed in the form of address ranges. The memory address corresponding to the physical address of the PCI register bus can be determined by looking up the table. For example, in Table 1, in the second computing device with ID 2, the memory address in the address range 0X100000-0X500000 corresponds to the physical address of the register bus 0X300000-0X700000 in the first computing device with ID 1. If the memory access request carries the physical address of the register bus in the address range 0X300000-0X700000, it can be determined that the address range of the corresponding memory address is 0X100000-0X500000.

[0061] The physical address of the PCI bus register and the memory address of the borrowed memory are further associated with the device identification (e.g., device ID) of the corresponding computing device. That is, when accessing the borrowed memory, the corresponding second computing device ID and the memory address of the borrowed memory are searched from the address mapping relationship based on the ID of the first computing device and the physical address of the bus register. The borrowed memory can then be accessed based on the found second computing device ID and the memory address of the borrowed memory. Table 1 above shows the correspondence between the first computing device ID, the physical address of the bus register, the second computing device ID, and the memory address of the borrowed memory.

[0062] In a specific implementation, one or more virtual machines may be deployed on a first computing device. When multiple virtual machines are deployed, memory borrowing requests and memory access requests generated by tasks running on different virtual machines can interact with the intermediate device through different PCI bus registers. The intermediate device is unaware of which virtual machine initiated the interaction; the only difference is that it receives memory borrowing requests and memory access requests based on the physical addresses of different PCI bus registers. Accordingly, when establishing an address mapping, since the physical addresses of the PCI bus registers correspond to the memory addresses of the borrowed memory, the borrowed memory corresponding to different virtual machines is mapped to different PCI bus registers. In the first column of the above table, the first computing device ID is always computing device numbered 1. In the last column, there are three corresponding bus register physical addresses, indicating that the three virtual machines corresponding to computing device numbered 1 correspond to three different PCI bus registers. In other words, the three virtual machines interact with the intermediate device through different PCI bus registers. The above table is merely an example. In a specific implementation, the table may include multiple first computing devices or second computing devices. The specific format of the computing device ID and the representation of the address range can be selected based on actual needs and are not limited by this application.

[0063] The correspondence between the virtual machine and the PCI bus register is determined in the stage of allocating borrowed memory. After the intermediate device establishes the address mapping relationship, the borrowing success notification message sent to the first computing device can carry the physical address of the PCI bus register. The first computing device can establish the correspondence between the virtual machine and the PCI bus register based on the physical address of the PCI bus register. Specifically, in order to avoid the security risks brought by the virtual machine directly accessing the physical address, the virtual machine of the first computing device can access the PCI bus register through the standard memory mapping method, that is, the physical address of the PCI bus register fed back by the intermediate device can be mapped to the virtual address in the virtual machine (GPA, that is, the client physical address), and then the virtual address is provided to the virtual machine for subsequent access. Since the physical address is invisible to the virtual machine, the underlying remote call can be hidden from the virtual machine, and the upper layer does not need to intervene in the management of the entire memory remote call process, thereby avoiding various data security issues.

[0064] In one possible implementation, when accessing the memory address of the borrowed memory and forwarding the memory access request to the second computing device via the target transmission link corresponding to the borrowed memory, the target transmission link used in the current memory borrowing process can be determined first. Specifically, the type of the target transmission link is determined based on the memory type of the borrowed memory. As mentioned above, memory types can be divided into high-speed memory, low-speed memory, etc. Accordingly, when configuring the corresponding transmission link based on the type of the borrowed memory, in one example, a faster transmission link can be assigned to the high-speed memory, and the low-speed memory or ordinary memory can be accessed via other transmission links. For example, if the borrowed memory is high-speed memory, memory access can be performed via the RDMA transmission link, and if the borrowed memory is low-speed memory or ordinary memory, memory access can be performed via the DMA transmission link. In another example, in order to improve the access speed of the low-speed memory, if the borrowed memory is low-speed memory or ordinary memory, memory access is preferentially performed via the RDMA transmission link, and the high-speed memory is configured as a DMA transmission link for memory access. After determining the target transmission link, the memory access request can be forwarded to the second computing device by accessing the memory address of the borrowed memory using the determined target transmission link. The RDMA and DMA mentioned here are only examples, and other applicable transmission links can also be used, and this application does not limit this. The memory type of the borrowed memory can be saved in the address mapping relationship after the borrowed memory is allocated, so that the memory type can be directly read from the memory mapping relationship, and the corresponding target transmission link can be determined according to the memory type. As shown in Table 1 above, the memory type is recorded in the memory mapping relationship, and the memory type of the borrowed memory can be determined by the physical address of the PCI bus register carried by the memory access request (which can also be further combined with the ID of the first computing device).

[0065] Accordingly, after the intermediate device obtains the processing result of the borrowed memory of the second computing device for the memory access request, when forwarding the processing result to the first computing device, it can obtain the processing result of the memory access request returned by the second computing device through the aforementioned target transmission link, for example, transmitted to the intermediate device via RDMA or DMA. The intermediate device then forwards the processing result to the first computing device through the PCI bus register. Specifically, when the intermediate device accesses the PCI bus register of the first computing device through the physical address, the PCI bus controller converts the processing result into a PCI protocol data packet, and then sends the processing result in the form of a PCI protocol data packet to the virtual machine using the borrowed memory through the PCI bus.

[0066] After ending memory borrowing, the first computing device can send a memory deactivation request to the intermediate device. Upon receiving the memory deactivation request from the first computing device, the intermediate device can search for the second computing device that borrowed memory for the first computing device and notify the second computing device to stop borrowing the borrowed memory, thereby completing the borrowing process. After allocating the borrowed memory to the first computing device, the second computing device that provided the borrowed memory to the first computing device can be recorded. In one possible implementation, the correspondence between the first computing device and the second computing device can be recorded in the address mapping relationship between the physical address of the PCI bus register and the memory address stored above. If multiple virtual machines are deployed on the first computing device, the borrowed memory corresponding to each virtual machine on the first computing device may correspond to a different second computing device. The device identifier of the corresponding second computing device can be determined by combining the physical address of the PCI bus register carried in the memory deactivation request and the device identifier of the first computing device, thereby notifying the second computing device to stop borrowing the borrowed memory. The memory address of the borrowed memory can also be provided to the second computing device, allowing the second computing device to stop borrowing the borrowed memory based on the memory address.

[0067] After stopping borrowing the borrowed memory, the data recorded corresponding to the borrowed memory may be deleted from the address mapping relationship recorded on the intermediate device.

[0068] The present application also provides a memory remote call method, which is applied to the first computing device. FIG3 is a flowchart of the memory remote call method 300 according to an embodiment of the present application. The method 300 may include:

[0069] In step S301 , a memory access request is sent to an intermediate device connected to a plurality of computing devices.

[0070] In step S302, a processing result of the memory access request forwarded by the intermediate device is received; wherein, the processing result is obtained by processing the memory access request by the borrowed memory of the second computing device, the memory access request is accessed by the intermediate device to the memory address of the borrowed memory, and the memory access request is forwarded to the second computing device through the target transmission link corresponding to the borrowed memory. After obtaining the memory access request of the first computing device, the intermediate device searches for the memory address of the borrowed memory from the second computing device allocated to the first computing device.

[0071] This embodiment describes the implementation process from the perspective of a first computing device. When the first computing device needs to access borrowed memory, it sends a memory access request to an intermediate device. The intermediate device forwards the memory access request to one or more second computing devices that provide the borrowed memory. The second computing device calls the borrowed memory to process the memory access request and obtains a result, which the intermediate device then forwards to the first computing device. Some details can be found in the description of the previous embodiment and will not be repeated here.

[0072] When a first computing device sends a memory access request to an intermediate device connected to multiple computing devices, the memory access request is sent to the intermediate device by accessing a PCI bus register. The memory access request carries the physical address of the PCI bus register, so that the intermediate device can search for the memory address of the borrowed memory corresponding to the physical address of the PCI bus register carried by the memory access request in the address mapping relationship corresponding to the borrowed memory.

[0073] Among them, the memory access request can be generated by the virtual machine based on the processing task. Based on the description of the previous embodiment, access to the PCI bus register is initiated by accessing the physical address of the PCI bus register, and then the memory access request is sent to the intermediate device. The memory access request carries the physical address of the PCI bus register. The intermediate device can further search for the memory address of the borrowed memory corresponding to the physical address of the PCI bus register carried by the memory access request in the address mapping relationship corresponding to the borrowed memory.

[0074] In a possible implementation of an embodiment of the present application, a virtual machine can access a PCI bus register through a standard memory mapping method, that is, the memory mapping mechanism maps a physical address to a virtual address, thereby accessing the PCI bus register through the virtual address. Specifically, the virtual machine initiates a memory access request based on the virtual address of the PCI bus register in the virtual machine, and the memory management unit of the first computing device can map the virtual address corresponding to the PCI bus register in the virtual machine to the physical address corresponding to the physical machine, and access the PCI bus register through the physical address. The PCI bus controller (Root Complex) of the first computing device is the interface between the system CPU and the PCI bus, and communicates with other components on behalf of the system CPU. The PCI bus controller converts the memory access request into a PCI protocol data packet based on the access to the PCI bus register, and sends it to the intermediate device through the PCI bus. The intermediate device receives the memory access request in the form of a PCI protocol data packet, determines that it comes from a simulated PCI device, and then performs the next step of borrowing memory access according to the memory access request. By mapping the physical address of the PCI bus register to a virtual address and providing it to the virtual machine for access, the underlying remote call can be hidden from the virtual machine. The upper layer does not need to intervene and manage the entire memory remote call process, thereby avoiding various data security issues.

[0075] Among them, in the specific implementation of standard memory mapping, address mapping from the virtual machine perspective can be implemented through EPT (Extended Page Table), or address mapping of PCI devices can be implemented through IOPT (I / O MMU Page Table, I / O memory management unit page table), or address mapping in host mode can be implemented through PT (Page Table). Other methods can also be used, and this application does not limit this.

[0076] In one possible implementation, before sending a memory access request to an intermediate device connected to multiple computing devices, the physical address of a PCI bus register sent by the intermediate device after allocating borrowed memory can be obtained, the physical address converted into a virtual address, and the virtual address bound to the virtual machine initiating the memory borrow request, so that the virtual machine can initiate the memory access request by accessing the PCI bus register via the virtual address. In a specific implementation, binding the virtual address of the PCI bus register to the virtual machine initiating the memory borrow request can be achieved by directly mapping the virtual address range of the PCI bus register to the memory space of the virtual machine via a page table.

[0077] Before executing the process of accessing the borrowed memory, it is necessary to request allocation of borrowed memory from other computing devices through the intermediate device. Therefore, before sending the memory access request to the intermediate device connected to multiple computing devices as mentioned above, a memory borrowing request can also be sent to the intermediate device to allocate borrowed memory matching the memory borrowing request from the second computing device through the intermediate device.

[0078] When it is determined that there is no need to continue calling the allocated borrowed memory from other computing devices, a memory deactivation request for the borrowed memory may be sent to the intermediate device so that the intermediate device notifies the second computing device to stop borrowing the borrowed memory.

[0079] In a specific implementation, the computing device can report the memory usage status to the intermediate device, which can be done periodically or when the free memory changes, so that the intermediate device can monitor the memory status of the computing device and then determine which computing devices to forward the memory borrowing request to when a memory borrowing request is needed.

[0080] In the above embodiment, the first computing device, as the demander of borrowed memory, requests to borrow memory from the second computing device through the intermediate device. In a specific implementation, the first computing device can also serve as the provider of borrowed memory and provide its own idle memory resources to other computing devices. For example, when the third computing device needs to borrow memory, it sends a memory borrowing request to the intermediate device. The intermediate device determines that the first computing device can serve as the provider of borrowed memory based on the memory status of each computing device, and then forwards the memory borrowing request to the first computing device. After receiving the memory borrowing request from the third computing device sent by the intermediate device, the first computing device allocates idle memory and adds an identifier of the borrowed memory.

[0081] The memory type and memory-related parameters of the borrowed memory can be further returned to the intermediate device. The memory type can be used to further determine the memory borrowing method, that is, the transmission link used to access the borrowed memory. For example, if the memory type is high-speed memory, the RDMA transmission link can be used for memory access. The memory-related parameter is the memory address. For example, low-speed memory provides memory access through the DMA transmission link, and the memory address is the physical address of the memory. High-speed memory provides memory access through the RDMA transmission link, and the memory address is the device port number and the physical address of the memory.

[0082] Corresponding to the method embodiment provided in the embodiment of the present application, the embodiment of the present application also provides a memory remote call device, which is applied to an intermediate device connected to multiple computing devices. Figure 4 is a structural block diagram of the memory remote call device 400 of one embodiment of the present application. The device 400 may include:

[0083] An access request obtaining module 401 is configured to obtain a memory access request from a first computing device;

[0084] A memory address search module 402 is configured to search for a memory address of a borrowed memory allocated to the first computing device from the second computing device;

[0085] an access request forwarding module 403, configured to access the memory address of the borrowed memory and forward the memory access request to the second computing device via a target transmission link corresponding to the borrowed memory;

[0086] The result forwarding module 404 is configured to obtain a processing result of the borrowed memory of the second computing device for the memory access request, and forward the processing result to the first computing device.

[0087] In a possible implementation, the apparatus further includes:

[0088] a borrowing request obtaining module, configured to obtain a memory borrowing request sent by the first computing device before obtaining the memory access request from the first computing device, wherein the memory borrowing request indicates the size of the borrowed memory and the memory type of the borrowed memory;

[0089] a borrowing request forwarding module, configured to determine a second computing device that matches the memory borrowing request from at least one other computing device, and forward the memory borrowing request to the second computing device;

[0090] A memory address acquisition module is used to acquire the memory address of the borrowed memory allocated by the second computing device.

[0091] In one possible implementation, the access request acquisition module is specifically configured to acquire a memory access request initiated by the first computing device by accessing a PCI bus register, the memory access request carrying the physical address of the PCI bus register. Accordingly, the memory address lookup module is specifically configured to search, within an address mapping relationship corresponding to the borrowed memory, for a memory address of the borrowed memory corresponding to the physical address of the PCI bus register carried in the memory access request, the address mapping relationship being created by the intermediate device after allocating the borrowed memory.

[0092] In a possible implementation, the apparatus further includes:

[0093] a mapping relationship establishing module, configured to establish an address mapping relationship between the memory address of the borrowed memory and the physical address of the PCI bus register after obtaining the memory address of the borrowed memory allocated by the second computing device in response to the memory borrowing request of the first computing device before determining that the memory access request comes from the first computing device;

[0094] A physical address notification module is used to notify the first computing device of the physical address of the PCI bus register.

[0095] In a possible implementation, the access request forwarding module includes:

[0096] a transmission link determination submodule, configured to determine a target transmission link to be used in the current memory borrowing process, wherein the type of the target transmission link is determined based on the memory type of the borrowed memory and / or the service level information corresponding to the memory access request;

[0097] A memory address access submodule is configured to access the memory address of the borrowed memory and forward the memory access request to the second computing device using the determined target transmission link.

[0098] In a possible implementation, the result forwarding module is specifically used to obtain the processing result of the memory access request returned by the second computing device through the target transmission link, and forward the processing result to the first computing device through the PCI bus register.

[0099] In a possible implementation, the apparatus further includes:

[0100] a deactivation request obtaining module, configured to obtain a memory deactivation request from the first computing device;

[0101] The borrowing stop module is configured to find a second computing device that borrows memory for the first computing device, and notify the second computing device to stop borrowing the borrowed memory.

[0102] The embodiment of the present application is based on an intermediate device connected to multiple computing devices to implement a memory call mechanism between multiple computing devices. The intermediate device can allocate borrowed memory from a second computing device to meet the needs of a first computing device. After the intermediate device obtains a memory access request from the first computing device, it searches for the memory address of the borrowed memory of the second computing device, accesses the memory address of the borrowed memory, and forwards the memory access request to the second computing device via the target transmission link corresponding to the borrowed memory. Correspondingly, after obtaining the processing result of the borrowed memory of the second computing device for the memory access request, the processing result is forwarded to the first computing device. It can be seen that according to the above scheme, when the first computing device needs to call memory, especially when the memory of the first computing device is insufficient, it can allocate borrowed memory to the first computing device from the second computing device and process data of the first computing device by accessing the borrowed memory of the second computing device. Through the flexible allocation of memory between computing devices, the processing capacity of the first computing device is improved, which is equivalent to increasing the upper limit of memory available to the first computing device with borrowed memory demand, and can reduce the memory cost of the computing device. In addition, the idle memory of the second computing device providing the borrowed memory is fully utilized, improving resource utilization and achieving optimized scheduling of device resources.

[0103] Corresponding to the method embodiment provided in the embodiment of the present application, the embodiment of the present application also provides a memory remote call device, which is applied to a first computing device. FIG5 is a block diagram of the structure of the memory remote call device 500 of an embodiment of the present application. The device 500 may include:

[0104] An access request sending module 501 is configured to send a memory access request to an intermediate device connected to a plurality of computing devices;

[0105] The processing result receiving module 502 is used to receive the processing result of the memory access request forwarded by the intermediate device; wherein, the processing result is obtained by processing the memory access request by the borrowed memory of the second computing device, the memory access request is accessed by the intermediate device to the memory address of the borrowed memory, and the memory access request is forwarded to the second computing device through the target transmission link corresponding to the borrowed memory. After obtaining the memory access request of the first computing device, the intermediate device searches for the memory address of the borrowed memory from the second computing device allocated to the first computing device.

[0106] In one possible implementation, the access request sending module is specifically used to send the memory access request to the intermediate device by accessing the PCI bus register, and the memory access request carries the physical address of the PCI bus register, so that the intermediate device can search for the memory address of the borrowed memory corresponding to the physical address of the PCI bus register carried by the memory access request in the address mapping relationship corresponding to the borrowed memory.

[0107] In a possible implementation, the access request sending module includes:

[0108] An access request initiating submodule, configured to initiate a memory access request based on a virtual address of the PCI bus register in the virtual machine;

[0109] An address conversion submodule, configured to convert the virtual address of the PCI bus register into a physical address in the computing device;

[0110] The request sending submodule is used to access the PCI bus register through the physical address and send the memory access request to the intermediate device.

[0111] In a possible implementation, the apparatus further includes:

[0112] The address processing module is used to obtain the physical address of the PCI bus register sent by the intermediate device after allocating the borrowed memory, before sending the memory access request to the intermediate device connected to the multiple computing devices, convert the physical address into a virtual address, and bind the virtual address to the virtual machine that initiates the memory borrowing request, so that the virtual machine accesses the PCI bus register through the virtual address to initiate the memory access request.

[0113] In a possible implementation, the apparatus further includes:

[0114] A borrowing request sending module is used to send a memory borrowing request to the intermediate device connected to the plurality of computing devices before sending the memory access request to the intermediate device, so as to allocate borrowed memory matching the memory borrowing request from the second computing device through the intermediate device.

[0115] In a possible implementation, the apparatus further includes:

[0116] A deactivation request sending module is configured to send a memory deactivation request for the borrowed memory to the intermediate device, so that the intermediate device notifies the second computing device to stop borrowing the borrowed memory.

[0117] In a possible implementation, the apparatus further includes:

[0118] A status reporting module, configured to report the memory usage status to the intermediate device;

[0119] a request receiving module, configured to receive a memory borrowing request from a third computing device sent by the intermediate device;

[0120] A memory marking module is used to allocate free memory from the first computing device and add an identifier of the borrowed memory.

[0121] The embodiment of the present application is based on an intermediate device connected to multiple computing devices to implement a memory call mechanism between multiple computing devices. The intermediate device can allocate borrowed memory from a second computing device to meet the needs of a first computing device. After the intermediate device obtains a memory access request from the first computing device, it searches for the memory address of the borrowed memory of the second computing device, accesses the memory address of the borrowed memory, and forwards the memory access request to the second computing device via the target transmission link corresponding to the borrowed memory. Correspondingly, after obtaining the processing result of the borrowed memory of the second computing device for the memory access request, the processing result is forwarded to the first computing device. It can be seen that according to the above scheme, when the first computing device needs to call memory, especially when the memory of the first computing device is insufficient, it can allocate borrowed memory to the first computing device from the second computing device and process data of the first computing device by accessing the borrowed memory of the second computing device. Through the flexible allocation of memory between computing devices, the processing capacity of the first computing device is improved, which is equivalent to increasing the upper limit of memory available to the first computing device with borrowed memory demand, and can reduce the memory cost of the computing device. In addition, the idle memory of the second computing device providing the borrowed memory is fully utilized, improving resource utilization and achieving optimized scheduling of device resources.

[0122] Corresponding to the method embodiment and apparatus embodiment provided in the embodiments of the present application, the embodiments of the present application also provide a network card that is connected to multiple computing devices. FIG6 is a block diagram of a network card 600 according to an embodiment of the present application. The network card 600 may include:

[0123] A memory access request acquisition module 601 is configured to acquire a memory access request from a first computing device and search for a memory address of a borrowed memory from a second computing device allocated to the first computing device;

[0124] an address access module 602, configured to access the memory address of the borrowed memory and forward the memory access request to the second computing device via a target transmission link corresponding to the borrowed memory;

[0125] The result acquisition module 603 is configured to acquire a processing result of the borrowed memory of the second computing device for the memory access request, and forward the processing result to the first computing device.

[0126] The embodiment of the present application is based on an intermediate device connected to multiple computing devices to implement a memory call mechanism between multiple computing devices. The intermediate device can allocate borrowed memory from a second computing device to meet the needs of a first computing device. After the intermediate device obtains a memory access request from the first computing device, it searches for the memory address of the borrowed memory of the second computing device, accesses the memory address of the borrowed memory, and forwards the memory access request to the second computing device via the target transmission link corresponding to the borrowed memory. Correspondingly, after obtaining the processing result of the borrowed memory of the second computing device for the memory access request, the processing result is forwarded to the first computing device. It can be seen that according to the above scheme, when the first computing device needs to call memory, especially when the memory of the first computing device is insufficient, it can allocate borrowed memory to the first computing device from the second computing device and process data of the first computing device by accessing the borrowed memory of the second computing device. Through the flexible allocation of memory between computing devices, the processing capacity of the first computing device is improved, which is equivalent to increasing the upper limit of memory available to the first computing device with borrowed memory demand, and can reduce the memory cost of the computing device. In addition, the idle memory of the second computing device providing the borrowed memory is fully utilized, improving resource utilization and achieving optimized scheduling of device resources.

[0127] The functions of each module in each device in the embodiment of the present application can be referred to the corresponding description in the above method, and have corresponding beneficial effects, which will not be repeated here.

[0128] Figure 7 is a block diagram of an electronic device used to implement embodiments of the present application. As shown in Figure 7, the electronic device includes a memory 701 and a processor 702. Memory 701 stores a computer program executable by processor 702. When processor 702 executes the computer program, it implements the methods described in the above embodiments. Memory 701 and processor 702 may be present in one or more locations.

[0129] The electronic device also includes:

[0130] The communication interface 703 is used to communicate with external devices and perform data exchange transmission.

[0131] If the memory 701, processor 702, and communication interface 703 are implemented independently, the memory 701, processor 702, and communication interface 703 can be interconnected via a bus and communicate with each other. This bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. This bus can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, FIG7 shows only one thick line, but this does not mean that there is only one bus or only one type of bus.

[0132] Optionally, in a specific implementation, if the memory 701, the processor 702 and the communication interface 703 are integrated on a chip, the memory 701, the processor 702 and the communication interface 703 can communicate with each other through an internal interface.

[0133] An embodiment of the present application provides a computer-readable storage medium storing a computer program, which implements the method provided in the embodiment of the present application when the program is executed by a processor.

[0134] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, it implements the method provided in any embodiment of the present application.

[0135] An embodiment of the present application also provides a chip, which includes a processor for calling and executing instructions stored in the memory from the memory, so that a communication device equipped with the chip executes the method provided in the embodiment of the present application.

[0136] An embodiment of the present application also provides a chip, including: an input interface, an output interface, a processor and a memory. The input interface, the output interface, the processor and the memory are connected through an internal connection path. The processor is used to execute the code in the memory. When the code is executed, the processor is used to execute the method provided in the embodiment of the present application.

[0137] It should be understood that the processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. It is worth noting that the processor may be a processor that supports the Advanced RISC Machines (ARM) architecture.

[0138] Furthermore, optionally, the above-mentioned memory may include a read-only memory and a random access memory. The memory may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may include a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may include a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available. For example, static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM) and direct RAM bus random access memory (DR RAM).

[0139] In the above embodiments, all or part of the embodiments may be implemented using software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions according to the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another.

[0140] In the description of this specification, the reference terms "one embodiment," "some embodiments," "example," "specific example," or "some examples" mean that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the specific features, structures, materials, or characteristics described may be combined in any appropriate manner in any one or more embodiments or examples. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification, as well as features of different embodiments or examples, unless they are mutually inconsistent.

[0141] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0142] Any process or method described in the flowchart or otherwise described herein can be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing the steps of a specific logical function or process. The scope of the preferred embodiments of the present application includes other implementations in which the functions may be performed in a different order than shown or discussed, including performing the functions substantially simultaneously or in reverse order depending on the functions involved.

[0143] The logic and / or steps described in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, apparatus or device (such as a computer-based system, a system including a processor or other system that can fetch instructions from an instruction execution system, apparatus or device and execute instructions), or used in combination with such instruction execution systems, apparatuses or devices.

[0144] It should be understood that various parts of the present application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. All or part of the steps of the above embodiment method can be completed by instructing the relevant hardware through a program, which can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiment.

[0145] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing module, or each unit may exist physically separately, or two or more units may be integrated into a single module. The aforementioned integrated modules may be implemented in the form of hardware or in the form of software functional modules. If the aforementioned integrated modules are implemented in the form of software functional modules and sold or used as independent products, they may also be stored in a computer-readable storage medium. The storage medium may be a read-only memory, a magnetic disk, or an optical disk, etc.

[0146] The above is merely an exemplary embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various modifications or substitutions within the technical scope described in this application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A memory remote call method, applied to an intermediate device connected to a plurality of computing devices, the method comprising: Obtaining a memory access request from a first computing device, and searching for a memory address of a borrowed memory from a second computing device allocated to the first computing device; accessing a memory address of the borrowed memory, and forwarding the memory access request to the second computing device through a target transmission link corresponding to the borrowed memory; Obtain a processing result of the borrowed memory of the second computing device for the memory access request, and forward the processing result to the first computing device.

2. The method according to claim 1, wherein: Before obtaining the memory access request from the first computing device, the method further includes: Obtaining a memory borrowing request sent by the first computing device, wherein the memory borrowing request indicates a size of the borrowed memory and a memory type of the borrowed memory; Determine a second computing device that matches the memory borrowing request from at least one other computing device, and forward the memory borrowing request to the second computing device; Obtain a memory address of the borrowed memory allocated by the second computing device.

3. The method according to claim 1, wherein: The obtaining of a memory access request from the first computing device includes: Obtaining a memory access request initiated by the first computing device by accessing a PCI bus register, wherein the memory access request carries a physical address of the PCI bus register; The searching for a memory address of a borrowed memory from a second computing device allocated to the first computing device includes: The memory address of the borrowed memory corresponding to the physical address of the PCI bus register carried by the memory access request is searched in the address mapping relationship corresponding to the borrowed memory, wherein the address mapping relationship is created by the intermediate device after allocating the borrowed memory.

4. The method according to claim 3, wherein: Before obtaining the memory access request from the first computing device, the method further includes: After acquiring the memory address of the borrowed memory allocated by the second computing device in response to the memory borrowing request of the first computing device, establishing an address mapping relationship between the memory address of the borrowed memory and the physical address of the PCI bus register; The physical address of the PCI bus register is notified to the first computing device.

5. The method according to claim 1, wherein: The step of accessing the memory address of the borrowed memory and forwarding the memory access request to the second computing device through a target transmission link corresponding to the borrowed memory includes: Determine a target transmission link used in the current memory borrowing process, where the type of the target transmission link is determined according to the memory type of the borrowed memory; Access a memory address of the borrowed memory, and forward the memory access request to the second computing device using the determined target transmission link.

6. The method according to claim 1, wherein: The obtaining a processing result of the borrowed memory of the second computing device for the memory access request and forwarding the processing result to the first computing device comprises: Obtain a processing result for the memory access request returned by the second computing device through the target transmission link, and forward the processing result to the first computing device through a PCI bus register.

7. The method according to claim 1, wherein: The method further comprises: Obtaining a memory deactivation request from the first computing device; Find a second computing device that borrows memory from the first computing device, and notify the second computing device to stop borrowing the borrowed memory.

8. A memory remote call method, applied to a first computing device, the method comprising: sending a memory access request to an intermediate device connected to a plurality of computing devices; Receive a processing result of the memory access request forwarded by the intermediate device; wherein the processing result is obtained by processing the memory access request by the borrowed memory of the second computing device, the memory access request is accessed by the intermediate device to the memory address of the borrowed memory, and the memory access request is forwarded to the second computing device through a target transmission link corresponding to the borrowed memory. After obtaining the memory access request of the first computing device, the intermediate device searches for the memory address of the borrowed memory from the second computing device allocated to the first computing device.

9. The method according to claim 8, wherein: The sending of a memory access request to an intermediate device connected to a plurality of computing devices comprises: The memory access request is sent to the intermediate device by accessing the PCI bus register, and the memory access request carries the physical address of the PCI bus register, so that the intermediate device can search the memory address of the borrowed memory corresponding to the physical address of the PCI bus register carried by the memory access request in the address mapping relationship corresponding to the borrowed memory.

10. The method according to claim 9, wherein: The sending the memory access request to the intermediate device by accessing the PCI bus register comprises: Initiate a memory access request based on a virtual address of the PCI bus register in the virtual machine; The virtual address of the PCI bus register is converted into a physical address in the computing device, the PCI bus register is accessed through the physical address, and the memory access request is sent to the intermediate device.

11. The method according to claim 10, wherein: Before sending the memory access request to the intermediate device connected to the plurality of computing devices, the method further includes: After the intermediate device allocates the borrowed memory, the physical address is converted into a virtual address, and The virtual address is bound to the virtual machine that initiates the memory borrowing request, so that the virtual machine accesses the PCI bus register through the virtual address to initiate the memory access request.

12. A network card connected to a plurality of computing devices, the network card comprising: A memory access request acquisition module, configured to acquire a memory access request from a first computing device, and search for a memory address of a borrowed memory from a second computing device allocated to the first computing device; an address access module, configured to access a memory address of the borrowed memory, and forward the memory access request to the second computing device via a target transmission link corresponding to the borrowed memory; The result acquisition module is used to obtain the processing result of the borrowed memory of the second computing device for the memory access request, and forward the processing result to the first computing device.

13. An electronic device comprising a memory, a processor and a computer program stored in the memory, wherein the processor implements the method according to any one of claims 1 to 11 when executing the computer program.

14. A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the method according to any one of claims 1 to 11 is implemented.

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