Multiple pitch SEM overlay marks and algorithm for stitching area

Abstract

Improved systems and methods for determining stitching overlay and other metrology parameters in semiconductor manufacturing are disclosed. The systems and methods may include acquiring a measured image of multiple overlay marks within a single field of view of an inspection system; individually tuning the image processing algorithm parameters of the measured image for each overlay mark to determine measured values of each overlay mark; and comparing the measured values to determine the stitching overlay or other metrology parameters.

Description

MULTIPLE PITCH SEM OVERLAY MARKS AND ALGORITHM FOR STITCHING AREACROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of US application 63 / 535,179 which was filed on 29 August 2023, and which is incorporated herein in its entirety by reference.TECHNICAL FIELD

[0002] The embodiments provided herein relate to metrology and inspection technology, and more particularly to a stitching overlay inspection using a charged-particle beam inspection system.BACKGROUND

[0003] A lithographic apparatus can be used, for example, in the manufacturing of integrated circuits (ICs). In such a case, a mask or a reticle may contain or provide a circuit pattern corresponding to an individual layer of the IC (“design layout”), and this circuit pattern can be transferred onto a target portion (e.g., comprising one or more dies) on a substrate (e.g., silicon wafer). Misalignments of patterns on the target portion can greatly impact a process yield. Therefore, alignments may be monitored by inspecting printed wafers during and after fabrication of each layer in the IC.

[0004] Inspection systems utilizing optical microscopes or charged particle (e.g., electron) beam microscopes, such as a scanning electron microscope (SEM) can be employed to inspect overlay between adjacent exposure fields, as well as between two overlapping fields in different layers on the substrate. For example, stitching overlay marks in high numerical aperture (NA) EUV systems may be provided on either side of a stitching boundary when producing device layers that are larger than one exposure field.SUMMARY

[0005] Some embodiments of the present disclosure provide a non-transitory computer-readable medium. The non-transitory computer-readable medium may store a set of instructions that is executable by at least one processor of an apparatus. The processor may execute the instructions to cause the apparatus to perform operations comprising: acquiring a measured image of a region on a substrate, the region comprising a first overlay mark and a second overlay mark; performing a first tuning of a first image processing algorithm parameter of the measured image based on the first overlay mark; calculating a first measurement of the first overlay mark based on the first tuning; performing a second tuning of a second image processing algorithm parameter of the measured image based on the second overlay mark, the second tuning being different from the first tuning; calculating a second measurement of the second overlay mark based on the second tuning; and calculating an overlay value based on the first measurement and the second measurement.

[0006] Some embodiments of the present disclosure provide a method of performing the operations discussed above.

[0007] Some embodiments of the present disclosure provide a charged particle apparatus. The charged particle apparatus may comprise: a charged particle beam source configured to generate a beam of primary charged particles; a charged particle optical system configured to direct the beam of primary charged particles at a region on a substrate, the region comprising a first overlay mark and a second overlay mark; a controller comprising one or more processors and configured to cause the charged particle beam apparatus to perform the operations discussed above.

[0008] Some embodiments of the present disclosure provide a method of determining stitching overlay the method may comprise: obtaining a charged particle image of a first overlay mark from a first lithography exposure and a second overlay mark from a second lithography exposure, the first mark being located on a first side of a stitching boundary and the second mark being located on a second side of the stitching boundary. The first overlay mark may comprise a first plurality of structures separated by a first pitch and a second plurality of structures separated by a second pitch; and the second overlay mark may comprise a third plurality of structures separated by a third pitch and a fourth plurality of structures separated by a fourth pitch. The method may further comprise: determining a first relative position between the first plurality of structures and the second plurality of structures in the first overlay mark; calculating a first set-get plot of designed and measured offset values between the first plurality of structures and the second plurality of structures; optimizing a first image processing algorithm until the first set-get plot meets a first prescribed criterion; applying the optimized first image processing algorithm to the first overlay mark in the charged particle image; determining a second relative position between the third plurality of structures and the fourth plurality of structures in the second overlay mark; calculating a second set-get plot of designed and measured offset values between the third plurality of structures and the fourth plurality of structures; optimizing a second image processing algorithm until the second set-get plot meets a second prescribed criterion; applying the optimized second image processing algorithm to the second overlay mark in the charged particle image; calculating a third set- get plot of designed and measured offset values between the first overlay mark and the second overlay mark; and determining a stitching overlay value based on an intercept of the third set-get plot.

[0009] Other advantages of the embodiments of the present disclosure will become apparent from the following description taken in conjunction with the accompanying drawings wherein are set forth, by way of illustration and example, certain embodiments of the present invention.BRIEF DESCRIPTION OF FIGURES

[0010] The above and other aspects of the present disclosure will become more apparent from the description of exemplary embodiments, taken in conjunction with the accompanying drawings.

[0011] FIGS. 1A-B are diagrammatic representations of example lithography systems, consistent with embodiments of the present disclosure.

[0012] FIGS. 2A-B are diagrammatic representations of example charged particle beam inspection systems, consistent with embodiments of the present disclosure.

[0013] FIGS. 3A-B are diagrammatic representations of example of wafer exposure fields, consistent with embodiments of the present disclosure.

[0014] FIG. 4 is diagrammatic representation of an example overlay configuration, according to a comparative embodiment.

[0015] FIGS. 5A-C are diagrammatic representations of example overlay configurations, consistent with embodiments of the present disclosure.

[0016] FIG. 6 is a diagrammatic representation of an example overlay configuration, consistent with embodiments of the present disclosure.

[0017] FIG. 7 is a diagrammatic representation of an example overlay configuration, consistent with embodiments of the present disclosure.

[0018] FIGS. 8A-B are diagrammatic representations of example overlay configurations, consistent with embodiments of the present disclosure.

[0019] FIGS. 9A-C are diagrammatic representations of example overlay configurations, consistent with embodiments of the present disclosure.

[0020] FIG. 10 is a diagrammatic representation of an example overlay configuration, consistent with embodiments of the present disclosure.

[0021] FIG. 11 is a process flowchart representing an exemplary overlay method, consistent with embodiments of the present disclosure.DETAILED DESCRIPTION

[0022] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the disclosed embodiments as recited in the appended claims. For example, although some embodiments are described in the context of utilizing electron beams, the disclosure is not so limited. Other types of charged particle beams may be similarly applied. Furthermore, other imaging systems may be used, such as optical imaging, photo detection, x-ray detection, etc.

[0023] Making integrated circuits or ICs with extremely small structures or components is a complex, time-consuming, and expensive process, often involving hundreds of individual steps. Errors in even one step have the potential to result in defects in the finished IC, rendering it useless. Thus, one goal of the manufacturing process is to avoid such defects to maximize the number of functional ICs made in the process; that is, to improve the overall yield of the process.

[0024] A lithographic apparatus can be used, for example, in the manufacturing of ICs. In such a case, a mask or a reticle may contain or provide a circuit pattern corresponding to an individual layer of the IC (“design layout”), and this circuit pattern can be transferred onto a target portion (e.g. comprising one or more dies) on a substrate (e.g., silicon wafer) that has been coated with a layer of radiationsensitive material (“resist”), by methods such as irradiating the target portion through the circuit pattern on the mask. As feature sizes continue to shrink, overlay, alignment and other metrology measurements are becoming increasingly important. Further, some modern lithography systems may print onto small exposure regions on a wafer such that an entire layer of an IC chip or other device cannot be printed by a single scanning exposure. Therefore, multiple circuit patterns must be printed with their edge connections touching or overlapping so that the whole device layer may be “stitched” together. This imposes more difficult requirements on overlay within the system, while room for overlay marks on modern wafers is shrinking. For example, high-NA EUV lithography systems may require multiple stitched exposure fields to produce a device layer, which may require compact overlay marks capable of yielding accurate overlay measurements.

[0025] Embodiments of the present disclosure provide systems and methods for stitching alignment, overlay, and other metrology measurements using compact marks having a small footprint. In some embodiments, stitching overlay marks may be made small enough that two corresponding marks on either side of a stitching boundary may both fit within a single image capture of an inspection apparatus. The overlay marks may be designed in such a way that their precise locations may be fine-tuned by further analysis of the captured image. By pre-tuning each overlay mark before comparing one to the other, it is possible to monitor and control the placement and overlay in stitching regions using compact marks within an in-device area or scribe lane in the stitching regions.

[0026] Relative dimensions of components in drawings may be exaggerated for clarity. Within the following description of drawings, the same or like reference numbers refer to the same or like components or entities, and only the differences with respect to the individual embodiments are described. As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a component may include A or B, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or A and B. As a second example, if it is stated that a component may include A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0027] FIG. 1A is a schematic block diagram of various subsystems of a lithography system, consistent with embodiments of the present disclosure. As shown in FIG. 1A, a lithography system 10 can comprise an illumination source 12, illumination optics 14, a mask 16 (or a reticle), and transmission optics 18. Illumination source 12 may be a deep-ultraviolet excimer laser source or other type of sources including extreme ultraviolet (EUV) sources. Illumination optics 14 may define the partial coherence and may include optics 14a and 14b that shape radiation from illumination source 12. Transmissionoptics 18 can project an image of a mask pattern onto a substrate plane 19. An adjustable filter or aperture at the pupil plane of projection optics 18 may restrict the range of beam angles that impinge on the substrate plane 19.

[0028] In a lithographic apparatus, illumination source 12 provides an illumination (i.e., radiation) beam 13 to mask 16, which may impart a pattern to the illumination beam 13. For example, mask 16 may comprise any patterning device such as a reticle, a programmable mirror array such as a digital micromirror device (DMD), a computer-generated hologram (CGH), or other element configured to selectively modulate or block portions of illumination beam 13 to impart the pattern. The pattern may comprise, e.g., a layer in an integrated circuit or another semiconductor device pattern. Projection optics 18 may direct and shape the illumination, via mask 16, onto a substrate W. An adjustable filter or aperture 17 at the pupil plane of the projection optics may restrict the range of beam angles that impinge on the substrate plane 19, where the largest possible angle defines the numerical aperture of the projection optics NA=sin (0max).

[0029] The term “projection optics” is broadly defined here to include any optical component that may alter the wavefront of the radiation beam. For example, projection optics may include at least some of illumination optics 14 and transmission optics 18. In some embodiments, projection optics 18 may project a reduced image of the illuminated pattern by a reduction ratio of e.g., 4:1 or 5:1. As discussed below, in some embodiments, the projection optics may comprise an anamorphic system in which a first reduction ratio in a first direction on the pattern image may be different from a second reduction ratio in a second perpendicular direction on the pattern image.

[0030] For example, FIG. IB is a schematic block diagram of various subsystems of an EUV lithography system 11 , consistent with embodiments of the present disclosure. EUV lithography system 11 may correspond to lithography system 10 of FIG. 1A. As shown in FIG. IB, EUV lithography system 11 may comprise: an illumination system including a source collector module 112 and illumination optics 114, a reflective mask or other patterning device 116; and projection optics 118. In the source collector module 112, EUV radiation may be produced by a plasma. The EUV radiation may then be shaped by the illumination optics 114, patterned by mask 116 and reflected towards projection optics 118. Projection optics 118 may project a reduced image of the pattern from mask 116 onto a wafer W. For example, mask 116 and wafer W may be scanned along a scanning direction as illustrated by the double arrows.

[0031] EUV mirrors, masks, and other optical elements may operate within narrow angular ranges, such as at grazing incidence or near-normal incidence. For example, in some embodiments, incoming light 113a may be incident on mask 116 over a spread of incidence angles from, e.g., 3-7 degrees. This may place difficult constraints on the spatial relationships of mirrors and other elements within the illumination and projection systems. For example, it may be difficult to arrange the mirrors to face each other in such that they do not block the light beam as it passes to the side of a prior mirror in a reflection sequence. Furthermore, it may be desirable to avoid an overlap between incoming light 113a directedtoward mask 116 and outgoing light 113b reflected from it. Such issues may occur when, for example, the NA is too large for a given chief ray angle.

[0032] To overcome these issues, in some embodiments the NA or reduction ratio of projection optics 18 in Fig. 1A and 118 in Fig. IB may be anisotropic. For example, the spatial extent of the incoming light 113a and outgoing light 113b may be compressed in directions corresponding to the scanning direction. The representation of a pattern design layout on mask 116 may be spatially distorted in a complimentary way, as further discussed with respect to FIG. 3A below. By using anamorphic projection optics having a first reduction ratio in the scanning direction and a second reduction ratio in the perpendicular non-scanning direction, the original undistorted pattern design may be reproduced on wafer W. For example, some high-NA EUV systems may use an anamorphic optics with an 8x4 demagnification. Therefore, in some embodiments a reduction ratio may be, e.g., 8:1 in the scanning direction and 4:1 in the non-scanning direction. Metrology and defect inspection of such patterns may be performed using an inspection system, such as a charged particle beam inspection system. For example, inspection systems may be used to determine an alignment between adjacent or overlaid exposure fields.

[0033] FIG. 2A illustrates an example electron beam inspection (EBI) system 100 consistent with embodiments of the present disclosure. EBI system 100 may be used for imaging. As shown in FIG. 2A, EBI system 100 includes a main chamber 101, a load / lock chamber 102, abeam tool 104, and an equipment front end module (EFEM) 106. Beam tool 104 is located within main chamber 101. EFEM 106 includes a first loading port 106a and a second loading port 106b. EFEM 106 may include additional loading port(s). First loading port 106a and second loading port 106b receive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (wafers and samples may be used interchangeably). A “lot” is a plurality of wafers that may be loaded for processing as a batch.

[0034] One or more robotic arms (not shown) in EFEM 106 may transport the wafers to load / lock chamber 102. Load / lock chamber 102 is connected to a load / lock vacuum pump system (not shown) which removes gas molecules in load / lock chamber 102 to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from load / lock chamber 102 to main chamber 101. Main chamber 101 is connected to a main chamber vacuum pump system (not shown) which removes gas molecules in main chamber 101 to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by beam tool 104. Beam tool 104 may be a single-beam system or a multi-beam system.

[0035] A controller 109 is electronically connected to beam tool 104. Controller 109 may be a computer configured to execute various controls of EBI system 100. While controller 109 is shown in FIG. 2A as being outside of the structure that includes main chamber 101, load / lock chamber 102, and EFEM 106, it is appreciated that controller 109 may be a part of the structure.

[0036] In some embodiments, controller 109 may include one or more processors (not shown). A processor may be a generic or specific electronic device capable of manipulating or processing information. For example, the processor may include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), an optical processor, a programmable logic controllers, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a Programmable Logic Array (PLA), a Programmable Array Logic (PAL), a Generic Array Logic (GAL), a Complex Programmable Logic Device (CPLD), a Field- Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), and any type circuit capable of data processing. The processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network.

[0037] In some embodiments, controller 109 may further include one or more memories (not shown). A memory may be a generic or specific electronic device capable of storing codes and data accessible by the processor (e.g., via a bus). For example, the memory may include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or any type of storage device. The codes and data may include an operating system (OS) and one or more application programs (or “apps”) for specific tasks. The memory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network.

[0038] FIG. 2B illustrates a schematic diagram of an example multi-beam tool 104 (also referred to herein as apparatus 104) and an image processing system 290 that may be configured for use in EBI system 100 (FIG. 2A), consistent with embodiments of the present disclosure.

[0039] Beam tool 104 comprises a charged-particle source 202, a gun aperture 204, a condenser lens 206, a primary charged-particle beam 210 emitted from charged-particle source 202, a source conversion unit 212, a plurality of beamlets 214, 216, and 218 of primary charged-particle beam 210, a primary projection optical system 220, a motorized wafer stage 280, a wafer holder 282, multiple secondary charged-particle beams 236, 238, and 240, a secondary optical system 242, and a charged- particle detection device 244. Primary projection optical system 220 can comprise a beam separator 222, a deflection scanning unit 226, and an objective lens 228. Charged-particle detection device 244 can comprise detection sub-regions 246, 248, and 250.

[0040] Charged-particle source 202, gun aperture 204, condenser lens 206, source conversion unit 212, beam separator 222, deflection scanning unit 226, and objective lens 228 can be aligned with a primary optical axis 260 of apparatus 104. Secondary optical system 242 and charged-particle detection device 244 can be aligned with a secondary optical axis 252 of apparatus 104.

[0041] Charged-particle source 202 can emit one or more charged particles, such as electrons, protons, ions, muons, or any other particle carrying electric charges. In some embodiments, charged-particlesource 202 may be an electron source. For example, charged-particle source 202 may include a cathode, an extractor, or an anode, wherein primary electrons can be emitted from the cathode and extracted or accelerated to form primary charged-particle beam 210 (in this case, a primary electron beam) with a crossover (virtual or real) 208. For ease of explanation without causing ambiguity, electrons are used as examples in some of the descriptions herein. However, it should be noted that any charged particle may be used in any embodiment of this disclosure, not limited to electrons. Primary charged particle beam 210 can be visualized as being emitted from crossover 208. Gun aperture 204 can block off peripheral charged particles of primary charged particle beam 210 to reduce Coulomb effect. The Coulomb effect may cause an increase in size of probe spots.

[0042] Source conversion unit 212 can comprise an array of image-forming elements and an array of beam-limit apertures. The array of image-forming elements can comprise an array of micro-deflectors or micro-lenses. The array of image-forming elements can form a plurality of parallel images (virtual or real) of crossover 208 with a plurality of beamlets 214, 216, and 218 of primary charged-particle beam 210. The array of beam-limit apertures can limit the plurality of beamlets 214, 216, and 218. While three beamlets 214, 216, and 218 are shown in FIG. 2B, embodiments of the present disclosure are not so limited. For example, in some embodiments, the apparatus 104 may be configured to generate a first number of beamlets. In some embodiments, the first number of beamlets may be in a range from 1 to 1000. In some embodiments, the first number of beamlets may be in a range from 200-500. In an exemplary embodiment, an apparatus 104 may generate 400 beamlets.

[0043] Condenser lens 206 can focus primary charged particle beam 210. The electric currents of beamlets 214, 216, and 218 downstream of source conversion unit 212 can be varied by adjusting the focusing power of condenser lens 206 or by changing the radial sizes of the corresponding beam-limit apertures within the array of beam-limit apertures. Objective lens 228 can focus beamlets 214, 216, and 218 onto a wafer 230 for imaging, and can form a plurality of probe spots 270, 272, and 274 on a surface of wafer 230.

[0044] Beam separator 222 can be a beam separator of Wien filter type generating an electrostatic dipole field and a magnetic dipole field. In some embodiments, if they are applied, the force exerted by the electrostatic dipole field on a charged particle (e.g., an electon) of beamlets 214, 216, and 218 can be substantially equal in magnitude and opposite in a direction to the force exerted on the charged particle by magnetic dipole field. Beamlets 214, 216, and 218 can, therefore, pass straight through beam separator 222 with zero deflection angle. However, the total dispersion of beamlets 214, 216, and 218 generated by beam separator 222 can also be non-zero. Beam separator 222 can separate secondary charged-particle beams 236, 238, and 240 from beamlets 214, 216, and 218 and direct secondary charged-particle beams 236, 238, and 240 towards secondary optical system 242.

[0045] Deflection scanning unit 226 can deflect beamlets 214, 216, and 218 to scan probe spots 270, 272, and 274 over a surface area of wafer 230. In response to the incidence of beamlets 214, 216, and 218 at probe spots 270, 272, and 274, secondary charged particle beams 236, 238, and 240 may beemitted from wafer 230. Secondary charged particle beams 236, 238, and 240 may comprise charged particles (e.g., electrons) with a distribution of energies. For example, secondary charged particle beams 236, 238, and 240 may be secondary electron beams including secondary electrons (energies < 50 eV) and backscattered electrons (energies between 50 eV and landing energies of beamlets 214, 216, and 218). Secondary optical system 242 can focus secondary charged-particle beams 236, 238, and 240 onto detection sub-regions 246, 248, and 250 of charged-particle detection device 244. Detection sub-regions 246, 248, and 250 may be configured to detect corresponding secondary charged particle beams 236, 238, and 240 and generate corresponding signals (e.g., voltage, current, or the like) used to reconstruct an image of structures on or underneath the surface area of wafer 230.

[0046] The generated signals may represent intensities of secondary charged-particle beams 236, 238, and 240 and may be provided to image processing system 290 that is in communication with charged- particle detection device 244, primary projection optical system 220, and motorized wafer stage 280. The movement speed of motorized wafer stage 280 may be synchronized and coordinated with the beam deflections controlled by deflection scanning unit 226, such that the movement of the scan probe spots (e.g., scan probe spots 270, 272, and 274) may orderly cover regions of interests on the wafer 230. The parameters of such synchronization and coordination may be adjusted to adapt to different materials of wafer 230. For example, different materials of wafer 230 may have different resistance-capacitance characteristics that may cause different signal sensitivities to the movement of the scan probe spots.

[0047] The intensity of secondary charged particle beams 236, 238, and 240 may vary according to the external or internal structure of wafer 230, and thus may indicate whether wafer 230 includes defects or other errors. Moreover, as discussed above, beamlets 214, 216, and 218 may be projected onto different locations of the top surface of wafer 230, or different sides of local structures of wafer 230, to generate secondary charged particle beams 236, 238, and 240 that may have different intensities. Therefore, by mapping the intensity of secondary charged particle beams 236, 238, and 240 with the areas of wafer 230, image processing system 290 may reconstruct an image that reflects the characteristics of internal or external structures of wafer 230.

[0048] In some embodiments, image processing system 290 may include an image acquirer 292, a storage 294, and a controller 296. Image acquirer 292 may comprise one or more processors. For example, image acquirer 292 may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, or the like, or a combination thereof. Image acquirer 292 may be communicatively coupled to charged-particle detection device 244 of beam tool 104 through a medium such as an electric conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, or a combination thereof. In some embodiments, image acquirer 292 may receive a signal from charged-particle detection device 244 and may construct an image. Image acquirer 292 may thus acquire scanning charged-particle microscope (SCPM) images of wafer 230. Image acquirer 292 may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, or the like. Image acquirer 292may be configured to perform adjustments of brightness and contrast of acquired images. In some embodiments, storage 294 may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer-readable memory, or the like. Storage 294 may be coupled with image acquirer 292 and may be used for saving scanned raw image data as original images, and post-processed images. Image acquirer 292 and storage 294 may be connected to controller 296. In some embodiments, image acquirer 292, storage 294, and controller 296 may be integrated together as one control unit.

[0049] In some embodiments, image acquirer 292 may acquire one or more SCPM images of a wafer based on an imaging signal received from charged-particle detection device 244. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas. The single image may be stored in storage 294. The single image may be an original image that may be divided into a plurality of regions. Each of the regions may comprise one imaging area containing a feature of wafer 230. The acquired images may comprise multiple images of a single imaging area of wafer 230 sampled multiple times over a time sequence. The multiple images may be stored in storage 294. In some embodiments, image processing system 290 may be configured to perform image processing steps with the multiple images of the same location of wafer 230.

[0050] In some embodiments, image processing system 290 may include measurement circuits (e.g., analog-to-digital converters) to obtain a distribution of the detected secondary charged particles (e.g., secondary electrons). The charged-particle distribution data collected during a detection time window, in combination with corresponding scan path data of beamlets 214, 216, and 218 incident on the wafer surface, can be used to reconstruct images of the wafer structures under inspection. The reconstructed images can be used to reveal various features of the internal or external structures of wafer 230, and thereby can be used to reveal any defects or other errors that may exist in the wafer.

[0051] In some embodiments, the charged particles may be electrons. When electrons of primary charged-particle beam 210 are projected onto a surface of wafer 230 (e.g., probe spots 270, 272, and 274), the electrons of primary charged-particle beam 210 may penetrate the surface of wafer 230 for a certain depth, interacting with particles of wafer 230. Some electrons of primary charged particle beam 210 may elastically interact with (e.g., in the form of elastic scattering or collision) the materials of wafer 230 and may be reflected or recoiled out of the surface of wafer 230. An elastic interaction conserves the total kinetic energies of the bodies (e.g., electrons of primary charged particle beam 210) of the interaction, in which the kinetic energy of the interacting bodies does not convert to other forms of energy (e.g., heat, electromagnetic energy, or the like). Such reflected electrons generated from elastic interaction may be referred to as backscattered electrons (BSEs). Some electrons of primary charged particle beam 210 may inelastically interact with (e.g., in the form of inelastic scattering or collision) the materials of wafer 230. An inelastic interaction does not conserve the total kinetic energies of the bodies of the interaction, in which some or all of the kinetic energy of the interacting bodiesconvert to other forms of energy. For example, through the inelastic interaction, the kinetic energy of some electrons of primary charged particle beam 210 may cause electron excitation and transition of atoms of the materials. Such inelastic interaction may also generate electrons exiting the surface of wafer 230, which may be referred to as secondary electrons (SEs). Yield or emission rates of BSEs and SEs depend on, e.g., the material under inspection and the landing energy of the electrons of primary charged particle beam 210 landing on the surface of the material, among others. The energy of the electrons of primary charged particle beam 210 may be imparted in part by its acceleration voltage (e.g., the acceleration voltage between the anode and cathode of charged-particle source 202 in FIG. 2B). The quantity of BSEs and SEs may be more or fewer (or even the same) than the injected electrons of primary charged particle beam 210.

[0052] The SEM may scan overlay or other metrology marks on the wafer surface. For example, indie marks may be located within unused areas of a pattern region, or functional features may be used for metrology purposes. Alternatively or additionally, an overlay or other test mark may be located in a scribe lane or other non-pattern area around a perimeter of an exposure field. These marks may be used to measure misalignment or other spatial parameters between, e.g., adjacent fields in a same device layer, or overlapping fields in two different device layers. Further, some circuit layers may be too large to be formed on a single standard-size exposure die of, e.g., 26 x 33 mm. Similarly, some lithography systems may not be capable of printing a pattern of that size in a single exposure. In such case, it may be necessary to “stitch” multiple exposures together side-by-side to form a single continuous device layer. Stitching exposure processes may impose strict placement requirements to ensure that a fully functioning device is produced, and stitching overlay marks may be employed on either side of a stitching boundary.

[0053] FIG. 3A illustrates examples of exposed wafers W, each having a plurality of fields 31, consistent with embodiments of the present disclosure. As shown in FIG. 3A, a wafer W may contain a plurality of fields 31 each corresponding to an area of a mask (e.g., mask 16 of FIG. 1A or 116 of FIG. IB). In some embodiments, a mask 316 may be used to produce an identical circuit pattern “C” on each of a plurality of fields 31, for example, using by a lithography system (e.g., lithography system 10 of FIG. 1A or 11 of FIG. IB). In some embodiments, each field 31 may comprise one die or a plurality of dies.

[0054] In some embodiments, an illumination system may scan an exposure slit 313 over the mask 316 along a scanning direction (indicated by arrows) to progressively transfer different portions of the mask pattern onto a field 31. For example, in some embodiments, a field may have dimensions of 26 x 33 mm. Exposure slit 313 may span the width of mask 316 and have a thickness of, e.g., 1-2 mm, and may be scanned over the length of the mask area to transfer the pattern onto a field 31.

[0055] As discussed above, in addition to a pattern area “C” inside the dashed box of mask 316, the exposure process may transfer additional alignment patterns 370 onto the wafer. Alignment patterns 370 may be configured for determining, e.g., alignment, overlay, distortion, or other spatial parametersof pattern “C” relative to itself, to adjacent patterns in the same layer, or to overlapping patterns in a prior or subsequently formed layer. In general, such patterns may be referred to throughout the disclosure as overlay patterns, and their corresponding printed features on a substrate may be referred to as overlay marks. In particular, embodiments of the present disclosure may be described with respect to stitching overlay, for example in high-NA EUV applications. However, it should be understood that the systems and methods disclosed herein may be applied to other metrology processes in some embodiments of the present disclosure. Overlay patterns 370 may be located around a perimeter of the pattern area “A,” for example in a scribe lane or other non-pattern area. In some embodiments, overlay patterns 370 may be located within the device pattern area.

[0056] As shown at the bottom of FIG. 3A, fields 31 may be exposed by using two masks. For example, a first mask 316a may be used to produce a first pattern “A” in a first sub-field 31a during a first exposure, and a second mask 316b may be used to produce a second pattern “B” in a second sub-field 31b during a second exposure. The patterns “A” and “B” may be stitched together along a stitching boundary 381 to form a single continuous device layer. Stitching overlay patterns 370a / b may be arranged in masks 316a / b along mask stitching boundaries 371 to enable overlay measurements. Each pair of stitching overlay marks from adjacent sub-fields may be measured with respect to each other to determine overlay errors such as translational or rotation offset, distortions etc.

[0057] In some embodiments, the design layout of patterns “A” and “B” may be distorted from the actual desired pattern to account for, e.g., an anisotropic reduction ratio of the projection optics. When the reduction ratio is anisotropic, e.g., 8 in the scanning direction and 4 in the direction perpendicular to the scanning direction, the representations on masks 316a / b may be spatially scaled by a factor of 8 in the scanning direction 4 in the non-scanning direction, relative to a printed pattern on field 31. When an image of the pattern on, e.g., mask 316a is projected onto a sub-field 31a, the projection optics may spatially scale the image by a factor of Vs in the scanning direction and by a factor of * in the nonscanning direction. Therefore, a 26 x 33 mm exposure region may be patterned using two subfields that are each 26 x 16.5 mm. Because of the anisotropy of the reduction ratio, both the shapes and the sizes of the features of masks 316a / b may be different from their corresponding features in a design layout. This distortion may render metrology operations such as stitching overlay particularly difficult, especially when aligning the types of fine pattern features typically printed on high-NA EUV systems.

[0058] While the forgoing examples illustrate stitching embodiments in which two sub-fields of differing patterns are stitched together, embodiments of the present disclosure are not limited to this. For example, a field 31 may comprise three, four, or more sub-fields arranged linearly or in a 2D array. A field 31 may comprise a single repeated device pattern at each subfield, or more than two unique device patterns may be used. Further, it should be understood that exposure fields 31 are not limited to the size or shape of the examples given above, such as 26 x 33 mm.

[0059] FIG. 3B schematically illustrates the impact of good vs poor stitching overlay on the same and subsequent device layers. At the top of the figure, first and second sub-fields 31a / b are aligned into aproperly stitched pattern in an exposure field of a first device layer. For example, the first device layer may correspond to the layer shown at the bottom of FIG. 3A. Sub-fields 31a / b may be printed from masks 316a / b using, e.g., a high-NA EUV lithography system having anisotropic projection optics. The stitched pattern in the first device layer may be overlaid with and aligned to field 31c in a second device layer. For example, the second layer may correspond to the layer shown at the top of FIG. 3A.

[0060] With proper stitching overlay, not only are sub-fields 31a / b properly aligned to each other, but they are also properly overlaid with field 31c. With poor stitching, the misalignment between sub-fields 31a and 31b may lead to further overlay errors with field 31c. Such overlay errors may be more difficult to compensate than single-field exposures. Accordingly, there is a need for precise measurement of stitching overlay between sub-fields.

[0061] Conventional marks include optical overlay marks and SEM overlay marks. Existing optical overlay marks may comprise include IBO (image based overlay) marks, yield star marks, including uDBO (micro-diffraction based overlay) and cDBO (continuous diffraction based overlay). SEM overlay marks may comprise, e.g., contact hole patterns, line-space patterns, or device-like patterns. One problem with conventional optical overlay marks is that they consume a large amount of space on a wafer. Current SEM overlay marks do not have built-in set-overlay values within a 0.5-2 micron area.

[0062] FIG. 4 schematically illustrates a stitching overlay system, according to a comparative embodiment. By comparative methods, stitching overlay marks may consume a large amount of area on either side of a stitching boundary. For example, a first sub-field 41a corresponding to a first mask pattern may comprise a first stitching overlay mark 480a, and a second sub-field 41b corresponding to a second mask pattern may comprise a second stitching overlay mark 480b. Stitching overlay marks 480a and 480b may each comprise a row of periodic structures 483 having an x-direction pitch Px. The structures in first stitching overlay mark 480a on a first side of the stitching boundary 481 may have a programmed offset dx from the structures in second stitching overlay mark 480b on a second side of the stitching boundary. The default programmed offset dx may be zero. An inspection device may acquire and analyze an image of the overlay marks to determine, e.g., an average offset between the two marks. To acquire enough data points for a reliable measurement, a large number of periodic structures 483 may be required, however, it is difficult to directly evaluate whether each data point from respective pairs of periodic structures will give the correct dx value due to lack of a known reference.

[0063] Embodiments of the present disclosure provide systems and methods for stitching overlay and other metrology measurements using compact marks having a smaller footprint with the known reference. In some embodiments, stitching overlay marks may be made small enough that two corresponding marks on either side of a stitching boundary may both fit within a single high-resolution field of view of an inspection apparatus, such as a SEM inspection tool. By making the stitching overlay marks small enough to fit within a single SEM field of view, it enables in-device area overlay metrology. In some embodiments, the overlay marks may have a total width of, e.g., between 0.2 and 5 microns, or more particularly between 0.5 and 2 microns. Accurate results within this small measurementfootprint may be achieved by performing a pre-tuning process before aligning the two marks to each other. For example, each overlay mark may be configured such that their image processing algorithm parameters may be individually tuned before determining overlay or another measurement parameter.

[0064] FIGS. 5A-C illustrate an example stitching overlay process, consistent with embodiments of the present disclosure. FIG. 5A shows a measured image 582 of a first overlay mark 580a and a second overlay mark 580b for an ideal case with no overlay error (at top) and for a case having a nonzero on- product overlay error value OPO (at bottom). Image 582 may be, e.g., a charged particle beam image such as a SEM image. For example, the image may be acquired using EBI system 100 of FIG. 2A or electron beam tool 104 of FIG. 2B. In some embodiments, image 582 may be an optical or other measured image. In some embodiments, image 582 may be generated from a single field of view of a SEM or other inspection apparatus. For example, the field of view may have an x-dimension of, e.g., between 0.5 and 2 microns.

[0065] First overlay mark 580a may be printed in a portion of a first sub-field 51a on a wafer, and second mark 580b may be printed in a portion of a second sub-field 51b on the wafer. In some embodiments, the wafer may correspond to, e.g., wafer W of FIGS. 3A-B, the first sub-field may correspond to sub-field 31a printed by mask 316a, and the second sub-field may correspond to sub-field 31b printed by mask 316b. Overlay marks 580a and 580b may be arranged on opposite sides of a stitching boundary 581. It should be understood that within other portions of the subfields 51a / b (not shown), functional device features may touch or cross over stitching boundary 581 to meet or overlap with each other and form a continuous device layer.

[0066] First overlay mark 580a and second overlay mark 580b may each comprise one or more unit cells having at least two sets of structures. For example, first overlay mark 580a comprises a plurality of first structures (filled circles) arranged at a first pitch Pxl, and a plurality of second structures (empty circles) arranged at a second pitch Px2. Eikewise, second overlay mark 580b may comprise a plurality of third structures (filled circles) arranged at the first pitch Pxl, and a plurality of fourth structures (empty circles) arranged at the second pitch Px2. A discussion of the unit cells within each mark is given below with respect to first overlay mark 580a, but it applies similarly to second overlay mark 580b. Furthermore, while overlay is disclosed with a respect to a single direction x, the structures may also have similar programmed offsets in a further direction y to enable measurement in two dimensions.

[0067] Each structure within the first plurality of structures may be aligned to a corresponding structure in the second plurality of structure with a built-in offset. The first and second pluralities of structures may be arranged at designed (“set”) overlay values such that each successive pair is offset by an increment of the pitch difference dP, where dP = Px2 - Pxl. For example, as shown in FIG. 5A, a unit cell may comprise five pairs of first and second structures, where the pairs are designed with set-overlay values of -2dP, -dP, 0, dp, and 2dp respectively. Further, the first overlay mark 580a of the first field may be designed to align perfectly with the second overlay mark 580b. Therefore, the plurality ofsecond structures and the plurality of third structures may be designed with the same set overlay values of -2dP, -dP, 0, dp, and 2dp respectively.

[0068] However, as seen at the bottom of FIG. 5A, in practice the sub-fields 51a and 51b will be printed with some non-zero on-product overlay error OPO that must be measured and accounted for. Furthermore, individual structures within each overlay mark, or the images thereof, may not align perfectly with their set values. For example, while pitch control of the plurality of structures may be highly accurate in a lithography process, CD control may be less accurate, and it may be difficult to produce clear images of the structures. Therefore, to accurately measure an OPO or other metrology value with a compact overlay mark, embodiments of the present disclosure may tune the image processing algorithm parameters of the first and second overlay marks in each exposure region independently before comparing the marks to each other.

[0069] FIG. 5B illustrates an example process for tuning the image processing algorithm parameters, consistent with embodiments of the present disclosure. The process may comprise comparing a set of designed offset values between the first and second pluralities of structures to a set a measured offset values of the first and second pluralities of structures. Plots (1) - (2) may correspond to, e.g., measurements from measured images of overlay marks 580a and 580b of FIG. 5A. A first plot (1) may correspond to a set-get plot of initial measurements from a first overlay mark 580a in a first sub-field printed by a first mask (such as, e.g., first mask 316a in FIG. 3A). The set values along the x-axis may be obtained by design. For example, the x-axis of the first plot (1) may show set overlay values -2dP, -dP, 0, dp, 2dP, 3dP, etc. between first and second structures according to designed offsets of the overlay marks. The y-axis of first plot (1) may show the initial measured (or “get”) overlay values corresponding to each set value. The initial get values may be obtained by analyzing the measured image to determine a measured offset at each pair of first and second structures. Next, the image processing algorithm parameters of the measured image may be iteratively tuned until the get overlay values conform closely to the given set values. For example, the image processing algorithm parameters may be adjusted until a curve fit between the set and get values meets a predetermined criterion. For example, the curve fit may be a linear fit. The criterion may include a slope of substantially 1 or a y-intercept of substantially 0. For example, in some embodiments, the image processing algorithm parameters may be tuned until the slope approaches 1 to within a first predetermined threshold, or the y-intercept approaches 0 to within a second predetermined threshold. In some embodiments, the criterion may comprise, e.g., a weighted combination of slope and intercept threshold values. The result of is a series of refined or tuned get values for the first overlay mark 580a that may be used in a stitching overlay or other metrology process. The refined or tuned get values may correspond to e.g., a center value in the x- direction of each the individual structures.

[0070] The same process may be performed on a second set-get plot (2) of second overlay mark 580b in a similar manner. However, while the first and second overlay marks 580a / b may be captured in the same measured image, the specific image tuning of the second overlay mark 580b in second plot (2)may be independent of the tuning in first plot (1). Tuning parameters may comprise the parameters used in any image processing algorithms. The image processing algorithms can be, e.g., template matching, edge or contour-finding, shape fitting, region segmentation etc. The parameters can be any shape parameters, such as radius or linewidth, any edge searching parameters, such as threshold, derivative parameters etc., any image enhancement parameters, such as image filter kernel parameters, gray-level tuning, or any other suitable image tuning parameters.

[0071] After the get values of the first and second overlay marks are tuned, the values may be compared to each other to determine a desired metrology parameter. For example, FIG. 5C illustrates an example process for identifying a metrology parameter from the tuned values, such as OPO, consistent with embodiments of the present disclosure. Plot (3) illustrates a set-get plot of the offset between overlay marks 580a and 580b that may be used to determine an on-product overlay value OPO. The offset may represent, e.g., a global offset of the entire mark 580a from the entire mark 580b, or it may comprise an offset measured between subsets of the structures within each overlay mark. For example, as shown on the right of FIG. 5C, plot (3) may represent a set-get plot of the difference between the plurality of second structures of mark 580a and the plurality of third structures of mark 580b. In this case, the x- axis would again show the same set values for each cross-boundary pair, in increments of dP as discussed above. However, values along the y-axis may correspond to the designed offsets dP plus an on-product overlay value at each pair of structures. By taking a linear fit of the points on plot (3), a y- intercept may be used as an average of the OPO values from each pair of structures. Therefore, the y- intercept may be accepted as an OPO value between marks 580a and 580b. The OPO value may be combined with other measurements from further stitching overlay marks to determine overlay parameters between, e.g,, a first and second sub-field. The measurements may be used, e.g,, to control process parameters in a semiconductor manufacturing system, such as lithography apparatus 10 or 11 of FIGS. 1A-B.

[0072] In some embodiments, more complex arrangements of structures may be provided in overlay marks to yield additional information. For example, additional sets of structures may be arranged with additional pitches in both the x and y directions. Further, multiple rows of structures having a same pitch may be arranged at varying distances from a stitching boundary or other edge of an exposure field.

[0073] FIG. 6 illustrates further example sets of overlay marks 680a-d, consistent with embodiments of the present disclosure. In some embodiments, mark pairs 680a / b or 680c / d may be captured within a single field of view 682 of an inspection apparatus. Overlay marks 680a and 680b depict arrays of 2- pitch interleaved structures. For example, overlay mark 680a may comprise a first plurality of structures arranged in a first 2D array with a first x-pitch Pxl and a first y-pitch Pyl. A second plurality of structures may be interleaved in a second 2D array with a second x-pitch Px2 and a second y-pitch Py2. Similarly, second overlay mark 680b may comprise corresponding third and fourth pluralities of structures interleaved within third and fourth arrays. The third and fourth arrays may be arranged at the first and second x-pitches and first and second y-pitches in a similar manner to what is discussed abovewith respect to FIG. 5A. By providing additional rows of marks, multiple set-get curves may be calculated for each pitch. The multiple set-get curves may be combined in a weighted combination to calculate optimal tuning parameters. Similarly, multiple set-get curves may be calculated when determining an on-product overlay error or other metrology parameter. Additionally, using 2D arrays, the set-get curves may be obtained in both the x and y directions.

[0074] In addition to providing multiple set-get curves for tuning and measurement, the additional rows enable further monitoring of proximity effects and local placement errors. For example, the first plurality of structures in overlay mark 680a may comprise multiple rows placed at successively greater distances from stitching boundary 681. Even if the overlay patterns on a corresponding mask have an identical pitch for each of these rows, the printed rows may not. For example, due to edge exposure and other proximity effects, as well as spatial frequency filtering and other optical effects of the projection system, the pitch in a row 683 of first structures that is closest to stitching boundary 681 (i.e., closest to the edge of its exposure sub-field) may be different from the pitch in a row 684 of first structures that is farthest from the stitching boundary. In general, the proximity effects may taper off with increasing distance from the stitching boundary 681 or other exposure edge. For example, in some embodiments, adjacent rows of the first structures may have substantially equal pitches at a distance of, e.g., 1-2 microns from the stitching boundary 681. Therefore, in some embodiments, the set-get curves of different rows may be utilized to determine proximity errors, edge placement errors, and other effects.

[0075] In general, any number of interleaved structures may be provided, so long as the entire mark may fit within a single field of view of an inspection apparatus. For example, the bottom of FIG. 6 illustrates 3-pitch interleaved marks 680c and 680d. The features and advantages of such marks correspond to the description of the 2-pitch marks 680a and 680b as described above, but they may be utilized to gather even more data in view of the additional pitches.

[0076] Further, the 2D arrays of structures need not be interleaved. For example, FIG. 7 illustrates further example sets of overlay marks 780a-d, consistent with embodiments of the present disclosure. In some embodiments, mark pairs 780a / b or 780c / d may be captured within a single field of view 782 of an inspection apparatus. Overlay marks 780a and 780b depict arrays of 2-pitch block structures. For example, overlay mark 780a may comprise a first plurality of structures arranged in a first 2D block array with a first x-pitch Pxl and a first y-pitch Pyl. A second plurality of structures may be interleaved in a second 2D block array with a second x-pitch Px2 and a second y-pitch Py2. Similarly, second overlay mark 780b may comprise corresponding third and fourth pluralities 2D block arrays of structures. The third and fourth arrays may be arranged at the first and second x-pitches and first and second y-pitches as discussed above. In general, any number of block structures may be provided. For example, marks 780c / d illustrate 4-pitch block marks having first, second, third and fourth pitches in the x and y directions.

[0077] A set-get curve may be obtained in a similar manner as with the embodiments above by, e.g., subtracting a block distance constant BD. For example, the center columns of the first and second blockarrays, which are separated by a block distance BD, may be taken as a zero point on a set-get plot. Then, an incremental distance dP may take the form dP = Px2 - Pxl - BD. For example, a set overlay value between a first pair of structures 785 may be -dP, and a set overlay value between a second pair of structures 786 may be dP.

[0078] An advantage of providing the structures within separate block arrays is that, within any given region, there is more consistency of pattern shape and pattern density than there would be with the interleaved structures of FIG. 6. This may reduce the computational burden for resolution enhancement techniques such as optical proximity corrections. However, due to the larger block distance BD in the block array design, the interleave design may be less sensitive to scaling errors resulting from aberrations in the lithography or SEM tool.

[0079] Further, block marks need not be arranged in 2D arrays. FIGs. 8A-B illustrate further sets of overlay marks 880a-f, consistent with embodiments of the present disclosure. In some embodiments, mark pairs 880a / b, 880c / d, or 880e / f may be captured within a single field of view 882 of an inspection apparatus. Overlay marks 880a / b and 880c / d of Fig. 8A depict linear arrays of 2-pitch block structures. For example, overlay mark 880a may comprise a first plurality of line and space structures arranged in a first linear block with a first x-pitch Pxl. A second plurality of line and space structures may be arranged in a second linear block with a second x-pitch Px2. As illustrated at the top of FIG. 8A, by removing a block distance constant BD, it is possible to recover the original pitch difference formula dP = Px2 - Pxl. In this way a simple line and space pattern having, e.g. two, four or another number of unique pitches, may be used in a compact space to provide high-quality metrology measurements.

[0080] Alternatively, as shown in Fig. 8B, a single pitch Px may be used, with differences provided by step distance between adjacent sets of marks. For instance, overlay marks 880e and 880f may both be set to an equal pitch Px. Overlay mark 880e may comprise a linear array of single-pitch block structures (for example, sets of four structures as illustrated), with unit cells of structures being offset from each other by increasing distances Px+d, Px+2d, etc. For example, in some embodiments d may have a value on the order of, e.g., 1 nm. Although not illustrated in the figure, further structures may be arrayed to the left having corresponding negative offsets Px-d, Px-2d, etc. Marks 880e may thus be tuned by constructing a set-get plot based adjacent pairs of unit cells. In the illustrated embodiment, for example, each unit cell comprises four linear structures. Thus for every set overlay value d, 2d, etc. there may be four get values that may be averaged or otherwise applied to a linear fit as shown in set- get plot (4).

[0081] Meanwhile, the spacing between sets of structures in overlay mark 880f may, e.g., remain constant. Stitching overlay may between the two marks be measured at the various offsets of d, 3d, 6d, lOd, etc. as shown in Fig. 8B. Alternatively, overlay mark 880f may comprise further programmed offsets (not shown) to allow for tuning the image processing algorithms with respect to overlay mark 880f.

[0082] In some embodiments, overlay marks on either side of a stitching boundary may comprise different pitches, or different combinations of linear and 2D arrays. For example, FIGS. 9A-C illustrate further sets of overlay marks 980a-d in a stitching overlay process, consistent with embodiments of the present disclosure. In some embodiments, mark pairs 980a / b or 980c / d may be captured within a single field of view 982 of an inspection apparatus. Overlay mark 980a depicts a 2-pitch linear mark on a first side of stitching boundary 981. The 2-pitch linear mark may comprise a first plurality of structures arranged at a first x-pitch Pxl and a second plurality of structures arranged at a second x-pitch Px2. Overlay mark 980b depicts a 2-pitch 2D block mark on a second side of stitching boundary 981. The 2- pitch 2D block mark may comprise a third plurality of structures arranged at a third x-pitch Px3 and a third y-pitch Py3, and a fourth plurality of structures arranged at a fourth x-pitch Px4 and a fourth y- pitch Py4.

[0083] Thus, the two overlay marks 980a / b may have different shapes, array dimensions and pitches. Nevertheless, as shown at FIGS. 9B-9C, the process for determining stitching overlay and other metrology parameters may remain essentially the same as discussed with respect to FIGS. 5B-C (at least in, e.g., the x-direction for which both marks capable of measurement). For example, as seen at FIG. 9B, a first set-get plot (5) may be determined between the set and get overlay of the first and second pluralities of structures in mark 980a. Based on this plot, image processing algorithm parameters may be tuned until accurate values of the center points of the structures are determined. For example, parameter tuning may be used to establish center locations in the x-direction for each structure within at least one of the first and second pluralities of structures. Next, a second set-get plot (6) may be determined between the set and get overlay of the third and fourth pluralities of structures in mark 980b. Note that, due to the differing pitch pairs, the incremental value dP given in the first set-get plot (5) may not correspond to the incremental value dP of the second set-get plot (6). The same may be true for third set-get plot (7) discussed below. Further, because there are multiple rows of structures in overlay mark 980b, in some embodiments the second set-get plot (7) may comprise, e.g., a weighted combination of values. In some embodiments, only a subset of the third and fourth pluralities of structures may be selected for tuning. The image processing algorithm parameters may again be independently tuned with respect to mark 980b to determine center locations in the x-direction of each structure of at least one of the third and fourth pluralities of structures.

[0084] Finally, as seen at FIG. 9C, a third set-get plot may be determined between the two overlay marks. The third set-get plot may take many forms. For example, the third set-get plot may be measured between any pair of linear and 2D arrays shown at the right of FIG. 9C, or it may comprise a combination of two more pairs. A y-intercept of this third set-get plot may be used as an on-product overlay or other metrology measurement value. At the bottom of FIG. 9A, the same principle is illustrated with respect to four-pitch combination marks 980c and 980d. In general, multiple distinct marks may be used together. For example, if the marks are configured to be independently tuned toestablish reliable center locations in a measurement direction, they may be used together in some embodiments of the present disclosure.

[0085] Additionally, while the features and advantages of the present disclosure have been discussed with respect to stitching overlay, embodiments of the present disclosure are not limited to this. Other metrology measurements may be achieved by a process of using set-get plots to pre-tune the image processing algorithm parameters on two corresponding sets of marks within a same field of view, and using the tuned data points to determine the metrology measurement value. For example, embodiments of the present disclosure may be applied to metrology measurements such as alignment, stitching overlay, cross-layer-overlay, distortion, focus, or any other measurement of the distance between two pluralities of structures within a single field of view.

[0086] FIG. 10 illustrates an example overlay measurement process, consistent with embodiments of the present disclosure. Four exposure fields lOOla-d may be present in two layers of an exposure region 1031 on a wafer. For example, exposure region 1031 may correspond to, e.g., a field 31 of wafer W in FIG. 3A. Layer 1 of exposure region 1031 may comprise first and second sub-fields lOOla / b having overlay marks 1080a / b respectively. Layer 2 of exposure region 1031 may comprise third and fourth sub-fields lOOlc / d having overlay marks 1080c / d respectively. In some embodiments, all mark pairs lOOla-d may be captured within a single field of view 1082 of an inspection apparatus.

[0087] Overlay marks 1080a / b may each comprise, e.g., 2-pitch linear block marks as discussed above with respect to FIG. 8A, and a stitching overlay measurement between the first and second sub-fields lOOla / b in layer 1 may be performed in a similar manner. Overlay marks 1080c / d may each comprise, e.g., 2-pitch 2D block marks as discussed above with respect to FIG. 7, and a stitching overlay measurement between the third and fourth sub-fields lOOlc / d in layer 2 may be performed in a similar manner.

[0088] Further, overlay measurement between layer 1 and layer 2 may follow essentially the same steps as the other embodiments discussed above, with the overlay being taken across layers instead of across stitching boundaries. For example, a measured image may include at least, e.g., marks 1080a and 1080c within a single field of view 1082. A first set-get plot may be determined for the first and second pluralities of linear block structures in mark 1080a, and image processing algorithm parameters may be tuned to determine optimal center locations in the x-direction of the linear block structures. For example, because layer 1 is the lower layer in the given example, the image processing algorithm parameters may be tuned to better identify buried features. A second set-get plot may be determined for the third and fourth pluralities of 2D block structures in mark 1080c. Image processing algorithm parameters of the measured image may again be independently tuned to determine optimal center locations in the x- direction of the 2D block structures. Using the determined locations, a third set-get plot of overlay between mark 1080a and 1080c may be used to determine an overlay value, such as by taking a y- intercept of the third set-get plot. The same process may be performed for marks 1080b and 1080d.

[0089] In some embodiments, layer 1 and layer 2 may be acquired under different conditions, for example from different SEM detectors. For example, a SEM tool may simultaneously acquire BSE’s and SE’s as discussed above. A BSE image may better capture buried features of the lower layer 1, while a SE image may better capture the surface features of upper layer 2. Each measured image may be tuned according to a different image processing algorithm to determine an optimal set-get overlay curve. Then, the measured images may be combined at their center locations to determine an overlay value across layers 1 and 2.

[0090] FIG. 11 illustrates an example process 1100 of measuring a value of a metrology parameter, consistent with embodiments of the present disclosure. For example, the metrology parameter may comprise, e.g., an alignment measurement or an overlay measurement. In some embodiments, the measurement may be performed on a wafer that is patterned using, e.g., lithography systems 10 or 11 of FIGS. 1A-B. In some embodiments, the measurement may be performed using a charged particle apparatus, such as EBI system 100 of FIG. 2A or electron beam tool 104 of FIG. 2B. The illustrated process 1100 may be altered to modify the order of steps and to include additional or fewer steps.

[0091] At step 1101, a measured image may be acquired. The measured image may comprise, e.g., a charged particle beam image such as a SEM image. In some embodiments the measured image may comprise a single field of view such as, e.g., 582, 682, 782, 882, 982, or 1082 of FIGS. 5-10 respectively. The measured image may include at least a first overlay mark and a second overlay mark such as, e.g., marks 580a / b, 680a / b, 680c / d, 780a / b, 780c / d, 880a / b, 880c / d, 880e / f, 980a / b, 980c / d, 1080a / b, 1080c / d, 1080a / c, or 1080b / d of FIGS. 5-10 respectively.

[0092] For example, the first overlay mark may be located in a first field on a wafer and the second overlay mark may be located on a second field on the wafer. The first field and the second field may comprise, e.g., two sub-fields within an exposure region of a wafer. For example, the first field and the second field may comprise sub-fields 31a / b of field 31 in FIG. 3A. Alternatively, the first field and the second field may comprise adjacent fields 31. Further, the first field and the second field may comprise overlapping fields in a first and second layer of the wafer. Therefore, the first overlay mark and the second overlay mark may be separated by, e.g., a stitching boundary or other in-plane boundary, or they may be separated into two different layers.

[0093] The first overlay mark may comprise a first plurality of structures arranged at a first pitch and a second plurality of structures arranged at a second pitch. The second overlay mark may comprise a third plurality of structures arranged at a third pitch and a fourth plurality of structures arranged at a fourth pitch. In some embodiments, the first pitch may be equal to the third pitch, or the second pitch may be equal to the fourth pitch. In some embodiments, each pitch may be different.

[0094] The first and second pluralities of structures may be designed with a first incremental set pitch difference dPl, and the third and fourth pluralities of structures may be designed with a second incremental set pitch difference dP2. As noted above, in some embodiments the first incremental set pitch difference dPl may equal the second incremental set pitch difference dP2. For example, asdiscussed above with respect to FIG. 5A, the first and second pluralities of structures, as well as the third and fourth pluralities of structures, may be separated by a single incremental set pitch difference dP.

[0095] At step 1102, a first set-get plot of the offsets between the first and second pluralities of structures may be calculated. The first set-get plot may, e.g., plot the designed offset values between the first and second pluralities of structures along an x-axis vs. the measured offset values along a y- axis. For example, the first set-get plot may take the form of plot (1) in FIG. 5B or plot (4) in FIG. 9B, and as discussed with respect to any of FIGS. 5A-10.

[0096] At step 1103, image processing algorithm parameters of the measured image may be iteratively tuned to optimize the get values of the first set-get plot. The image processing algorithm parameters may comprise the parameters used in any image processing algorithms such as, e.g., template matching, edge or contour-finding, shape fitting, region segmentation etc. The parameters may comprise: shape parameters such as, e.g., radius or linewidth; edge searching parameters such as, e.g., threshold, derivative parameters etc.; image enhancement parameters such as, e.g., image filter kernel parameters, gray-level tuning, or any other suitable image tuning parameters. The optimization may comprise adjusting the image processing algorithm parameters until a linear fit between the set and get values comprises a slope of substantially 1 and a y-intercept of substantially 0. For example, in some embodiments, the image processing algorithm parameters may be tuned until the slope approaches 1 to within a first predetermined threshold, and the y-intercept approaches 0 to within a second predetermined threshold. Based on the tuned image processing algorithm parameters, accurate center locations of the first or second pluralities of structures are determined.

[0097] At steps 1104 and 1105, the same process of steps 1102 and 1103 may be performed for the second mark. For example, a second set-get plot of the offsets between the third and fourth pluralities of structures may be calculated, and the measured image may be independently tuned to optimize the get values of the second set-get plot. Using the tuned image processing algorithm parameters, accurate center locations of the third or fourth pluralities of structures are determined.

[0098] At step 1106, a third set-get plot of the offsets between the first and second overlay marks may be calculated. The third set-get plot may, e.g., plot the designed offset values between the first and second marks along an x-axis vs. the measured offset values along a y-axis. In some embodiments the offset values may be taken between a subset of structures within each of the first and second marks. For example, as illustrated in plot (3) of Fig. 5C, the offset values may be taken between the second plurality of structures of first mark 580a and the third plurality of structures of second mark 580b. The third set- get plot may generally take the form of plot (3) in FIG. 5C or plot (7) in FIG. 9C, and as discussed with respect to any of FIGS. 5A-10.

[0099] At step 1107, a metrology or other measurement parameter value may be determined based on the third set-get plot. For example, by taking a linear fit of the data points in the third set-get plot, a y- intercept may be taken as the parameter value. The value may be one of, e.g., alignment, overlay,distortion, focus, or any other measurement of the distance between two pluralities of structures within a single field of view. Further, the parameter may comprise placement error, an edge exposure parameter or an optical proximity effect.

[0100] At step 1108, an adjustment may be performed based on the measured parameter value. For example, the adjustment may comprise a tuning or correction to a process or apparatus involved in manufacturing the measured sample. For instance, the adjustment may be performed to a lithography or other semiconductor manufacturing apparatus or process based on the measured parameter value, such as by comparison to a target, threshold, or previously measured parameter value. In some embodiments, the adjustment may be to a component of a lithography apparatus such as, e.g., lithography system 10 of FIG. 1 A or 11 of FIG. IB, or the adjustment may be to a process performed by such systems.

[0101] A non-transitory computer readable medium may be provided that stores instructions for a processor of a controller (e.g., controller 109 of FIG. 2A or image processing system 290 of FIG. 2B) to carry out, among other things, image inspection, image acquisition, stage positioning, beam focusing, electric field adjustment, beam bending, condenser lens adjusting, activating charged-particle source, beam deflecting, and at least some steps of method 1100. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read Only Memory (PROM), and Erasable Programmable Read Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), a cache, a register, any other memory chip or cartridge, and networked versions of the same.

[0102] Although specific reference may be made in this text to the use of the embodiments in the manufacture of ICs, it should be explicitly understood that the embodiments have many other possible applications. For example, it may be employed in the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, liquid-crystal display panels, thin-film magnetic heads, etc. The skilled artisan will appreciate that, in the context of such alternative applications, any use of the terms “reticle,” “wafer” or “field” in this text should be considered as interchangeable with the more general terms “mask,” “substrate” and “target portion,” respectively. In the present document, the terms “radiation” and “beam” are used to encompass all types of electromagnetic radiation, including ultraviolet radiation (e.g. with a wavelength of 365, 248, 193, 157 or 126 nm) and EUV (extreme ultra-violet radiation, e.g. having a wavelength in the range 5-20 nm).

[0103] Embodiments of the present disclosure can be further described by the following clauses.1. A non-transitory computer-readable medium that stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations comprising: acquiring a measured image of a region on a substrate, the region comprising a first overlay mark and a second overlay mark;performing a first tuning of a first image processing algorithm parameter of the measured image based on the first overlay mark; calculating a first measurement of the first overlay mark based on the first tuning; performing a second tuning of a second image processing algorithm parameter of the measured image based on the second overlay mark, the second tuning being different from the first tuning; calculating a second measurement of the second overlay mark based on the second tuning; and calculating an overlay value based on the first measurement and the second measurement.2. The non-transitory computer-readable medium of clause 1, wherein the measured image is a charged particle beam image.3. The non-transitory computer-readable medium of clause 1, wherein acquiring the measured image comprises acquiring the measured image from a single field of view of an inspection apparatus.4. The non-transitory computer-readable medium of clause 1 , wherein: the first overlay mark comprises a first plurality of structures separated by a first pitch in a first direction and a second plurality of structures separated by a second pitch in the first direction; and the second overlay mark comprises a third plurality of structures separated by a third pitch in the first direction and a fourth plurality of structures separated by a fourth pitch in the first direction.5. The non-transitory computer-readable medium of clause 4, wherein: the first pitch is equal to the third pitch; and the second pitch is equal to the fourth pitch.6. The non-transitory computer-readable medium of clause 4, wherein the operations further comprise: comparing a set of designed offset values between the first and second pluralities of structures to a set a measured offset values of the first and second pluralities of structures in a first comparison, and comparing a set of designed offset values between the third and fourth pluralities of structures to a set a measured offset values of the third and fourth pluralities of structures in a second comparison, wherein performing the first tuning is based on the first comparison, and performing the second tuning is based on the second comparison.7. The non-transitory computer-readable medium of clause 6, wherein calculating the overlay value based on the first measurement and the second measurement comprises comparing a set of designed offset values between the first and second overlay marks to a set a measured offset values of the first and second overlay marks in a third comparison.8. The non-transitory computer-readable medium of clause 4, wherein the operations further comprise: calculating a first set-get plot of designed and measured offset values between the first and second pluralities of structures in the first direction, whereinperforming the first tuning comprises adjusting the first image processing algorithm parameter until the first set-get plot meets a first predetermined criterion, and calculating the first measurement of the first overlay mark based on the first tuning comprises determining a location of the first or second pluralities of structures in the first direction.9. The non-transitory computer-readable medium of clause 8, wherein the predetermined criterion comprises one of a slope or an intercept of a curve fit of the first set-get plot.10. The non-transitory computer-readable medium of clause 8, wherein the operations further comprise: calculating a second set-get plot of designed and measured offset values between the third and fourth pluralities of structures in the first direction, wherein performing the second tuning comprises adjusting the image processing algorithm parameter until the second set-get plot meets a second predetermined criterion, and calculating the second measurement of the second overlay mark based on the second tuning comprises determining a location of the third or fourth pluralities of structures in the first direction.11. The non-transitory computer-readable medium of clause 10, wherein the operations further comprise: calculating a third set-get plot of designed and measured offset values between the first and second overlay marks in the first direction, wherein calculating the parameter value based on the first measurement and the second measurement comprises determining an intercept of a curve fit of the third set-get plot.12. The non-transitory computer-readable medium of clause 4, wherein one of the first and second pluralities of structures comprises a two-dimensional array of structures having a fifth pitch in a second direction different from the first direction.13. The non-transitory computer-readable medium of clause 4, wherein one of the first, second, third, or fourth pluralities of structures comprises an array of linear or round structures.14. The non-transitory computer-readable medium of clause 4, wherein the first plurality of structures comprises an array of linear structures and the second plurality of structures comprises an array of round structures.15. The non-transitory computer-readable medium of clause 1, wherein the first overlay mark is located on a first side of a stitching boundary, and the second overlay mark is located on a second side of the stitching boundary.16. The non-transitory computer-readable medium of clause 15, wherein the operations further comprise: calculating a local placement error of a structure in the first overlay mark or the second overlay mark as a function of distance from the stitching boundary.17. The non-transitory computer-readable medium of clause 1, wherein the first overlay mark is located in a first layer of the substrate, and the second overlay mark is located in a second layer of the substrate.18. The non-transitory computer-readable medium of clause 1, wherein the first tuning of the first image processing algorithm parameter comprises tuning one of a shape fitting parameter, an edge searching parameter, a template matching parameter, a region segmentation parameter, or an image quality enhancement parameter.19. The non-transitory computer-readable medium of clause 1, wherein the first tuning of the first image processing parameter comprises tuning one of a radius, a linewidth, a threshold, a derivative parameter, an image filter kernel parameter, or a gray-level tuning parameter.20. The non-transitory computer-readable medium of clause 1, wherein the parameter value comprises one of alignment or overlay.21. The non-transitory computer-readable medium of clause 1, wherein the operations further comprise: calculating one of placement error, an edge exposure parameter, or an optical proximity effect.22. The non-transitory computer-readable medium of clause 1, wherein the operations further comprise: performing an adjustment to a semiconductor manufacturing process or a semiconductor manufacturing apparatus based on the calculated overlay value.23. The non-transitory computer-readable medium of clause 1, wherein: the measured image comprises a first image and a second image; the first image processing algorithm parameter comprises a tuning parameter of the first image; and the second image processing algorithm parameter comprises a tuning parameter of the second image.24. The non-transitory computer-readable medium of clause 23, wherein: the first image comprises a backscattered electron (BSE) image; and the second image comprises a secondary electron (SE) image.25. A method, comprising: acquiring a measured image of a first overlay mark and a second overlay mark on a substrate; performing a first tuning of a first image processing algorithm parameter of the measured image based on the first overlay mark; calculating a first measurement of the first overlay mark based on the first tuning; performing a second tuning of a second image processing algorithm parameter of the measured image based on the second overlay mark, the second tuning being different from the first tuning; calculating a second measurement of the second overlay mark based on the second tuning; and calculating an overlay value based on the first measurement and the second measurement.26. The method of clause 25, wherein the measured image is a charged particle beam image.27. The method of clause 25, wherein acquiring the measured image comprises acquiring the measured image from a single field of view of an inspection apparatus.28. The method of clause 25, wherein: the first overlay mark comprises a first plurality of structures separated by a first pitch in a first direction and a second plurality of structures separated by a second pitch in the first direction; and the second overlay mark comprises a third plurality of structures separated by a third pitch in the first direction and a fourth plurality of structures separated by a fourth pitch in the first direction.29. The method of clause 28, wherein: the first pitch is equal to the third pitch; and the second pitch is equal to the fourth pitch.30. The method of clause 28, further comprising: comparing a set of designed offset values between the first and second pluralities of structures to a set a measured offset values of the first and second pluralities of structures in a first comparison, and comparing a set of designed offset values between the third and fourth pluralities of structures to a set a measured offset values of the third and fourth pluralities of structures in a second comparison, wherein performing the first tuning is based on the first comparison, and performing the second tuning is based on the second comparison.31. The method of clause 30, wherein calculating the overlay value based on the first measurement and the second measurement comprises comparing a set of designed offset values between the first and second overlay marks to a set a measured offset values of the first and second overlay marks in a third comparison.32. The method of clause 28, further comprising: calculating a first set-get plot of designed and measured offset values between the first and second pluralities of structures in the first direction, wherein performing the first tuning comprises adjusting the first image processing algorithm parameter until the first set-get plot meets a first predetermined criterion, and calculating the first measurement of the first overlay mark based on the first tuning comprises determining a location of the first or second pluralities of structures in the first direction.33. The method of clause 32, wherein the predetermined criterion comprises one of a slope or an intercept of a curve fit of the first set-get plot.34. The method of clause 32, further comprising: calculating a second set-get plot of designed and measured offset values between the third and fourth pluralities of structures in the first direction, whereinperforming the second tuning comprises adjusting the image processing algorithm parameter until the second set-get plot meets a second predetermined criterion, and calculating the second measurement of the second overlay mark based on the second tuning comprises determining a location of the third or fourth pluralities of structures in the first direction.35. The method of clause 34, further comprising: calculating a third set-get plot of designed and measured offset values between the first and second overlay marks in the first direction, wherein calculating the parameter value based on the first measurement and the second measurement comprises determining an intercept of a curve fit of the third set-get plot.36. The method of clause 28, wherein one of the first and second pluralities of structures comprises a two-dimensional array of structures having a fifth pitch in a second direction different from the first direction.37. The method of clause 28, wherein one of the first, second, third, or fourth pluralities of structures comprises an array of linear or round structures.38. The method of clause 28, wherein the first plurality of structures comprises an array of linear structures and the second plurality of structures comprises an array of round structures.39. The method of clause 25, wherein the first overlay mark is located on a first side of a stitching boundary, and the second overlay mark is located on a second side of the stitching boundary.40. The method of clause 39, further comprising: calculating a local placement error of a structure in the first overlay mark or the second overlay mark as a function of distance from the stitching boundary.41. The method of clause 25, wherein the first overlay mark is located in a first layer of the substrate, and the second overlay mark is located in a second layer of the substrate.42. The method of clause 25, wherein the first tuning of the first image processing algorithm parameter comprises tuning one of a shape fitting parameter, an edge searching parameter, a template matching parameter, a region segmentation parameter, or an image quality enhancement parameter.43. The method of clause 25, wherein the first tuning of the first image processing parameter comprises tuning one of a radius, a linewidth, a threshold, a derivative parameter, an image filter kernel parameter, or a gray-level tuning parameter.44. The method of clause 25, wherein the parameter value comprises one of alignment or overlay.45. The method of clause 25, further comprising: calculating one of placement error, an edge exposure parameter, or an optical proximity effect.46. The method of clause 25, further comprising: performing an adjustment to a semiconductor manufacturing process or a semiconductor manufacturing apparatus based on the calculated overlay value.47. The method of clause 25, wherein:the measured image comprises a first image and a second image; the first image processing algorithm parameter comprises a tuning parameter of the first image; and the second image processing algorithm parameter comprises a tuning parameter of the second image.48. The method of clause 47, wherein: the first image comprises a backscattered electron (BSE) image; and the second image comprises a secondary electron (SE) image.49. A charged particle beam apparatus, comprising: a charged particle beam source configured to generate a beam of primary charged particles; a charged particle optical system configured to direct the beam of primary charged particles at a region on a substrate, the region comprising a first overlay mark and a second overlay mark; a controller comprising one or more processors and configured to cause the charged particle beam apparatus to perform operations comprising: irradiating a surface of the substrate with the beam to cause charged particles to be emitted from the surface; detecting the charged particles on a charged particle detector of the charged particle beam apparatus to produce a measured image of the first overlay mark and the second overlay mark; performing a first tuning of a first image processing algorithm parameter of the measured image based on the first overlay mark; calculating a first measurement of the first overlay mark based on the first tuning; performing a second tuning of a second image processing algorithm parameter of the measured image based on the second overlay mark, the second tuning being different from the first tuning; calculating a second measurement of the second overlay mark based on the second tuning; and calculating an overlay value based on the first measurement and the second measurement.50. The apparatus of clause 49, wherein the measured image is a charged particle beam image.51. The apparatus of clause 49, wherein acquiring the measured image comprises acquiring the measured image from a single field of view of an inspection apparatus.52. The apparatus of clause 49, wherein: the first overlay mark comprises a first plurality of structures separated by a first pitch in a first direction and a second plurality of structures separated by a second pitch in the first direction; and the second overlay mark comprises a third plurality of structures separated by a third pitch in the first direction and a fourth plurality of structures separated by a fourth pitch in the first direction.53. The apparatus of clause 52, wherein: the first pitch is equal to the third pitch; and the second pitch is equal to the fourth pitch.54. The apparatus of clause 52, wherein the operations further comprise: comparing a set of designed offset values between the first and second pluralities of structures to a set a measured offset values of the first and second pluralities of structures in a first comparison, and comparing a set of designed offset values between the third and fourth pluralities of structures to a set a measured offset values of the third and fourth pluralities of structures in a second comparison, wherein performing the first tuning is based on the first comparison, and performing the second tuning is based on the second comparison.55. The apparatus of clause 54, wherein calculating the overlay value based on the first measurement and the second measurement comprises comparing a set of designed offset values between the first and second overlay marks to a set a measured offset values of the first and second overlay marks in a third comparison.56. The apparatus of clause 52, wherein the operations further comprise: calculating a first set-get plot of designed and measured offset values between the first and second pluralities of structures in the first direction, wherein performing the first tuning comprises adjusting the first image processing algorithm parameter until the first set-get plot meets a first predetermined criterion, and calculating the first measurement of the first overlay mark based on the first tuning comprises determining a location of the first or second pluralities of structures in the first direction.57. The apparatus of clause 56, wherein the predetermined criterion comprises one of a slope or an intercept of a curve fit of the first set-get plot.58. The apparatus of clause 56, wherein the operations further comprise: calculating a second set-get plot of designed and measured offset values between the third and fourth pluralities of structures in the first direction, wherein performing the second tuning comprises adjusting the image processing algorithm parameter until the second set-get plot meets a second predetermined criterion, and calculating the second measurement of the second overlay mark based on the second tuning comprises determining a location of the third or fourth pluralities of structures in the first direction.59. The apparatus of clause 58, wherein the operations further comprise: calculating a third set-get plot of designed and measured offset values between the first and second overlay marks in the first direction, whereincalculating the parameter value based on the first measurement and the second measurement comprises determining an intercept of a curve fit of the third set-get plot.60. The apparatus of clause 52, wherein one of the first and second pluralities of structures comprises a two-dimensional array of structures having a fifth pitch in a second direction different from the first direction.61. The apparatus of clause 52, wherein one of the first, second, third, or fourth pluralities of structures comprises an array of linear or round structures.62. The apparatus of clause 52, wherein the first plurality of structures comprises an array of linear structures and the second plurality of structures comprises an array of round structures.63. The apparatus of clause 49, wherein the first overlay mark is located on a first side of a stitching boundary, and the second overlay mark is located on a second side of the stitching boundary.64. The apparatus of clause 63, wherein the operations further comprise: calculating a local placement error of a structure in the first overlay mark or the second overlay mark as a function of distance from the stitching boundary.65. The apparatus of clause 49, wherein the first overlay mark is located in a first layer of the substrate, and the second overlay mark is located in a second layer of the substrate.66. The apparatus of clause 49, wherein the first tuning of the first image processing algorithm parameter comprises tuning one of a shape fitting parameter, an edge searching parameter, a template matching parameter, a region segmentation parameter, or an image quality enhancement parameter.67. The apparatus of clause 49, wherein the first tuning of the first image processing parameter comprises tuning one of a radius, a linewidth, a threshold, a derivative parameter, an image filter kernel parameter, or a gray-level tuning parameter.68. The apparatus of clause 49, wherein the parameter value comprises one of alignment or overlay.69. The apparatus of clause 49, wherein the operations further comprise: calculating one of placement error, an edge exposure parameter, or an optical proximity effect.70. The apparatus of clause 49, wherein the operations further comprise: performing an adjustment to a semiconductor manufacturing process or a semiconductor manufacturing apparatus based on the calculated overlay value.71. The apparatus of clause 49, wherein: the measured image comprises a first image and a second image; the first image processing algorithm parameter comprises a tuning parameter of the first image; and the second image processing algorithm parameter comprises a tuning parameter of the second image.72. The apparatus of clause 71, wherein: the first image comprises a backscattered electron (BSE) image; and the second image comprises a secondary electron (SE) image.73. A method of determining stitching overlay, comprising: obtaining a charged particle image of a first overlay mark from a first lithography exposure and a second overlay mark from a second lithography exposure, the first mark being located on a first side of a stitching boundary and the second mark being located on a second side of the stitching boundary, wherein: the first overlay mark comprises a first plurality of structures separated by a first pitch and a second plurality of structures separated by a second pitch; and the second overlay mark comprises a third plurality of structures separated by a third pitch and a fourth plurality of structures separated by a fourth pitch, the method further comprising: determining a first relative position between the first plurality of structures and the second plurality of structures in the first overlay mark; calculating a first set-get plot of designed and measured offset values between the first plurality of structures and the second plurality of structures; optimizing a first image processing algorithm until the first set-get plot meets a first prescribed criterion; applying the optimized first image processing algorithm to the first overlay mark in the charged particle image; determining a second relative position between the third plurality of structures and the fourth plurality of structures in the second overlay mark; calculating a second set-get plot of designed and measured offset values between the third plurality of structures and the fourth plurality of structures; optimizing a second image processing algorithm until the second set-get plot meets a second prescribed criterion; applying the optimized second image processing algorithm to the second overlay mark in the charged particle image; calculating a third set-get plot of designed and measured offset values between the first overlay mark and the second overlay mark; and determining a stitching overlay value based on an intercept of the third set-get plot.74. The method of clause 73, wherein acquiring the measured image comprises acquiring the measured image from a single field of view of an inspection apparatus.75. The method of clause 73, wherein: the first pitch is equal to the third pitch; and the second pitch is equal to the fourth pitch.76. The method of clause 73, wherein first prescribed criterion comprises one of a slope or an intercept of a curve fit of the first set-get plot.77. The method of clause 73, wherein second prescribed criterion comprises one of a slope or an intercept of a curve fit of the second set-get plot.78. The method of clause 73, wherein one of the first and second pluralities of structures comprises a two-dimensional array of structures having a fifth pitch in a second direction different from the first direction.79. The method of clause 73, wherein one of the first, second, third, or fourth pluralities of structures comprises an array of linear or round structures.80. The method of clause 73, wherein the first plurality of structures comprises an array of linear structures and the second plurality of structures comprises an array of round structures.81. The method of clause 73, further comprising: calculating a local placement error of a structure in the first overlay mark or the second overlay mark as a function of distance from the stitching boundary.82. The method of clause 73, wherein the first overlay mark is located in a first layer of the substrate, and the second overlay mark is located in a second layer of the substrate.83. The method of clause 73, wherein optimizing the first image processing algorithm comprises tuning one of a shape fitting parameter, an edge searching parameter, a template matching parameter, a region segmentation parameter, or an image quality enhancement parameter.84. The method of clause 73, wherein t optimizing the first image processing algorithm comprises tuning one of a radius, a linewidth, a threshold, a derivative parameter, an image filter kernel parameter, or a gray-level tuning parameter.85. The method of clause 73, further comprising determining one of placement error, an edge exposure parameter, or an optical proximity effect.86. The method of clause 73, further comprising: performing an adjustment to a semiconductor manufacturing process or a semiconductor manufacturing apparatus based on the calculated overlay value.87. The method of clause 73, wherein: the charged particle image comprises a first image and a second image; optimizing the first image processing algorithm comprises tuning the first image processing algorithm with respect to the first image; and optimizing the second image processing algorithm comprises tuning the second image processing algorithm with respect to the second image.88. The method of clause 87, wherein: the first image comprises a backscattered electron (BSE) image; and the second image comprises a secondary electron (SE) image.

[0104] Block diagrams in the figures may illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer hardware or software products according to various exemplary embodiments of the present disclosure. In this regard, each block in a schematicdiagram may represent certain arithmetical or logical operation processing that may be implemented using hardware such as an electronic circuit. Blocks may also represent a module, segment, or portion of code that comprises one or more executable instructions for implementing the specified logical functions. It should be understood that in some alternative implementations, functions indicated in a block may occur out of the order noted in the figures. For example, two blocks shown in succession may be executed or implemented substantially concurrently, or two blocks may sometimes be executed in reverse order, depending upon the functionality involved. Some blocks may also be omitted. It should also be understood that each block of the block diagrams, and combination of the blocks, may be implemented by special purpose hardware-based systems that perform the specified functions or acts, or by combinations of special purpose hardware and computer instructions.

[0105] It will be appreciated that the embodiments of the present disclosure are not limited to the exact construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from the scope thereof. The present disclosure has been described in connection with various embodiments, other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.

Claims

CLAIMS1. A non-transitory computer-readable medium that stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations comprising: acquiring a measured image of a region on a substrate, the region comprising a first overlay mark and a second overlay mark; performing a first tuning of a first image processing algorithm parameter of the measured image of the first overlay mark; calculating a first measurement of the first overlay mark based on the first tuning; performing a second tuning of a second image processing algorithm parameter of the measured image of the second overlay mark, the second tuning being different from the first tuning; calculating a second measurement of the second overlay mark based on the second tuning; and calculating an overlay value based on the first measurement and the second measurement.

2. The non-transitory computer-readable medium of claim 1, wherein the measured image is a charged particle beam image, wherein acquiring the measured image comprises acquiring the measured image from a single field of view of an inspection apparatus, and wherein each of the first image and the second comprises one of a backscattered electron (BSE) image and a secondary electron (SE) image.

3. The non-transitory computer-readable medium of claim 1, wherein: the first overlay mark comprises a first plurality of structures arranged in a first pitch in a first direction and a second plurality of structures arranged in a second pitch in the first direction; and the second overlay mark comprises a third plurality of structures arranged in a third pitch in the first direction and a fourth plurality of structures arranged a fourth pitch in the first direction, and wherein: the first pitch is equal to the third pitch; and the second pitch is equal to the fourth pitch.

4. The non-transitory computer-readable medium of claim 3, wherein the operations further comprise: comparing a set of designed offset values between the first and second pluralities of structures to a set a measured offset values of the first and second pluralities of structures in a first comparison, and comparing a set of designed offset values between the third and fourth pluralities of structures to a set a measured offset values of the third and fourth pluralities of structures in a second comparison, whereinperforming the first tuning is based on the first comparison, and performing the second tuning is based on the second comparison.

5. The non-transitory computer-readable medium of claim 4, wherein calculating the overlay value based on the first measurement and the second measurement comprises comparing a set of designed offset values between the first and second overlay marks to a set a measured offset values of the first and second overlay marks in a third comparison.

6. The non-transitory computer-readable medium of claim 4, wherein the operations further comprise: calculating a first set-get plot of designed and measured offset values between the first and second pluralities of structures in the first direction, wherein performing the first tuning comprises adjusting the first image processing algorithm parameter until the first set-get plot meets a first predetermined criterion, and calculating the first measurement of the first overlay mark based on the first tuning comprises determining a location of the first or second pluralities of structures in the first direction, wherein the predetermined criterion comprises one of a slope or an intercept of a curve fit of the first set-get plot, calculating a second set-get plot of designed and measured offset values between the third and fourth pluralities of structures in the first direction, wherein performing the second tuning comprises adjusting the image processing algorithm parameter until the second set-get plot meets a second predetermined criterion, and calculating the second measurement of the second overlay mark based on the second tuning comprises determining a location of the third or fourth pluralities of structures in the first direction; and calculating a third set-get plot of designed and measured offset values between the first and second overlay marks in the first direction, wherein calculating the parameter value based on the first measurement and the second measurement comprises determining an intercept of a curve fit of the third set-get plot.

7. The non-transitory computer-readable medium of claim 4, wherein one of the first and second pluralities of structures comprises a two-dimensional array of structures having a fifth pitch in a second direction different from the first direction.

8. The non-transitory computer-readable medium of claim 4, wherein one of the first, second, third, or fourth pluralities of structures comprises an array of linear or round structures.

9. The non-transitory computer-readable medium of claim 4, wherein the first plurality of structures comprises an array of linear structures and the second plurality of structures comprises an array of round structures.

10. The non-transitory computer-readable medium of claim 1, wherein the first overlay mark is located on a first side of a stitching boundary, and the second overlay mark is located on a second side of the stitching boundary.

11. The non-transitory computer-readable medium of claim 10, wherein the operations further comprise: calculating a local placement error of a structure in the first overlay mark or the second overlay mark as a function of distance from the stitching boundary.

12. The non-transitory computer-readable medium of claim 1, wherein the first overlay mark is located in a first layer of the substrate, and the second overlay mark is located in a second layer of the substrate.

13. The non-transitory computer-readable medium of claim 1 , the measured image comprises a first image and a second image; the first image processing algorithm parameter comprises a tuning parameter of the first image; and the second image processing algorithm parameter comprises a tuning parameter of the second image, and wherein the first tuning of the first image processing algorithm parameter comprises tuning one of a shape fitting parameter, an edge searching parameter, a template matching parameter, a region segmentation parameter, or an image quality enhancement parameter.

14. The non-transitory computer-readable medium of claim 1, wherein the parameter value comprises one of alignment or overlay.

15. The non-transitory computer-readable medium of claim 1, wherein the operations further comprise: calculating one of placement error, an edge exposure parameter, or an optical proximity effect.

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