Power amplification circuit and transmission circuit equipped with the same

WO2025047216A1PCT designated stage expired Publication Date: 2025-03-06MURATA MFG CO LTD
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Patent Information

Application Number
PCT/JP2024/026451
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-08-31
Filing Date
2024-07-24
Publication Date
2025-03-06

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Abstract

This power amplification circuit (100) comprises: an input terminal (T1) and an output terminal (T2); a distributor (120); amplifiers (141A, 142A); a phase adjuster (143A); a substrate (241); and a substrate (242) mounted on the substrate (241). The distributor (120) is connected to the input terminal (T1) and distributes an input signal from the input terminal (T1) to a first path and a second path. The amplifier (141A) is connected to the first path of the distributor (120). The amplifier (142A) is connected to the second path of the distributor (120). The phase adjuster (143A) is connected between the output of the amplifier (141A) and the output of the amplifier (142A). The amplifiers (141A, 142A) constitute a Doherty amplifier. The output terminal (T2) is electrically connected to a connection node of the second amplifier (142A) and the phase adjuster (143A). The amplifier (141A) is a carrier amplifier and is formed on the substrate (241). The amplifier (142A) is a peak amplifier and is formed on the substrate (242). The substrate (241) is a semiconductor substrate containing a material having a Si-based base material as a main component. The substrate (242) is a semiconductor substrate containing a material having a compound of a group III element and a group V element as a main component.
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Description

Power amplifier circuit and transmitter circuit incorporating the same

[0001] The present disclosure relates to a power amplifier circuit and a transmission circuit incorporating the same, and more particularly to a configuration of a power amplifier circuit suitable for high-frequency signals in the sub-terahertz frequency band.

[0002] U.S. Patent Application Publication No. 2022 / 0416725 (Patent Document 1) discloses a Doherty amplifier that can be used in a wireless communication system. In Patent Document 1, the final-stage power amplifiers of each amplification path constituting the carrier amplifier and peak amplifier of the Doherty amplifier are implemented using an IC die using a III-V group material such as GaN (gallium nitride). Meanwhile, the driver stage amplifier for driving the final-stage power amplifier is implemented using an IC die using a Si-based material such as SiGe (silicon germanium) or an IC die using a III-V group material.

[0003] US Patent Application Publication No. 2022 / 0416725

[0004] In recent years, developments have been underway in wireless communication devices for communications in the so-called sub-terahertz frequency band, which exceeds 100 GHz. The use of the sub-terahertz frequency band allows for a wider spectral bandwidth, enabling high-capacity, high-speed communications of, for example, 100 Gbps or more.

[0005] On the other hand, signals in frequency bands above 100 GHz tend to have larger losses in the semiconductors that make up the amplifier compared to signals in millimeter-wave and lower frequency bands, so it is important to use low-loss semiconductors in amplifier circuits compatible with sub-terahertz frequency bands.

[0006] As such a low-loss semiconductor material, a material containing as its main component a compound of a group III element and a group V element (hereinafter also referred to as a "group III-V compound"), as disclosed in Patent Document 1, is known. Such a material has a higher power density than conventionally used Si-based materials, and therefore can significantly reduce loss compared to semiconductors formed from Si-based materials. However, because group III-V compounds are more expensive than Si-based materials, constructing all circuits of a Doherty amplifier from group III-V compounds increases the cost of the entire device.

[0007] The present disclosure has been made to solve such problems, and its purpose is to reduce losses and improve circuit efficiency in a power amplifier circuit compatible with the sub-terahertz frequency band while suppressing increases in cost.

[0008] The power amplifier circuit according to the present disclosure includes an input terminal and an output terminal, a divider, a first amplifier and a second amplifier, a first phase shifter, a first substrate, and a second substrate mounted on the first substrate. The divider is connected to the input terminal and divides an input signal from the input terminal into a first path and a second path. The first amplifier is connected to the first path of the divider. The second amplifier is connected to the second path of the divider. The first phase shifter is connected between the output of the first amplifier and the output of the second amplifier. The first amplifier is formed on the first substrate. The second amplifier is formed on the second substrate. The first amplifier and the second amplifier form a Doherty amplifier. The first amplifier is a carrier amplifier, and the second amplifier is a peak amplifier. The output terminal is electrically connected to a connection node between the second amplifier and the first phase shifter. The first substrate is a semiconductor substrate containing a material primarily composed of a Si-based base material. The second substrate is a semiconductor substrate containing a material primarily composed of a compound of a Group III element and a Group V element.

[0009] In the power amplifier circuit according to the present disclosure, the carrier amplifier (first amplifier) ​​constituting the Doherty amplifier is formed on a semiconductor substrate using a Si-based base material, and the peak amplifier (second amplifier) ​​is formed on a semiconductor substrate using a III-V compound base material. In Doherty amplifiers, a configuration is generally used in which a class A amplifier or class AB amplifier with relatively low distortion is operated at saturated output as the carrier amplifier, and at high output, a highly efficient class C amplifier is used as the peak amplifier and driven simultaneously with the carrier amplifier. Therefore, by using a semiconductor substrate made of a Si-based material for the carrier amplifier, it is possible to suppress increases in cost, while by using a semiconductor substrate made of a III-V compound material for the peak amplifier, which requires high efficiency, it is possible to reduce losses and improve circuit efficiency.

[0010] 1 is a circuit diagram of a transmission circuit to which a power amplifier circuit according to a first embodiment is applied; FIG. 2 is a side perspective view of the transmission circuit of FIG. 1; FIG. 3 is a diagram for explaining a tracking mode for adjusting a power supply voltage level; FIG. 4 is a diagram for explaining the operation of a Doherty amplifier; FIG. 5 is a side perspective view of a transmission circuit according to a second embodiment; FIG. 6 is a partial circuit diagram of a transmission circuit according to a third embodiment; FIG. 7 is a partial circuit diagram of a transmission circuit according to a fourth embodiment; FIG. 8 is a partial circuit diagram of a transmission circuit according to a fifth embodiment; FIG. 9 is a partial circuit diagram of a transmission circuit according to a sixth embodiment; FIG. 10 is a side perspective view of a transmission circuit according to a seventh embodiment; FIG. 11 is a side perspective view of a transmission circuit according to an eighth embodiment; FIG. 12 is a side perspective view of a transmission circuit according to a ninth embodiment; FIG. 13 is a side perspective view of a transmission circuit of a modified example;

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals, and description thereof will not be repeated.

[0012] 1 is a circuit diagram of a transmission circuit 10 to which a power amplifier circuit 100 according to embodiment 1 is applied. The transmission circuit 10 is mounted on a communication device such as a mobile terminal such as a mobile phone, a smartphone, or a tablet, or a personal computer with a communication function.

[0013] Referring to FIG. 1 , the transmission circuit 10 includes, in addition to a power amplifier circuit 100, an antenna ANT, an RFIC (Radio Frequency Integrated Circuit) 110 which is a power feeding circuit, a PMIC (Power Management Integrated Circuit), and a BBIC (Baseband Integrated Circuit) 200 which constitutes a baseband signal processing circuit.

[0014] The transmission circuit 10 upconverts an intermediate frequency (IF) signal transmitted from the BBIC 200 to a high frequency (radio frequency: RF) signal using the RFIC 110, amplifies the high frequency signal using the power amplifier circuit 100, and emits the amplified signal from the antenna ANT.

[0015] The power amplifier circuit 100 includes an input terminal T1, an output terminal T2, a power supply terminal T3, a distributor 120, preamplifiers 130 and 135, a power amplifier stage 140, transmission line transformers (TLTs) 150A and 150B, and a conversion circuit 160. The power amplifier stage 140 is a so-called "Doherty amplifier" that includes carrier amplifiers 141A and 141B and peak amplifiers 142A and 142B.

[0016] The power amplifier circuit 100 receives an input signal Pin from the RFIC 110 at an input terminal T1, amplifies the input signal Pin, and outputs the amplified signal from an output terminal T2 to an antenna ANT.

[0017] The PMIC 115 is a power supply circuit for supplying drive power for operating the power amplifier circuit 100. The PMIC 115 includes, for example, multiple DC / DC converters and converts a battery voltage VB supplied from an external battery into multiple different voltage levels. The PMIC 115 supplies a power supply voltage Vdd to a power supply terminal T3 of the power amplifier circuit 100. As will be described later, the power supply voltage Vdd is used as a drive power supply for the amplifiers in the power amplifier circuit 100.

[0018] An input signal Pin received at input terminal T1 is transmitted to distributor 120. Distributor 120 is a so-called hybrid coupler, and has two input terminals and two output terminals. The input signal Pin is input to one input terminal. The other input terminal is connected to ground potential GND. By connecting the hybrid coupler in this manner, the input signal Pin is output from two paths: the output terminal connected to the first path and the output terminal connected to the second path.

[0019] In this case, the phase difference between the signal output to the first path and the signal output to the second path is 90°. More specifically, the phase of the signal on the first path leads the phase of the signal on the second path by 90°. In other words, the hybrid coupler functions not only as a distributor but also as a phase adjuster. Note that the signal distribution function and the phase adjustment function may be configured as separate circuits.

[0020] The first path of the divider 120 is connected to the preamplifier 130, and the second path is connected to the preamplifier 135. The preamplifier 130 is a drive circuit for driving the carrier amplifiers 141A and 141B in the power amplifier stage 140. Similarly, the preamplifier 135 is a drive circuit for driving the peak amplifiers 142A and 142B in the power amplifier stage 140.

[0021] The preamplifier 130 includes a driving amplifier 131 of the carrier amplifier and a conversion transformer TR1. The output terminal of the driving amplifier 131 is supplied with a power supply voltage Vdd via an inductor L1. A capacitor C1 is connected between the supply terminal of the power supply voltage Vdd and the ground potential GND. The inductor L1 is, for example, a λ / 4 line. Because the supply terminal of the power supply voltage Vdd is shorted by the capacitor C1, when the supply terminal is viewed from the output end of the driving amplifier 131, the power line appears to be open due to the inductor L1 of the λ / 4 line. The capacitor C1 is a so-called bypass capacitor and suppresses voltage fluctuations in the power supply voltage Vdd. The driving amplifier 131 amplifies the signal transmitted from the distributor 120 and transmits it to the conversion transformer TR1.

[0022] The conversion transformer TR1 is a circuit for converting an unbalanced line into a balanced line. One end of the primary winding of the conversion transformer TR1 is connected to a driving amplifier 131, and the other end of the primary winding is connected to the ground potential GND. One end of the secondary winding of the conversion transformer TR1 is connected to a carrier amplifier 141A, and the other end of the secondary winding is connected to a carrier amplifier 141B.

[0023] The conversion transformer TR1 causes the signal transmitted to carrier amplifier 141A to be in opposite phase to the signal transmitted to carrier amplifier 141B. As described above, the hybrid coupler of distributor 120 causes the signal supplied to preamplifier 130 to be 90° ahead of the signal supplied to preamplifier 135. Therefore, when the phase of the signal supplied to preamplifier 135 is used as a reference, the signal transmitted to carrier amplifier 141A will be 90° ahead. Furthermore, the signal transmitted to carrier amplifier 141B will be 90° behind in phase, in other words, 270° ahead in phase.

[0024] The preamplifier 135 includes a driving amplifier 136, which is a peak amplifier, and a conversion transformer TR2. The output terminal of the driving amplifier 136 is supplied with the power supply voltage Vdd via an inductor L2. A capacitor C2 is connected between the supply terminal of the power supply voltage Vdd and the ground potential GND. As described for the preamplifier 130, when the supply terminal is viewed from the output end of the driving amplifier 136, the inductor L2 of the λ / 4 line makes the power supply line appear to be in an open state. Furthermore, the capacitor C2, which is a bypass capacitor, suppresses voltage fluctuations in the power supply voltage Vdd. The driving amplifier 136 amplifies the signal transmitted from the distributor 120 and transmits it to the conversion transformer TR2.

[0025] The conversion transformer TR2 is a circuit for converting an unbalanced line into a balanced line. One end of the primary winding of the conversion transformer TR2 is connected to the driving amplifier 136, and the other end of the primary winding is connected to the ground potential GND. One end of the secondary winding of the conversion transformer TR2 is connected to the peak amplifier 142A, and the other end of the secondary winding is connected to the peak amplifier 142B.

[0026] The conversion transformer TR2 causes the signal transmitted to the peak amplifier 142A to be in opposite phase to the signal transmitted to the peak amplifier 142B. Therefore, when the phase of the signal supplied to the preamplifier 135 is used as a reference, the signal transmitted to the peak amplifier 142A will be in phase with the signal supplied to the preamplifier 135. Furthermore, the signal transmitted to the peak amplifier 142B will be delayed (or advanced) by 180° relative to the supplied signal.

[0027] The power amplifier stage 140 includes phase adjusters 143A and 143B in addition to carrier amplifiers 141A and 141B and peak amplifiers 142A and 142B. The phase adjuster 143A is connected between the output terminal of the carrier amplifier 141A and the output terminal of the peak amplifier 142A. A connection node N1 between the phase adjuster 143A and the peak amplifier 142A is connected to a TLT 150A. Furthermore, the phase adjuster 143B is connected between the output terminal of the carrier amplifier 141B and the output terminal of the peak amplifier 142B. A connection node N2 between the phase adjuster 143B and the peak amplifier 142B is connected to a TLT 150B.

[0028] Phase adjusters 143A and 143B adjust the phases of the signals amplified by carrier amplifiers 141A and 141B, respectively. Phase adjusters 143A and 143B are, for example, quarter-wave transmission lines, and can delay the phases of the signals amplified by carrier amplifiers 141A and 141B by 90°, respectively. Therefore, at connection node N1, the output of carrier amplifier 141A and the output signal of peak amplifier 142A are in phase. Similarly, at connection node N2, the output of carrier amplifier 141B and the output of peak amplifier 142B are in phase.

[0029] Furthermore, the phase adjusters 143A and 143B can rotate the load impedance by 180° on the Smith chart, that is, the phase adjusters 143A and 143B also function as impedance inverters.

[0030] In this specification, the term "connection node" does not refer to a specific point on a path, and different positions on the circuit are also treated as the "connection node" as long as they are electrically identical (at the same potential). For example, in FIG. 1, if the line connecting the output terminal of peak amplifier 142A and phase adjuster 143A is located at a different position from the point indicated as "N1" on the circuit, it corresponds to "connection node N1."

[0031] The power amplifier stage 140 functions as a Doherty amplifier. As will be described later with reference to FIG. 4 , in the Doherty amplifier, the carrier amplifiers 141A and 141B are always in operation, and the peak amplifiers 142A and 142B are only operated when high output power is required. Class A or AB amplifiers, which have relatively little distortion, are used as the carrier amplifiers 141A and 141B. On the other hand, class C amplifiers are used as the peak amplifiers 142A and 142B. By using class C amplifiers, the peak amplifiers 142A and 142B stop amplifying when the voltage level of the input signal falls below a predetermined level.

[0032] Each of the TLTs 150A and 150B is an impedance converter made up of three parallel lines having line lengths of 1 / 8 wavelength to 1 / 4 wavelength.

[0033] The TLT 150A includes a first line 151A, a second line 152A, and a third line 153A. One end of the first line 151A is connected to a connection node N1 of the power amplifier stage 140. The other end of the first line 151A is connected to one end of the second line 152A. The other end of the second line 152A is connected to the conversion circuit 160 via a capacitor C4. The capacitor C4 removes DC components from the signal that has passed through the TLT 150A.

[0034] One end of the third line 153A is supplied with the power supply voltage Vdd, and the other end of the third line is connected to the connection node N1. The power supply voltage Vdd is supplied via the third line 153A as a drive power source for the carrier amplifier 141A and the peak amplifier 142A. The capacitor C3 is a bypass capacitor connected between the supply terminal of the power supply voltage Vdd and the ground potential GND. The capacitor C3 suppresses voltage fluctuations of the power supply voltage Vdd.

[0035] The first line 151A, the second line 152A, and the third line 153A are arranged in parallel so that currents flow in the same direction. The third line 153A is arranged so as to be coupled to the first line 151A and the second line 152A. By arranging the three lines in this way, the TLT 150A functions as an impedance converter.

[0036] Similarly, the TLT 150B includes a first line 151B, a second line 152B, and a third line 153B. One end of the first line 151B is connected to a connection node N2 of the power amplifier stage 140. The other end of the first line 151B is connected to one end of the second line 152B. The other end of the second line 152B is connected to the conversion circuit 160 via a capacitor C5. The capacitor C5 removes DC components from the signal that has passed through the TLT 150B.

[0037] One end of the third line 153B is supplied with the power supply voltage Vdd, and the other end of the third line 153B is connected to the connection node N2. The power supply voltage Vdd is supplied via the third line 153B as a drive power supply for the carrier amplifier 141B and the peak amplifier 142B. Voltage fluctuations of the power supply voltage Vdd are suppressed by a bypass capacitor C4 connected between the supply terminal of the power supply voltage Vdd and the ground potential GND.

[0038] The first line 151B, the second line 152B, and the third line 153B are arranged in parallel so that currents flow in the same direction. The third line 153B is arranged so as to be coupled to the first line 151B and the second line 152B. By arranging the three lines in this way, the TLT 150B functions as an impedance converter.

[0039] The conversion circuit 160 is a circuit for converting a balanced line into an unbalanced line. The conversion circuit 160 includes a magnetic coupled transformer (MCT) TR3. One end of the primary winding of the magnetic coupling transformer TR3 is connected to the second line 152A of the TLT 150A via a capacitor C4. The other end of the primary winding of the magnetic coupling transformer TR3 is connected to the second line 152B of the TLT 150B via a capacitor C5. One end of the secondary winding of the magnetic coupling transformer TR3 is connected to the antenna ANT via an output terminal T2, and the other end of the secondary winding is connected to the ground potential GND.

[0040] The output signal from TLT 150A is in opposite phase to the output signal from TLT 150B. Therefore, the magnetic coupling transformer TR3 causes the phase of the output signal from TLT 150A to be the same as the phase of the output signal from TLT 150B. Therefore, the output signal Pout is a combination of the two signals from TLT 150A and TLT 150B.

[0041] In this way, the power amplifier circuit 100 is configured to distribute the input signal Pin to two paths, and amplify and combine the signals using Doherty amplifiers in each path, thereby enabling highly efficient signal amplification.

[0042] Fig. 2 is a side perspective view of the transmission circuit 10 described in Fig. 1. Referring to Fig. 2, the transmission circuit 10 includes a radiating element 220, a dielectric substrate 230, a system in package (SiP) module 105, and an amplifier module 240 in which the power amplifier circuit 100 is formed. In Fig. 2 and the subsequent side perspective views, the normal direction of the principal surface of the dielectric substrate 230 is defined as the Z axis, and a plane perpendicular to the Z axis is defined as the XY plane. In Fig. 2, the left-right direction of the figure is defined as the X axis direction, and the depth direction is defined as the Y axis direction.

[0043] The dielectric substrate 230 has two opposing main surfaces 231 (first surface) and 232 (second surface). The dielectric substrate 230 is a low-temperature co-fired ceramics (LTCC) multilayer substrate, a multilayer resin substrate formed by stacking multiple resin layers made of resins such as epoxy and polyimide, a multilayer resin substrate formed by stacking multiple resin layers made of liquid crystal polymer (LCP) having a lower dielectric constant, a multilayer resin substrate formed by stacking multiple resin layers made of fluorine-based resin, or a ceramic multilayer substrate other than LTCC. Note that the dielectric substrate 230 does not necessarily have a multilayer structure and may be a single-layer substrate.

[0044] The radiating element 220 corresponds to the antenna ANT in Fig. 1. The radiating element 220 is arranged on a main surface 231 (the surface in the negative direction of the Z axis) of a dielectric substrate 230. In the example of Fig. 2, the radiating element 220 is a flat patch antenna. Note that Fig. 2 shows an example in which the radiating element 220 is arranged so as to be exposed on the surface of the main surface 231, but the radiating element 220 may also be arranged on an inner layer of the dielectric substrate 230.

[0045] In the dielectric substrate 230 , a ground electrode GND 1 is disposed across the entire surface of a dielectric layer between the radiating element 220 and the main surface 232 , facing the radiating element 220 .

[0046] The amplifier module 240 includes a semiconductor substrate 241 and a semiconductor substrate 242. The semiconductor substrate 242 is disposed on the main surface of the semiconductor substrate 241 in the negative direction of the Z axis, and is electrically connected to the semiconductor substrate 241. The semiconductor substrate 242 is molded with insulating resin 243.

[0047] The amplifier module 240 is mounted on a main surface 232 of the dielectric substrate 230. The semiconductor substrate 241 is electrically connected to the dielectric substrate 230 via columnar electrodes 260 and connection electrodes 265 arranged in a molding resin 243, and solder bumps 266.

[0048] The semiconductor substrate 241 is a semiconductor substrate made of a Si-based base material such as SiGe (silicon germanium), while the semiconductor substrate 242 is a semiconductor substrate made of a base material whose main component is a compound of a group III element and a group V element, such as GaN (gallium nitride), GaAs (gallium arsenide), or InP (indium phosphide).

[0049] 1 are formed on the semiconductor substrate 242. On the other hand, circuits other than the peak amplifiers 142A and 142B in the power amplifier circuit 100 are formed on the semiconductor substrate 241.

[0050] The SiP module 105 is a circuit module including the RFIC 110 and PMIC 115 in Fig. 1, as well as a power inductor (not shown). The SiP module 105 is mounted on the main surface 232 of the dielectric substrate 230 via solder bumps 266.

[0051] The high frequency signal and power supply voltage from the SiP module 105 are transmitted to the amplifier module 240 by power supply wiring 251, 252 arranged in the dielectric substrate 230. In addition, the output signal Pout amplified by the power amplifier circuit 100 is transmitted to the radiating element 220 by power supply wiring 253.

[0052] Although the above description has been given of an example in which the radiating element 220 is a patch antenna, the radiating element 220 may be a linear antenna such as a monopole antenna or a dipole antenna, and / or an antenna of another configuration such as a slot antenna. Depending on the type of radiating element 220, part or all of the ground electrode GND1 in the dielectric substrate 230 is removed.

[0053] (Support for Sub-Terahertz Frequency Band) In recent years, in order to realize high-capacity and high-speed communication in wireless communication devices, development of communication in the so-called sub-terahertz frequency band exceeding 100 GHz has been progressing. Signals in high frequency bands such as sub-terahertz tend to be more susceptible to attenuation than signals in lower frequency bands. Furthermore, in the sub-terahertz frequency band, wide bandwidths of 3 GHz or more are sometimes used. Therefore, power amplifier devices used for signals in the sub-terahertz frequency band require a control method for the power amplifier circuit that is different from that used for signals in lower frequency bands.

[0054] (1) Regarding Tracking Modes Several tracking modes are known for adjusting the power supply voltage level in a power amplifier for a signal to be transmitted. Generally, tracking modes are broadly classified into envelope tracking mode and average power tracking (APT) mode. Furthermore, envelope tracking mode is classified into "digital envelope tracking mode (digital ET mode)" and "analog envelope tracking mode (analog ET mode)." Envelope tracking mode is a mode in which the power supply voltage level is set based on an envelope signal that indicates the envelope of the input signal. On the other hand, APT mode is a mode in which the power supply voltage level is set based on the average output power over a predetermined period, rather than the envelope signal.

[0055] FIG. 3 is a diagram for explaining an overview of each tracking mode. In FIG. 3, the upper row (A) shows a graph illustrating an example of the transition of the power supply voltage in analog ET mode. The middle row (B) shows a graph illustrating an example of the transition of the power supply voltage in APT mode, and the lower row (C) shows a graph illustrating an example of the transition of the power supply voltage in digital ET mode. In each graph, the horizontal axis represents time and the vertical axis represents voltage. The thick solid lines Vdd1 to Vdd3 represent the power supply voltage in each mode, and the thin solid lines WV1 to WV3 represent the output signal Pout, which is a modulated high-frequency signal.

[0056] In the analog ET mode (top row (A)), a power supply voltage that changes continuously is set to follow the envelope of the input signal Pin. The power supply voltage waveform in the analog ET mode is an analog waveform, not a digital waveform.

[0057] The analog ET mode provides the most efficient tracking because it always supplies a power supply voltage that corresponds to the amplitude fluctuation of the input signal Pin. However, because the power supply voltage must be changed continuously, if the amplitude fluctuation of the input signal is large or if the modulation bandwidth is wide, the power supply voltage may not be able to track the envelope of the modulated high-frequency signal.

[0058] Next, in the APT mode shown in the middle (B), a power supply voltage of a different voltage level is set for each predetermined frame unit. The power supply voltage has a digital waveform and forms a square wave. Here, a frame refers to the unit that constitutes the modulated high-frequency signal. In one example, the frame length is 10 ms.

[0059] Specifically, in APT mode, the voltage level of the power supply voltage is determined based on the average output power, not the envelope signal. In this case, it is not necessary to quickly change the power supply voltage in accordance with the input signal Pin. However, because a voltage higher than the input signal Pin is set over each frame, there is room for improvement in terms of power saving and efficiency.

[0060] In the digital ET mode (lower row (C)), a power supply voltage of a plurality of different voltage levels is set within one frame. The power supply voltage has a digital waveform and forms a rectangular wave. Specifically, in the digital ET mode, a voltage level corresponding to the voltage of the input signal Pin in a target section within the frame is selected from a plurality of different voltage levels based on an envelope signal. At this time, the voltage level is selected so as to track the envelope of the carrier wave modulated based on the transmission information. More specifically, the voltage level corresponding to the envelope value of each symbol is selected by referring to the range of envelope values ​​associated with each of the plurality of different voltage levels.

[0061] For signals in the sub-terahertz frequency band, it is necessary to make the power supply voltage follow changes in the input signal, which has a high frequency and a wide modulation bandwidth. Therefore, analog ET mode cannot keep up with these changes, and it is necessary to adopt digital ET mode.

[0062] (2) Doherty Amplifier A Doherty amplifier is known as a configuration that improves the amplification efficiency of a power amplifier circuit. A Doherty amplifier is generally configured such that a carrier amplifier and a peak amplifier are connected in parallel between an input terminal and an output terminal, and a phase shifter functioning as an impedance inverter is disposed between the carrier amplifier and a combining node. When the output power is small, the carrier amplifier operates, and when the output power exceeds a predetermined value, both the carrier amplifier and the peak amplifier operate.

[0063] 4 is a diagram for explaining the operation of the Doherty amplifier. In FIG. 4, the upper part shows the circuit state and load impedance when the peak amplifier 142 is operating (right diagram) and when it is not operating (left diagram), and the lower part shows the relationship between the output power and efficiency of the Doherty amplifier in comparison with that of an AB amplifier. In the lower part, the solid line LN10 shows the efficiency in the case of the Doherty amplifier, and the dashed line LN11 shows the efficiency in the case of the AB amplifier.

[0064] When both the carrier amplifier 141 and the peak amplifier 142 are operating (top right diagram), the load impedance seen from each of the carrier amplifier 141 and the peak amplifier 142 is RL, and the load impedance at the combining point (output terminal) is RL / 2. On the other hand, when the peak amplifier 142 is off (top left diagram), the load impedance seen from the carrier amplifier 141 becomes 2RL due to the phase shifter 143 functioning as an impedance inverter.

[0065] Generally, amplifiers have a tendency for their efficiency to increase as the load impedance increases. Therefore, as shown in the graph at the bottom, by using a Doherty amplifier, the efficiency of the carrier amplifier 141 can be improved by increasing the load impedance in region AR1 where the peak amplifier 142 is off, compared to an AB amplifier that can output the same peak power. Furthermore, in region AR2 where the peak amplifier 142 is on, the efficiency can be improved by the parallel operation of the carrier amplifier 141 and the peak amplifier 142.

[0066] Since signals in the sub-terahertz frequency band are more susceptible to attenuation than signals in lower frequency bands, a highly efficient amplifier is required, and the use of the Doherty amplifier described above is effective in improving efficiency.

[0067] (3) Semiconductor Substrate Materials Amplifiers use semiconductor devices such as transistors. Si-based materials are generally used as semiconductor substrates for forming these semiconductor devices because they are relatively inexpensive and suitable for mass production. However, Si-based materials tend to have large losses in the sub-terahertz frequency band exceeding 100 GHz, which can make it difficult to achieve the characteristics required for semiconductor devices.

[0068] In contrast, III-V compounds such as GaN, GaAs, and InP have a higher power density than Si-based materials, and therefore have the characteristic of lower loss compared to Si-based material substrates, even in the sub-terahertz frequency band. However, currently, III-V compounds have a higher material cost per unit compared to Si-based materials, and their manufacturing costs remain high. Therefore, manufacturing an entire amplifier circuit using a semiconductor substrate based on III-V compounds can increase the cost of the entire circuit.

[0069] Therefore, in the first embodiment, a Doherty amplifier is employed in the power amplifier circuit, and the peak amplifier, which operates at high output and is required to have low loss and high efficiency characteristics, is formed on a semiconductor substrate of a III-V compound, while the carrier amplifier and other circuits are formed on a semiconductor substrate of a relatively inexpensive Si-based material. This configuration makes it possible to suppress an increase in loss at high output and improve circuit efficiency in the sub-terahertz frequency band while suppressing an increase in the cost of the entire power amplifier circuit.

[0070] The "carrier amplifier 141A," "peak amplifier 142A," "carrier amplifier 141B," and "peak amplifier 142B" in the first embodiment correspond to the "first amplifier" to the "fourth amplifier" in the present disclosure, respectively. The "phase adjuster 143A" and the "phase adjuster 143B" in the first embodiment correspond to the "first phase adjuster" and the "second phase adjuster," respectively. The "semiconductor substrate 241" and the "semiconductor substrate 242" in the first embodiment correspond to the "first substrate" and the "second substrate," respectively. The "preamplifier 130" and the "preamplifier 135" in the first embodiment correspond to the "first preamplifier" and the "second preamplifier," respectively. The "TLT 150A" and the "TLT 150B" in the first embodiment correspond to the "first transmission line transformer" and the "second transmission line transformer," respectively. The "first line 151A," "second line 152A," "third line 153A," "first line 151B," "second line 152B," and "third line 153B" in the first embodiment correspond to the "first line" to the "sixth line" in the present disclosure, respectively.

[0071] Second Embodiment In a second embodiment, a configuration in which an RFIC is formed on a semiconductor substrate will be described.

[0072] 5 is a side perspective view of a transmitter circuit 10A according to the second embodiment. The transmitter circuit 10A differs from the first embodiment shown in FIG. 2 in that the RFIC 110 is formed on a semiconductor substrate 241 rather than on a SiP module 105, but the other parts are the same. In FIG. 5, the description of elements that overlap with those in FIG. 2 will not be repeated.

[0073] Signals in the sub-terahertz frequency band tend to experience greater loss in the transmission line than signals in lower frequency bands, so it is preferable to make the path length from RFIC 110 to radiating element 220 as short as possible.

[0074] In the case of the transmission circuit 10 of embodiment 1, since the RFIC 110 is included in the SiP module 105, the transmission signal upconverted in the RFIC 110 passes through the power supply wiring 251 in the dielectric substrate 230, and is transmitted to the radiating element 220 via the semiconductor substrates 241, 242 and the power supply wiring 253.

[0075] On the other hand, by forming the RFIC 110 on the semiconductor substrate 241 as in the transmitter circuit 10A, it is possible to transmit an IF signal through a path from the SiP module 105 to the semiconductor substrate 241, thereby shortening the path length for transmitting a high-frequency signal. This reduces loss due to the power supply wiring, thereby further improving circuit efficiency.

[0076] Third Embodiment In a third embodiment, another configuration of the conversion circuit will be described.

[0077] Fig. 6 is a partial circuit diagram of a transmission circuit 10B according to embodiment 3. Fig. 6 shows the circuits subsequent to the power amplifier stage 140 of a power amplifier circuit 100B. The power amplifier circuit 100B has a configuration in which the conversion circuit 160 in the power amplifier circuit 100 of Fig. 1 is replaced with a conversion circuit 160A.

[0078] The conversion circuit 160A is a so-called Marchand balun, and is composed of lines 161 and 162 each having a length of λ / 4 and a line 163 having a length of λ / 2.

[0079] One end of line 161 is connected to the output terminal of TLT 150A via capacitor C4, and the other end of line 161 is connected to ground potential GND. Similarly, one end of line 162 is connected to the output terminal of TLT 150B via capacitor C5, and the other end of line 162 is connected to ground potential GND.

[0080] The line 163 includes partial lines 1631 and 1632, one end of which is connected to each other. The other end of the partial line 1631 is connected to the antenna ANT via the output terminal T2. The other end of the partial line 1632 is an open end. The partial line 1631 is coupled to the line 161, and the partial line 1632 is coupled to the line 162.

[0081] The lines 161 and 162 are arranged so that the direction of the current flowing through the line 163 is opposite to that of the current flowing through the line 163. As a result, the high-frequency signals from the TLTs 150A and 150B, which have a phase difference of 180°, are added together and output from the line 163.

[0082] When a Marchand balun is used as a circuit for converting a balanced line to an unbalanced line, the area on the substrate for forming the line becomes somewhat larger, but the insertion loss can be reduced compared to when an MCT such as that of the power amplifier circuit 100 is used. Therefore, the circuit efficiency of the power amplifier circuit can be further improved.

[0083] Fourth Embodiment In a fourth embodiment, another configuration for feeding power to each amplifier in the power amplifier stage 140 will be described.

[0084] 7 is a partial circuit diagram of a transmission circuit 10C according to embodiment 4. In a power amplifier circuit 100C of the transmission circuit 10C, the power supply voltage Vdd is supplied to carrier amplifiers 141A and 141B and peak amplifiers 142A and 142B without passing through TLTs 150A and 150B.

[0085] More specifically, one end of the third line 153A of the TLT 150A and one end of the third line 153B of the TLT 150B are connected to the ground potential GND rather than the power supply voltage Vdd. Inductors L3 and L4 are connected in series between the output terminal of the peak amplifier 142A and the output terminal of the peak amplifier 142B, and the power supply voltage Vdd is supplied to the connection node between the inductors L3 and L4.

[0086] In this case, to prevent short circuits, the first line 151A and the third line 153A of the TLT 150A are connected to the connection node N1 via a DC-blocking capacitor C6, and the first line 151B and the third line 153B of the TLT 150B are connected to the connection node N2 via a DC-blocking capacitor C7.

[0087] The power supply voltage Vdd is supplied to the carrier amplifier 141A and the peak amplifier 142A via inductor L3. The power supply voltage Vdd is also supplied to the carrier amplifier 141B and the peak amplifier 142B via inductor L4. The inductors L3 and L4 allow the output impedance of the peak amplifiers 142A and 142B to be in an open state. The capacitor C3, which is a bypass capacitor, suppresses voltage fluctuations in the power supply voltage Vdd.

[0088] When power is supplied to each amplifier of the power amplifier stage 140 via a TLT, as in the power amplifier circuit 100 of the first embodiment, the line length of the TLT is not necessarily set to 1 / 4 wavelength, so there is a possibility that the power supply line will not appear to be in an open state when viewed from the output end of the amplifier. Therefore, by supplying power to the amplifiers via individual inductors L3 and L4, as in the power amplifier circuit 100C of the fourth embodiment, it is possible to reliably make the power supply line appear to be in an open state.

[0089] Fifth Embodiment In a fifth embodiment, a high-frequency termination circuit for removing harmonics of a high-frequency signal will be described.

[0090] Fig. 8 is a partial circuit diagram of a transmission circuit 10D according to embodiment 5. In a power amplifier circuit 100D of the transmission circuit 10D, in addition to the configuration of the power amplifier circuit 100 shown in Fig. 1, capacitor circuits 170A and 170B are added between the third line 153A of the TLT 150A and the output terminal of the peak amplifier 142A, and between the third line 153B of the TLT 150B and the output terminal of the peak amplifier 142B, respectively.

[0091] Each of the capacitor circuits 170A and 170B includes at least one capacitor and a switching circuit for switching the capacitor. In the example of the power amplifier circuit 100D, each of the capacitor circuits 170A and 170B includes three capacitors and three switching elements provided corresponding to the respective capacitors.

[0092] In the capacitor circuit 170A, a set of a series-connected capacitor and a switching element is connected in parallel between the third line 153A of the TLT 150A and the output terminal of the peak amplifier 142A. In the capacitor circuit 170B, a set of a series-connected capacitor and a switching element is connected in parallel between the third line 153B of the TLT 150B and the output terminal of the peak amplifier 142B.

[0093] The switching elements included in the capacitor circuit 170A are collectively referred to as a switching circuit 171A, and the switching elements included in the capacitor circuit 170B are collectively referred to as a switching circuit 171B.

[0094] In each capacitor circuit, by turning on any one of the switching elements, an LC parallel resonant circuit is formed by the capacitor connected to that switching element and the third line of the corresponding TLT.

[0095] Generally, an LC parallel resonant circuit has a characteristic that, in a frequency range higher than the resonant frequency, the capacitance increases and the admittance increases as the frequency increases. Therefore, by appropriately setting the resonant frequency of the LC parallel resonant circuit, the output impedance of the peak amplifier can be shorted in the second and third harmonic bands of the high-frequency signal to be transmitted, thereby ensuring attenuation in the corresponding harmonic bands. This prevents leakage of the high-frequency signal in the target frequency band to the power line, improving circuit efficiency and suppressing the harmonics of the high-frequency signal.

[0096] Furthermore, as explained in the fourth embodiment, when power is supplied via a TLT, the line length of the third line of the TLT may not be set to a quarter wavelength. In this case, the power line may not appear to be in an open state when viewed from the output terminal of the amplifier. Even in such a case, by forming an LC parallel resonant circuit using the capacitor included in the capacitor circuit and the third line of the TLT, it is possible to adjust the power line to an open state with respect to the fundamental wave of the high-frequency signal to be transmitted.

[0097] It should be noted that each capacitor circuit does not necessarily need to include multiple capacitors, but in the case of a dual-band type transmission circuit that switches between and transmits signals in multiple frequency bands, for example, the characteristics can be improved in multiple frequency bands by providing capacitors corresponding to each frequency band used.

[0098] The "capacitor circuit 170A" and the "capacitor circuit 170B" in the fifth embodiment correspond to the "first capacitor circuit" and the "second capacitor circuit" in the present disclosure, respectively.

[0099] Sixth Embodiment In a sixth embodiment, a high-frequency termination circuit for removing the second harmonic of a high-frequency signal will be described.

[0100] 9 is a partial circuit diagram of a transmission circuit 10E according to embodiment 6. In a power amplifier circuit 100E of the transmission circuit 10E, in addition to the configuration of the power amplifier circuit 100 shown in FIG. 1, resonator circuits 180A and 180B including at least one LC series resonant circuit are added between the output terminals of peak amplifiers 142A and 142B and ground potential GND, respectively.

[0101] The resonator circuits 180A and 180B each include at least one LC series resonant circuit and a switching circuit 181A or 181B for switching between the resonators. Each switching circuit has a switching element connected in series to at least one LC series resonant circuit. By turning on one of the switching elements in the resonator circuits 180A and 180B, the corresponding LC series resonant circuit functions as a band-stop filter. In other words, it is possible to remove components of high-frequency signals that correspond to the resonant frequency of the LC series resonant circuit.

[0102] Therefore, by setting the resonant frequency of the LC series resonant circuit to the frequency of the second harmonic of the high frequency signal to be transmitted, the second harmonic component of the high frequency signal can be removed.

[0103] The "resonator circuit 180A" and the "resonator circuit 180B" in the sixth embodiment correspond to the "first resonator circuit" and the "second resonator circuit" in the present disclosure, respectively.

[0104] Seventh Embodiment In a seventh embodiment, a different arrangement of the radiating elements 220 on the dielectric substrate 230 will be described.

[0105] Fig. 10 is a side perspective view of a transmitter circuit 10F according to embodiment 7. The transmitter circuit 10F differs from the transmitter circuit 10 according to embodiment 1 described with reference to Fig. 2 in that the radiating element 220 is disposed on the main surface 232 of the dielectric substrate 230, i.e., the main surface on which the amplifier module 240 and the SiP module 105 are mounted.

[0106] In the transmission circuit 10F, the dimension of the dielectric substrate 230 in the X-axis direction is larger than that in the transmission circuit 10. The radiating element 220 is arranged on the main surface 232, further in the positive direction of the X-axis than the amplifier module 240. The high-frequency signal from the amplifier module 240 is transmitted to the radiating element 220 by a feeder wiring 267 arranged on the main surface 232. Note that the feeder wiring 267 may be connected to the radiating element 220 by passing through an inner layer of the dielectric substrate 230.

[0107] 10, the radiating element 220 is a flat patch antenna. Therefore, the ground electrode GND1 on the dielectric substrate 230 extends to a position facing the radiating element 220. In the transmission circuit 10F, the ground electrode GND1 is disposed on a layer close to the main surface 231 of the dielectric substrate 230 in order to expand the bandwidth of the radio waves radiated from the radiating element 220.

[0108] With this configuration, the distance between the amplifier module 240 and the radiating element 220 can be shortened, making it easier to match impedance and reducing losses due to the power supply wiring, which has the advantage of making it easier to obtain the desired antenna characteristics.

[0109] On the other hand, when the radiating element 220 is arranged on the main surface 231 opposite to the mounting surface of the amplifier module 240, as in the transmission circuit 10 of embodiment 1, the dimension of the dielectric substrate 230 in the X-axis direction can be reduced, thereby making it possible to miniaturize the entire device.

[0110] The configuration of the transmitter circuit 10 or the transmitter circuit 10F to be adopted is selected appropriately depending on the constraints on the device size and / or the required antenna characteristics.

[0111] Eighth Embodiment In an eighth embodiment, a different arrangement of SiP modules 105 on a dielectric substrate 230 will be described.

[0112] 11 is a side perspective view of a transmitter circuit 10G according to the eighth embodiment. The transmitter circuit 10G has a configuration in which the SiP module 105 in the transmitter circuit 10F according to the seventh embodiment is arranged on a main surface 231.

[0113] By adopting such an arrangement, the dimension of the entire device in the Z-axis direction increases slightly compared to the transmission circuit 10F of the seventh embodiment, but the dimension in the X-axis direction can be shortened, thereby reducing the mounting area of ​​the transmission circuit.

[0114] Ninth Embodiment In a ninth embodiment, a configuration in which a radiating element is disposed in an amplifier module will be described.

[0115] 12 is a side perspective view of a transmitter circuit 10H according to embodiment 9. In the transmitter circuit 10H, similar to the transmitter circuit 10G according to embodiment 8, the SiP module 105 is disposed on the main surface 231 of the dielectric substrate 230, and an amplifier module 240A is disposed on the main surface 232 instead of the amplifier module 240.

[0116] In amplifier module 240A, in addition to semiconductor substrate 242 made of a III-V compound, radiating element 220 is arranged on semiconductor substrate 241 made of a Si-based material, at a position in the positive direction of the X-axis from semiconductor substrate 242. A high-frequency signal is supplied to radiating element 220 from semiconductor substrate 242 via power supply wiring 268 arranged on semiconductor substrate 241. Then, semiconductor substrate 242, radiating element 220, and power supply wiring 268 are molded on semiconductor substrate 241 with resin 243.

[0117] In order to achieve the above configuration, the dimension of the semiconductor substrate 241 in the X-axis direction is increased. On the other hand, in order not to interfere with the radiation of radio waves from the radiating element 220, the length of the dielectric substrate 230 in the X-axis direction is shortened, and the amplifier module 240A protrudes from the end of the dielectric substrate 230 in the positive direction of the X-axis. In other words, when viewed in a plan view from the normal direction of the dielectric substrate 230, the radiating element 220 is arranged so as not to overlap with the dielectric substrate 230.

[0118] In the case of the arrangement of the transmitter circuit 10H, since the amplifier module 240A is not provided with a ground electrode, the radiating element 220 is not a patch antenna, but a linear antenna such as a monopole antenna or a dipole antenna.

[0119] When an amplifier and an antenna are soldered together, there is a possibility that loss will increase and / or characteristics will vary depending on the state of the solder connection. However, by directly connecting the amplifier and antenna on a semiconductor substrate as in the eighth embodiment, manufacturing variations during the assembly process can be reduced, thereby stabilizing the characteristics of the product.

[0120] (Modification) In the transmission circuit 10H of the ninth embodiment, a configuration has been described in which the amplifier module 240A mounted on the dielectric substrate 230 protrudes only in the positive direction of the X axis from the dielectric substrate 230. In a modification, a configuration will be described in which the transmission circuit protrudes in two directions from the dielectric substrate 230, and radiating elements are disposed on both protruding portions.

[0121] 13 is a side perspective view of a modified transmitter circuit 10I. In the transmitter circuit 10I, the amplifier module 240A in the transmitter circuit 10H of the ninth embodiment is replaced with an amplifier module 240B. Description of elements in FIG. 13 that overlap with those in FIG. 12 will not be repeated.

[0122] The amplifier module 240B is longer in the X-axis direction than the amplifier module 240A of the transmission circuit 10H, and protrudes on both sides of the dielectric substrate 230 in the positive and negative directions of the X-axis. Radiating elements 220 are disposed on the semiconductor substrates 241 of both protruding portions. Furthermore, a semiconductor substrate 242 on which a peak amplifier 142 is formed is disposed for each radiating element 220.

[0123] 13, a separate semiconductor substrate 242 is provided for each radiating element 220, but a single semiconductor substrate 242 on which peak amplifiers 142 corresponding to the two radiating elements 220 are formed may also be disposed. However, because III-V compound materials are expensive, if the area of ​​the semiconductor substrate 242 is large, it is preferable to use separate substrates from a cost perspective. Furthermore, even if a single semiconductor substrate 242 is used and the length of the power supply wiring 268 from the semiconductor substrate 242 to the radiating element 220 becomes long, it is preferable to use separate substrates to shorten the distance between the radiating element 220 and the semiconductor substrate 242 from the perspective of reducing loss.

[0124] In the transmission circuit 10G shown in FIG. 11, the amplifier modules 240 may be configured to protrude from both sides of the dielectric substrate 230, similar to the modification.

[0125] Aspects It will be understood by those skilled in the art that the exemplary embodiments described above are examples of the following aspects.

[0126] (Item 1) A power amplifier circuit according to one aspect includes an input terminal and an output terminal, a divider, a first amplifier and a second amplifier, a first phase shifter, a first substrate, and a second substrate mounted on the first substrate. The divider is connected to the input terminal and divides an input signal from the input terminal into a first path and a second path. The first amplifier is connected to the first path of the divider. The second amplifier is connected to the second path of the divider. The first phase shifter is connected between an output of the first amplifier and an output of the second amplifier. The first amplifier is formed on the first substrate. The second amplifier is formed on the second substrate. The first amplifier and the second amplifier form a Doherty amplifier. The output terminal is electrically connected to a connection node between the second amplifier and the first phase shifter. The first amplifier is a carrier amplifier, and the second amplifier is a peak amplifier. The first substrate is a semiconductor substrate including a material primarily composed of a Si-based substrate. The second substrate is a semiconductor substrate containing a material whose main component is a compound of a group III element and a group V element.

[0127] (Item 2) The power amplifier circuit described in item 1 further includes first and second preamplifiers, a third and fourth amplifier, a second phase adjuster, and a conversion circuit. The first preamplifier is connected to the first path and amplifies an input signal, outputting two signals having a phase difference to two balanced lines, respectively. The second preamplifier is connected to the second path and amplifies an input signal, outputting two signals having a phase difference to two balanced lines, respectively. The second phase adjuster is connected between the output of the third amplifier and the output of the fourth amplifier. The conversion circuit converts from a balanced line to an unbalanced line. The first amplifier is connected to one balanced line of the first preamplifier, and the third amplifier is connected to the other balanced line of the first preamplifier. The second amplifier is connected to one balanced line of the second preamplifier, and the fourth amplifier is connected to the other balanced line of the second preamplifier. The first balanced line of the conversion circuit is supplied with a combined signal from a connection node between the first amplifier and the first phase shifter, the second balanced line of the conversion circuit is supplied with a combined signal from a connection node between the third amplifier and the second phase shifter, and the unbalanced line of the conversion circuit is connected to an output terminal.

[0128] (Item 3) In the power amplifier circuit described in item 2, the conversion circuit is a magnetic coupling transformer.

[0129] (4) In the power amplifier circuit according to the second aspect, the conversion circuit is a Marchand balun.

[0130] (Item 5) The power amplifier circuit according to any one of items 2 to 4 further includes a first transmission line transformer and a second transmission line transformer. The first transmission line transformer is connected between the first balanced line of the conversion circuit and the output of the second amplifier. The second transmission line transformer is connected between the second balanced line of the conversion circuit and the output of the fourth amplifier.

[0131] (Item 6) In the power amplifier circuit described in item 5, the first transmission line transformer includes first to third lines. The first and second lines are connected in series between the first balanced line and the output of the second amplifier. The third line is coupled to the first and second lines. The second transmission line transformer includes fourth to sixth lines. The fourth and fifth lines are connected in series between the second balanced line and the output of the fourth amplifier. The sixth line is coupled to the fourth and fifth lines.

[0132] (Item 7) In the power amplifier circuit described in item 6, one end of the third line is connected to the output of the second amplifier, one end of the sixth line is connected to the output of the fourth amplifier, and a power supply voltage is supplied to the other end of the third line and the other end of the sixth line.

[0133] (Item 8) The power amplifier circuit according to item 7 further includes a first capacitor circuit and a second capacitor circuit. The first capacitor circuit is connected between the other end of the third line and the output of the second amplifier. The second capacitor circuit is connected between the other end of the sixth line and the output of the fourth amplifier. The first capacitor circuit includes a plurality of capacitors connected in parallel between the other end of the third line and the output of the second amplifier. The second capacitor circuit includes a plurality of capacitors connected in parallel between the other end of the sixth line and the output of the fourth amplifier. Each of the first capacitor circuit and the second capacitor circuit further includes a switching circuit for switching the corresponding plurality of capacitors.

[0134] (Item 9) The power amplifier circuit according to item 7 further includes a first resonator circuit and a second resonator circuit. The first resonator circuit is connected between the other end of the third line and ground potential. The second resonator circuit is connected between the other end of the sixth line and ground potential. The first resonator circuit includes a plurality of LC series resonators connected in parallel between the other end of the third line and ground potential. The second resonator circuit includes a plurality of LC series resonators connected in parallel between the other end of the sixth line and ground potential. Each of the first resonator circuit and the second resonator circuit further includes a switching circuit for switching the corresponding plurality of LC series resonators.

[0135] (Item 10) In the power amplifier circuit described in item 6, one end of the third line is connected to the output of the second amplifier. One end of the sixth line is connected to the output of the fourth amplifier. The other ends of the third line and the sixth line are connected to ground potential. A power supply voltage is supplied to the output of the second amplifier and the output of the fourth amplifier via an inductor.

[0136] (Item 11) In the power amplifier circuit according to any one of items 1 to 10, the first amplifier is a class A amplifier or a class AB amplifier, and the second amplifier is a class C amplifier.

[0137] (Item 12) A transmission circuit according to one aspect includes a dielectric substrate, the power amplifier circuit according to any one of items 1 to 11, a radiating element, and a feeder circuit. The dielectric substrate has a first surface and a second surface that face each other. The power amplifier circuit is disposed on the first surface of the dielectric substrate. The feeder circuit supplies a high-frequency signal to the radiating element via the power amplifier circuit.

[0138] (Item 13) In the transmission circuit described in item 12, the radiating element is disposed on the first surface of the dielectric substrate.

[0139] (Item 14) In the transmission circuit according to item 12, the radiating element is disposed on the second surface of the dielectric substrate.

[0140] (Item 15) In the transmitter circuit described in item 12, the radiating element is disposed on a first substrate in the power amplifier circuit.

[0141] (16) In the transmitter circuit according to any one of the 12th to 15th paragraphs, the feed circuit is disposed on the first surface of the dielectric substrate.

[0142] (17) In the transmitter circuit according to any one of the 12th to 15th paragraphs, the feed circuit is disposed on the second surface of the dielectric substrate.

[0143] (18) In the transmitter circuit described in any one of paragraphs 12 to 15, the feeder circuit is formed on the first substrate.

[0144] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the description of the above embodiments, and is intended to include all modifications within the meaning and scope of the claims.

[0145] 10, 10A to 10I transmitter circuit, 100, 100B to 100E power amplifier circuit, 105 SiP module, 110 RFIC, 115 PMIC, 120 distributor, 130, 135 preamplifier, 131, 136 driver amplifier, 140 power amplifier stage, 141, 141A, 141B carrier amplifier, 142, 142A, 142B peak amplifier, 143, 143A, 143B phase adjuster, 150A, 150B TLT, 160, 160A conversion circuit, 151A to 153A, 151B to 153B, 161 to 163, 1631, 1632 line, 170A, 170B capacitor circuit, 171A, 171B, 181A, 181B Switching circuit, 180A, 180B resonator circuit, 200 BBIC, 220 radiating element, 230 dielectric substrate, 231, 232 main surface, 240, 240A, 240B amplifier module, 241, 242 semiconductor substrate, 243 resin, 251 to 253, 267, 268 power supply wiring, 260 columnar electrode, 265 connection electrode, 266 solder bump, ANT antenna, C1 to C7 capacitors, GND ground potential, GND1 ground electrode, L1 to L4 inductors, N1, N2 connection node, T1 input terminal, T2 output terminal, T3 power supply terminal, TR1, TR2 conversion transformer, TR3 magnetic field coupling transformer, Vdd power supply voltage.

Claims

1. A power amplifier circuit comprising: an input terminal and an output terminal; a distributor connected to the input terminal and distributing an input signal from the input terminal to a first path and a second path; a first amplifier connected to the first path of the distributor; a second amplifier connected to the second path of the distributor; a first phase adjuster connected between an output of the first amplifier and an output of the second amplifier; a first substrate on which the first amplifier is formed; and a second substrate mounted on the first substrate on which the second amplifier is formed, wherein the first amplifier and the second amplifier constitute a Doherty amplifier, the first amplifier is a carrier amplifier and the second amplifier is a peak amplifier, the output terminal is electrically connected to a connection node between the second amplifier and the first phase adjuster, the first substrate is a semiconductor substrate containing a material mainly composed of a Si-based base material, and the second substrate is a semiconductor substrate containing a material mainly composed of a compound of a group III element and a group V element.

2. The amplifier further comprises a first preamplifier connected to the first path, amplifying the input signal and outputting two signals having a phase difference between each other to two balanced lines, a second preamplifier connected to the second path, amplifying the input signal and outputting two signals having a phase difference between each other to two balanced lines, a third amplifier and a fourth amplifier, a second phase adjuster connected between an output of the third amplifier and an output of the fourth amplifier, and a conversion circuit for converting a balanced line to an unbalanced line, wherein the first amplifier is connected to one balanced line of the first preamplifier and the third amplifier is connected to the other balanced line of the first preamplifier, the second amplifier is connected to one balanced line of the second preamplifier and the fourth amplifier is connected to the other balanced line of the second preamplifier, and a composite signal from a connection node between the first amplifier and the first phase adjuster is supplied to the first balanced line of the conversion circuit, 2. The power amplifier circuit according to claim 1, wherein a second balanced line of the conversion circuit is supplied with a composite signal from a connection node between the third amplifier and the second phase shifter, and an unbalanced line of the conversion circuit is connected to the output terminal.

3. The power amplifier circuit according to claim 2, wherein the conversion circuit is a magnetic coupling transformer.

4. The power amplifier circuit of claim 2, wherein the conversion circuit is a Marchand balun.

5. A power amplifier circuit as claimed in any one of claims 2 to 4, further comprising: a first transmission line transformer connected between a first balanced line of the conversion circuit and the output of the second amplifier; and a second transmission line transformer connected between a second balanced line of the conversion circuit and the output of the fourth amplifier.

6. The power amplifier circuit according to claim 5, wherein the first transmission line transformer includes a first line and a second line connected in series between the first balanced line and the output of the second amplifier, and a third line coupled to the first line and the second line, and the second transmission line transformer includes a fourth line and a fifth line connected in series between the second balanced line and the output of the fourth amplifier, and a sixth line coupled to the fourth line and the fifth line.

7. The power amplifier circuit according to claim 6, wherein one end of the third line is connected to an output of the second amplifier, one end of the sixth line is connected to an output of the fourth amplifier, and a power supply voltage is supplied to the other end of the third line and the other end of the sixth line.

8. The power amplifier circuit according to claim 7, further comprising: a first capacitor circuit connected between the other end of the third line and the output of the second amplifier; and a second capacitor circuit connected between the other end of the sixth line and the output of the fourth amplifier, wherein the first capacitor circuit includes a plurality of capacitors connected in parallel between the other end of the third line and the output of the second amplifier, and the second capacitor circuit includes a plurality of capacitors connected in parallel between the other end of the sixth line and the output of the fourth amplifier, and each of the first capacitor circuit and the second capacitor circuit further includes a switching circuit for switching the corresponding plurality of capacitors.

9. The power amplifier circuit according to claim 7, further comprising: a first resonator circuit connected between the other end of the third line and a ground potential; and a second resonator circuit connected between the other end of the sixth line and a ground potential, wherein the first resonator circuit includes a plurality of LC series resonators connected in parallel between the other end of the third line and the ground potential, and the second resonator circuit includes a plurality of LC series resonators connected in parallel between the other end of the sixth line and the ground potential, and each of the first resonator circuit and the second resonator circuit further includes a switching circuit for switching the corresponding plurality of LC series resonators.

10. The power amplifier circuit according to claim 6, wherein one end of the third line is connected to an output of the second amplifier, one end of the sixth line is connected to an output of the fourth amplifier, the other end of the third line and the other end of the sixth line are connected to a ground potential, and a power supply voltage is supplied to the output of the second amplifier and the output of the fourth amplifier via an inductor.

11. A power amplifier circuit according to any one of claims 1 to 10, wherein the first amplifier is a class A amplifier or a class AB amplifier, and the second amplifier is a class C amplifier.

12. A transmitting circuit comprising: a dielectric substrate having a first surface and a second surface opposed to each other; a power amplifier circuit according to any one of claims 1 to 11 arranged on the first surface of the dielectric substrate; a radiating element; and a power feed circuit which supplies a high frequency signal to the radiating element via the power amplifier circuit.

13. The transmitter circuit of claim 12, wherein the radiating element is disposed on the first surface of the dielectric substrate.

14. The transmitter circuit of claim 12, wherein the radiating element is disposed on the second surface of the dielectric substrate.

15. The transmission circuit according to claim 12, wherein the radiating element is disposed on the first substrate in the power amplifier circuit.

16. A transmission circuit according to any one of claims 12 to 15, wherein the feeding circuit is disposed on the first surface of the dielectric substrate.

17. A transmission circuit according to any one of claims 12 to 15, wherein the feeding circuit is disposed on the second surface of the dielectric substrate.

18. The transmission circuit according to any one of claims 12 to 15, wherein the power supply circuit is formed on the first substrate.

Citation Information

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