Semiconductor device, vehicle, and method for manufacturing semiconductor device

Abstract

This semiconductor device comprises a support, a first semiconductor element that is supported by the support, and a first bonding layer that is interposed between the support and the first semiconductor element. The first bonding layer has a flat portion and a protruding portion. The dimension of the protruding portion in the thickness direction of the support is greater than that of the flat portion, and the protruding portion is in contact with an edge of the first bonding layer that extends in a first direction orthogonal to said thickness direction. The protruding portion has a top portion farthest from the support in the thickness direction. When viewed in the thickness direction, the flat portion overlaps the first semiconductor element. When viewed in the thickness direction, the top portion is separated from the first semiconductor element toward a first side in a second direction orthogonal to the thickness direction and the first direction.

Description

Semiconductor device, vehicle, and method of manufacturing semiconductor device

[0001] The present disclosure relates to a semiconductor device, a vehicle, and a method for manufacturing a semiconductor device.

[0002] Patent Document 1 discloses an example of a conventional semiconductor device. The semiconductor device disclosed in this document includes a first conductive member and a first semiconductor element. The first semiconductor element is conductively bonded to the first conductive member via a conductive bonding layer. As a specific example of the conductive bonding layer, a structure made of sintered metal is disclosed.

[0003] JP 2023-88629 A

[0004] [Summary] If the bonding of a semiconductor element is insufficient, the semiconductor device may not be able to fully function.

[0005] An object of the present disclosure is to provide an improved semiconductor device. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device, a vehicle, and a method for manufacturing a semiconductor device that are capable of more appropriately bonding semiconductor elements.

[0006] A first aspect of the present disclosure provides a semiconductor device comprising a support, a first semiconductor element supported by the support, and a first bonding layer interposed between the support and the first semiconductor element. The first bonding layer has a flat portion and a convex portion. The convex portion has a dimension in the thickness direction of the support that is larger than the flat portion and is in contact with an edge of the first bonding layer extending in a first direction perpendicular to the thickness direction. The convex portion has an apex that is farthest from the support in the thickness direction. When viewed in the thickness direction, the flat portion overlaps with the first semiconductor element. When viewed in the thickness direction, the apex is distant from the first semiconductor element to a first side in a second direction perpendicular to the thickness direction and the first direction.

[0007] A vehicle provided by a second aspect of the present disclosure includes a drive source and the semiconductor device provided by the first aspect of the present disclosure, wherein the semiconductor device is electrically connected to the drive source.

[0008] A third aspect of the present disclosure provides a method for manufacturing a semiconductor device, comprising the steps of: preparing a support; placing a mask having openings on the support; applying a bonding material to the support by filling the openings with the bonding material using a squeegee; placing a first semiconductor element on the bonding material; and sinter-bonding the support and the first semiconductor element via the bonding material. The bonding material applied to the support in the bonding material applying step has a flat portion and a protruding portion protruding from the flat portion in a thickness direction. In the step of placing the first semiconductor element, the first semiconductor element and at least a portion of the flat portion overlap each other, and the first semiconductor element and the top of the protruding portion are spaced apart, as viewed in the thickness direction.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a partial plan view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. FIG. 4 is a partial enlarged plan view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 5 is a partial enlarged cross-sectional view taken along line V-V in FIG. 4. FIG. 6 is a partial enlarged plan view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 7 is a partial enlarged cross-sectional view taken along line VII-VII in FIG. 6. FIG. 8 is a system configuration diagram showing a vehicle equipped with a semiconductor device according to a first embodiment of the present disclosure. FIG. 9 is a flowchart showing a method for manufacturing a semiconductor device according to a first embodiment of the present disclosure. FIG. 10 is a perspective view showing a method for manufacturing a semiconductor device according to a first embodiment of the present disclosure. FIG. 11 is a perspective view showing a method for manufacturing a semiconductor device according to a first embodiment of the present disclosure. FIG. 12 is a perspective view showing a method for manufacturing a semiconductor device according to a first embodiment of the present disclosure. FIG. 13 is a partial enlarged cross-sectional view showing a method for manufacturing a semiconductor device according to a first embodiment of the present disclosure. FIG. 14 is a partial enlarged cross-sectional view showing a method for manufacturing a semiconductor device according to a first embodiment of the present disclosure. FIG. 15 is a perspective view showing a method for manufacturing a semiconductor device according to a first embodiment of the present disclosure. FIG. 16 is a partially enlarged cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. FIG. 17 is a perspective view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. FIG. 18 is a partially enlarged cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. FIG. 19 is a partially enlarged cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. FIG. 20 is a partially enlarged cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. FIG. 21 is a partially enlarged cross-sectional view showing a first modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 22 is a partially enlarged cross-sectional view showing a second modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 23 is a partially enlarged plan view showing a third modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 24 is a partially enlarged plan view showing a semiconductor device according to the second embodiment of the present disclosure.

[0011] DETAILED DESCRIPTION Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0012] The terms "first," "second," "third," etc. in this disclosure are used for identification purposes only and are not intended to impose any ranking on their objects.

[0013] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B with a certain object A in contact with the certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "an object A overlaps an object B when viewed in a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B." Furthermore, in the present disclosure, "a surface A faces in (one side or the other side of) direction B" is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is tilted with respect to direction B.

[0014] 1 to 7 show a semiconductor device according to a first embodiment of the present disclosure. The semiconductor device A1 of this embodiment includes a support 1, one or more first semiconductor elements 5A, and one or more first bonding layers 6A. In this embodiment, the semiconductor device A1 further includes one or more second semiconductor elements 5B, one or more second bonding layers 6B, a positive input terminal 7A, an output terminal 7B, a negative input terminal 7C, a plurality of control terminals 7D, a plurality of control terminals 7E, a plurality of first wires 8A, a plurality of second wires 8B, a plurality of third wires 8C, a plurality of fourth wires 8D, and a sealing resin 9.

[0015] There is no limitation on the number of one or more first semiconductor elements 5A and one or more second semiconductor elements 5B. In this embodiment, the semiconductor device A1 includes a plurality of first semiconductor elements 5A and a plurality of second semiconductor elements 5B. There is no limitation on the number of one or more first bonding layers 6A and one or more second bonding layers 6B. In this embodiment, the semiconductor device A1 includes a plurality of first bonding layers 6A and a plurality of second bonding layers 6B.

[0016] 1 to 7 and related descriptions, the thickness direction of the support 1 is referred to as the thickness direction z, one side of the thickness direction z as the z1 side, and the other side of the z direction as the z2 side. Furthermore, the direction perpendicular to the thickness direction z is referred to as the x direction, one side of the x direction as the x1 side, and the other side as the x2 side. Furthermore, the direction perpendicular to the thickness direction z and the x direction is referred to as the y direction, one side of the y direction as the y2 side, and the other side as the y1 side. For ease of understanding, the positive input terminal 7A, the output terminal 7B, the negative input terminal 7C, the multiple control terminals 7E and 7D, the multiple first wires 8A, the multiple second wires 8B, the multiple third wires 8C, the multiple fourth wires 8D, and the sealing resin 9 are omitted from FIGS. 2 to 7.

[0017] The specific use of the semiconductor device A1 is not limited in any way. In the semiconductor device A1, a plurality of first semiconductor elements 5A form an upper arm circuit, and a plurality of second semiconductor elements 5B form a lower arm circuit, thereby forming a half-bridge circuit. The semiconductor device A1 forms, for example, an inverter that converts DC power to AC power and supplies power to a drive source such as a motor. Although the semiconductor device A1 of this embodiment will be described using an example in which it has one half-bridge circuit, it may also be configured to have, for example, three half-bridge circuits, thereby supplying power to a so-called three-phase AC motor.

[0018] Each of the multiple first semiconductor elements 5A and the multiple second semiconductor elements 5B is configured using a semiconductor material primarily composed of SiC (silicon carbide). The semiconductor material is not limited to SiC and may be Si (silicon), GaAs (gallium arsenide), GaN (gallium nitride), or the like. In this embodiment, the first semiconductor elements 5A and the second semiconductor elements 5B are MOSFETs (metal-oxide-semiconductor field effect transistors). The semiconductor elements are not limited to the first semiconductor elements 5A and the second semiconductor elements 5B, and may be field-effect transistors including MISFETs (metal-insulator-semiconductor FETs), bipolar transistors such as IGBTs (insulated gate bipolar transistors), IC chips such as LSIs, diodes, capacitors, or the like.

[0019] 4 to 7, the first semiconductor element 5A and the second semiconductor element 5B of this embodiment have an element body 50, a drain electrode 51, a source electrode 52, a gate electrode 53, and a source sense electrode 54. The element body 50 is made of the semiconductor material described above. The drain electrode 51 is disposed on the z1 side of the element body 50 in the thickness direction z. The source electrode 52, the gate electrode 53, and the source sense electrode 54 are disposed on the z2 side of the element body 50 in the thickness direction z.

[0020] As shown in FIG. 3, the support 1 has an insulating layer 10, a back surface metal layer 11, a first main surface metal layer 2A, a second main surface metal layer 2B, a third main surface metal layer 3A, a fourth main surface metal layer 3B, a bonding layer 4A and a bonding layer 4B.

[0021] The insulating layer 10 is an insulating plate-like member containing, for example, ceramic. The back surface metal layer 11 is laminated on the z1 side of the insulating layer 10 in the thickness direction z. The back surface metal layer 11 contains, for example, a metal such as Cu (copper). The first main surface metal layer 2A is laminated on the z2 side of the insulating layer 10 in the thickness direction z. The first main surface metal layer 2A is located on the x1 side of the insulating layer 10 in the x direction. The second main surface metal layer 2B is laminated on the z2 side of the insulating layer 10 in the thickness direction z. The first main surface metal layer 2A is located on the x2 side of the insulating layer 10 in the x direction. The first main surface metal layer 2A and the second main surface metal layer 2B are separated from each other and each contains, for example, a metal such as Cu (copper). The insulating layer 10, the back surface metal layer 11, the first main surface metal layer 2A, and the second main surface metal layer 2B may form, for example, a DBC (Direct Bonded Copper) substrate or an AMB (Active Metal Brazing) substrate.

[0022] The third main surface metal layer 3A is bonded to the first main surface metal layer 2A via a bonding layer 4A. The third main surface metal layer 3A contains a metal such as Cu (copper). The bonding layer 4A is intended to bond the first main surface metal layer 2A and the bonding layer 4A. The specific configuration of the bonding layer 4A is not limited in any way, and may be, for example, a configuration in which a metal layer containing Ag (silver) is formed on both sides of a base layer containing Al (aluminum). In this case, a metal layer containing Ag (silver) may be formed on the surfaces of the first main surface metal layer 2A and the third main surface metal layer 3A.

[0023] The fourth main surface metal layer 3B is bonded to the second main surface metal layer 2B via a bonding layer 4B. The fourth main surface metal layer 3B contains a metal such as Cu (copper). The bonding layer 4B is intended to bond the second main surface metal layer 2B and the bonding layer 4B, for example, by solid-state diffusion bonding. The specific configuration of the bonding layer 4B is not limited in any way, and may be, for example, a configuration in which a metal layer containing Ag (silver) is formed on both sides of a base layer containing Al (aluminum). In this case, a metal layer containing Ag (silver) may be formed on the surfaces of the second main surface metal layer 2B and the fourth main surface metal layer 3B.

[0024] The support 1 is not limited to the above-described configuration. For example, the support 1 may be configured without the third main surface metal layer 3A, the fourth main surface metal layer 3B, the bonding layer 4A, and the bonding layer 4B. In this case, in the following description, the first main surface metal layer 2A and the second main surface metal layer 2B are used instead of the third main surface metal layer 3A and the fourth main surface metal layer 3B.

[0025] The multiple first semiconductor elements 5A are conductively bonded to the third main surface metal layer 3A via multiple first bonding layers 6A. In this embodiment, the drain electrodes 51 of the first semiconductor elements 5A are conductively bonded to the third main surface metal layer 3A via the first bonding layer 6A. The first bonding layer 6A is used to conductively bond the first semiconductor elements 5A to the third main surface metal layer 3A, for example, by sintering bonding. The specific configuration of the first bonding layer 6A is not limited. When sintering bonding is used, the first bonding layer 6A contains a sintered metal. Examples of this sintered metal include sintered silver and sintered copper. In this case, a metal layer containing, for example, Ag (silver) may be formed on the surfaces of the first semiconductor elements 5A and the third main surface metal layer 3A. This allows, for example, the drain electrodes 51 of the multiple first semiconductor elements 5A to be conductively connected to the third main surface metal layer 3A. The specific shape of the first bonding layer 6A is not limited; in the illustrated example, it is rectangular.

[0026] As shown in FIGS. 4 and 5 , the first bonding layer 6A includes a flat portion 61 and a protruding portion 62. The flat portion 61 is, for example, a portion having a flat shape compared to the protruding portion 62. The thickness t2 of the protruding portion 62 in the thickness direction z is thicker than the thickness t1 of the flat portion 61 in the thickness direction z. The protruding portion 62 protrudes from the flat portion 61 toward the z2 side in the thickness direction z. The specific value of the thickness t1 is not particularly limited and is, for example, 70 μm or more and 100 μm or less. The specific value of the thickness t2 is also not particularly limited and is, for example, 80 μm or more and 115 μm or less, and the protruding amount of the protruding portion 62 from the flat portion 61 toward the z2 side in the thickness direction z is, for example, 10 μm or more and 15 μm or less.

[0027] As viewed in the thickness direction z, at least a portion of the flat portion 61 overlaps with the first semiconductor element 5A. In the illustrated example, as viewed in the thickness direction z, a portion of the flat portion 61 overlaps with the first semiconductor element 5A, and other portions extend from the first semiconductor element 5A in all four directions in the x and y directions. That is, the flat portion 61 contacts the edge of the first bonding layer 6A on the y2 side in the y direction, the edge on the x1 side in the x direction, and the edge on the x2 side in the x direction. The flat portion 61 may be configured to extend from the first semiconductor element 5A in three directions, two directions, or one direction in the x and y directions, or may not extend from the first semiconductor element 5A.

[0028] The protrusion 62 is located on the y1 side of the first bonding layer 6A in the y direction and contacts an edge extending in the x direction. In this embodiment, the x direction of the first semiconductor element 5A and the first bonding layer 6A corresponds to the first direction in this disclosure. The protrusion 62 has an apex 621. The apex 621 is the portion farthest from the third main surface metal layer 3A (support 1) in the thickness direction z. In the illustrated example, the protrusion 62 has a triangular cross section, and the apex 621 corresponds to the apex angle of the triangle. When viewed in the thickness direction z, the apex 621 is spaced from the first semiconductor element 5A on the y1 side in the y direction. In this embodiment, the y direction of the first semiconductor element 5A and the first bonding layer 6A corresponds to the second direction in this disclosure. Furthermore, in this example, all of the protrusions 62 are spaced from the first semiconductor element 5A on the y1 side in the y direction. Furthermore, in this example, the flat portion 61 has a portion located between the first semiconductor element 5A and the protruding portion 62 in the y direction.

[0029] In this example, the length L1 of the first bonding layer 6A extending from the first semiconductor element 5A to the y1 side in the y direction is greater than the length L2 of the first bonding layer 6A extending from the first semiconductor element 5A to the y2 side in the y direction. The length L1 is greater than the length L3 of the first bonding layer 6A extending from the first semiconductor element 5A to the x1 side in the x direction and the length L4 of the first bonding layer 6A extending to the x2 side in the x direction. The specific values ​​of the lengths L1, L2, L3, and L4 are not particularly limited. For example, the length L1 is 350 μm or more and 650 μm or less, the length L2 is 350 μm or more and 650 μm or less, and the lengths L3 and L4 are each 100 μm or more and 400 μm or less.

[0030] The second semiconductor elements 5B are electrically connected to the fourth main surface metal layer 3B via the second bonding layers 6B. In this embodiment, the drain electrodes 51 of the second semiconductor elements 5B are electrically connected to the fourth main surface metal layer 3B via the second bonding layers 6B. The second bonding layer 6B is used to electrically connect the second semiconductor elements 5B to the fourth main surface metal layer 3B, for example, by sintering bonding. The specific configuration of the second bonding layer 6B is not limited. When sintering bonding is used, the second bonding layer 6B contains a sintered metal. Examples of the sintered metal include sintered silver and sintered copper. In this case, a metal layer containing, for example, Ag (silver) may be formed on the surfaces of the second semiconductor elements 5B and the fourth main surface metal layer 3B. This allows, for example, the drain electrodes 51 of the second semiconductor elements 5B to be electrically connected to the fourth main surface metal layer 3B. The specific shape of the second bonding layer 6B is not limited; in the illustrated example, it is rectangular.

[0031] As shown in FIGS. 6 and 7 , the second bonding layer 6B includes a flat portion 61 and a protruding portion 62. The flat portion 61 is, for example, a portion having a flat shape compared to the protruding portion 62. The thickness t2 of the protruding portion 62 in the thickness direction z is thicker than the thickness t1 of the flat portion 61 in the thickness direction z. The protruding portion 62 protrudes from the flat portion 61 toward the z2 side in the thickness direction z. The specific value of the thickness t1 is not limited and is, for example, 15 μm or more and 40 μm or less. The specific value of the thickness t2 is also not limited and is, for example, 35 μm or more and 55 μm or less, and the protrusion amount of the protruding portion 62 from the flat portion 61 toward the z2 side in the thickness direction z is, for example, 10 μm or more and 15 μm or less.

[0032] As viewed in the thickness direction z, at least a portion of the flat portion 61 overlaps with the second semiconductor element 5B. In the illustrated example, as viewed in the thickness direction z, a portion of the flat portion 61 overlaps with the second semiconductor element 5B, and other portions extend from the second semiconductor element 5B in all four directions in the x and y directions. That is, the flat portion 61 contacts the edge of the second bonding layer 6B on the y2 side in the y direction, the edge on the x1 side in the x direction, and the edge on the x2 side in the x direction. The flat portion 61 may be configured to extend from the second semiconductor element 5B in three directions, two directions, or one direction in the x and y directions, or may not extend from the second semiconductor element 5B.

[0033] The convex portion 62 is located on the y1 side of the second bonding layer 6B in the y direction and is in contact with an edge extending in the x direction. The x direction of the second semiconductor element 5B and the second bonding layer 6B is the first direction in this embodiment. The convex portion 62 has an apex 621. The apex 621 is the portion farthest from the fourth main surface metal layer 3B (support 1) in the thickness direction z. In the illustrated example, the convex portion 62 has a triangular cross section, and the apex 621 corresponds to the apex angle of the triangle. When viewed in the thickness direction z, the apex 621 is spaced from the second semiconductor element 5B on the y1 side in the y direction. The y direction of the second semiconductor element 5B and the second bonding layer 6B is the second direction in this embodiment. Furthermore, in this example, all of the convex portions 62 are spaced from the second semiconductor element 5B on the y1 side in the y direction. Furthermore, in this example, the flat portion 61 has a portion located between the second semiconductor element 5B and the protruding portion 62 in the y direction.

[0034] In this example, the length L1 of the second bonding layer 6B extending from the second semiconductor element 5B to the y1 side in the y direction is greater than the length L2 of the second bonding layer 6B extending from the second semiconductor element 5B to the y2 side in the y direction. Furthermore, the length L1 is greater than the length L3 of the second bonding layer 6B extending from the second semiconductor element 5B to the x1 side in the x direction and the length L4 of the second bonding layer 6B extending to the x2 side in the x direction. The specific values ​​of the lengths L1, L2, L3, and L4 are not particularly limited. For example, the length L1 is 350 μm or more and 650 μm or less, the length L2 is 350 μm or more and 650 μm or less, and the lengths L3 and L4 are each 100 μm or more and 400 μm or less.

[0035] The positive input terminal 7A is a terminal connected to the positive side of a DC power supply and is conductively joined to the third main surface metal layer 3A.

[0036] The output terminal 7B is a terminal connected to the load side of a motor, etc. The output terminal 7B is conductively joined to the fourth main surface metal layer 3B.

[0037] The negative input terminal 7C is connected to the negative side of the DC power supply and is electrically connected to, for example, the source electrodes 52 of the second semiconductor elements 5B via second wires 8B. The second wires 8B include a metal such as copper (Cu), aluminum (Al), or gold (Au).

[0038] For example, source electrodes 52 of the plurality of first semiconductor elements 5A are electrically connected to the fourth main surface metal layer 3B via a plurality of first wires 8A. The first wires 8A include a metal such as copper (Cu), aluminum (Al), or gold (Au).

[0039] The plurality of control terminals 7D are terminals for controlling the plurality of first semiconductor elements 5A. The plurality of control terminals 7D are electrically connected to, for example, the gate electrodes 53, source sense electrodes 54, etc. of the plurality of first semiconductor elements 5A via a plurality of third wires 8C. The third wires 8C include a metal such as copper (Cu), aluminum (Al), or gold (Au).

[0040] The plurality of control terminals 7E are terminals for controlling the plurality of second semiconductor elements 5B. The plurality of control terminals 7E are electrically connected to, for example, the gate electrodes 53, source sense electrodes 54, etc. of the plurality of second semiconductor elements 5B via a plurality of fourth wires 8D. The fourth wires 8D include a metal such as copper (Cu), aluminum (Al), or gold (Au).

[0041] The sealing resin 9 covers a part of the support 1, the plurality of first semiconductor elements 5A, the plurality of second semiconductor elements 5B, etc. The positive input terminal 7A, the output terminal 7B, the negative input terminal 7C, the plurality of control terminals 7D, and the plurality of control terminals 7E each have a portion protruding from the sealing resin 9.

[0042] Next, a vehicle C1 equipped with the semiconductor device A1 will be described with reference to Fig. 8. The vehicle C1 is, for example, an electric vehicle (EV).

[0043] As shown in Fig. 8, vehicle C1 includes an on-board charger 910, a storage battery 920, and a drive system 930. Power is supplied to the on-board charger 910 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 910 via a wired connection. The on-board charger 910 is configured with a step-up DC-DC converter. The voltage of the power supplied to the on-board charger 910 is stepped up by the converter and then supplied to the storage battery 920. The stepped-up voltage is, for example, 600 V.

[0044] The drive system 930 drives the vehicle C1. The drive system 930 has an inverter 931 and a drive source 932. The semiconductor device A1 constitutes part of the inverter 931. The power stored in the storage battery 920 is supplied to the inverter 931. The power supplied from the storage battery 920 to the inverter 931 is DC power. In addition, unlike the power system shown in FIG. 20 , a step-up DC-DC converter may be further provided between the storage battery 920 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931 including the semiconductor device A1 is electrically connected to the drive source 932.

[0045] The drive source 932 includes an AC motor and a transmission. When AC power converted by the inverter 931 is supplied to the drive source 932, the AC motor rotates and the rotation is transmitted to the transmission. The transmission appropriately reduces the rotation speed transmitted from the AC motor and then rotates the drive shaft of the vehicle C1. This drives the vehicle C1. To drive the vehicle C1, it is necessary to freely control the rotation speed of the AC motor based on information such as the amount of fluctuation in the accelerator pedal. The semiconductor device A1 in the inverter 931 is required to output AC power whose frequency has been appropriately changed to correspond to the required rotation speed of the AC motor.

[0046] Next, a method for manufacturing the semiconductor device A1 will be described.

[0047] 9 to 20 show an example of a method for manufacturing the semiconductor device A1. As shown in Fig. 9, the method for manufacturing the semiconductor device A1 of this example includes the steps of preparing a support 1, placing a mask M, applying a bonding material 60 to the support 1, drying the bonding materials 60A and 60B, placing a first semiconductor element 5A, and sinter-bonding the first semiconductor element 5A to the support 1.

[0048] First, a support 1 is prepared as shown in Fig. 10. The support 1 has, for example, the structure described above.

[0049] Next, as shown in FIG. 11 , a mask M is placed on the z2 side of the support 1 in the thickness direction z. The mask M is a plate-shaped member made of, for example, metal, resin, or the like. A plurality of openings Mo are formed in the mask M. The plurality of openings Mo correspond to the positions, shapes, and sizes where the plurality of first bonding layers 6A and the plurality of second bonding layers 6B will be disposed. A portion of each of the third main surface metal layer 3A and the fourth main surface metal layer 3B is exposed from the plurality of openings Mo.

[0050] Next, as shown in FIGS. 12 and 13 , a squeegee S is used to apply a bonding material 60 to the support 1. FIG. 13 is a cross-sectional view including a portion of the third main surface metal layer 3A and a portion of the mask M. The bonding material 60 is, for example, a paste-like material and contains metal components for forming the sintered metal contained in the first bonding layer 6A and the second bonding layer 6B. In this example, the bonding material 60 is, for example, a paste containing Ag (silver). The squeegee S is a member for spreading the bonding material 60. For example, the bonding material 60 is spread along the y direction by the squeegee S. The squeegee S may be moved only once, or may be moved back and forth in the y direction as shown.

[0051] FIG. 14 illustrates a case where the bonding material 60 is applied by moving the squeegee S toward the y1 side only once, or a case where the squeegee S is moved back and forth in the y direction, with the final movement being toward the y1 side. As shown in the figure, when the squeegee S moves from the y2 side to the y1 side in the y direction, the bonding material 60 fills the opening Mo. This applies the bonding material 60 to the portion of the third main surface metal layer 3A (support 1) exposed through the opening Mo. At this time, as the squeegee S advances over the opening Mo toward the y1 side, the squeegee S advances with the squeegee S slightly inserted into the opening Mo in the thickness direction z. Therefore, the bonding material 60 applied to the third main surface metal layer 3A has a portion thinner in the thickness direction z than the thickness of the mask M. This portion is the flat portion 610. Then, when the squeegee S moves to the y1 side in the y direction and approaches the end of the opening Mo on the y1 side in the y direction, the end of the squeegee S on the z1 side in the thickness direction z is lifted up onto the upper surface of the mask M. This behavior causes the thickness of the bonding material 60 applied to the third main surface metal layer 3A in the thickness direction z to become partially thicker. The thickness of the applied bonding material 60 in the thickness direction z at the portion located closest to the y1 side in the y direction is approximately the same as the thickness of the mask M. This portion is the convex portion 620.

[0052] When application by the squeegee S is completed, as shown in Figures 15 and 16, the bonding material 60 is filled into the multiple openings Mo, and the bonding material 60 is applied to the third main surface metal layer 3A and the fourth main surface metal layer 3B (support body 1).

[0053] Next, when the mask M is removed from the support 1, a plurality of bonding materials 60A and a plurality of bonding materials 60B are applied to the third main surface metal layer 3A and the fourth main surface metal layer 3B, as shown in Figures 17 and 18. As shown in Figure 18, each of the plurality of bonding materials 60A and the plurality of bonding materials 60B has a flat portion 610 and a convex portion 620. The convex portion 620 has an apex 6201 that is farthest from the support 1 in the thickness direction z. If the viscosity of the bonding material 60 is relatively low, removing the mask M may cause the peripheral portions of the plurality of bonding materials 60A and the plurality of bonding materials 60B to slightly spread outward.

[0054] 19, the plurality of bonding materials 60A and the plurality of bonding materials 60B are dried by heating or the like. As a result, the plurality of bonding materials 60A and the plurality of bonding materials 60B become harder than they were immediately after application. For example, the protrusions 620 become hard enough not to deform when the first semiconductor element 5A or the second semiconductor element 5B is placed on them.

[0055] Next, as shown in FIG. 20 , a plurality of first semiconductor elements 5A are individually placed on a plurality of bonding materials 60A. At this time, the first semiconductor elements 5A are placed so that the first semiconductor elements 5A and at least a portion of the flat portion 610 overlap when viewed in the thickness direction z. Furthermore, the first semiconductor elements 5A are placed so that the first semiconductor elements 5A and the top portion 6201 are spaced apart when viewed in the thickness direction z. In the illustrated example, the first semiconductor elements 5A are placed so that the first semiconductor elements 5A and the protruding portion 620 are spaced apart. Similarly, a plurality of second semiconductor elements 5B are individually placed on a plurality of bonding materials 60B.

[0056] Next, a predetermined amount of heat and pressure is applied to the support 1, the plurality of bonding materials 60A, 60B, the plurality of first semiconductor elements 5A, and the plurality of second semiconductor elements 5B to perform sinter-bonding. As a result, the plurality of bonding materials 60A become a plurality of first bonding layers 6A, and the third main surface metal layer 3A (support 1) and the plurality of first semiconductor elements 5A are sinter-bonded via the plurality of first bonding layers 6A. Furthermore, the plurality of bonding materials 60B become a plurality of second bonding layers 6B, and the fourth main surface metal layer 3B (support 1) and the plurality of second semiconductor elements 5B are sinter-bonded via the plurality of second bonding layers 6B.

[0057] After this, the semiconductor device A1 is manufactured through processes such as fixing the positive input terminal 7A, the output terminal 7B, the negative input terminal 7C, the multiple control terminals 7D and the multiple control terminals 7E, connecting the multiple first wires 8A, the multiple second wires 8B, the multiple third wires 8C and the multiple fourth wires 8D, and forming the sealing resin 9.

[0058] Next, the operation of the semiconductor device A1 and the method for manufacturing the semiconductor device A1 will be described.

[0059] As shown in FIGS. 4 and 5 , when viewed in the z direction, the top 621 of the first bonding layer 6A is spaced from the first semiconductor element 5A toward the y1 side in the y direction. This reduces defects such as one side of the first semiconductor element 5A being separated from the flat portion 610 due to the first semiconductor element 5A overlapping the top 6201 during the process of placing the first semiconductor element 5A on the bonding material 60A shown in FIG. 20 . Therefore, the first semiconductor element 5A can be more appropriately bonded. Furthermore, if the first semiconductor element 5A is placed so that it overlaps the top 6201 during the process shown in FIG. 20 , there is a concern that the first semiconductor element 5A may crack due to pressure being applied to the first semiconductor element 5A. According to this embodiment, it is possible to reduce such cracking of the first semiconductor element 5A, which is preferable for thinning the first semiconductor element 5A.

[0060] In this example, all of the protruding portions 62 are separated from the first semiconductor element 5A. That is, when viewed in the z direction, the first semiconductor element 5A does not overlap with the protruding portions 62, but only with the flat portions 61. This allows the first semiconductor element 5A to be bonded more appropriately.

[0061] Furthermore, in the semiconductor device A1, a part of the flat portion 61 is located between the protrusion 62 and the first semiconductor element 5A. This makes it possible to more reliably prevent the first semiconductor element 5A from overlapping with the top portion 621.

[0062] The plurality of first semiconductor elements 5A are arranged in the y direction. The protrusions 62 are located on the y1 side of the first semiconductor elements 5A in the y direction. This prevents, for example, the protrusions 62 from interfering with the control terminals 7D or from causing an electrical short circuit.

[0063] 4, length L1 is greater than length L2, which more reliably prevents first semiconductor element 5A from overlapping top portion 621. Furthermore, lengths L2, L3, and L4 are smaller than length L1, which prevents the amount of first bonding layer 6A used from becoming unduly large.

[0064] The above-described effects are also achieved by the configurations of the first semiconductor element 5A and the second bonding layer 6B.

[0065] 21 to 24 show modified examples and other embodiments of the present invention. In these figures, elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals. Furthermore, the configurations of the various parts in each modified example and each embodiment can be combined with each other as appropriate within the scope of not causing technical contradictions.

[0066] 21 shows a first modification of the semiconductor device A1. Note that while this figure shows a portion where a first semiconductor element 5A is bonded to a third main surface metal layer 3A via a first bonding layer 6A, the illustrated configuration may also be applied to a portion where a second semiconductor element 5B is bonded to a fourth main surface metal layer 3B via a second bonding layer 6B, and the same applies to subsequent modifications.

[0067] In the semiconductor device A11 of this modification, when viewed in the thickness direction z, a portion of the convex portion 62 other than the top 621 overlaps with the first semiconductor element 5A. More specifically, the first semiconductor element 5A contacts a portion of the convex portion 62 located on the y2 side in the y direction from the top 621. In this modification, the flat portion 61 does not have a portion located between the first semiconductor element 5A and the convex portion 62 in the y direction.

[0068] This modification also allows the first semiconductor element 5A to be more appropriately bonded. Furthermore, as can be seen from this modification, if the first semiconductor element 5A is configured not to overlap the top portion 621, it is possible to reduce the possibility of the first semiconductor element 5A overlapping the top portion 621 and thereby causing a poor bonding state with the first bonding layer 6A.

[0069] Second Modification of First Embodiment: Figure 22 shows a second modification of the semiconductor device A1. In a semiconductor device A12 of this modification, the thickness of the flat portion 61 in the thickness direction z is not constant. In this modification, the thickness t11 of the flat portion 61 on the y1 side in the y direction is thicker than the thickness t12 of the flat portion 61 on the y2 side in the y direction. A flat portion 61 having such a shape can be formed, for example, by the method of applying the bonding material 60 using the mask M and squeegee S described with reference to Figures 12 to 16.

[0070] This modification also allows the first semiconductor element 5A to be bonded more appropriately. As can be seen from this modification, the specific shape of the first bonding layer 6A is not limited in any way.

[0071] 23 shows a third modification of the semiconductor device A1. In this modification, the first semiconductor element 5A has a shape whose size in the x direction is larger than its size in the y direction. The protrusion 62 is disposed on the y1 side of the first semiconductor element 5A in the y direction.

[0072] This modification also allows the first semiconductor element 5A to be more appropriately bonded. Furthermore, according to this modification, the protrusion 62 is not disposed on the x1 or x2 side of the first semiconductor element 5A in the x direction. As shown in FIG. 1 , other components may be disposed on the x1 or x2 side of the first semiconductor elements 5A in the x direction. In the illustrated example, the control terminals 7D are disposed on the x1 side of the first semiconductor elements 5A in the x direction. In this modification, the protrusion 62 is disposed on the y1 side of the first semiconductor elements 5A in the y direction, thereby reducing interference between the protrusion 62 and the control terminals 7D and reducing the occurrence of electrical short circuits.

[0073] 24 shows a semiconductor device according to a second embodiment of the present disclosure. In the semiconductor device A2 of this embodiment, the protrusion 62 is disposed on the x2 side of the first semiconductor element 5A in the x direction. That is, in this embodiment, the y direction corresponds to the first direction of the present disclosure, and the x direction corresponds to the second direction of the present disclosure.

[0074] This embodiment also allows the first semiconductor elements 5A to be bonded more appropriately. Furthermore, in this embodiment, the protrusions 62 are arranged on the x2 side of the first semiconductor elements 5A in the x direction. Therefore, in the y direction in which the multiple first semiconductor elements 5A are arranged, no protrusions 62 are present between adjacent first semiconductor elements 5A. This is therefore advantageous for reducing the arrangement pitch of the multiple first semiconductor elements 5A.

[0075] The semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure are not limited to the above-described embodiment. The specific configurations of the semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure can be freely modified in various ways.

[0076] Supplementary Note 1. A semiconductor device comprising: a support (1); a first semiconductor element (5A) supported by the support (1); and a first bonding layer (6A) interposed between the support (1) and the first semiconductor element (5A), wherein the first bonding layer (6A) has a flat portion (61) and a convex portion (62), the convex portion (62) has a dimension in a thickness direction (z) of the support (1) larger than that of the flat portion (61) and is in contact with an edge of the first bonding layer (6A) extending in a first direction perpendicular to the thickness direction (z), the convex portion (62) has an apex (621) farthest from the support (1) in the thickness direction (z), and the flat portion (61) overlaps with the first semiconductor element (5A) as viewed in the thickness direction (z), The semiconductor device (A1), wherein, as viewed in the thickness direction (z), the top portion (621) is spaced away from the first semiconductor element (5A) to a first side in a second direction perpendicular to the thickness direction (z) and the first direction. Appendix 2. The semiconductor device (A1) according to Appendix 1, wherein, as viewed in the thickness direction (z), the convex portion (62) is spaced away from the first semiconductor element (5A) to the first side in the second direction. Appendix 3. The semiconductor device (A1) according to Appendix 2, wherein, as viewed in the thickness direction (z), the flat portion (61) has a portion located between the first semiconductor element (5A) and the convex portion (62) in the second direction. Appendix 4. The semiconductor device (A1) according to any one of Supplementary Notes 1 to 3, wherein the length by which the first bonding layer (6A) extends from the first semiconductor element (5A) to the first side in the second direction is greater than the length by which the first bonding layer (6A) extends from the first semiconductor element (5A) to a second side opposite the first side in the second direction. Supplementary Note 5: The semiconductor device (A1) according to Supplementary Note 4, wherein the length by which the first bonding layer (6A) extends from the first semiconductor element (5A) to the first side in the second direction is greater than the length by which the first bonding layer (6A) extends from the first semiconductor element (5A) in the first direction. Supplementary Note 6: The semiconductor device (A1) according to any one of Supplementary Notes 1 to 5, wherein the first bonding layer (6A) includes a sintered metal. Supplementary Note 7: The semiconductor device (A1) according to any one of Supplementary Notes 1 to 6, wherein the flat portion (61) contacts an edge of the first bonding layer (6A) on the second side in the second direction.Appendix 8. The semiconductor device (A1) according to Appendix 7, wherein the flat portion (61) contacts both edges of the first bonding layer (6A) in the first direction. Appendix 9. The semiconductor device (A1) according to any one of Appendixes 1 to 8, comprising a plurality of the first semiconductor elements (5A), the plurality of first semiconductor elements (5A) being arranged in the second direction. Appendix 10. The semiconductor device (A1) according to Appendix 9, wherein the size of the first semiconductor element (5A) in the first direction is larger than the size in the second direction. Appendix 11. The semiconductor device (A1) according to any one of Appendixes 1 to 8, comprising a plurality of the first semiconductor elements (5A), the plurality of first semiconductor elements (5A) being arranged in the first direction. Appendix 12. The semiconductor device (A1) according to any one of Appendixes 1 to 11, wherein the thickness of the flat portion (61) in the thickness direction (z) is larger on the first side than on the second side in the second direction. Appendix 13. A vehicle (C1) comprising: a drive source (932); and a semiconductor device (A1) according to any one of Supplements 1 to 12, wherein the semiconductor device (A1) is electrically connected to the drive source (932). Supplementary Note 14. the step of applying a bonding material (60) to the support (1) by filling the openings (Mo) with the bonding material (60) using a squeegee (S); the step of applying a first semiconductor element (5A) to the bonding material (60); and the step of sinter-bonding the support (1) and the first semiconductor element (5A) via the bonding material (60), wherein the bonding material (60A) applied to the support (1) in the step of applying the bonding material (60) has a flat portion (610) and a convex portion (620) protruding from the flat portion (610) in a thickness direction (z), In the step of placing the first semiconductor element (5A), the first semiconductor element (5A) and at least a portion of the flat portion (610) are overlapped when viewed in the thickness direction (z), and the first semiconductor element (5A) and the top (621) of the convex portion (620) are spaced apart.Appendix 15. The method for manufacturing the semiconductor device (A1) according to Appendix 14, further comprising, after the step of applying the bonding material (60) and before the step of sinter-bonding, a step of drying the bonding material (60) applied to the support body (1). Appendix 16. the support (1) has a third main surface metal layer (3A) and a fourth main surface metal layer (3B) that are spaced apart from each other, the first semiconductor element (5A) is mounted on the third main surface metal layer (3A), a second semiconductor element (5B) supported by the fourth main surface metal layer (3B), and a second bonding layer (6B) interposed between the fourth main surface metal layer (3B) and the second semiconductor element (5B), the second bonding layer (6B) having a flat portion (61) and a convex portion (62), the convex portion (62) of the second bonding layer (6B) having a dimension in the thickness direction (z) larger than the flat portion (61) of the second bonding layer (6B) and being in contact with an edge of the second bonding layer (6B) extending in the first direction, The semiconductor device according to any one of Supplementary Notes 1 to 10, wherein the convex portion (62) of the second bonding layer (6B) has a top (621) farthest from the fourth main surface metal layer (3B) in the thickness direction (z), the flat portion (61) of the second bonding layer (6B) overlaps the second semiconductor element (5B) as viewed in the thickness direction (z), and the top (621) of the convex portion (62) of the second bonding layer (6B) is spaced apart from the second semiconductor element (5B) to a first side in the second direction as viewed in the thickness direction (z).Supplementary Note 17. The semiconductor device (A1) according to Supplementary Note 16, wherein the convex portion (62) of the second bonding layer (6B) is spaced apart from the second semiconductor element (5B) to the first side in the second direction as viewed in the thickness direction (z).Supplementary Note 18. The semiconductor device (A1) described in Appendix 17, wherein, when viewed in the thickness direction (z), the flat portion (61) of the second bonding layer (6B) has a portion that is located between the second semiconductor element (5B) and the convex portion (62) of the second bonding layer (6B) in the second direction.Appendix 19. The semiconductor device (A1) according to any one of Appendixes 16 to 18, wherein the length by which the second bonding layer (6B) extends from the second semiconductor element (5B) to the first side in the second direction is greater than the length by which the second bonding layer (6B) extends from the second semiconductor element (5B) to a second side opposite to the first side in the second direction. Appendix 20. The semiconductor device (A1) according to Appendix 19, wherein the length by which the second bonding layer (6B) extends from the second semiconductor element (5B) to the first side in the second direction is greater than the length by which the second bonding layer (6B) extends from the second semiconductor element (5B) in the first direction. Appendix 21. The semiconductor device (A1) according to any one of Appendixes 16 to 20, wherein the second bonding layer (6B) includes a sintered metal. Appendix 22. The semiconductor device (A1) according to any one of Supplementary Notes 16 to 21, wherein the flat portion (61) of the second bonding layer (6B) contacts an edge on the second side in the second direction of the second bonding layer (6B). Supplementary Note 23. The semiconductor device (A1) according to Supplementary Note 22, wherein the flat portion (61) of the second bonding layer (6B) contacts both end edges of the second bonding layer (6B) in the first direction. Supplementary Note 24. The semiconductor device according to any one of Supplementary Notes 16 to 23, wherein the first semiconductor element (5A) and the second semiconductor element (5B) are switching elements. Supplementary Note 25. The semiconductor device (A1) according to Supplementary Note 24, comprising a plurality of the first semiconductor elements (5A) and a plurality of the second semiconductor elements (5B). Supplementary Note 26. The semiconductor device (A1) according to Appendix 25, wherein the plurality of first semiconductor elements (5A) constitute an upper arm circuit, and the plurality of second semiconductor elements (5B) constitute a lower arm circuit, thereby forming a half-bridge circuit.

[0077] A1 to A13, A2: semiconductor device 1: support 2A: first main surface metal layer 2B: second main surface metal layer 3A: third main surface metal layer 3B: fourth main surface metal layer 4A: bonding layer 4B: bonding layer 5A: first semiconductor element 5B: second semiconductor element 6A: first bonding layer 6B: second bonding layer 7A: positive electrode input terminal 7B: output terminal 7C: negative electrode input terminal 7D: control terminal 7E: control terminal 8A: first wire 8B: second wire 8C: third wire 8D: fourth wire 9: sealing resin 10: insulating layer 11: back surface metal layer 50: element body 51: drain electrode 52: source electrode 53: gate electrode 54: source sense electrode 60: bonding material 60A: bonding material 60B: bonding material 61: flat portion 62: convex portion 610: Flat portion 620: Convex portion 621: Top 910: On-board charger 920: Storage battery 930: Drive system 931: Inverter 932: Drive source 6201: Top C1: Vehicle M: ​​Mask Mo: Opening S: Squeegee t1: Thickness t11: Thickness t12: Thickness t2: Thickness z: Thickness direction

Claims

1. A semiconductor device comprising: a support; a first semiconductor element supported by the support; and a first bonding layer interposed between the support and the first semiconductor element, wherein the first bonding layer has a flat portion and a convex portion, the convex portion has a larger dimension in a thickness direction of the support than the flat portion and is in contact with an edge of the first bonding layer extending in a first direction perpendicular to the thickness direction, the convex portion has an apex that is farthest from the support in the thickness direction, when viewed in the thickness direction, the flat portion overlaps the first semiconductor element, and when viewed in the thickness direction, the apex is distant from the first semiconductor element to a first side in a second direction perpendicular to the thickness direction and the first direction.

2. The semiconductor device according to claim 1, wherein, when viewed in the thickness direction, the protruding portion is spaced away from the first semiconductor element toward the first side in the second direction.

3. The semiconductor device according to claim 2, wherein, when viewed in the thickness direction, the flat portion has a portion that is located between the first semiconductor element and the protruding portion in the second direction.

4. A semiconductor device as described in any one of claims 1 to 3, wherein the length by which the first bonding layer extends from the first semiconductor element to the first side in the second direction is greater than the length by which the first bonding layer extends from the first semiconductor element to a second side opposite the first side in the second direction.

5. The semiconductor device described in claim 4, wherein the length by which the first bonding layer extends from the first semiconductor element to the first side in the second direction is greater than the length by which the first bonding layer extends from the first semiconductor element in the first direction.

6. The semiconductor device according to claim 1, wherein the first bonding layer includes a sintered metal.

7. The semiconductor device according to claim 1, wherein the flat portion contacts an edge of the first bonding layer on the second side in the second direction.

8. The semiconductor device according to claim 7, wherein the flat portion contacts both edge portions of the first bonding layer in the first direction.

9. The semiconductor device according to claim 1, further comprising a plurality of the first semiconductor elements, the plurality of first semiconductor elements being arranged in the second direction.

10. The semiconductor device according to claim 9, wherein the first semiconductor element is larger in size in the first direction than in the second direction.

11. The semiconductor device according to claim 1, further comprising a plurality of the first semiconductor elements, the plurality of first semiconductor elements being arranged in the first direction.

12. The semiconductor device according to claim 1, wherein the thickness of said flat portion in said thickness direction is greater on said first side than on said second side in said second direction.

13. A vehicle comprising: a driving source; and a semiconductor device according to any one of claims 1 to 12, wherein the semiconductor device is electrically connected to the driving source.

14. A method for manufacturing a semiconductor device, comprising: preparing a support; placing a mask having openings on the support; applying a bonding material to the support by filling the openings with a squeegee with the bonding material; placing a first semiconductor element on the bonding material; and sinter-bonding the support and the first semiconductor element via the bonding material, wherein the bonding material applied to the support in the step of applying the bonding material has a flat portion and a convex portion protruding from the flat portion in the thickness direction, and in the step of placing the first semiconductor element, when viewed in the thickness direction, the first semiconductor element and at least a portion of the flat portion overlap each other and the first semiconductor element is spaced apart.

15. The method for manufacturing a semiconductor device according to claim 14, further comprising the step of drying the bonding material applied to the support body after the step of applying the bonding material and before the step of sinter-bonding.

Images