Semiconductor light receiving element and method for manufacturing semiconductor light receiving element

Abstract

The present invention provides: a semiconductor light receiving element which has a high breakdown voltage, while achieving adequate capacitance and dark current values at the same time; and a method for manufacturing a semiconductor light receiving element. A semiconductor light receiving element according to the present invention has an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorption layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorption layer, and a p-type impurity diffusion region that reaches the upper part of the n-type InGaAs light absorption layer is formed in the InP window layer. This semiconductor light receiving element is characterized in that the n-type InGaAs light absorption layer has an average n-type impurity concentration of 2.5 × 1014 / cm3 to 1.0 × 1015 / cm3 inclusive.

Description

Semiconductor light receiving element and method for manufacturing the same

[0001] The present invention relates to a semiconductor light-receiving element and a method for manufacturing the same, and more particularly to a semiconductor light-receiving element that detects light in the infrared region and a method for manufacturing the same.

[0002] Semiconductor light receiving elements are widely used, and photodiodes for optical fibers and infrared sensors are typical examples of semiconductor light receiving elements that detect light wavelengths in the infrared region.

[0003] For example, Patent Document 1 discloses a semiconductor photodetector having an n-type InP substrate, an n-type InP buffered layer stacked on the n-type InP substrate, an n-type InGaAs light absorption layer stacked on the n-type InP buffered layer, an n-type InP window layer stacked on the n-type InGaAs light absorption layer, and a p-type impurity region formed by ion-implanting p-type impurities through the n-type InP window layer and forming a p-n junction with the n-type InGaAs light absorption layer.

[0004] Japanese Patent Application Publication No. 5-206497

[0005] In recent years, there has been a demand for smaller chip sizes for semiconductor photodetectors. As chip sizes become smaller, it becomes more difficult to reduce both capacitance and dark current. Therefore, there has been a demand for semiconductor photodetectors that are small and yet have both high capacitance and dark current values. Furthermore, in order to improve the characteristics of photodetectors, there is a strong demand for a large reverse voltage (breakdown voltage) at the inflection point in the Vr-Ir curve.

[0006] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a semiconductor light-receiving element that has a large breakdown voltage while achieving both low capacitance and low dark current, and a method for manufacturing the semiconductor light-receiving element.

[0007] In order to achieve the above object, the present inventors have focused on the impurity concentration of the light absorption layer in the semiconductor light receiving element, and have completed the present invention. １５ / cm ３ On the n-InP buffer layer having a carrier density of 1 to 5×10１５ / cm ３ The activation rate of the impurities is not 100%, and is at most about 90 to 95%, so the n-type impurity concentration contained in the light absorption layer described in Patent Document 1 is at least 1×10 １５ / cm ３ The present inventors have discovered that by doping an InGaAs light absorption layer with Si as an n-type impurity at a lower impurity concentration than conventional methods, a semiconductor light-receiving element can be fabricated that exhibits a large breakdown voltage while simultaneously achieving both low capacitance and low dark current. They have also discovered that the same is true for n-type impurities other than Si, such as Ge. The gist of the present invention is as follows:

[0008] (1) A semiconductor photodetector having an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorption layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorption layer, wherein a p-type impurity diffusion region is formed in the InP window layer and reaches an upper portion of the n-type InGaAs light absorption layer, the n-type InGaAs light absorption layer has an average n-type impurity concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ A semiconductor light-receiving element characterized by the following:

[0009] (2) The average n-type impurity concentration is 3.0×10 １４ / cm ３ 9.5 x 10 １４ / cm ３ The semiconductor light-receiving element according to (1) above, wherein:

[0010] (3) The semiconductor light-receiving element according to (1) or (2) above, wherein the p-type impurity contained in the p-type impurity diffusion region is Zn.

[0011] (4) The semiconductor light-receiving element according to any one of (1) to (3) above, wherein the n-type InGaAs light-absorbing layer is a stack of layers having different n-type impurity concentrations.

[0012] (5) The semiconductor light-receiving element according to any one of (1) to (4) above, wherein the n-type InGaAs light-absorbing layer has a thickness of 2.2 μm or more and 3.5 μm or less.

[0013] (6) The semiconductor light-receiving element according to any one of (1) to (5) above, wherein the n-type impurity is Si or Ge.

[0014] (7) A method for manufacturing a semiconductor light-receiving element, comprising: a buffer layer forming step of forming a buffer layer on an n-type InP substrate; a light absorption layer forming step of forming an n-type InGaAs light absorption layer on the buffer layer; a window layer forming step of forming an n-type InP window layer on the n-type InGaAs light absorption layer; and a diffusion region forming step of forming a p-type impurity diffusion region in the InP window layer, the p-type impurity diffusion region reaching an upper portion of the n-type InGaAs light absorption layer, wherein the n-type InGaAs light absorption layer formed in the light absorption layer forming step has an average n-type impurity concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ A method for manufacturing a semiconductor light-receiving element, comprising:

[0015] (8) The method for manufacturing a semiconductor light-receiving element according to (6), wherein the diffusion region forming step comprises forming the InP window layer in the window layer forming step, and then diffusing p-type impurities from the surface side of the InP window layer in an MOCVD furnace.

[0016] (9) The method for manufacturing a semiconductor light-receiving element according to (6) or (7), wherein the light-absorbing layer forming step includes a step of forming a first doped layer having an n-type impurity concentration higher than the average n-type impurity concentration, and a step of forming a second doped layer having an n-type impurity concentration lower than the average n-type impurity concentration.

[0017] (10) The method for producing a semiconductor light-receiving element according to any one of (7) to (9) above, wherein the n-type impurity is Si or Ge.

[0018] According to the present invention, a semiconductor light-receiving element having a large breakdown voltage while achieving both low capacitance and low dark current values, and a method for manufacturing the semiconductor light-receiving element are provided.

[0019] FIG. 1 is a schematic cross-sectional view of a semiconductor light-receiving element according to a first embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of a semiconductor light-receiving element according to a specific aspect of the present invention. FIG. 3 is a schematic cross-sectional view of a semiconductor light-receiving element for explaining a first embodiment of a manufacturing method according to the present invention. FIG. 4 is a schematic cross-sectional view of a semiconductor light-receiving element according to a second embodiment of the present invention. FIG. 5 is a graph showing the results of measuring the Si concentration profiles of the InGaAs light absorption layers in Examples 1 and 2 by SIMS (secondary ion mass spectrometry). FIG. 6 is a graph showing the results of measuring the Ge concentration profiles of the InGaAs light absorption layers in Examples 5 to 7 by SIMS (secondary ion mass spectrometry).

[0020] Prior to describing the embodiments of the present invention, the following points will be explained in advance.

[0021] <Semiconductor Composition> First, in this specification, when the term "InGaAs" is used without specifying the element composition ratio, it means that the composition ratio of the sum of the group III elements In (indium) and Ga (gallium) to the group V element As (arsenic) is 1:1, and the ratio of the group III elements In to Ga is any compound. ｘ Ga （１－ｘ） When expressed in terms of As, preferably, 0<x<1. However, "InGaAs" may contain up to 5% (molar concentration, the same applies hereinafter) of Al relative to the total of In and Ga, or up to 5% of P (phosphorus) and Sb (antimony) relative to As. Furthermore, even when simply written as "InP", it may contain up to 5% of group III and group V elements other than In and P. The composition ratios of group III and group V elements can be measured by photoluminescence measurement, X-ray diffraction measurement, etc.

[0022] <Conductivity Type> In this specification, a layer that functions electrically as a p-type is referred to as a p-type semiconductor layer (sometimes abbreviated as a "p-type layer"), and a layer that functions electrically as an n-type is referred to as an n-type semiconductor layer (sometimes abbreviated as an "n-type layer"). An n-type impurity is an impurity that functions electrically as an n-type in InGaAs by intentional addition. The n-type impurity is at least one selected from Si, Ge, Sn, Pb, S, Se, and Te, with Si or Ge being preferred. Typically, one element is selected as the n-type impurity, but multiple elements may be selected. On the other hand, when a specific impurity such as Si, Ge, Zn, S, Sn, or Mg is not intentionally added, the layer is referred to as "i-type" or "undoped." Undoped III-V compound semiconductor layers may contain unavoidable impurities introduced during the manufacturing process. Specifically, in this specification, a material is considered to be "undoped" when the dopant concentrations of both p-type and n-type impurities are low and the dopant concentrations of these impurities are close to the lower limit of detection by SIMS. In the case of Si concentration, the lower limit of detection by SIMS analysis, which will be described later, is 2 × 10 １４ / cm ３ Therefore, the average Si concentration in the layer is 2.5 × 10 １４ / cm ３ In the case of Ge concentration, the lower detection limit of SIMS analysis described later is 1 × 10 １４ / cm ３ Therefore, the average Ge concentration in the layer is 1.5×10 １４ / cm ３ If the concentration is less than 100%, the material is considered to be “undoped.” The values ​​of the impurity concentrations of Si, Ge, Sn, S, Te, Mg, Zn, etc. are determined by SIMS analysis.

[0023] <Thickness of Semiconductor Layer> The thickness of each semiconductor layer provided in the semiconductor light-receiving element can be calculated from cross-sectional observation of the grown layer using a scanning electron microscope and a transmission electron microscope.

[0024] <Carrier Density> To determine the carrier density, the carrier density of each layer is determined using an etching CV (ECV) measurement device. For example, an ECV-Pro manufactured by Nanometrics can be used as the ECV measurement device. The contact layer and window layer were sequentially removed by wet etching to expose the surfaces of each layer. CV measurements were then performed by applying a voltage using an electrolyte specified by the ECV measurement device manufacturer. The carrier density was calculated from the CV measurement results.

[0025] The light absorbing layer of the present invention before Zn diffusion has low Si and Ge concentrations, and the carrier density is below the lower limit of measurement (1×10 １５ / cm ３ Since the carrier density of the light absorption layer was less than 1000 nm, it was not possible to determine the carrier density of the light absorption layer.

[0026] <Impurity Concentration> The impurity concentration is determined by depth-direction SIMS analysis. In this invention, to accurately measure the concentration of small impurities, background (components other than the sample) from the SIMS measurement data is eliminated as much as possible. Specifically, measurements are performed after removing as much n-type impurities, such as Si and Ge, remaining in the SIMS measurement chamber as possible. Furthermore, to perform depth-direction SIMS measurements, it is desirable to first remove the n-InP window layer and InGaAs contact layer, which are layers above the InGaAs light absorption layer, by etching. Here, the average Si concentration refers to the average value of the Si concentration in the range excluding irregular values ​​near the outermost surface or near the interface with other layers, where SIMS analysis begins. For example, the area from the outermost surface to a depth of 0.1 μm and the area from the interface with other layers to a depth of 0.1 μm are excluded from the calculation of the average Si concentration. The average Ge concentration refers to the average value of the Ge concentration in the range excluding irregular values ​​near the outermost surface or near the interface with other layers, where SIMS analysis begins. For example, the area up to 0.1 μm from the outermost surface and the area up to 0.1 μm from the interface with other layers are excluded from the calculation of the average Ge concentration. When only one n-type impurity is selected, the average n-type impurity concentration is the average concentration of that element in the range excluding the irregular values ​​near the interface with other layers as described above. When multiple n-type impurities are intentionally added, the average n-type impurity concentration can be calculated by calculating the average concentration of the sum of the concentrations of those elements at each position.

[0027] Since the diffusion of p-type impurities results in a co-doped state of p-type and n-type impurities, SIMS measurements may be performed either inside or outside the p-type impurity diffusion region. In the present invention, the entire InGaAs light absorption layer, into which n-type impurities are intentionally added, including the p-type impurity diffused portion, is referred to as the n-type InGaAs light absorption layer.

[0028] <P-Type Impurity Concentration in P-Type Impurity Diffusion Region> The p-type impurity concentration in the p-type impurity diffusion region will be described below using an example in which the p-type impurity is Zn. The Zn concentration in the Zn diffusion region is determined by SIMS in the depth direction relative to the center of the Zn diffusion region, and the average Zn concentration in each layer is determined based on the Zn concentration profile in the depth direction in each layer. When Zn is used as the p-type impurity, SIMS analysis results in different Zn detection rates (ionization rates) between InP and InGaAs base materials. Therefore, to correct the absolute value of the element concentration for Zn, the Zn concentration in the InP layer is corrected using the analysis results for InP with a known Zn concentration, and the Zn concentration in the InGaAs layer is corrected using the analysis results for InGaAs with a known Zn concentration.

[0029] First Embodiment A semiconductor photodetector according to a first embodiment of the present invention will be described with reference to Figure 1. The semiconductor photodetector 100 according to the first embodiment of the present invention has at least an n-type InP substrate 110, a buffer layer 120 on the n-type InP substrate 110, an n-type InGaAs light absorption layer 130 on the buffer layer 120, and an InP window layer 140 on the n-type InGaAs light absorption layer 130. A p-type impurity diffusion region 150 is formed in the InP window layer 140, reaching the top of the n-type InGaAs light absorption layer 130. The n-type InGaAs light absorption layer 130 in the semiconductor photodetector 100 has an average Si concentration of 2.5 x 10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ The details of each component will be explained below.

[0030] <n-Type InP Substrate> A commonly available n-type InP substrate 110 can be used. Typical examples of n-type impurities in the n-type InP substrate 110 are S (sulfur) and Sn (tin). The carrier density of the n-type InP substrate 110 is not particularly limited, and may be, for example, 1.0×10 １８ / cm ３ Above 9.0 x 10 １８ / cm ３There are no particular limitations on the thickness, diameter and surface orientation of the substrate.

[0031] <Buffer Layer> A buffer layer 120 is provided on the n-type InP substrate 110. The buffer layer 120 may be any layer that reduces the diffusion of n-type impurities in the n-type InP substrate 110 and that provides lattice matching between the n-type InP substrate 110 and the n-type InGaAs light absorption layer 130. For example, the buffer layer 120 may be an InP layer, an InGaAs layer, or an InGaAsP layer, or may be a stacked layer having a superlattice structure or a compositionally graded layer that combines these layers. The Si concentration in the buffer layer 120 is preferably the same as or lower than that of the n-type InGaAs light absorption layer 130 described below. For example, to effectively reduce the diffusion of n-type impurities from the n-type InP substrate 110 to the n-type InGaAs light absorption layer 130, the average Si concentration determined by SIMS analysis should be 5×10 １４ / cm ３ The thickness of the buffer layer 120 is preferably 0.3 μm or more and 1.0 μm or less, and more preferably undoped.

[0032] <n-Type InGaAs Light Absorption Layer> An n-type InGaAs light absorption layer 130 is provided on the buffer layer 120. The n-type InGaAs light absorption layer 130 has an average Si concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ The following is the result.

[0033] -Si Concentration- As described above, the average Si concentration of the n-type InGaAs light absorption layer 130 is 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ is less than or equal to 3.0 × 10 １４ / cm ３ 9.5 x 10 １４ / cm ３By setting the average Si concentration higher than that in the undoped case and lower than that of the conventional case, it is possible to realize a semiconductor light-receiving element with a large breakdown voltage while achieving both high capacitance and dark current values. １４ / cm ３ If it is lower, the dark current value will be 0.05 nA or more, and 1.0 × 10 １５ / cm ３ If it is higher, the capacitance value will be 4 pF or more, and the breakdown voltage will be 10 V or less, which is not preferable.

[0034] The inclusion of Si in the InGaAs light absorption layer 130 compensates for defects contained in the InGaAs light absorption layer 130 and prevents Zn diffusion (substitutional diffusion) into unexpected defects from progressing deeper than the p-n junction interface during Zn diffusion. Therefore, minority carriers present near the junction diffuse in the direction opposite to the bias, which is thought to reduce the diffusion current passing through the p-n junction. By setting the Si content at the p-n junction interface and at a position deeper than the interface within the above ranges, the Si content in the InGaAs light absorption layer 130 becomes appropriate, and it is thought that the relationship between the capacitance, dark current, and breakdown voltage values ​​can be set within preferred ranges.

[0035] —Composition Ratio— Here, the composition ratio of the n-type InGaAs light absorption layer 130 is In ｘ１ Ga （１－ｘ１） In this case, the In composition ratio x is expressed as x As as long as epitaxial growth is possible on the n-type InP substrate 110. １ Although there is no particular limitation, 0.5218≦x １ ≦0.5447, and 0.5275≦x １It is more preferable to set the lattice constant to ≦0.5389. This is because the lattice constant of the InP substrate and the lattice constant of the InGaAs layer can be nearly matched, reducing stress near the film interface and making defects such as slip or crosshatch less likely to occur in the InGaAs layer. The n-type impurity in the n-type InGaAs light absorption layer 130 may be, for example, Si. Alternatively, the lattice mismatch of the InGaAs layer with respect to the InP substrate may be used instead of the composition ratio of the n-type InGaAs light absorption layer 130. The lattice mismatch can be obtained from a graph of 2θ on the horizontal axis and diffracted X-ray intensity on the vertical axis by measuring a 2θ-ω scan (diffractometer curve) using X-rays on the (400) plane of the InP substrate 110 and the InGaAs light absorption layer 130 thereon. The diffraction peak position 2θ of the InP substrate InP and the diffraction peak position 2θ of the InGaAs layer InGaAs From the Bragg diffraction equation, the lattice constants a InP , a InGaAs Calculate the lattice constant difference Δa = a InP -a InGaAs Then, Δa / a InP More simply, in the measurement results of 2θ-ω scan, the diffraction angle difference Δ2θ=2θ between the diffraction peak position of the InP substrate and the diffraction peak position of InGaAs is calculated. InP -2θ InGaAs The lattice mismatch can be evaluated using the above equation. Δ2θ is preferably ±200 arcsec or less, and more preferably ±100 arcsec or less. The smaller the lattice mismatch, the less likely defects such as slip or crosshatch will occur in the InGaAs layer on the InP substrate. Furthermore, the warping of the epitaxial substrate is reduced, making it easier to handle during subsequent processing, and also suppressing cracking of the epitaxial substrate after deposition of a film such as a SiN film.

[0036] - Thickness - The thickness of the n-type InGaAs light absorption layer 130 refers to the thickness without taking into account the diffusion of p-type impurities, and is the thickness of the n-type InGaAs light absorption layer 130 before the p-type impurity diffusion. The thickness of the n-type InGaAs light absorption layer 130 is preferably 2.2 μm or more, more preferably 2.7 μm or more. On the other hand, to ensure the ESD resistance of the semiconductor light receiving element 100, the thickness of the n-type InGaAs light absorption layer 130 is preferably 3.5 μm or less, more preferably 3.45 μm or less. If the n-type InGaAs light absorption layer 130 is too thin, the light receiving sensitivity may decrease. Furthermore, if the thickness is too thick, slip or crosshatching may occur easily in the n-type InGaAs light absorption layer 130 and the InP window layer 140 thereon.

[0037] <InP Window Layer> An InP window layer 140 is provided on the n-type InGaAs light absorption layer 130. The InP window layer 140 may be undoped, but is preferably doped with n-type impurities such as Si, and the average Si concentration determined by SIMS analysis is 6.0×10 １５ / cm ３ 1.2 x 10 １６ / cm ３ It is preferable that the carrier density due to the n-type impurity is 5.0×10 or less. １５ / cm ３ 1.1 x 10 １６ / cm ３ It is also preferable to set the thickness of the InP window layer 140 to the following value. Note that the carrier density due to the n-type impurity in the InP window layer 140 here refers to the carrier density before the Zn diffusion step. There are no particular restrictions on the thickness of the InP window layer 140, but it can be set to, for example, 0.5 μm to 2 μm. Note that the InP window layer 140 is preferably InP, but may contain a few percent of other group III or V elements mixed in with InP as long as it has a band gap sufficient to transmit light of a wavelength absorbed by the n-type InGaAs light absorption layer 130.

[0038] <P-Type Impurity Diffusion Region> A p-type impurity diffusion region 150 is provided in the InP window layer 140 of the semiconductor light-receiving element 100. The p-type impurity diffusion region 150 reaches the upper part of the n-type InGaAs light absorption layer 130. More specifically, as shown in FIG. 1 , the p-type impurity diffusion region 150 is provided in a part of the in-plane direction of the InP window layer 140, from the outermost surface of the InP window layer 140 to the surface portion of the n-type InGaAs light absorption layer 130. For convenience, the portion of the p-type impurity diffusion region 150 formed in the InP window layer 140 will be referred to as an intra-window layer diffusion region 152, and the portion formed in the n-type InGaAs light absorption layer 130 will be referred to as an intra-light absorption layer diffusion region 151.

[0039] Here, the p-type impurity diffusion region 150 "reaches" the upper portion of the n-type InGaAs light absorption layer 130 means that the p-type impurity of the p-type impurity diffusion region 150 has diffused at least from the interface between the InP window layer 140 and the n-type InGaAs light absorption layer 130 toward the n-type InP substrate 110 to a position deeper than 0.30 μm in the n-type InGaAs light absorption layer 130. １８ / cm ３ If the above conditions are met, it is assumed that p-type impurities have diffused. The n-type InGaAs light absorption layer 130 is doped with n-type impurities, and the InP window layer 140 is also doped with n-type impurities. Therefore, the light absorption layer diffusion region 151 and the window layer diffusion region 152 of the p-type impurity diffusion region 150 are co-doped with p-type impurities and n-type impurities. The p-type impurity in the p-type impurity diffusion region 150 is preferably Zn.

[0040] The size of the p-type impurity diffusion region 150 in the in-plane direction is not particularly limited, but when it is formed in a circular shape when viewed from above, it can be, for example, 10 μmφ or more and 450 μmφ or less. The shape of the p-type impurity diffusion region 150 is not limited to a circle, and it may be a polygonal shape such as a triangle, a square, or a pentagon. The smaller the area of ​​the p-type impurity diffusion region 150, the easier it is to obtain the effects of the present invention. For this reason, the area of ​​the p-type impurity diffusion region 150 is set to 159050 μm ２ Preferably, 129600 μm or less ２ More preferably, 62,500 μm or less２ The lower limit of the area is more preferably 100 μm in terms of practical use and mass production. ２ The above is preferable.

[0041] The semiconductor photodetector 100 described above has an optimized thickness of the n-type InGaAs light absorption layer 130 and an optimized carrier density due to n-type impurities in the n-type InGaAs light absorption layer 130, and therefore can achieve both excellent photosensitivity and ESD resistance.

[0042] Next, a specific embodiment applicable to the semiconductor light receiving element according to the present invention will be described with reference to Fig. 2. Below, configurations with the same last two digits of the reference numerals are the same as those described in the above-described embodiments, and therefore, redundant explanations will be omitted. Similarly, when referring to Figs. 3 and 4, redundant explanations of common configurations will be omitted.

[0043] <Cap Layer> A cap layer 260, which also serves as a contact layer, is preferably provided on a portion of the upper surface of the p-type impurity diffusion region 250, for example, on the edge. The cap layer 260 has a carrier density of 5.0×10 before the Zn diffusion step. １５ / cm ３ It is preferable that the carrier density is less than 2.5×10 １５ / cm ３ It is more preferable to use undoped InGaAs having a composition ratio of less than 10 ... ｘ２ Ga （１－ｘ２） When expressed as As, the In composition ratio x of the cap layer ２ Although there is no particular limitation, 0.5218≦x ２ ≦0.5447, and 0.5275≦x ２ It is more preferable that the lattice constant be ≦0.5389. This is because the lattice constant of the InP substrate and the lattice constant of the InGaAs layer can be approximately matched, stress near the film interface is reduced, and defects such as slip or crosshatch are less likely to occur in the InGaAs layer. Furthermore, in the diffusion region formation step described below, p-type impurities are diffused into the cap layer 260 to make it p-type, and the cap layer 260 is used as a p-type contact layer, thereby reducing the contact resistance with the p-type electrode 280.

[0044] An anti-reflection (AR) coating layer 270 may be provided on the InP window layer 240 except for the cap layer 260. The AR coating layer 270 is preferably made of SiN and may have a thickness of 0.1 μm or more and 0.5 μm or less.

[0045] A p-type electrode 280 can be provided in contact with the cap layer 260, and an n-type electrode 290 can be provided on the back surface of the n-type InP substrate 210. The thickness of each can be 0.5 μm or more and 4.0 μm or less. The p-type electrode 280 can be made of Ti (titanium), Pt (platinum), and Au (gold), in that order from the cap layer side, while the n-type electrode can be made of an AuGe alloy or the like. The shape of the electrode can be designed appropriately depending on the application, and can be, for example, a polygonal shape such as a circle, triangle, square, or pentagon. The example shown in FIG. 2 is merely an example. The p-type electrode 280 can also be provided with a bonding pad for connecting a wire to pass current.

[0046] When the semiconductor light receiving element 200 is used for a sensor, the overall thickness of the semiconductor light receiving element 200 is preferably 100 μm or more and 300 μm or less, and the width and depth are preferably about 500 μm. When the light receiving portion is formed to be circular in top view, the diameter of the light receiving portion can be, for example, 10 μmφ or more and 450 μmφ or less. Furthermore, since the light receiving portion is provided inside the p-type impurity diffusion region 150, the shape of the light receiving portion may be similar to the shape of the p-type impurity diffusion region 150 and is not limited to a circle, but may also be a polygonal shape such as a triangle, a rectangle, or a pentagon.

[0047] 3, the method for manufacturing a semiconductor light-receiving element 300 according to the first embodiment of the present invention includes a buffer layer formation step of forming a buffer layer 320 on an n-type InP substrate 310, a light absorption layer formation step of forming an n-type InGaAs light absorption layer 330 on the buffer layer 320, a window layer formation step of forming an InP window layer 340 on the n-type InGaAs light absorption layer 330, and a diffusion formation step of forming a p-type impurity diffusion region 350 in the InP window layer 340, the p-type impurity diffusion region 350 reaching the top of the n-type InGaAs light absorption layer 330. The n-type InGaAs light absorption layer 330 formed in the light absorption layer formation step has an average Si concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ The following applies.

[0048] Each layer of the semiconductor layer is preferably formed using an MOCVD method. The diffusion region formation step (step D) preferably involves forming the InP window layer 340 in the window layer formation step, and then diffusing p-type impurities from the surface side of the InP window layer 340 using an MOCVD furnace. The diffusion region formation step (step D) may include a step of forming a cap layer 360 and a step of partially removing the cap layer to expose a portion of the InP window layer 340, and the diffusion region formation step (step D) may also include diffusing p-type impurities into the cap layer 360.

[0049] A preferred embodiment of the diffusion region forming step will be specifically described below, taking as an example a case where Zn is used as the p-type impurity. After all of the semiconductor layers are epitaxially grown, Zn is diffused from the top surface of the epitaxial layer only into the desired region by MOCVD. That is, when the InP window layer 340 is the top layer of the semiconductor layer, Zn is diffused from the surface of the InP window layer 340, and when a cap layer (not shown) is the top layer of the semiconductor layer, Zn is diffused from the surface of the cap layer. In order to diffuse Zn only into the desired region, a dielectric thin film (SiO ２In this case, a dielectric thin film (such as a silicon dioxide film, SiON film, or SiN film) is formed, and the dielectric thin film is patterned into a predetermined shape by photolithography using a resist. The patterned dielectric thin film can be used as a mask 370 for Zn diffusion. Zn can then be diffused from the outermost surface of the epitaxial layer, through the cap layer if one is provided, into the InP window layer 340 and the n-type InGaAs light absorption layer 330. The cap layer 360 can be made p-type by diffusing Zn, and can be suitably used as a p-type contact layer.

[0050] In this case, the Zn concentration in the n-type InGaAs light absorption layer 330 has a Zn concentration peak near the interface between the InP window layer 340 and the n-type InGaAs light absorption layer 330, and the Zn concentration gradually decreases from the interface toward the n-type InP substrate 310. The Zn peak concentration in the InGaAs light absorption layer 330 is 1.0×10 when measured by SIMS. １９ / cm ３ Above 5.0 x 10 １９ / cm ３ The average Zn concentration in the diffusion region 351 of the n-type InGaAs light absorption layer 330 can be set to 8.0×10 or less. １８ / cm ３ Above 4.0 x 10 １９ / cm ３ and preferably 9.0 × 10 １８ / cm ３ Above 3.0 x 10 １９ / cm ３ The average Zn concentration in the diffusion region 351 in the light absorption layer is 1.0×10 Zn concentration from the interface between the InP window layer 340 and the n-type InGaAs light absorption layer 330 in the n-type InGaAs light absorption layer 330. １８ / cm ３ As described above, Zn is diffused into a part of the region in each semiconductor layer doped with an n-type impurity such as Si, so that the intra-window layer diffusion region 352 where Zn is diffused into the InP window layer 340 and the intra-light absorption layer diffusion region 351 where Zn is diffused into the n-type InGaAs light absorption layer 330 are co-doped with Zn and the n-type impurity (for example, Si).

[0051] In the diffusion region forming step, the p-type impurity diffusion region 350 can be formed by using a quartz tube sealing method instead of the MOCVD method, or the p-type impurity diffusion region 350 can be formed by an ion implantation method.

[0052] 3 can be formed by sputtering, electron beam evaporation, resistance heating, etc. The AR coating layer, not shown in FIG. 3, can be formed by CVD, coating, etc.

[0053] Second Embodiment A semiconductor light-receiving element according to a second embodiment of the present invention will now be described with reference to FIG. 4 . The difference from the first embodiment is that the n-type InGaAs light-absorbing layer is a stack of layers with different Si concentrations. That is, the n-type InGaAs light-absorbing layer according to the second embodiment includes a first doped layer 431 with a higher-than-average Si concentration and a second doped layer 432 with a lower-than-average Si concentration. The second doped layer 432 may be an undoped layer, as long as the stack as a whole functions as an n-type light-absorbing layer.

[0054] Even in the case of forming such a laminate, the average Si concentration of the entire n-type InGaAs light absorption layer 430 is 2.5×10 as described above. １４ / cm ３ Above 1.0 x 10 １５ / cm ３ It is preferable that the concentration is 3.0 × 10 or less. １４ / cm ３ 9.5 x 10 １４ / cm ３ It is more preferable that the second doped layer 432 is undoped and has a lower limit of SIMS detection, the undoped Si concentration is set to zero when calculating the average Si concentration. Even in such a stacked body, the n-type InGaAs light absorbing layer 430 has an average Si concentration of 2.5 × 10 １４ / cm ３ By incorporating Si so that the average Si concentration is 2.5×10 or more and by making the average Si concentration lower than that of conventional semiconductor devices, it is possible to realize a semiconductor light-receiving element with a large breakdown voltage while achieving both high capacitance and high dark current values. １４ / cm ３If the value is lower than 1.0×10, the dark current value will be 0.05 nA or more, and the average Si concentration will be 1.0×10 １５ / cm ３ If the average Si concentration of the first doped layer 431 exceeds 1.0×10, the capacitance value will be 4 pF or more, and the breakdown voltage will be 10 V or less, which is not preferable. １５ / cm ３ It is more preferable to do as follows, and it is more preferable to select the first embodiment.

[0055] The first doped layer 431 is preferably located on the InP window layer 440 side (including the Zn-diffused range) of the n-type InGaAs light absorption layer 430, and the second doped layer 432 is preferably located on the buffer layer 420 side of the n-type InGaAs light absorption layer 430. The thickness of the first doped layer 431 is set so that the Zn concentration in the Zn-diffused diffusion region 351 in the light absorption layer is 1.0×10 １８ / cm ３ The depth is preferably equal to or greater than the depth at which the Si concentration is different from the first doped layer 431 or the second doped layer 432, for example, 0.6 μm or more and 1.5 μm or less. Furthermore, the total film thickness of the first doped layer 431 and the second doped layer 432 combined is preferably 2.2 μm or more and 3.5 μm or less, and more preferably 2.7 μm or more and 3.45 μm or less. Furthermore, the first doped layer 431 is preferably thicker than the second doped layer 432. A plurality of first doped layers 431 and a plurality of second doped layers 432 may be present. Furthermore, a third doped layer or a fourth doped layer having a different Si concentration from the first doped layer 431 or the second doped layer 432 may be further provided.

[0056] Third Embodiment A semiconductor photodetector according to a third embodiment of the present invention will be described. The semiconductor photodetector 100 according to the third embodiment of the present invention is similar to the first or second embodiment, except that the n-type impurity added to the n-type InGaAs light absorption layer 130 is changed from Si to Ge. That is, the semiconductor photodetector according to the third embodiment of the present invention has at least an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorption layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorption layer. A p-type impurity diffusion region is formed in the InP window layer, reaching the top of the n-type InGaAs light absorption layer, and the n-type InGaAs light absorption layer has an average Ge concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ The n-type InGaAs light absorption layer in the third embodiment will be described below.

[0057] As in the first embodiment, an n-type InGaAs light absorption layer 130 is provided on the buffer layer 120. The n-type InGaAs light absorption layer 130 has an average Ge concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ In addition, it is 3.0 × 10 １４ / cm ３ 9.5 x 10 １４ / cm ３ Preferably, it is 3.0 × 10 or less. １４ / cm ３ Above 8.0 x 10 １４ / cm ３It is even more preferable that the n-type InGaAs light absorbing layer has a first doped layer with a Ge concentration higher than the average Ge concentration and a second doped layer with a Ge concentration lower than the average Ge concentration. In this embodiment, as in the second embodiment, the n-type InGaAs light absorbing layer may include a first doped layer with a Ge concentration higher than the average Ge concentration and a second doped layer with a Ge concentration lower than the average Ge concentration. In this case, the second doped layer may be an undoped layer, as long as the entire stack functions as an n-type light absorbing layer. In the third embodiment, too, by setting the average Ge concentration higher than in the undoped case and lower than conventional, it is possible to realize a semiconductor light receiving element with a large breakdown voltage while achieving both high capacitance and high dark current values.

[0058] (Fourth Embodiment) A semiconductor photodetector according to a fourth embodiment of the present invention will be described. Unlike the previous embodiments, the semiconductor photodetector according to the fourth embodiment of the present invention is an embodiment in which the n-type impurity added to the n-type InGaAs light absorption layer 130 is not limited to Si or Ge. That is, the semiconductor photodetector according to the fourth embodiment of the present invention has at least an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorption layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorption layer. A p-type impurity diffusion region is formed in the InP window layer, reaching the top of the n-type InGaAs light absorption layer, and the n-type InGaAs light absorption layer has an average n-type impurity concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ The other points are the same as those of the first, second and third embodiments described above. In this embodiment, when two or more types of n-type impurities are used, the average n-type impurity concentration is calculated based on the sum of the concentrations of the n-type impurities at each position. The average n-type impurity concentration is 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ is less than or equal to 3.0 × 10 １４ / cm ３ 9.5 x 10 １４ / cm ３In the fourth embodiment, too, by setting the average n-type impurity concentration to be higher than in the undoped case and lower than in the conventional case, it is possible to realize a semiconductor light-receiving element having a large breakdown voltage while achieving both a large capacitance and a large dark current.

[0059] The present invention will be described in more detail below using examples, but the present invention is not limited to the following examples in any way.

[0060] Example 1: n-type InP substrate (thickness: 625 μm, sulfur doped, carrier density: 3.0×10 １８ / cm ３ ) by MOCVD, an undoped InP buffer layer, an n-type InP ０．５３ Ga ０．４７ As light absorption layer (thickness: 3 μm, Si concentration: 1×10 １５ / cm ３ ), n-type InP window layer (thickness: 1 μm), undoped In ０．５３ Ga ０．４７ The composition of each layer, the dopant, the carrier density before Zn diffusion, the average Si concentration by SIMS analysis, and the thickness of each layer are shown in Table 1.

[0061]

[0062] Next, a mask was formed on the cap layer by photolithography, and the rest of the cap layer except for the doughnut-shaped contact region was etched away. A SiN film (thickness: 0.1 μm) was then deposited by CVD and patterned by photolithography using resist to form an opening not covered by the SiN film in the doughnut-shaped contact region and its hole. Zn was diffused from the cap layer to the n-type InP window layer and n-type InGaAs light absorption layer by supplying Zn source gas while heating using MOCVD. Diethyl zinc (DEZn) was used as the Zn source. A SiN film was formed on the rest of the doughnut-shaped contact region to form an AR coating. A p-type electrode was then formed to connect to the contact region, which had been converted to p-type by Zn diffusion. The substrate thickness was adjusted by grinding the backside of the substrate, and an n-type electrode was then formed on the backside of the n-type InP substrate, followed by contact annealing. Thereafter, dicing was performed to obtain a chip size of 320 μm square, and the semiconductor light receiving element according to Example 1 was fabricated.

[0063] The average Zn concentration in the thickness direction of the InGaAs cap layer, which was converted to p-type by Zn diffusion, was 5.0 × 10 １９ / cm ３ The average Zn concentration in the thickness direction at the center of the Zn diffusion region in the n-type InP window layer was 5.0 × 10 １８ / cm ３ In addition, the Zn concentration in the depth direction at the center of the Zn diffusion region was 1.0 × 10 １８ / cm ３ The depth position was 0.33 μm from the interface between the n-type InP window layer and the InGaAs light absorption layer toward the InGaAs light absorption layer. SIMS analysis results for the Si concentration profile in the depth direction of the InGaAs light absorption layer after the cap layer and window layer were removed by etching are shown in FIG.

[0064] Example 2: n-type In ０．５３ Ga ０．４７ The Si concentration in the As light absorption layer (thickness: 3 μm) is set to 1×10 １５ / cm ３ From 9 x 10１４ / cm ３ A semiconductor light-receiving element according to Example 2 was fabricated in the same manner as in Example 1, except that the above-mentioned conditions were changed to the following: The results of SIMS analysis of the InGaAs light absorption layer measured in the same manner as in Example 1 are shown in FIG.

[0065] Comparative Example 1 n-type In ０．５３ Ga ０．４７ A semiconductor light-receiving element according to Comparative Example 1 was fabricated in the same manner as in Example 1, except that the As light absorption layer (thickness: 3 μm) was undoped. In the SIMS analysis of Comparative Example 1, the lower limit of Si detection was 2×10 １４ / cm ３ It showed a value of about.

[0066] Comparative Example 2: n-type In ０．５３ Ga ０．４７ The Si concentration in the As light absorption layer (thickness: 3 μm) is set to 3×10 １５ / cm ３ A semiconductor light-receiving element according to Comparative Example 2 was fabricated in the same manner as in Example 1, except that the above-mentioned

[0067] Comparative Example 3: n-type In ０．５３ Ga ０．４７ The Si concentration in the As light absorption layer (thickness: 3 μm) is set to 1×10 １６ / cm ３ A semiconductor light-receiving element according to Comparative Example 3 was fabricated in the same manner as in Example 1, except that the above-mentioned

[0068] For each of Examples 1 and 2 and Comparative Examples 1 to 3, the capacitance, dark current, and breakdown voltage were measured as follows.

[0069] (Evaluation 1: Capacitance) The fabricated semiconductor photodetector was mounted on a metal stem (T0-18 type) using Ag paste. Kyoto Elex Co., Ltd. model-DD1760 Ag paste was used, and the paste was baked at 180°C for 30 minutes to bond the chip. The pad electrode on the top surface of the chip and one electrode on the metal stem were then fixed with an Au wire (wire bonding) to prepare a sample for measurement. A Keysight Co., Ltd. model-E4980A semiconductor parameter measuring instrument was used. A bias voltage of Vr = 5V was applied, and measurements were made using the two-terminal method at a measurement frequency of 1MHz.

[0070] (Evaluation 2: Dark Current, Breakdown Voltage) Measurement samples were prepared in the same manner as in Evaluation 1, and were measured using a Keithley Model-2635B source measure unit. The dark current was measured by applying a bias voltage of Vr = 5 V. The breakdown voltage was measured by applying a bias voltage from Vr = 1 V to 40 V in 1 V steps. Both the dark current and the breakdown voltage were measured using the two-terminal method.

[0071] The manufacturing conditions and measurement results for Examples 1 and 2 and Comparative Examples 1 to 3 are shown in Table 2.

[0072]

[0073] From Table 2, it was confirmed that by forming a light absorption layer that satisfies the conditions of the present invention, it is possible to fabricate a semiconductor light-receiving element having a dark current value of less than 0.05 nA, a capacitance value of less than 4 pF, and a breakdown voltage value of more than 10 V.

[0074] Example 3: n-type In ０．５３ Ga ０．４７ When forming the As light absorption layer (thickness: 3 μm), the undoped buffer layer side was left with a 2 μm-thick region without flowing Si impurity gas, forming an undoped second doped layer. The upper 1 μm-thick region was left with a Si impurity gas flowing to a Si concentration of 1×10 １５ / cm ３ The first doped layer is defined as having a Si concentration of 3.3×10. The second doped layer has a Si concentration of 0.05, and the average Si concentration in a thickness of 3 μm is defined as 3.3×10. １４ / cm ３ A semiconductor light-receiving element according to Example 3 was fabricated in the same manner as in Example 1, except that:

[0075] Example 4: n-type In ０．５３ Ga ０．４７ When forming the As light absorption layer (thickness: 3 μm), the undoped buffer layer side was left with a 2 μm thick region without flowing Si impurity gas, forming an undoped second doped layer. The upper 1 μm thick region was left with a Si impurity gas flowing to a Si concentration of 3×10 １５ / cm ３The first doped layer is defined as having a Si concentration of 1.0×10. The second doped layer has a Si concentration of 0.05 μm. １５ / cm ３ A semiconductor light-receiving element according to Example 4 was fabricated in the same manner as in Example 3, except that:

[0076] Comparative Example 4 The thickness of the first doped layer was changed from 1.0 μm to 0.5 μm, the thickness of the second doped layer was changed from 2.0 μm to 2.5 μm, and the Si concentration in the second doped layer was considered to be zero. ０．５３ Ga ０．４７ The average Si concentration in the As light absorption layer is 2×10 １４ / cm ３ Below 1.7 x 10 １４ / cm ３ A semiconductor light-receiving element according to Comparative Example 4 was fabricated in the same manner as in Example 3, except that:

[0077] Comparative Example 5: n-type In ０．５３ Ga ０．４７ When forming the As light absorption layer (thickness: 3 μm), the undoped buffer layer side was left with a 2 μm-thick region without flowing Si impurity gas, forming an undoped second doped layer. The upper 1 μm-thick region was left with a Si impurity gas flowing to a Si concentration of 1×10 １６ / cm ３ The first doped layer is defined as having a Si concentration of 3.3×10. The second doped layer has a Si concentration of 0.05, and the average Si concentration in a thickness of 3 μm is defined as 3.3×10. １５ / cm ３ A semiconductor light-receiving element according to Comparative Example 5 was fabricated in the same manner as in Example 3, except that:

[0078] The preparation conditions and measurement results for Examples 3 and 4 and Comparative Examples 4 and 5 are shown in Table 3.

[0079]

[0080] From Table 3, it was confirmed that even when a light absorbing layer satisfying the conditions of the present invention is formed as a laminate, it is possible to fabricate a semiconductor light receiving element having a dark current value of less than 0.05 nA, a capacitance value of less than 4 pF, and a breakdown voltage value of more than 10 V.

[0081] The following describes a test in which the n-type impurity put into the n-type InGaAs light absorption layer was changed from Si to Ge.

[0082] Example 5 In Example 1, n-type In ０．５３ Ga ０．４７ The As light absorption layer (thickness: 3 μm) was doped with Si, but instead, Ge was doped to increase the average Ge concentration to 3.2 × 10 １４ / cm ３ Except for the above, a semiconductor light receiving element according to Example 5 was fabricated in the same manner as in Example 1. The results of SIMS analysis of the InGaAs light absorption layer measured in the same manner as in Example 1 are shown in FIG.

[0083] Example 6: n-type In ０．５３ Ga ０．４７ The average Ge concentration in the As light absorption layer (thickness: 3 μm) was set to 5.1 × 10 １４ / cm ３ Except for the above, a semiconductor light receiving element according to Example 6 was fabricated in the same manner as in Example 5. The results of SIMS analysis of the InGaAs light absorption layer measured in the same manner as in Example 1 are shown in FIG.

[0084] Example 7: n-type In ０．５３ Ga ０．４７ The average Ge concentration in the As light absorption layer (thickness: 3 μm) was set to 7.2 × 10 １４ / cm ３ Except for the above, a semiconductor light receiving element according to Example 7 was fabricated in the same manner as in Example 5. The results of SIMS analysis of the InGaAs light absorption layer measured in the same manner as in Example 1 are shown in FIG.

[0085] Comparative Example 6: n-type In ０．５３ Ga ０．４７ The average Ge concentration in the As light absorption layer (thickness: 3 μm) was set to 3.3 × 10 １４ / cm ３ A semiconductor light-receiving element according to Comparative Example 6 was fabricated in the same manner as in Example 5, except that:

[0086] The preparation conditions and measurement results for Examples 5, 6, and 7 and Comparative Examples 1 and 6 are shown in Table 4.

[0087]

[0088] From Table 4, it was confirmed that even when Si was changed to Ge and a light absorbing layer satisfying the conditions of the present invention was formed as a laminate, it was possible to fabricate a semiconductor light receiving element having a dark current Ir value of less than 0.05 nA, a capacitance Cp value of less than 4 pF, and a breakdown voltage value exceeding 10 V. Furthermore, from Examples 1 to 7, it was confirmed that when the concentration of the n-type impurity in the light absorbing layer satisfied the conditions of the present invention, a semiconductor light receiving element having a large breakdown voltage while achieving both a high capacitance and a high dark current value could be obtained.

[0089] The semiconductor light-receiving element according to the present invention is useful because it can provide a semiconductor light-receiving element having a large breakdown voltage while achieving both low capacitance and low dark current, and a method for manufacturing the semiconductor light-receiving element.

[0090] 100, 200, 300, 400 Semiconductor light receiving element 110, 210, 310, 410 n-type InP substrate 120, 220, 320, 420 Buffer layer 130, 230, 330, 430 n-type InGaAs light absorption layer 431 First doped layer 432 Second doped layer 140, 240, 340, 440 InP window layer 150, 250, 350 P-type impurity diffusion region 151, 251, 351 Diffusion region in light absorption layer 152, 252, 352 Diffusion region in window layer 260, 360 Cap layer 270 AR coating layer 280 P-type electrode 290 N-type electrode 370 Mask

Claims

1. A semiconductor light receiving element having an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorbing layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorbing layer, wherein a p-type impurity diffusion region is formed in the InP window layer and reaches an upper portion of the n-type InGaAs light absorbing layer, the n-type InGaAs light absorbing layer has an average n-type impurity concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ A semiconductor light receiving element, characterized in that:

2. The average n-type impurity concentration is 3.0×10 １４ / cm ３ Above 9.5 x 10 １４ / cm ３ The semiconductor light receiving element according to claim 1 , wherein:

3. The semiconductor light receiving element according to claim 1, wherein the p-type impurity contained in the p-type impurity diffusion region is Zn.

4. The semiconductor light receiving element according to claim 1, wherein the n-type InGaAs light absorption layer is a stack of layers having different n-type impurity concentrations.

5. The semiconductor light receiving element according to claim 1, wherein the n-type InGaAs light absorption layer has a thickness of 2.2 μm or more and 3.5 μm or less.

6. The semiconductor light-receiving element according to any one of claims 1 to 5, wherein the n-type impurity is Si or Ge.

7. A method for manufacturing a semiconductor light receiving element, comprising: a buffer layer forming step of forming a buffer layer on an n-type InP substrate; a light absorption layer forming step of forming an n-type InGaAs light absorption layer on the buffer layer; a window layer forming step of forming an n-type InP window layer on the n-type InGaAs light absorption layer; and a diffusion region forming step of forming a p-type impurity diffusion region in the InP window layer, the p-type impurity diffusion region reaching an upper portion of the n-type InGaAs light absorption layer, １４ / cm ３ Above 1.0 x 10 １５ / cm ３ A method for manufacturing a semiconductor light receiving element, comprising:

8. The method for manufacturing a semiconductor light-receiving element according to claim 7, wherein the diffusion region forming step comprises diffusing a p-type impurity from a surface side of the InP window layer in an MOCVD furnace after the InP window layer is formed in the window layer forming step.

9. The method for manufacturing a semiconductor light receiving element according to claim 7, wherein the light absorption layer formation step comprises the steps of: forming a first doped layer having an n-type impurity concentration higher than the average n-type impurity concentration; and forming a second doped layer having an n-type impurity concentration lower than the average n-type impurity concentration.

10. The method for producing a semiconductor light-receiving element according to any one of claims 7 to 9, wherein the n-type impurity is Si or Ge.

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