Electronic device for synchronization and operation method thereof

Abstract

An operation method of an electronic device is disclosed. An electronic device according to an embodiment of the present disclosure may comprise: a communication unit including a first interface and a second interface; and a processor electrically connected to the communication unit via the first interface or the second interface, wherein the processor: requests clock information of the communication unit from the communication unit via the first interface; receives the clock information of the communication unit from the communication unit via the first interface; receives an interrupt signal and first time information on a generation time point of the interrupt signal from the communication unit via the second interface; and generates clock information of the processor on the basis of the clock information of the communication unit and the first time information.

Description

Electronic device and method of operation for synchronization

[0001] Embodiments disclosed in this document relate to an electronic device and an operating method for synchronization.

[0002] With the advancement of Internet of Things (IoT) technology, various IoT devices (e.g., TVs, audio output devices, HDMI devices, etc.) can be interconnected to provide users with various services. To ensure that IoT devices transmit and receive data at precise timing, synchronization can be performed between devices, and devices can perform synchronization based on a clock signal. The clock can define when data should be transmitted and processed. For example, a clock signal can be used to perform tasks such as executing instructions in a central processing unit (CPU), accessing data in random access memory (RAM), and transmitting data in input / output devices. Data synchronization and clocks can play a crucial role in various electronic devices and systems, such as computer systems, IoT devices, and the processors, transceivers, and memories within IoT devices. Maintaining and managing accurate clock signals can ensure the accuracy and efficiency of data processing. To transmit data from a transmitting device to a receiving device (e.g., transmitting video data to a TV, or audio data to a speaker), devices can synchronize. For synchronization, the round to trip (RTT) method can be used, which uses the average round trip time of signals exchanged between the transmitting device and the receiving device.

[0003] An electronic device according to one embodiment of the present disclosure includes a communication unit including a first interface and a second interface, and a processor electrically connected to the communication unit through the first interface or the second interface, wherein the processor requests clock information of the communication unit from the communication unit through the first interface, receives clock information of the communication unit from the communication unit through the first interface, receives an interrupt signal and first time information about a generation time of the interrupt signal from the communication unit through the second interface, and generates clock information of the processor based on the clock information of the communication unit and the first time information.

[0004] In one embodiment, the first interface may include a universal serial bus (USB) interface, and the second interface may include a general purpose input output (GPIO) interface.

[0005] In one embodiment, the communication unit may generate the interrupt signal in response to receiving a request for clock information of the communication unit from the processor.

[0006] In one embodiment, the first time information may be included in the interrupt signal.

[0007] In one embodiment, the clock information of the communication unit can be identified based on a first synchronization signal received through the communication unit.

[0008] In one embodiment, the first synchronization signal may include information about a network to which the electronic device is connected.

[0009] In one embodiment, the processor may transmit a synchronization signal to an external electronic device, receive an ACK (acknowledgement) signal according to the synchronization signal from the external electronic device, and generate clock information of the processor based on transmission time information at which the second synchronization signal is transmitted and reception time information at which the ACK signal is received.

[0010] In one embodiment, the processor may receive a synchronization signal from an external electronic device, and generate clock information of the processor based on second time information regarding a transmission time included in the synchronization signal and reception time information regarding a time at which the synchronization signal was received.

[0011] In one embodiment, the processor determines whether to correct clock information of the processor based on a plurality of offset values ​​identified over a predetermined period of time, wherein the plurality of offset values ​​can be identified based on a difference between clock information of the communication unit and clock information of the processor.

[0012] In one embodiment, the processor may correct clock information of the processor based on identifying that the plurality of offset values ​​sequentially increase over the predetermined time period or identifying that the plurality of offset values ​​sequentially decrease over the predetermined time period.

[0013] An operating method of an electronic device according to one embodiment of the present disclosure may include an operation of requesting clock information of a communication unit of the electronic device through a first interface, an operation of receiving the clock information of the communication unit through the processor through the first interface, an operation of receiving an interrupt signal and first time information regarding a generation time of the interrupt signal from the communication unit through a second interface, and an operation of generating clock information of the processor based on the clock information of the communication unit and the first time information.

[0014] In one embodiment, the first interface may include a universal serial bus (USB) interface, and the second interface may include a general purpose input output (GPIO) interface.

[0015] In one embodiment, the interrupt signal may be generated by the communication unit in response to receiving a request for clock information from the communication unit from the processor.

[0016] In one embodiment, the interrupt signal may include the first time information.

[0017] In one embodiment, the clock information of the communication unit can be identified based on a first synchronization signal received through the communication unit.

[0018] FIG. 1 illustrates a block diagram of an electronic device according to one embodiment.

[0019] Figure 2 illustrates an example of an IoT network according to one embodiment.

[0020] FIG. 3 illustrates a detailed block configuration of an electronic device according to one embodiment.

[0021] Figure 4 illustrates an operational flow of an electronic device according to one embodiment.

[0022] Figure 5 illustrates an operational flow of an electronic device according to one embodiment.

[0023] FIG. 6 illustrates an example of synchronization of an electronic device according to one embodiment.

[0024] Figure 7 illustrates an operational flow of an electronic device according to one embodiment.

[0025] In connection with the description of the drawings, the same or similar reference numerals may be used for identical or similar components.

[0026] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings so that those skilled in the art can easily implement the present disclosure. However, the present disclosure may be implemented in various different forms and is not limited to the embodiments described herein. In connection with the description of the drawings, the same or similar reference numerals may be used for identical or similar components. Furthermore, in the drawings and related descriptions, descriptions of well-known functions and configurations may be omitted for clarity and conciseness.

[0027] Figure 1 illustrates a block diagram of an electronic device according to one embodiment. Furthermore, the electronic device (100) may be a wearable terminal, such as a watch or glasses, capable of performing various computing functions, such as video viewing and communication. The electronic device (100) may be a terminal of various forms without limitation to the above-described embodiments.

[0028] According to one embodiment, the memory (120) is a storage medium used by the electronic device (100) and can store data such as at least one command (121) or setting information corresponding to at least one program. The program can include an operating system (OS) program and various application programs.

[0029] In one embodiment, the memory (120) may store pairing information of an external electronic device positioned adjacent to the electronic device (100). In one embodiment, the pairing information may include device information of the external electronic device, information about other external electronic devices or remote control devices paired with the external electronic device, information about a method by which the external electronic device and the other external electronic devices or remote control devices are paired (e.g., Bluetooth, Wi-Fi), information about a pairing history between the external electronic device and the other external electronic devices or remote control devices, etc.

[0030] In one embodiment, the memory (120) may include at least one type of storage medium among a flash memory type, a hard disk type, a multimedia card micro type, a card type memory (e.g., an SD or XD memory, etc.), a random access memory (RAM), a static random access memory (SRAM), a read only memory (ROM), an electrically erasable programmable ROM (EEPROM), a programmable ROM (PROM), a magnetic memory, a magnetic disk, and an optical disk.

[0031] According to one embodiment, the video input unit (130) can receive video and video information through a tuner (not shown), an input / output unit (not shown), or a communication unit (150). The video input unit (130) can include at least one of the tuner and the input / output unit. The tuner can select and tune only the frequency of a broadcast channel to be received by the electronic device (100) among many radio wave components through amplification, mixing, resonance, etc. of a broadcast signal received wirelessly or wiredly. The broadcast signal can include video, audio, and additional data (e.g., an Electronic Program Guide (EPG)). The tuner can receive real-time broadcast channels (or real-time viewing images) from various broadcast sources such as terrestrial broadcasting, cable broadcasting, satellite broadcasting, and Internet broadcasting. The tuner can be implemented as an integrated unit with the electronic device (100) or as a separate tuner electrically connected to the electronic device (100). The input / output unit may include at least one of an HDMI (High Definition Multimedia Interface) input port, a component input jack, a PC input port, and a USB input jack, which can receive images and image information from an external device of the electronic device (100) under the control of the processor (110). It is obvious to those skilled in the art that the input / output unit may be added, deleted, and / or changed depending on the performance and structure of the electronic device (100).

[0032] According to one embodiment, the display (140) may perform functions for outputting information in the form of numbers, characters, images, and / or graphics. The display (140) may include at least one hardware module for outputting. The at least one hardware module may include, for example, at least one of a Liquid Crystal Display (LCD), a Light Emitting Diode (LED), a Light Emitting Polymer Display (LPD), an Organic Light Emitting Diode (OLED), an Active Matrix Organic Light Emitting Diode (AMOLED), or a Flexible LED (FLED). The display (140) may display a screen corresponding to data received from the processor (110). The display (140) may be referred to as an “output unit,” a “display unit,” or other terms having equivalent technical meanings thereto. The “screen” may include an image displayed on the display of an electronic device. The image may be referred to by terms such as a frame. Various types of objects such as icons, text, photos, videos, widgets, etc. may be displayed on the screen.

[0033] According to one embodiment, the communication unit (150) may provide a wired / wireless communication interface that enables communication with an external device. The communication unit (150) may include at least one of a wired Ethernet, a wireless LAN communication unit, and a short-range communication unit. The wireless LAN communication unit may include, for example, Wi-Fi, and may support the wireless LAN standard (IEEE802.11x) of the Institute of Electrical and Electronics Engineers (IEEE). The wireless LAN communication unit may be wirelessly connected to an AP (Access Point) under the control of the processor (110). The AP may include a device that enables devices to be connected using a related standard using Wi-Fi in a computer network. The short-range communication unit may wirelessly perform short-range communication with an external device under the control of the processor (110). Short-range communication may include Bluetooth, Bluetooth Low Energy, Infrared Data Association (IrDA), Ultra Wide Band (UWB), and Near Field Communication (NFC). The above external devices may include server devices that provide video services, etc., and mobile terminals (e.g., phones, tablets, etc.).

[0034] According to one embodiment, the processor (110) may execute at least one instruction (121) stored in the memory (120) to perform calculations or data processing related to control and / or communication of at least one other component of the electronic device (100). The processor (110) may include at least one of a central processing unit (CPU), a graphics processing unit (GPU), a micro controller unit (MCU), a sensor hub, a supplementary processor, a communication processor, an application processor, an application specific integrated circuit (ASIC), or a field programmable gate array (FPGA), and may have multiple cores.

[0035] In one embodiment, the processor (110) may control at least one other component (e.g., a hardware or software component) of the electronic device (100) connected to the processor (110), for example, by executing software, and may perform various data processing or calculations. According to one embodiment, as at least a part of the data processing or calculation, the processor (110) may store commands or data received from other components in a volatile memory, process the commands or data stored in the volatile memory, and store result data in a non-volatile memory. According to one embodiment, the processor (110) may include a main processor (e.g., a central processing unit or an application processor) or an auxiliary processor (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together therewith. For example, when the electronic device (100) includes a main processor and an auxiliary processor, the auxiliary processor may be configured to use lower power than the main processor or to be specialized for a given function. The auxiliary processor may be implemented separately from the main processor or as part of it.

[0036] In one embodiment, the processor (110) may obtain image frame data from at least one of the memory (120), the image input unit (130), or the communication unit (150). The processor (110) may receive the image frame data from at least one of the memory (120), the image input unit (130), or the communication unit (150). The image frame data may include data regarding frames constituting an image. For example, the image frame data may be identified from the memory (120) (e.g., a recorded and stored image). For example, the image frame data may include data obtained from the communication unit (150) or the image input unit (130) (e.g., a real-time streaming image).

[0037] Fig. 2 illustrates an example of an IoT network according to one embodiment. The display device (210) of Fig. 2 may include a device corresponding to the electronic device (100) of Fig. 1.

[0038] According to one embodiment, the display device (210), the wireless video transmission / reception device (220), and the speaker (310) can transmit and receive data wirelessly.

[0039] According to one embodiment, the wireless video transmission and reception device (220) may include a device that wirelessly transmits and receives video data and audio data.

[0040] In one embodiment, a wireless video transmitter / receiver (220) can transmit video data to a display device (210) and a speaker (310).

[0041] In one embodiment, the wireless video transmission / reception device (220) may include a transmitter (not shown) for collecting and encoding video and audio data, converting the collected video and audio data into wireless signals, and transmitting the converted video and audio data, a receiver (not shown) for receiving and decoding the wireless signals to identify the video data and audio data, an antenna for transmitting and receiving the wireless signals, and a user interface for controlling and monitoring the settings of the wireless video transmission / reception device.

[0042] In one embodiment, although not illustrated in the drawing, the wireless video transmission / reception device (220) may be connected to various types of input / output devices. For example, the wireless video transmission / reception device (220) may be connected to an HDMI device (e.g., a set-top box, a game console) via wires or wirelessly. For example, the wireless video transmission / reception device (220) may be connected wirelessly to a display device (210) and a speaker (230).

[0043] In one embodiment, the speaker (230) can receive audio data from a display device (210), a wireless video transmission / reception device (220), and an AP (not shown), and output the same.

[0044] In one embodiment, the speaker (230) may transmit input data to a display device (210), a wireless video transmission / reception device (220), or an access point (AP) (not shown). For example, the speaker (230) may process data and generate a signal to transmit to another device based on user input identified using user voice recognition technology.

[0045] In one embodiment, the wireless video transmission / reception device (220) can be connected to another device (e.g., a display device (210)) via Bluetooth, Wi-Fi, etc.

[0046] In one embodiment, although not shown in the drawing, the IoT environment may include an access point (AP) (not shown) for connecting a display device (210), a wireless video transmission / reception device (220), a speaker (230), and a network (not shown). The display device (210), the wireless video transmission / reception device (220), and the speaker (230) may communicate data with a network (e.g., a Wi-Fi network) through the AP (not shown).

[0047] In one embodiment, the AP (not shown) may transmit a synchronization signal (timestamp).

[0048] In one embodiment, an AP (not shown) can broadcast a synchronization signal to adjacent devices.

[0049] In one embodiment, the synchronization signal may include precise time information (e.g., clock information) of the network.

[0050] In one embodiment, other devices (e.g., display device (210), wireless video transmission / reception device (220), speaker (230)) that receive a synchronization signal from an AP (not shown) can perform synchronization based on network time information included in the synchronization signal.

[0051] In one embodiment, the display device (210), the wireless video transmission / reception device (220), and the speaker (230) can perform synchronization based on a synchronization signal and perform image output, audio output, and data transmission based on the synchronization signal.

[0052] In one embodiment, the display device (210), the wireless video transmission / reception device (220), and the speaker (230) may transmit (e.g., unicast, multicast, or broadcast) network time information included in the synchronization information received from the AP (not shown) to other devices. In other words, the network synchronization signal may be received from the AP (not shown), but may also be exchanged between other IoT devices connected to the AP (not shown).

[0053] Fig. 3 illustrates a block diagram of another electronic device according to one embodiment. The electronic device (300) of Fig. 3 may include a device corresponding to the electronic device (100) of Fig. 1.

[0054] According to one embodiment, the electronic device (300) may include a processor (310) and a communication unit (320).

[0055] In one embodiment, the processor (310) may include an application processor (AP) or a digital signal processor (DSP). The processor (310) may include a configuration corresponding to the processor (110) of FIG. 1.

[0056] In one embodiment, the processor (310) can process voice, music, video, and other digital signals based on a clock of the processor (310). The clock can determine the time intervals required to convert, filter, compress, remove noise, and perform other operations on the digital signal.

[0057] In one embodiment, the communication unit (320) may include a WiFi-integrated circuit (IC). The communication unit (320) may perform a function of connecting the electronic device (300) to a WiFi network and transmitting data.

[0058] In one embodiment, the communication unit (320) can transmit or receive wireless signals to another IoT device or AP.

[0059] In one embodiment, the communication unit (320) may perform clock synchronization based on a synchronization signal (timestamp) received from an AP or other IoT device. For example, synchronization may be performed based on a beacon received from the AP, and data may be received from the AP.

[0060] In one embodiment, the processor (310) and the communication unit (320) may be connected via a first interface (312). The first interface (312) may include an interface using a universal serial bus (USB). Through the first interface (312), the processor (310) and the communication unit (320) may perform bidirectional communication.

[0061] In one embodiment, the processor (310) can receive clock information of the communication unit (320) through the first interface (312).

[0062] In one embodiment, the processor (310) and the communication unit (320) may be connected via a second interface (324). The second interface (324) may include an interface using a general purpose input output (GPIO). An interrupt signal generated in the communication unit (320) may be transmitted to the processor (310) via the second interface (324).

[0063] In one embodiment, the processor (310) may request clock information of the communication unit (320) from the communication unit (320).

[0064] In one embodiment, the communication unit (320) may identify a clock of the communication unit (320) in response to receiving a clock information request from the processor (310).

[0065] In one embodiment, when the communication unit (320) identifies the clock of the communication unit (320), the communication unit (320) may generate an interrupt signal, and the generated interrupt signal may be transmitted to the processor (310) through the second interface (324).

[0066] FIG. 4 illustrates an operational flow of an electronic device according to one embodiment. The operational flow of the electronic device of FIG. 4 may include a control operational flow of a processor (e.g., processor (110), processor (310)) included in the electronic device. In the description of FIG. 4, any content that overlaps with that described in FIGS. 1 to 3 may be omitted.

[0067] In one embodiment, an electronic device can perform synchronization based on the clock value of a processor. The electronic device and other external electronic devices need to perform synchronization for transmitting AV data. The clock value of the processor can be used to perform synchronization. However, since the clock values ​​may differ between the processors of the devices, the resulting differences may cause data transmission timing to be out of sync. The electronic device and other devices can be connected to the same Wi-Fi network, and synchronization can be maintained between devices connected to the same Wi-Fi network by receiving a synchronization signal (timestamp). The present disclosure relates to a device and method for performing synchronization between devices without using an RTT method by compensating for differences in the clock values ​​of the processors of each device using the clock value of a Wi-Fi module with which synchronization is always maintained.

[0068] According to one embodiment, in operation 410, the electronic device may request clock information of a communication unit (e.g., communication unit (150), communication unit (320)). The clock information of the communication unit received in operation 410 may be referred to as a “first clock value.”

[0069] In one embodiment, a processor (e.g., a DSP, an AP) of an electronic device may request clock information from a communication unit (e.g., a WiFi IC). For example, the AP may request current time information from the WiFi IC via USB. The current time information of the WiFi IC may include information that is accurately maintained based on a synchronization signal received from the network.

[0070] In one embodiment, the synchronization signal received from the network may include a signal used to manage time synchronization and timing information in a wireless network. For example, the synchronization signal may correspond to a timestamp defined in IEEE 802.11. A timestamp may be used to synchronize a client device with the network and may be expressed in nanoseconds.

[0071] In one embodiment, the synchronization signal may include network time information, allowing devices connected to the network to operate based on the same time.

[0072] In one embodiment, wireless frames (e.g., data frames, management frames, etc.) can be synchronized based on a synchronization signal. For example, a timestamp may indicate the frame's creation time, and a device receiving the timestamp can track the frame's arrival time based on the timestamp and calculate the time difference to perform communication.

[0073] In one embodiment, the communication unit of the electronic device can read a clock value of the communication unit in response to receiving a request for clock information of the communication unit from the processor.

[0074] In one embodiment, the communication unit of the electronic device may generate an interrupt signal at the time the clock value of the communication unit is read. For example, after the WiFi IC has retrieved its time information, the WiFi IC may generate an interrupt signal using a GPIO pin to notify the AP that the WiFi IC's time information is ready.

[0075] In one embodiment, the communication unit of the electronic device can transmit an interrupt signal to the processor.

[0076] According to one embodiment, in operation 420, the processor of the electronic device may receive clock information of the communication unit through the first interface.

[0077] In one embodiment, the first interface may include an interface via USB between the processor and the communication unit.

[0078] In one embodiment, the electronic device is configured to identify the first clock value based on a first synchronization signal received via the communication unit.

[0079] In one embodiment, the first synchronization signal may include a synchronization signal received via an external electronic device (e.g., an access point). For example, the first synchronization signal may include a timestamp received from the access point.

[0080] In one embodiment, the first synchronization signal may include information about a network (e.g., a Wi-Fi network) to which the electronic device is connected. For example, the first synchronization signal may include information about the network's identification information and address.

[0081] According to one embodiment, at operation 430, the processor of the electronic device may receive an interrupt signal and information regarding the timing of generation of the interrupt signal through the second interface.

[0082] In one embodiment, the communication unit receives a request for clock information of the communication unit from the processor, and can identify the clock information of the communication unit accordingly (e.g., reading the clock value of the WiFi-IC based on the timestamp). The communication unit can identify the clock information and generate an interrupt signal, so that the interrupt signal can be transmitted via a GPIO.

[0083] In one embodiment, the second interface may include an interface via GPIO between the processor and the communication unit.

[0084] In one embodiment, the processor can detect an interrupt signal received from the communication unit and also identify information about the time of generation of the interrupt signal based on the interrupt signal.

[0085] According to one embodiment, in operation 440, the processor of the electronic device may generate clock information of the processor based on clock information of the communication unit and information about the generation time of the interrupt signal.

[0086] In one embodiment, the electronic device may determine whether to generate clock information of the processor based on a difference between the clock information of the communication unit and the timing of generation of the interrupt signal.

[0087] In one embodiment, the clock value of the processor may include the clock value of the processor. In other words, the clock value of the processor may include a system clock value used for synchronization with other devices.

[0088] In one embodiment, clock information of the processor can be generated based on clock information of the communication unit and information regarding the generation time of the interrupt signal.

[0089] In one embodiment, the electronic device may transmit a second synchronization signal to an external electronic device. Thereafter, the electronic device may receive an ACK signal for the second synchronization signal from the external electronic device. The electronic device may identify the clock information of the processor based on the time at which the second synchronization signal is transmitted and the time at which the ACK signal is received. This may correspond to an operation for synchronizing the system clock value of the electronic device when the electronic device is the transmitting device.

[0090] In one embodiment, the electronic device may receive a second synchronization signal from an external electronic device. The electronic device may identify the processor's clock information based on information regarding the transmission time included in the second synchronization signal and information regarding the time at which the second synchronization signal was received. This may correspond to an operation for synchronizing the system clock value of the electronic device when the electronic device is the receiving device.

[0091] In one embodiment, the electronic device may determine whether to modify clock information of the processor based on a plurality of offset values ​​identified over a predetermined period of time.

[0092] In one embodiment, the offset value may include the difference between the second clock value and the clock information of the processor. In other words, it may refer to the difference between the clock value of the communication unit identified via the Wi-Fi network and the clock value of the processor.

[0093] In one embodiment, the plurality of offset values ​​may be identified based on a difference between the second clock value identified from the communication unit at predetermined intervals and clock information of the processor.

[0094] In one embodiment, it may be determined to modify the clock information of the processor when it is determined that the plurality of offset values ​​continuously increase over the predetermined time period or when it is determined that the plurality of offset values ​​continuously decrease over the predetermined time period.

[0095] FIG. 5 illustrates an operational flow of an electronic device according to one embodiment. The operational flow of the electronic device described in FIG. 5 may include control operations of the communication unit of the electronic device. In the description of FIG. 5, description of the same parts as those described in FIG. 4 may be omitted.

[0096] According to one embodiment, in operation 510, the electronic device may be connected to a network through a communication unit. The communication unit of the electronic device may be connected to an AP, thereby connecting to a Wi-Fi network.

[0097] In one embodiment, the network may include a Wi-Fi network.

[0098] According to one embodiment, in operation 520, the communication unit of the electronic device can identify a first clock value based on a first synchronization signal.

[0099] In one embodiment, the first synchronization signal may include a Timestamp received from the AP.

[0100] In one embodiment, the first synchronization signal may include network information to which the electronic device is connected.

[0101] According to one embodiment, at operation 530, the communication unit of the electronic device may receive a first clock value request from the processor.

[0102] In one embodiment, the first clock value may include a clock value of a WiFi IC.

[0103] In one embodiment, the communication unit of the electronic device can identify a first clock value of the communication unit in response to receiving a first clock value request from the processor.

[0104] In one embodiment, the communication unit of the electronic device may generate an interrupt signal in response to identifying the first clock value.

[0105] According to one embodiment, in operation 540, the communication unit of the electronic device may transmit information regarding a transmission time of the first clock value.

[0106] In one embodiment, the communication unit of the electronic device may transmit an interrupt signal to the processor via a second interface. The second interface may include an interface via a GPIO between the processor and the communication unit.

[0107] According to one embodiment, in operation 550, the communication unit of the electronic device may transmit a first clock value.

[0108] In one embodiment, the communication unit of the electronic device may transmit a first clock value to the processor via a first interface. The first interface may include an interface between the processor and the communication unit via a USB.

[0109] FIG. 6 illustrates an example of synchronization of an electronic device according to one embodiment.

[0110] Referring to FIG. 6, in one embodiment, the clock (DSP TX Clock) of the processor of the transmitting device may be synchronized based on the clock (Wi-Fi TX Clock) value of the communication unit of the transmitting device. As described above with reference to FIGS. 3 to 5, synchronization of the transmitting device may be periodically performed based on a signal received via USB and an interrupt signal received via GPIO.

[0111] In one embodiment, the clock (DSP RX Clock) of the processor of the receiving device may be synchronized based on the clock (Wi-Fi RX Clock) value of the communication unit of the receiving device. As described above with reference to FIGS. 3 to 5, synchronization of the receiving device may be periodically performed based on a signal received via USB and an interrupt signal received via GPIO.

[0112] In one embodiment, the transmitting device and the receiving device can perform mutual synchronization. In other words, WiFi TSF synchronization can be performed. The transmitting device and the receiving device each perform internal synchronization through their respective processors and WiFi ICs, and based on this, synchronize with other devices, thereby accurately performing synchronization for the transmission of AV data between the devices.

[0113] Figure 7 illustrates an operational flow of an electronic device according to one embodiment.

[0114] According to one embodiment, in operation 710, the electronic device can identify offset values ​​of a clock value of the communication unit and a system clock value during a predetermined period.

[0115] In one embodiment, the predetermined period may be predetermined by the electronic device within a range of 100 ms to 300 ms as illustrated in FIG. 6.

[0116] In one embodiment, the offset value of the clock value of the communication unit and the system clock value may include the difference between the clock value of the communication unit and the clock value of the processor described above in FIGS. 1 to 5.

[0117] According to one embodiment, at operation 720, the electronic device can determine whether the offset values ​​increase or decrease. Since the processor and the communication unit have different configurations, there may be a difference in the clock values. However, if the difference between the clock values ​​of the processor and the clock values ​​of the communication unit constantly increases or decreases, it can be considered that an error is occurring. Therefore, in this case, the electronic device can correct the clock value of the processor based on the clock value of the communication unit.

[0118] In one embodiment, if the electronic device identifies that the offset values ​​increase or decrease by more than a predetermined value over a predetermined period of time, the electronic device may determine that the offset values ​​are increasing or decreasing.

[0119] In one embodiment, the electronic device may perform operation 730 if it determines that the offset values ​​increase or decrease. The electronic device may perform operation 740 if it determines that the offset values ​​do not increase or decrease.

[0120] According to one embodiment, at operation 730, the electronic device can correct the system clock value based on the offset value. The electronic device can correct the system clock value based on the clock value of the communication unit. Since the clock value of the communication unit is a relatively accurate clock value that is periodically synchronized by the timestamp received by the electronic device from the AP, accurate synchronization can be performed by correcting the clock value of the processor based on the clock value of the communication unit.

[0121] According to one embodiment, at operation 740, if the electronic device determines that the offset values ​​do not increase or decrease, the electronic device may determine that correction of the system clock value is not necessary and maintain the system clock value.

[0122] An electronic device according to one embodiment of the present disclosure includes a processor electrically connected to the communication unit through a communication unit, a first interface, or a second interface, wherein the processor requests clock information of the communication unit from the communication unit through the first interface, receives clock information of the communication unit through the first interface, receives an interrupt signal and information about a generation time of the interrupt signal from the communication unit through the second interface, and generates clock information of the processor based on the clock information of the communication unit and the information about a generation time of the interrupt signal.

[0123] In one embodiment, the first interface may include an interface using a universal serial bus (USB), and the second interface may include an interface using a general purpose input output (GPIO).

[0124] In one embodiment, the communication unit may generate the interrupt signal in response to receiving a request for clock information of the communication unit from the processor.

[0125] In one embodiment, information regarding the generation time of the interrupt signal may be included in the interrupt signal.

[0126] In one embodiment, the processor can identify the clock information based on a first synchronization signal received through the communication unit.

[0127] In one embodiment, the first synchronization signal may include information about a network to which the electronic device is connected.

[0128] In one embodiment, the processor may transmit a second synchronization signal to an external electronic device, receive an ACK (acknowledgement) signal from the external electronic device, and generate clock information of the processor based on a time at which the second synchronization signal is transmitted and a time at which the ACK signal is received.

[0129] In one embodiment, the processor may receive a second synchronization signal from an external electronic device, and generate clock information of the processor based on information regarding a transmission time included in the second synchronization signal and information regarding a time at which the second synchronization signal was received.

[0130] In one embodiment, the processor determines whether to generate clock information of the processor based on a plurality of offset values ​​identified over a predetermined period of time, wherein the plurality of offset values ​​can be identified based on a difference between clock information of the communication unit and clock information of the processor.

[0131] In one embodiment, the processor may generate clock information of the processor when it identifies that the plurality of offset values ​​continuously increase over the predetermined time period or when it identifies that the plurality of offset values ​​continuously decrease over the predetermined time period.

[0132] An operating method of an electronic device according to one embodiment of the present disclosure may include an operation of requesting clock information of a communication unit from a processor of the electronic device to a communication unit of the electronic device through a first interface, an operation of transmitting the clock information of the communication unit from the communication unit to the processor through the first interface, an operation of transmitting an interrupt signal and information about a generation time of the interrupt signal from the communication unit to the processor through a second interface, and an operation of generating clock information of the processor based on the clock information of the communication unit and the information about a generation time of the interrupt signal.

[0133] In one embodiment, the first interface may include an interface using a universal serial bus (USB), and the second interface may include an interface using a general purpose input output (GPIO).

[0134] In one embodiment, a method of operating an electronic device may include generating the interrupt signal in response to receiving a request for clock information of the communication unit from the processor.

[0135] In one embodiment, the interrupt signal may include information regarding the point in time at which the interrupt signal is generated.

[0136] In one embodiment, a method of operating an electronic device may include an operation of identifying the clock information based on a first synchronization signal received through the communication unit.

[0137] In one embodiment, the first synchronization signal may include information about a network to which the electronic device is connected.

[0138] In one embodiment, a method of operating an electronic device may include transmitting a second synchronization signal to an external electronic device, receiving an ACK (acknowledgement) signal from the external electronic device, and identifying clock information of the processor based on a time point at which the second synchronization signal is transmitted and a time point at which the ACK signal is received.

[0139] A method of operating an electronic device may include receiving a second synchronization signal from an external electronic device, generating clock information of the processor based on information regarding a transmission time included in the second synchronization signal and information regarding a time at which the second synchronization signal was received.

[0140] In one embodiment, a method of operating an electronic device includes an operation of determining whether to generate clock information of the processor based on a plurality of offset values ​​identified over a predetermined period of time, wherein the plurality of offset values ​​can be identified based on a difference between clock information of the communication unit and clock information of the processor.

[0141] In one embodiment, the method of operating the electronic device may include generating clock information of the processor when identifying that the plurality of offset values ​​continuously increase during the predetermined time or when identifying that the plurality of offset values ​​continuously decrease during the predetermined time.

[0142] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, display devices, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments disclosed in this document are not limited to the aforementioned devices.

[0143] The various embodiments of this document and the terminology used herein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. For example, a component expressed in the singular should be understood to include a concept including plural components unless the context clearly indicates only the singular. It should be understood that the term "and / or" used in this document encompasses any and all possible combinations of one or more of the listed items. The terms "comprise," "have," "consist of," and the like used in this disclosure are intended to specify only the presence of a feature, component, part, or combination thereof described in this disclosure, and the use of such terms does not exclude the presence or addition of one or more other features, components, parts, or combinations thereof. In this document, phrases such as "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can each include any one of the items listed together in that phrase, or all possible combinations thereof. Terms such as "first", "second", or "first" or "second" may be used merely to distinguish the corresponding element from other corresponding elements and do not limit the corresponding elements in any other respect (e.g., importance or order).

[0144] The terms "part" or "module" used in various embodiments of this document may include units implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. The "part" or "module" may be an integrally formed component or a minimum unit or part of the component that performs one or more functions. For example, according to one embodiment, the "part" or "module" may be implemented in the form of an application-specific integrated circuit (ASIC).

[0145] The term "if" as used in various embodiments of this document may be interpreted to mean "when" or "when" or "in response to determining" or "in response to detecting," depending on the context. Similarly, "if it is determined that" or "if this is detected" may be interpreted to mean "upon determining" or "in response to determining" or "upon detecting" or "in response to detecting," depending on the context.

[0146] The program executed by the server device (200) described in this document may be implemented as hardware components, software components, and / or a combination of hardware components and software components. The program may be executed by any system capable of executing computer-readable instructions.

[0147] Software may include a computer program, code, instructions, or a combination of one or more of these, which can configure a processing device to perform a desired operation or command the processing device, either independently or collectively. Software may be implemented as a computer program including instructions stored on a computer-readable storage medium. Examples of the computer-readable storage medium include magnetic storage media (e.g., read-only memory (ROM), random-access memory (RAM), floppy disks, hard disks, etc.) and optical reading media (e.g., CD-ROMs, digital versatile discs (DVDs)). The computer-readable storage medium may be distributed across network-connected computer systems so that the computer-readable code can be stored and executed in a distributed manner. Computer programs can be distributed online (e.g., by download or upload) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0148] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In electronic devices, A communication unit including a first interface and a second interface; Including a processor electrically connected to the communication unit through the first interface or the second interface, The above processor: Request clock information of the communication unit to the communication unit through the first interface, Through the first interface, the clock information of the communication unit is received from the communication unit, Through the second interface, an interrupt signal and first time information about the generation time of the interrupt signal are received from the communication unit, and An electronic device configured to generate clock information of the processor based on clock information of the communication unit and the first time information.

2. In claim 1, The above first interface includes a USB (universal serial bus) interface, An electronic device, wherein the second interface includes a GPIO (general purpose input output) interface.

3. In claim 1, The above communication department: An electronic device that generates the interrupt signal in response to receiving a request for clock information of the communication unit from the processor.

4. In claim 1, An electronic device, wherein the first time information is included in the interrupt signal.

5. In claim 1, An electronic device wherein the clock information of the communication unit is identified based on a first synchronization signal received through the communication unit.

6. In claim 5, An electronic device, wherein the first synchronization signal includes information about a network to which the electronic device is connected.

7. In claim 1, The above processor: Transmits a synchronization signal to an external electronic device, Receive an ACK (acknowledgement) signal according to the synchronization signal from the external electronic device, An electronic device configured to generate clock information of the processor based on transmission time information at which the synchronization signal is transmitted and reception time information at which the ACK signal is received.

8. In claim 1, The above processor: Receives a synchronization signal from an external electronic device, An electronic device configured to generate clock information of the processor based on second time information regarding a transmission point in time included in the synchronization signal and reception time information regarding a point in time when the synchronization signal is received.

9. In claim 1, The above processor: Based on a plurality of offset values ​​identified over a predetermined period of time, it is determined whether to correct the clock information of the processor, An electronic device wherein the above plurality of offset values ​​are identified based on the difference between clock information of the communication unit and clock information of the processor.

10. In claim 9, The above processor: An electronic device configured to correct clock information of the processor based on identifying that the plurality of offset values ​​continuously increase during the predetermined time period or identifying that the plurality of offset values ​​continuously decrease during the predetermined time period.

11. In the method of operating an electronic device, An operation of requesting clock information of the communication unit of the electronic device through the first interface; An operation of receiving clock information of the communication unit from the communication unit through the first interface; An operation of receiving an interrupt signal and first time information about the generation time of the interrupt signal through the second interface to the processor, and A method including an operation of generating clock information of the processor based on clock information of the communication unit and the first time information.

12. In claim 11, The above first interface includes a USB (universal serial bus) interface, A method wherein the second interface comprises a GPIO (general purpose input output) interface.

13. In claim 11, A method wherein the interrupt signal is generated by the communication unit in response to receiving a request for clock information from the communication unit from the processor.

14. In claim 11, A method wherein the interrupt signal includes the first time information.

15. In claim 11, A method in which clock information of the above communication unit is identified based on a first synchronization signal received through the above communication unit.

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