Semiconductor device

Abstract

The present invention improves characteristics. According to one embodiment of the present invention, in a first semiconductor part of a semiconductor device, a second direction from a first partial region to a second partial region intersects with a first direction from a first electrode to a second electrode, a direction from the first partial region to a third partial region extends along the first direction, a third direction from the second partial region to a fourth partial region intersects with the first direction and a plane that includes the second direction, a direction from the fourth partial region to a fifth partial region extends along the first direction, a direction from the second partial region to a sixth partial region extends along the first direction, a direction from the fourth partial region to the sixth partial region extends along the third direction, the concentration of an impurity having a first conductivity type in the sixth partial region is higher than the concentration of the impurity having the first conductivity type in the first partial region, the second partial region, the third partial region, the fourth partial region, and the fifth partial region, and the fifth partial region and the second electrode are in a Schottky contact with each other.

Description

Semiconductor Devices

[0001] FIELD An embodiment of the present invention relates to a semiconductor device.

[0002] There is a demand for improved characteristics in semiconductor devices having Schottky barrier diodes.

[0003] JP 2023-45865 A

[0004] The embodiments of the present invention provide a semiconductor device capable of improving characteristics.

[0005] According to an embodiment, the semiconductor device comprises a first electrode, a second electrode, a first semiconductor portion of a first conductivity type provided between the first electrode and the second electrode, a second semiconductor portion of a second conductivity type, a fourth semiconductor portion of the first conductivity type, and a third electrode. The first semiconductor portion includes a first partial region, a second partial region aligned with the first partial region in a second direction intersecting a first direction from the first electrode to the second electrode, a third partial region aligned with the first partial region in the first direction, a fourth partial region aligned with the second partial region in a third direction intersecting a plane including the first direction and the second direction, a fifth partial region aligned with the fourth partial region in the first direction and in Schottky contact with the second electrode, and a sixth partial region aligned with the second partial region in the first direction and the fourth partial region in the third direction and having an impurity concentration of the first conductivity type higher than the first impurity concentration of the first conductivity type in the first partial region, the second partial region, the third partial region, the fourth partial region, and the fifth partial region. The second semiconductor portion is provided between the sixth partial region and the second electrode and aligned with the third partial region in the second direction. The fourth semiconductor portion is provided between the second semiconductor portion and the second electrode and is electrically connected to the second electrode. The third electrode is provided to face the third partial region and the second semiconductor portion with a first insulating portion interposed therebetween.

[0006] While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments and is not to be limited to the disclosed exemplary embodiments.

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc., are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In this specification and each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions will be omitted as appropriate.

[0008] FIG. 1 is a schematic perspective view showing an example of a semiconductor device 100. FIGS. 2 to 5 are views showing a portion of the semiconductor device 100 of FIG. 1. FIG. 2 is a view showing a semiconductor section 110 that is a portion of the semiconductor device 100. FIG. 3 is a view showing a semiconductor section 120 that is a portion of the semiconductor device 100. FIG. 4 is a view showing a semiconductor section 130 that is a portion of the semiconductor device 100. FIG. 5 is a view showing a semiconductor section 140 that is a portion of the semiconductor device 100. FIG. 6 is a view showing an example of a side surface of the semiconductor device 100 of FIG. 1.

[0009] The semiconductor device 100 includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor portion 11, a second semiconductor portion 12, a third semiconductor portion 13, and a fourth semiconductor portion 14. The semiconductor device 100 may include a fifth semiconductor portion 15, a silicide layer 16, and a first insulating portion 41. The first semiconductor portion 11, the second semiconductor portion 12, the third semiconductor portion 13, and the fourth semiconductor portion 14 include SiC. The first semiconductor portion 11, the second semiconductor portion 12, the third semiconductor portion 13, and the fourth semiconductor portion 14 may include at least one selected from the group consisting of 4H—SiC, 6H—SiC, and 3C—SiC. These semiconductor portions include crystals. These semiconductor portions may include silicon. These semiconductor portions may include a compound semiconductor containing Ga.

[0010] The direction from the first electrode 51 to the second electrode 52 is defined as a first direction D1. A direction perpendicular to the first direction D1 is defined as a second direction D2. A direction perpendicular to the first direction D1 and the second direction D2 is defined as a third direction D3.

[0011] 2 to 5 show the semiconductor device 100 divided into semiconductor portions 110, 120, 130, and 140 along the third direction D3. The semiconductor device 100 will be described below with reference to FIGS. 2 to 5. Note that a fifth semiconductor portion 15 and a first electrode 51, which will be described later, are not shown in FIGS.

[0012] The first semiconductor portion 11 is provided between the first electrode 51 and the second electrode 52. The first semiconductor portion 11 has a first conductivity type. The first conductivity type is, for example, n-type.

[0013] The first semiconductor portion 11 includes a first partial region 11a, a second partial region 11b aligned with the first partial region 11a in a second direction intersecting with a first direction D1 extending from the first electrode 51 to the second electrode 52, a third partial region 11c aligned with the first partial region 11a in the first direction D1, a fourth partial region 11d aligned with the second partial region 11b in a third direction D3 intersecting with a plane including the first direction D1 and the second direction D2, and a fourth partial region 11c aligned with the fourth partial region 11b in the first direction D1. The semiconductor device further includes a fifth partial region 11e aligned with the second partial region 11b in the first direction D1 and in Schottky contact with the second electrode 52, and a sixth partial region 11f aligned with the second partial region 11b in the first direction D1 and aligned with the fourth partial region 11d in the third direction D3, and having a first conductivity type impurity concentration higher than the first conductivity type impurity concentrations in the first partial region 11a, the second partial region 11b, the third partial region 11c, the fourth partial region 11d, and the fifth partial region 11e. The boundaries between the first partial region 11a, the second partial region 11b, the third partial region 11c, the fourth partial region 11d, the fifth partial region 11e, and the sixth partial region 11f may be clear or unclear. The plane extends in the first direction D1 and the second direction D2.

[0014] For example, the first partial region 11a, the second partial region 11b, the third partial region 11c, the fourth partial region 11d, and the fifth partial region 11e are n regions. The sixth partial region 11f is, for example, n ＋ The sixth partial region 11f includes a first stepped portion 11fa. In this embodiment, as shown in FIGS. 1 and 6, the first stepped portion 11fa is formed in a stepped shape with respect to the second semiconductor portion 12 in a plane including the first direction D1 and the second direction D2.

[0015] A portion where the fifth sub-region 11e and the second electrode 52 make Schottky contact functions as a Schottky barrier diode (SBD). As shown in FIG. 1 , the second electrode 52 may include a first electrode portion 52a and a second electrode portion 52b. At least a portion of the first electrode portion 52a is provided between the sixth sub-region 11f and the second electrode portion 52b in the first direction D1. The first electrode portion 52a may include, for example, Ti. The second electrode portion 52b may include, for example, a metal such as Al.

[0016] The second semiconductor portion 12 is provided between the sixth partial region 11f and the second electrode 52. The second semiconductor portion 12 is aligned with the third partial region 11c in the second direction D2. In this embodiment, the second semiconductor portion 12 is provided on the sixth partial region 11f. Furthermore, in this embodiment, a portion of the second semiconductor portion 12 is also provided on the second partial region 11b. The second semiconductor portion 12 is of the second conductivity type. The second conductivity type is, for example, p-type. Note that when the first conductivity type is p-type, the second conductivity type becomes n-type. The second semiconductor portion 12 is, for example, p-type. ＋ The sixth partial region 11 f is provided directly below the second semiconductor portion 12 .

[0017] 1, 6, etc., the second semiconductor portion 12 includes a second step portion 12a. In this embodiment, the second step portion 12a is formed in a step shape with respect to the sixth partial region 11f in a plane including the first direction D1 and the second direction D2. In this plane, the second step portion 12a and the first step portion 11fa face each other. The boundary between the first step portion 11fa and the second step portion 12a may be clear or unclear.

[0018] The third semiconductor portion 13 is provided between the second semiconductor portion 12 and the second electrode 52. The direction from the third partial region 11c to the third semiconductor portion 13 is along the second direction D2. In this embodiment, the third semiconductor portion 13 is provided on the second semiconductor portion 12. The third semiconductor portion 13 is of the second conductivity type. In this embodiment, it is p-type. The impurity concentration of the second conductivity type in the third semiconductor portion 13 is higher than the impurity concentration of the second conductivity type in the second semiconductor portion 12. The third semiconductor portion 13 is, for example, p ＋＋ A portion of the third semiconductor portion 13 is electrically connected to the second electrode 52. For example, the third semiconductor portion 13 is in ohmic contact with the second electrode 52. The position at which the third semiconductor portion 13 is provided may be determined rationally in consideration of the cell pitch, area, and positional relationship, and the third semiconductor portion 13 may be provided, for example, at the position shown in FIG. 1. By providing the third semiconductor portion 13 at the position shown in FIG. 1, the photolithography process for providing the third semiconductor portion 13 can be shared with the process for the sixth partial region 11f.

[0019] The fourth semiconductor portion 14 is provided between the third semiconductor portion 13 and the second electrode 52. The fourth semiconductor portion 14 is electrically connected to the second electrode 52. In this embodiment, the fourth semiconductor portion 14 is provided on the second semiconductor portion 12 and on the third semiconductor portion 13. The direction from the third partial region 11c to the fourth semiconductor portion 14 is along the second direction D2. The fourth semiconductor portion 14 is of the first conductivity type. In this embodiment, the first conductivity type is n-type. The impurity concentration of the first conductivity type in the fourth semiconductor portion 14 is higher than the impurity concentration of the first conductivity type in the first semiconductor portion 11. The fourth semiconductor portion 14 is, for example, n ＋＋ A part of the fourth semiconductor portion 14 is electrically connected to the second electrode 52. For example, the fourth semiconductor portion 14 is in ohmic contact with the second electrode 52.

[0020] The direction from the first partial region 11a to the third electrode 53 is along the first direction D1. A first insulating portion 41 is provided around the third electrode 53. A part of the first insulating portion 41 is provided between the third partial region 11c and the third electrode 53. The first insulating portion 41 is made of, for example, SiO ２ Includes:

[0021] 2 , a silicide layer 16 is provided in the semiconductor device 100. At least a portion of the silicide layer 16 is provided between the second semiconductor portion 12 and the second electrode 52 in the first direction D1. At least a portion of the silicide layer 16 is provided facing the fourth semiconductor portion 14 in the second direction D2. In this embodiment, the silicide layer 16 is provided on the top surface of the third semiconductor portion 13 and on the side surface of the fourth semiconductor portion 14.

[0022] 1 , the semiconductor device 100 may further include a first insulating portion 41. The first insulating portion 41 includes a first insulating region 41a. At least a portion of the first insulating region 41a is provided between the third partial region 11c and the third electrode 53. A portion of the first insulating portion 41 may be provided between the fourth semiconductor portion 14 and the third electrode 53.

[0023] A portion of the third electrode 53 is provided on the upper surface of the silicide layer 16. A portion of the third electrode 53 is electrically connected to the upper surface of the fourth semiconductor portion 14 via the first insulating portion 41.

[0024] Furthermore, for example, as shown in FIG. 6, an insulating portion 17 may be provided between the fourth semiconductor portion 14 and the first insulating portion 41 and the second electrode 52 .

[0025] The fifth semiconductor portion 15 is provided between the first electrode 51 and the first semiconductor portion 11 in the first direction D1. The fifth impurity concentration of the first conductivity type in the fifth semiconductor portion 15 is higher than the first impurity concentration in the first semiconductor portion 11. The fifth semiconductor portion 15 may correspond to, for example, at least one of a buffer layer and a substrate. A low-resistance electrical connection is obtained.

[0026] In the semiconductor device 100, the current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 may be, for example, a potential based on the potential of the second electrode 52. The first electrode 51 functions as, for example, a drain electrode. The second electrode 52 functions as, for example, a source electrode. The third electrode 53 functions as, for example, a gate electrode. The semiconductor device 100 is, for example, a transistor. Furthermore, the semiconductor device 100 is, for example, a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) with a built-in Schottky barrier diode.

[0027] In the semiconductor device 100, n regions are adjacent to the second partial region 11b, the third partial region 11c, and the fifth partial region 11e, respectively. ＋ The sixth partial region 11f is provided in the region. ＋ The sixth partial region 11f is provided directly below the second semiconductor portion 12. The sixth partial region 11f functions as, for example, a current diffusion layer.

[0028] The third partial region 11c corresponds to, for example, a JFET (Junction Field Effect Transistor) region. In a semiconductor device in which the sixth partial region 11f is provided directly below the third partial region 11c, the oxide film electric field increases. Therefore, measures to address avalanche breakdown resistance, such as narrowing the width W1 of the third partial region 11c in the second direction D2 or thickening the oxide film, are necessary. In contrast, in this embodiment, the sixth partial region 11f is not provided directly below the third partial region 11c. Therefore, the semiconductor device 100 can suppress the increase in the oxide film electric field without implementing the aforementioned measures.

[0029] Furthermore, as shown in FIG. 1 , the third partial region 11c and the sixth partial region 11f are spaced apart by a width W2 in the second direction D2. The width W2 is a finite distance. When the width W2 is 0, i.e., when the third partial region 11c and the sixth partial region 11f are adjacent in the second direction D2, the breakdown voltage of the semiconductor device is determined based on the electric field concentrated in the region A1. In this case, the breakdown voltage is strongly affected by variations in the width W1 of the third partial region 11c in the second direction D2. In the semiconductor device 100 of this embodiment, the third partial region 11c and the sixth partial region 11f are spaced apart by the width W2, so that avalanche breakdown can be guided to the first step portion 11fa and the second step portion 12a. This allows the semiconductor device 100 to stably reduce the avalanche breakdown voltage.

[0030] The fifth partial region 11e corresponds to, for example, a Schottky region. In a semiconductor device in which the sixth partial region 11f is provided directly below the fifth partial region 11e, the electric field of the Schottky junction increases. To suppress this increase in the electric field, for example, it is necessary to narrow the width W3 of the sixth partial region 11f in the second direction. In this embodiment, the sixth partial region 11f is not provided directly below the fifth partial region 11e, and therefore the semiconductor device 100 can suppress the increase in the electric field of the Schottky junction.

[0031] In the semiconductor device 100, the SBD current can be spread along the third direction D3 without increasing the oxide film electric field. Furthermore, the sixth partial region 11f appropriately reduces the breakdown voltage of the second stepped portion 12a (see FIG. 1) of the second semiconductor portion 12. For example, the semiconductor device 100 can improve the avalanche resistance.

[0032] Furthermore, in the semiconductor device 100, the spread of the avalanche current can be improved by the first stepped portion 11fa of the sixth partial region 11f and the second stepped portion 12a of the second semiconductor portion 12. This makes it easier for the semiconductor device 100 to exhibit the effect of improving the avalanche resistance.

[0033] In the semiconductor device 100, the sixth partial region 11 f is provided directly below the second semiconductor portion 12. When manufacturing the second semiconductor portion 12 and the sixth partial region 11 f, a mask for implanting impurities can be shared. This makes it possible to easily provide the sixth partial region 11 f in the semiconductor device 100.

[0034] 1 and the like, the fourth semiconductor portion 14 may include a high-concentration region 14p and a low-concentration region 14q. A part of the high-concentration region 14p is provided between the low-concentration region 14q and the silicide layer 16. The impurity concentration of the first conductivity type in the high-concentration region 14p is higher than the impurity concentration of the first conductivity type in the low-concentration region 14q. The high-concentration region 14p may be, for example, n ＋＋ The low concentration region 14q is, for example, ＋ It is an area.

[0035] In the embodiment, for example, the impurities of the first conductivity type include at least one selected from the group consisting of N, P, and As. For example, the impurities of the second conductivity type include at least one selected from the group consisting of B, Al, and Ga.

[0036] In one example, the concentration of the first conductivity type impurity in the first semiconductor portion 11 is, for example, 1×10 １４ cm －３ 1x10 or more １７ cm －３ In one example, the concentration of the second conductivity type impurity in the second semiconductor portion 12 is, for example, 1×10 １６ cm －３ 1x10 or more ２０ cm －３ In one example, the concentration of the second conductivity type impurity in the third semiconductor portion 13 is, for example, 1×10 １９ cm －３ 1x10 or more ２１ cm －３ In one example, the concentration of the impurity of the first conductivity type in the fourth semiconductor portion 14 is, for example, 1×10 １９ cm －３ 1x10 or more ２１ cm －３In one example, the concentration of the impurity of the first conductivity type in the fifth semiconductor portion 15 is, for example, 1×10 １５ cm －３ 1x10 or more １８ cm －３ The above impurity concentration may be, for example, a substantial carrier concentration.

[0037] In an embodiment, information about the length and thickness can be obtained by electron microscopy, etc. Information about the material composition can be obtained by SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy Dispersive X-ray spectroscopy), etc.

[0038] The embodiments include the following aspects.

[0039] (Supplementary Note 1) A first electrode; a second electrode; and a first semiconductor part of a first conductivity type provided between the first electrode and the second electrode, the first semiconductor part including: a first partial region; a second partial region aligned with the first partial region in a second direction intersecting a first direction from the first electrode to the second electrode; a third partial region aligned with the first partial region in the first direction; a fourth partial region aligned with the second partial region in a third direction intersecting a plane including the first direction and the second direction; a fifth partial region aligned with the fourth partial region in the first direction and in Schottky contact with the second electrode; and a sixth partial region aligned with the second partial region in the first direction and aligned with the fourth partial region in the third direction, and having an impurity concentration of the first conductivity type higher than a first impurity concentration of the first conductivity type in the first partial region, the second partial region, the third partial region, the fourth partial region, and the fifth partial region; a second semiconductor portion of the second conductivity type provided between the sixth partial region and the second electrode and aligned with the third partial region in the second direction; a fourth semiconductor portion of the first conductivity type provided between the second semiconductor portion and the second electrode and electrically connected to the second electrode; and a third electrode provided so as to face the third partial region and the second semiconductor portion via a first insulating portion.

[0040] (Appendix 2) The semiconductor device described in Appendix 1 further comprises a third semiconductor portion of the second conductivity type provided between the second semiconductor portion and the second electrode, the direction from the third partial region to the third semiconductor portion being along the second direction.

[0041] (Supplementary Note 3) The semiconductor device according to Supplementary Note 1, further comprising the first insulating portion, wherein at least a portion of the first insulating portion is provided between the third partial region and the third electrode.

[0042] (Appendix 4) A semiconductor device according to appendix 2 or 3, wherein the impurity concentration of the first conductivity type in the fourth semiconductor portion is higher than the first impurity concentration, and the impurity concentration of the second conductivity type in the third semiconductor portion is higher than the impurity concentration of the second conductivity type in the second semiconductor portion.

[0043] (Appendix 5) The semiconductor device according to any one of Appendices 1 to 4, further comprising a silicide layer, wherein a portion of the silicide layer is provided between the second semiconductor portion and the second electrode in the first direction and is provided opposite the fourth semiconductor portion in the second direction.

[0044] (Appendix 6) The semiconductor device according to any one of Appendices 1 to 5, wherein the fourth semiconductor portion includes a high concentration region and a low concentration region, a portion of the high concentration region is provided between the low concentration region and the silicide layer in the second direction, and a concentration of impurities of the first conductivity type in the high concentration region is higher than a concentration of impurities of the first conductivity type in the low concentration region.

[0045] (Supplementary Note 7) The semiconductor device according to any one of Supplementary Notes 1 to 6, wherein the sixth partial region includes a first stepped portion formed in a stepped shape relative to the second semiconductor portion in a plane including the first direction and the second direction.

[0046] (Appendix 8) The semiconductor device described in any one of Appendices 1 to 7, wherein the second semiconductor portion includes a second stepped portion formed in a stepped shape with respect to the sixth partial region in a plane including the first direction and the second direction.

[0047] (Supplementary Note 9) The semiconductor device described in any one of Supplementary Notes 1 to 8, wherein the sixth partial region includes a first stepped portion formed in a stepped shape relative to the second semiconductor portion in a plane including the first direction and the second direction, and the second semiconductor portion includes a second stepped portion formed in a stepped shape relative to the sixth partial region in a plane including the first direction and the second direction, and the first stepped portion and the second stepped portion are opposed to each other.

[0048] (Supplementary Note 10) The semiconductor device according to any one of Supplementary Notes 2 to 9, wherein a part of the third semiconductor portion and a part of the fourth semiconductor portion are in ohmic contact with the second electrode.

[0049] (Supplementary Note 11) The semiconductor device according to any one of Supplementary Notes 1 to 10, wherein the second electrode includes a first electrode portion and a second electrode portion, and the first electrode portion is provided between the fifth sub-region and the second electrode portion in the first direction.

[0050] (Supplementary Note 12) The semiconductor device according to Supplementary Note 11, wherein at least a part of the first electrode portion is provided between the sixth partial region and the second electrode portion in the first direction.

[0051] (Supplementary Note 13) The semiconductor device according to Supplementary Note 11, wherein the first electrode portion contains Ti.

[0052] (Supplementary Note 14) The semiconductor device according to Supplementary Note 11, wherein the second electrode portion contains Al.

[0053] (Appendix 15) The semiconductor device according to any one of Appendices 1 to 14, further comprising a fifth semiconductor portion of the first conductivity type, the fifth semiconductor portion being provided between the first electrode and the first semiconductor portion in the first direction, and an impurity concentration of the first conductivity type in the fifth semiconductor portion being higher than the first impurity concentration.

[0054] (Supplementary Note 16) The semiconductor device according to any one of Supplementary Notes 2 to 15, wherein the first semiconductor portion, the second semiconductor portion, the third semiconductor portion, and the fourth semiconductor portion include SiC.

[0055] According to the embodiment, a semiconductor device with improved characteristics can be provided.

[0056] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of the elements included in the semiconductor device, such as the electrodes, semiconductor portion, and insulating portion, are within the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting them from known ranges.

[0057] Furthermore, any combination of two or more elements of each specific example within the scope of technical feasibility is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0058] In addition, all semiconductor devices that can be implemented by a person skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.

[0059] In addition, within the scope of the concept of the present invention, a person skilled in the art may come up with various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0060] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0061] DESCRIPTION OF SYMBOLS 11...first semiconductor portion, 11a...first partial region, 11b...second partial region, 11c...third partial region, 11d...fourth partial region, 11e...fifth partial region, 11f...sixth partial region, 11fa...first stepped portion, 12...second semiconductor portion, 12a...second stepped portion, 13...third semiconductor portion, 14...fourth semiconductor portion, 14p...high concentration region, 14q...low concentration region, 15...fifth semiconductor portion, 16...silicide layer, 17...insulating portion, 41...first insulating portion, 51...first electrode, 52...second electrode, 52a...first electrode portion, 52b...second electrode portion, 53...third electrode, 100...semiconductor device, 110, 120, 130, 140...semiconductor portion

Claims

1. A first electrode; a second electrode; and a first semiconductor portion of a first conductivity type provided between the first electrode and the second electrode, the first semiconductor portion including: a first partial region; a second partial region aligned with the first partial region in a second direction intersecting a first direction from the first electrode to the second electrode; a third partial region aligned with the first partial region in the first direction; a fourth partial region aligned with the second partial region in a third direction intersecting a plane including the first direction and the second direction; a fifth partial region aligned with the fourth partial region in the first direction and in Schottky contact with the second electrode; and a sixth partial region aligned with the second partial region in the first direction and aligned with the fourth partial region in the third direction, the sixth partial region having an impurity concentration of the first conductivity type higher than a first impurity concentration of the first conductivity type in the first partial region, the second partial region, the third partial region, the fourth partial region, and the fifth partial region. a second semiconductor portion of a second conductivity type provided between the sixth partial region and the second electrode and aligned with the third partial region in the second direction; a fourth semiconductor portion of the first conductivity type provided between the second semiconductor portion and the second electrode and electrically connected to the second electrode; and a third electrode provided to face the third partial region and the second semiconductor portion via a first insulating portion.

2. The semiconductor device according to claim 1, further comprising a third semiconductor portion of the second conductivity type provided between the second semiconductor portion and the second electrode, the direction from the third partial region to the third semiconductor portion being along the second direction.

3. The semiconductor device described in claim 2, wherein an impurity concentration of the first conductivity type in the fourth semiconductor portion is higher than the first impurity concentration, and an impurity concentration of the second conductivity type in the third semiconductor portion is higher than an impurity concentration of the second conductivity type in the second semiconductor portion.

4. The semiconductor device according to claim 1, further comprising a silicide layer, a portion of the silicide layer being provided between the second semiconductor portion and the second electrode in the first direction and facing the fourth semiconductor portion in the second direction.

5. The semiconductor device described in claim 4, wherein the fourth semiconductor portion includes a high concentration region and a low concentration region, a portion of the high concentration region is provided between the low concentration region and the silicide layer in the second direction, and a concentration of the impurity of the first conductivity type in the high concentration region is higher than a concentration of the impurity of the first conductivity type in the low concentration region.

6. The semiconductor device according to claim 1, wherein the sixth partial region includes a first stepped portion formed in a stepped shape with respect to the second semiconductor portion in a plane including the first direction and the second direction.

7. The semiconductor device according to claim 1, wherein the second semiconductor portion includes a second stepped portion formed in a stepped shape with respect to the sixth partial region in a plane including the first direction and the second direction.

8. The semiconductor device described in claim 1, wherein the sixth partial region includes a first stepped portion formed in a stepped shape with respect to the second semiconductor portion in a plane including the first direction and the second direction, the second semiconductor portion includes a second stepped portion formed in a stepped shape with respect to the sixth partial region in a plane including the first direction and the second direction, and the first stepped portion and the second stepped portion are opposed to each other.

9. The semiconductor device according to claim 2, wherein a portion of said third semiconductor portion and a portion of said fourth semiconductor portion are in ohmic contact with said second electrode.

10. The semiconductor device according to claim 2, wherein the first semiconductor portion, the second semiconductor portion, the third semiconductor portion and the fourth semiconductor portion comprise SiC.

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