Hybrid PERC solar cell and manufacturing method therefor, and tandem solar cell comprising same and manufacturing method therefor
Patent Information
- Application Number
- PCT/KR2023/013659
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-05
- Filing Date
- 2023-09-12
- Publication Date
- 2025-03-13
Smart Images

Figure KR2023013659_13032025_PF_FP_ABST
Abstract
Description
Hybrid PERC solar cell, manufacturing method thereof, tandem solar cell including the same, and manufacturing method thereof
[0001] The present invention relates to solar cells, and more particularly, to a hybrid PERC solar cell suitable for a monolithic tandem solar cell in which a perovskite thin film solar cell is laminated and bonded on a silicon solar cell, a method for manufacturing the same, and a tandem solar cell including the same and a method for manufacturing the same.
[0002] [National Research and Development Project Supporting This Invention]
[0003] [Project ID] 1711196521
[0004] [Assignment Number] 2E32570
[0005] [Ministry Name] Ministry of Science and ICT
[0006] [Name of Project Management (Specialist) Institution] Korea Institute of Science and Technology
[0007] [Research Project Name] Korea Institute of Science and Technology Research Operational Expenses Support (Main Project Expenses)
[0008] [Research Project Name] Development of Next-Generation High-Efficiency Energy Materials Technology
[0009] [Contribution rate] 1 / 4
[0010] [Name of Project Performing Organization] Korea Institute of Science and Technology
[0011] [Research Period] January 1, 2023 - December 31, 2023
[0012] [National Research and Development Project Supporting This Invention]
[0013] [Project ID] 1415186730
[0014] [Assignment Number] 20213091010010
[0015] Ministry of Trade, Industry and Energy
[0016] [Name of Project Management (Specialist) Institution] Korea Institute of Energy Technology Evaluation and Planning
[0017] [Research Project Name] Development of New and Renewable Energy Core Technologies (Electricity)
[0018] [Research Project Title] Super Solar Cells - Development of a Double-Junction Solar Cell that Breaks the Theoretical Limit of Silicon (>35%)
[0019] [Contribution rate] 1 / 4
[0020] [Name of Project Performing Organization] Ulsan National Institute of Science and Technology
[0021] [Research Period] January 1, 2023 - December 31, 2023
[0022] [National Research and Development Project Supporting This Invention]
[0023] [Project ID] 1415187477
[0024] [Assignment Number] 20228520010020
[0025] Ministry of Trade, Industry and Energy
[0026] [Name of Project Management (Specialist) Institution] Korea Institute of Energy Technology Evaluation and Planning
[0027] [Research Project Name] International Joint Research on Energy (E-Tech)
[0028] [Research Project Title] Development of Core Technology for Perovskite / Si Tandem Solar Cells with a Surface Texture Structure and High Efficiency of Over 33% and High Stability at a Commercial Level
[0029] [Contribution rate] 1 / 4
[0030] [Name of Project Performing Organization] Korea Institute of Science and Technology
[0031] [Research Period] May 1, 2023 - December 31, 2023
[0032] [National Research and Development Project Supporting This Invention]
[0033] [Project ID] 1711149222
[0034] [Assignment Number] 2019K1A3A1A61091348
[0035] [Ministry Name] Ministry of Science and ICT
[0036] [Name of Project Management (Specialist) Institution] National Research Foundation of Korea
[0037] [Research Project Name] Strategic International Joint Research Project (R&D)
[0038] [Research Project Title] Development of High-Efficiency Ultra-Thin Crystalline Silicon Sub-Cells with a Thickness of Less than 50μm for Flexible Hybrid Tandem Solar Cell Applications
[0039] [Contribution rate] 1 / 4
[0040] [Name of Project Performing Organization] Korea Institute of Science and Technology
[0041] Research Period: December 31, 2021 - December 30, 2022
[0042] In general, a solar cell is a semiconductor device that directly converts solar energy into electrical energy, and basically has a junction structure of a p-type semiconductor and an n-type semiconductor, similar to a diode.
[0043] As for solar cells, silicon solar cells that use silicon as a semiconductor substrate are mainly used, and silicon solar cells with a p-type PERC (Passivated Emitter and Rear Contact) structure consisting of a diffused junction emitter as shown in Fig. 1 (hereinafter referred to as 'PERC solar cells') are the main type.
[0044] Although the cell efficiency of silicon solar cells has continued to increase, efficiency improvements are reaching their limits.
[0045] Tandem solar cells were developed as one of the methods to overcome the efficiency limitations of these silicon solar cells.
[0046] A tandem solar cell is a device that stacks solar cells with two different energy absorption bands (band gaps) to increase the utilization rate of light energy. The lower solar cell is implemented with a solar cell having a relatively small energy band gap, and the upper solar cell is implemented with a solar cell having a relatively large energy band gap.
[0047] A representative tandem solar cell is the silicon / perovskite tandem solar cell, which combines metal halide perovskite on a silicon solar cell.
[0048] Silicon / perovskite tandem solar cells are mostly based on high-efficiency silicon heterojunction (SHJ) solar cells, and PERC solar cells, which currently account for almost all of the photovoltaic (PV) market, are rarely used in silicon / perovskite tandem solar cells due to the complex intermediate layer manufacturing process.
[0049] Specifically, as illustrated in FIG. 2, when implementing a silicon / perovskite tandem solar cell based on a PERC solar cell, the PERC solar cell used as the lower solar cell is passivated with a dielectric electrode on the front surface, so in order to electrically couple with the upper solar cell, the perovskite thin-film solar cell, the dielectric must be completely removed or locally opened.
[0050] However, as mentioned above, although the method of completely removing the dielectric is technically easy, there is a problem that the loss of open circuit voltage (Voc) increases due to dielectric opening.
[0051] The method of locally opening the dielectric also has the problem of causing a partial loss of open-circuit voltage due to the dielectric opening, and increasing the manufacturing cost of tandem solar cells due to the introduction of an additional process for local opening.
[0052] [Prior Art Literature]
[0053] Patent Registration No. 10-1958930 (Published on March 19, 2019)
[0054] The present invention has been devised to solve the above-mentioned conventional problems, and its purpose is to provide a hybrid PERC solar cell suitable for a tandem solar cell and a manufacturing method thereof by forming the front surface of a PERC solar cell into a heterojunction emitter structure.
[0055] Another object of the present invention is to provide a tandem solar cell based on a hybrid PERC solar cell and a method for manufacturing the same.
[0056] A hybrid PERC solar cell according to one embodiment of the present invention for achieving the aforementioned purpose is characterized by having a PERC rear structure on the rear side and a heterojunction structure of amorphous silicon and crystalline silicon on the front side.
[0057] In addition, a hybrid PERC solar cell according to another embodiment of the present invention for achieving the above-described object is characterized by including: a silicon wafer; a back passivation layer formed on the back of the silicon wafer; a front passivation layer formed on the front of the silicon wafer; an emitter layer formed on the front passivation layer; a TCO layer formed on the emitter layer; and a back electrode layer formed under the back passivation layer and electrically connected to the silicon wafer through an opening.
[0058] In addition, in the hybrid PERC solar cell according to the present invention, the front passivation layer is characterized in that it is formed of intrinsic amorphous silicon.
[0059] In addition, in the hybrid PERC solar cell according to the present invention, the emitter layer is characterized in that it is formed of doped amorphous silicon.
[0060] In addition, in the hybrid PERC solar cell according to the present invention, the rear electrode layer is characterized in that it is electrically connected to the silicon wafer through a laser fired contact (LFC) process after being deposited under the rear passivation layer.
[0061] In addition, in the hybrid PERC solar cell according to the present invention, the rear electrode layer is characterized in that it is electrically connected to the silicon wafer through a multi-step LFC process after being deposited under the rear passivation layer.
[0062] In addition, a method for manufacturing a hybrid PERC solar cell according to the present invention for achieving the above-described object is characterized by including the steps of: preparing a silicon wafer; forming a back passivation layer on the back of the silicon wafer; forming a front passivation layer on the front of the silicon wafer; forming an emitter layer on the front passivation layer; forming a TCO layer on the emitter layer; forming a back electrode layer under the back passivation layer; and electrically connecting the back electrode layer to the silicon wafer to form a back electric field region.
[0063] In addition, the method for manufacturing a hybrid PERC solar cell according to the present invention is characterized in that, in the step of forming a passivation layer on the front surface of the silicon wafer, the front passivation layer is formed through a PECVD (Plasma Enhanced Chemical Vapor Deposition) process.
[0064] In addition, the method for manufacturing a hybrid PERC solar cell according to the present invention is characterized in that, in the step of forming an emitter layer on the front passivation layer, the emitter layer is formed through a PECVD process.
[0065] In addition, the method for manufacturing a hybrid PERC solar cell according to the present invention is characterized in that, in the step of forming a TCO layer on the emitter layer, the TCO layer is formed through a sputtering process.
[0066] In addition, in the method for manufacturing a hybrid PERC solar cell according to the present invention, the step of forming the rear electric field region is characterized in that it is performed through a laser fired contact (LFC) process.
[0067] In addition, in the method for manufacturing a hybrid PERC solar cell according to the present invention, a single hole array is formed by removing a portion of the rear electrode layer and the rear passivation layer at regular intervals through the laser firing bonding process.
[0068] In addition, in the method for manufacturing a hybrid PERC solar cell according to the present invention, it is characterized in that a multi-hole array is formed by removing a portion of the rear electrode layer and the rear passivation layer at regular intervals through the laser firing bonding process.
[0069] In addition, in the method for manufacturing a hybrid PERC solar cell according to the present invention, the step of forming the rear field region is characterized in that, after forming the rear field region through the LFC process, a post-heat treatment process is performed, but the temperature of the post-heat treatment process does not exceed 200°C.
[0070] In addition, in the method for manufacturing a hybrid PERC solar cell according to the present invention, the step of forming the rear electric field region is characterized in that it is performed through a multi-stage LFC process.
[0071] In addition, in the hybrid PERC solar cell manufacturing method according to the present invention, the multi-stage LFC process is characterized by including: a step of removing a portion of the rear electrode layer and the rear passivation layer using a laser; a step of transferring a metal material to a space from which the rear electrode layer and the rear passivation layer have been removed; and a step of forming a rear electric field region through a laser firing process so that the metal material, the rear electrode layer, and the silicon wafer are electrically bonded.
[0072] In addition, a tandem solar cell based on a hybrid PERC solar cell according to the present invention for achieving the aforementioned purpose is characterized by including: a lower solar cell implemented with a hybrid PERC solar cell according to the present invention; and an upper solar cell formed on the lower solar cell to be electrically connected to the lower solar cell.
[0073] In addition, a tandem solar cell manufacturing method based on a hybrid PERC solar cell according to the present invention for achieving the aforementioned purpose is characterized by including a step of forming a lower solar cell according to the hybrid PERC solar cell manufacturing method according to the present invention; and a step of forming an upper solar cell on the lower solar cell so as to be electrically connected to the lower solar cell.
[0074]
[0075] Specific details of other embodiments are included in the “Specific Details for Carrying Out the Invention” and the attached “Drawings.”
[0076] The advantages and / or features of the present invention and the methods for achieving them will become clear with reference to the various embodiments described in detail below together with the accompanying drawings.
[0077] However, the present invention is not limited to the configuration of each embodiment disclosed below, but may be implemented in various different forms, and each embodiment disclosed in this specification is provided only to ensure that the disclosure of the present invention is complete and to fully inform a person having ordinary skill in the art to which the present invention pertains of the scope of the present invention, and it should be understood that the present invention is defined only by the scope of each claim of the claims.
[0078] According to the present invention, the front surface of a PERC solar cell is formed with a heterojunction emitter structure, thereby minimizing open circuit voltage loss.
[0079] Based on these hybrid PERC solar cells, high-efficiency tandem solar cells can be realized.
[0080] Figure 1 is a schematic diagram showing the structure of a PERC solar cell according to conventional technology.
[0081] Figure 2 is a schematic diagram showing the structure of a tandem solar cell based on a PERC solar cell according to the prior art.
[0082] FIG. 3 is a conceptual diagram of a hybrid PERC solar cell according to one embodiment of the present invention.
[0083] FIG. 4 is a schematic diagram showing the structure of a hybrid PERC solar cell according to one embodiment of the present invention.
[0084] FIG. 5 is a drawing showing a process for manufacturing a hybrid PERC solar cell according to one embodiment of the present invention.
[0085] FIG. 6 and FIG. 7 are drawings exemplifying a laser firing bonding pattern formed through an LFC process according to the present invention.
[0086] Figure 8 is a drawing showing a multi-stage LFC process applied to the present invention.
[0087] FIG. 9 and FIG. 10 are diagrams showing exemplary performance comparison results of a PERC solar cell according to the prior art and a hybrid PERC solar cell according to the present invention.
[0088] FIG. 11 is a schematic diagram showing the structure of a tandem solar cell based on a hybrid PERC solar cell according to one embodiment of the present invention.
[0089] FIG. 12 is a drawing showing a tandem solar cell manufacturing process based on a hybrid PERC solar cell according to one embodiment of the present invention.
[0090] FIG. 13 is a diagram exemplifying the performance of a tandem solar cell based on a hybrid PERC solar cell according to the present invention.
[0091] Before describing the present invention in detail, it should be understood that the terms or words used in this specification should not be interpreted as being unconditionally limited to their usual or dictionary meanings, and that the inventor of the present invention may appropriately define and use the concepts of various terms in order to explain his or her invention in the best possible manner, and further, that these terms or words should be interpreted as meanings and concepts that are consistent with the technical idea of the present invention.
[0092] That is, it should be noted that the terms used in this specification are only used to describe preferred embodiments of the present invention, and are not intended to specifically limit the contents of the present invention, and that these terms are defined in consideration of various possibilities of the present invention.
[0093] Additionally, in this specification, it should be noted that singular expressions may include plural expressions unless the context clearly indicates a different meaning, and similarly, even if expressed in plural, may include a singular meaning.
[0094] Throughout this specification, whenever a component is described as "including" another component, it may mean that the component may further include any other component, rather than excluding any other component, unless specifically stated otherwise.
[0095] Furthermore, when it is described that a component is "located within, connected to, or installed within" another component, it should be understood that the component may be installed in direct connection with or in contact with the other component, may be installed spaced apart from the other component by a certain distance, and if it is installed spaced apart from the other component by a certain distance, there may be a third component or means for fixing or connecting the component to the other component, and the description of this third component or means may be omitted.
[0096] On the other hand, if a component is described as being "directly connected" or "directly connected" to another component, it should be understood that no third component or means exists.
[0097] Likewise, other expressions that describe the relationship between components, such as "between" and "directly between", or "adjacent to" and "directly adjacent to", should be interpreted as having the same meaning.
[0098] In addition, it should be noted that the terms “one side,” “the other side,” “one side,” “the other side,” “first,” “second,” etc. in this specification, if used, are used to clearly distinguish one component from another component, and the meaning of the component is not limited by such terms.
[0099] In addition, terms related to position, such as “upper,” “lower,” “left,” and “right,” etc., in this specification, if used, should be understood to indicate relative positions of the corresponding components in the corresponding drawings, and unless absolute positions are specified for these positions, these position-related terms should not be understood to refer to absolute positions.
[0100] Moreover, in the specification of the present invention, it should be noted that the terms “part”, “device”, “module”, “device”, etc., if used, mean a unit capable of processing one or more functions or operations, which may be implemented by hardware or software, or a combination of hardware and software.
[0101] In addition, in this specification, when specifying the drawing numbers for each component of each drawing, the same component has the same drawing number even if the component is shown in a different drawing, that is, the same reference number indicates the same component throughout the specification.
[0102] In the drawings attached to this specification, the size, position, connection relationship, etc. of each component constituting the present invention may be described with some exaggeration, reduction, or omission in order to sufficiently clearly convey the idea of the present invention or for convenience of explanation, and therefore the proportions or scales may not be strict.
[0103] In addition, in the following description of the present invention, a detailed description of a configuration that is judged to unnecessarily obscure the gist of the present invention, for example, a known technology including a prior art, may be omitted.
[0104]
[0105] Hereinafter, with reference to the attached drawings, a hybrid PERC solar cell according to a preferred embodiment of the present invention, a method for manufacturing the same, and a tandem solar cell including the same and a method for manufacturing the same will be described in detail.
[0106] FIG. 3 is a conceptual diagram of a hybrid PERC solar cell according to one embodiment of the present invention. The hybrid PERC solar cell according to the present invention can be implemented by borrowing the front heterojunction emitter structure of a SHJ solar cell and the rear local back-field (LBSF) structure of a PERC solar cell.
[0107] That is, the hybrid PERC solar cell according to the present invention can be implemented so that the rear side has a conventional PERC rear structure and the front side has a heterojunction structure of amorphous silicon and crystalline silicon.
[0108] FIG. 4 is a schematic diagram showing the structure of a hybrid PERC solar cell according to one embodiment of the present invention.
[0109] As shown in FIG. 4, a hybrid PERC solar cell (100) according to the present invention may include a silicon wafer (110), a rear passivation layer (120), a front passivation layer (130), an emitter layer (140), a TCO (Transparent Conductive Oxide) layer (150), a rear electrode layer (160), etc.
[0110] In one embodiment of the present invention, the silicon wafer (110) may be formed of a p-type silicon wafer having arbitrary pyramids formed on both sides, but is not limited thereto.
[0111] A back passivation layer (120) may be formed on the back surface of the silicon wafer (110) for back passivation.
[0112] The rear passivation layer (120) may be formed as a single-layer thin film made of any one of SiNx, AlOx, SiOx, SiOxNy, and SiCx, or as a multi-layer thin film made of a combination thereof, but is not limited thereto.
[0113] In an embodiment of the present invention, AlOx can be deposited to a thickness of 20 nm through an ALD (Atomic Layer Deposition) process as a rear passivation layer (120), and a SiNx capping layer can be deposited to a thickness of 80 nm through a PECVD (Plasma Enhanced Chemical Vapor Deposition) process.
[0114] A front passivation layer (130) may be formed on the front surface of a silicon wafer (110) for front passivation, and an emitter layer (140) may be formed on the front passivation layer (130).
[0115] In an embodiment of the present invention, the front passivation layer (130) and the emitter layer (140) can be deposited continuously in the same process chamber without vacuum destruction.
[0116] That is, in the embodiment of the present invention, after depositing intrinsic amorphous silicon (ia-Si) as a front passivation layer (130) through a PECVD process, doped n-type amorphous silicon (na-Si) can be continuously deposited as an emitter layer (140) through a PECVD process without vacuum destruction. Here, the intrinsic amorphous silicon (ia-Si) deposited as the front passivation layer (130) can be deposited to a thickness of 7 nm, and the doped n-type amorphous silicon (na-Si) deposited as the emitter layer (140) can be deposited to a thickness of 15 nm.
[0117] The front passivation layer (130) must be able to provide high surface passivation performance and low contact resistance.
[0118] To this end, it is desirable to secure optimal process conditions so that the front passivation layer (130) has high surface passivation performance and low contact resistance by varying PEVCD process parameters such as the SiH4 to H2 dilution ratio and deposition temperature.
[0119] The emitter layer (140) requires a certain level of conductivity and thickness for effective carrier extraction.
[0120] To this end, it is desirable to secure optimal process conditions for obtaining optimal conductivity by varying PEVCD process parameters such as the SiH4 to H2 dilution ratio, the ratio of dopant gas PH3 to precursor SiH4, deposition temperature, and plasma power.
[0121] A TCO layer (150) can be formed on top of the sequentially laminated front passivation layer (130) and emitter layer (140).
[0122] The TCO layer (150) may be formed of, but is not limited to, ITO (Indium Tin Oxide), IWO (Indium Tungsten Oxide), ZITO (Zinc Indium Tin Oxide), ZIO (Zinc Indium Oxide), ZTO (Zinc Tin Oxide), GITO (Gallium Indium Tin Oxide), GIO (Gallium Indium Oxide), GZO (Gallium Zinc Oxide), AZO (Aluminum doped Zinc Oxide), FTO (Fluorine Tin Oxide), ZnO, etc.
[0123] The TCO layer (150) serves as a recombination junction layer electrically connected to the upper solar cell when implementing a tandem solar cell based on a hybrid PERC solar cell, and can be replaced with a tunnel recombination junction layer such as n++ / p++ Si.
[0124] The TCO layer (150) must have low resistance for smooth transport of carriers, high transmittance for maximizing light transmission, and be able to minimize deterioration of the front passivation layer (130) and emitter layer (140).
[0125] In an embodiment of the present invention, a TCO layer (150) is formed by depositing ITO to a thickness of 20 nm through a sputtering process, and the ITO thin film can be optimized by controlling the oxygen fraction and wafer temperature to increase electrical conductivity and reduce passivation deterioration due to sputtering damage caused by changes in deposition temperature.
[0126] An Ag grid electrode can be formed on the TCO layer (150) using an evaporator.
[0127] Meanwhile, a rear electrode layer (160) is formed on the rear side of the rear passivation layer (120), and the rear electrode layer (160) can be electrically connected to the silicon wafer (110) through the opening.
[0128] The rear electrode layer (160) may be made of aluminum (Al), but is not limited thereto.
[0129] Here, the rear electrode layer (160) formed on the rear side of the rear passivation layer (120) can be formed through vacuum deposition, screen printing, etc.
[0130] The rear electrode layer (160) can be electrically connected to the silicon wafer (110) by depositing the rear surface of the rear passivation layer (120) and then locally opening the rear passivation layer (120) through a laser fired contact (LFC) process.
[0131] Specifically, a rear electrode layer (160) is formed by depositing aluminum (Al) as a metal electrode with a thickness of 1 μm on the rear surface of the rear passivation layer (120), and then, through the LFC process, some areas of the rear electrode layer (160) and the rear passivation layer (120) are removed (opened) to electrically bond Al-Si (aluminum-silicon).
[0132] As described above, when electrically connecting the back electrode layer (160) to the silicon wafer (110) by locally opening the back passivation layer (120) through the LFC process, a multi-stage LFC process can be applied to strengthen the back surface field (BSF), which will be described in more detail below.
[0133] In addition, the laser firing bonding pattern formed by locally opening the rear passivation layer (120) through the LFC process to electrically connect the rear electrode layer (160) to the silicon wafer (110) is based on a form in which single holes are regularly arranged, but can also be implemented in a form in which two or more multi-holes are regularly arranged to increase the aperture ratio, which will be described in more detail below.
[0134] This LFC process can be performed at room temperature, so it has very high process compatibility with the heterojunction emitter structure formed on the front surface of the silicon wafer (110), and since there is no wafer warping problem due to the difference in thermal expansion coefficients between silicon and metal, it can be adapted to very thin wafer thicknesses.
[0135] FIG. 5 is a drawing showing a process for manufacturing a hybrid PERC solar cell according to one embodiment of the present invention.
[0136] First, prepare a silicon wafer (110) (S110).
[0137] The silicon wafer (110) may be formed of a p-type silicon wafer with arbitrary pyramids formed on both sides.
[0138] Afterwards, a back passivation layer (120) is formed on the back of the silicon wafer (110) for back passivation (S120).
[0139] In the above step S120, AlOx can be deposited to a thickness of 20 nm as a rear passivation layer (120) through an ALD process, and a SiNx capping layer can be deposited to a thickness of 80 nm through a PECVD process, but is not limited thereto.
[0140] Afterwards, a front passivation layer (130) is formed on the front surface of the silicon wafer (110) for front passivation (S130).
[0141] In the above step S130, a 7 nm thick intrinsic amorphous silicon (ia-Si) can be deposited as a front passivation layer (130) through a PECVD process, but is not limited thereto.
[0142] The front passivation layer (130) formed through the above-described step S130 must be able to provide high surface passivation performance and low contact resistance.
[0143] Accordingly, it is desirable to secure optimal process conditions that can increase the passivation performance of the front passivation layer (130) and reduce the contact resistance by varying PEVCD process parameters such as the SiH4 to H2 dilution ratio and deposition temperature.
[0144] Afterwards, an emitter layer (140) is formed on the front passivation layer (130) (S140).
[0145] In the above step S140, doped n-type amorphous silicon (na-Si) can be deposited to a thickness of 15 nm as an emitter layer (140) through a PECVD process, but is not limited thereto.
[0146] The emitter layer (140) formed through the above-described step S150 requires a certain level of conductivity and thickness for effective carrier extraction.
[0147] Accordingly, it is desirable to secure optimal process conditions for obtaining optimal conductivity by varying PEVCD process parameters such as the SiH4 to H2 dilution ratio, the ratio of dopant gas PH3 to precursor SiH4, deposition temperature, and plasma power.
[0148] The front passivation layer (130) deposition process of the above-described step S130 and the emitter layer (140) deposition process of the above-described step S140 may be performed continuously in the same process chamber or may be performed in different process chambers.
[0149] Afterwards, a TCO layer (150) is formed on the emitter layer (140) (S150).
[0150] In the above step S150, ITO can be deposited to a thickness of 20 nm through a sputtering process as a TCO layer (150), but is not limited thereto.
[0151] The TCO layer (150) formed through the above-described step S150 must have low resistance for smooth transport of carriers, high light transmittance for maximizing light transmission, and be able to minimize deterioration of the front passivation layer (130) and emitter layer (140) due to sputtering damage.
[0152] Accordingly, it is desirable to secure optimal process conditions that can reduce passivation deterioration due to sputtering damage caused by changes in deposition temperature and high electrical conductivity and light transmittance by varying the oxygen partial pressure and substrate temperature.
[0153] An Ag grid electrode can be formed on the TCO layer (150) formed through the above-described step S150 using an evaporator.
[0154] Here, the ITO formed as the TCO layer (150) and the upper Ag grid electrode can be patterned using photolithography.
[0155] Afterwards, a rear electrode layer (160) is formed on the rear side of the rear passivation layer (120) (S160).
[0156] In the above step S160, the rear electrode layer (160) is deposited on the rear surface of the rear passivation layer (120) and can then be electrically connected to the silicon wafer (110) through the LFC process.
[0157] Specifically, a rear electrode layer (160) is formed by depositing aluminum (Al) as a metal electrode with a thickness of 1 μm on the rear surface of the rear passivation layer (120), and then, through the LFC process, some areas of the rear electrode layer (160) and the rear passivation layer (120) are removed (opened) to allow Al-Si (aluminum-silicon) to be electrically bonded.
[0158] Here, the laser firing bonding pattern formed by locally opening the rear electrode layer (160) and the rear passivation layer (120) through the LFC process to electrically connect the rear electrode layer (160) to the silicon wafer (110) can be formed in the form of a single hole array, as shown in FIG. 6.
[0159] Single hole arrays can be fabricated using nanosecond pulsed lasers, and can be formed by repeatedly irradiating the laser at regular intervals.
[0160] When a nanosecond pulse laser is irradiated to the rear surface where the rear electrode layer (160) is formed, the temperature locally increases due to absorption of strong light energy at the location where the laser is irradiated, and as a result, the rear passivation layer (120) between the rear electrode layer (160) and the silicon wafer (110) is destroyed, and the aluminum (Al) forming the rear electrode layer (160) diffuses toward the silicon wafer (110) to form a p+ doping layer.
[0161] In addition, the laser firing bonding pattern formed by locally opening the rear electrode layer (160) and the rear passivation layer (120) through the LFC process to electrically connect the rear electrode layer (160) to the silicon wafer (110) can be formed in the form of a multi-hole array that increases the effective radius by placing holes adjacent to each other to increase the contact radius (opening ratio) of the Al-Si (aluminum-silicon) contact layer, as shown in FIG. 7.
[0162] Here, the pitch between holes can be selected in the range of 300㎛ to 2,000㎛, and the number of multi-holes can be selected in the range of 2 to 9, but is not limited thereto.
[0163] The wavelength of the laser used in the LFC process is appropriately 532 nm and 1,064 nm, and the pulse width can be selected in the range of ns to µs, but is not limited thereto.
[0164] As explained above, the LFC process damages the silicon wafer (110) by irradiating it with a laser to electrically bond the back electrode layer (160) and the silicon wafer (110), which increases the recombination loss of minority carriers near the local bonding holes, thereby reducing the open circuit voltage (Voc), and the metal electrode / silicon contact resistance also affects the series resistance.
[0165] Therefore, in order to minimize damage and contact resistance of the silicon wafer (110), it is desirable to secure optimal process conditions by varying LFC process parameters such as pulse number, defocusing through z-axis change, and laser output.
[0166] In the above step S160, the rear electrode layer (160) can be electrically connected to the silicon wafer (110) through a multi-step LFC process.
[0167] The multi-step LFC process can be performed by including a first step of removing a portion of the rear electrode layer (160) and the rear passivation layer (120) using a pulsed laser, as illustrated in FIG. 8, a second step of transferring a metal material to the space where the rear electrode layer (160) and the rear passivation layer (120) were removed, and a third step of forming a rear electric field region through a laser firing process so that the metal material, the rear electrode layer (160), and the silicon wafer (110) are electrically bonded.
[0168] In the first step, a pulsed laser is irradiated to the location where the rear electrode layer (160) and the rear passivation layer (120) are to be removed, thereby removing the rear electrode layer (160) and the rear passivation layer (120). At this time, the number of pulsed laser irradiations to the rear electrode layer (160) and the rear passivation layer (120) can be limited to minimize loss of the silicon wafer (110).
[0169] In the second step, a transparent substrate on which a dopant thin film is deposited is prepared, and the transparent substrate on which the dopant thin film is deposited is spaced apart from the silicon wafer (110) on which the first step process was performed by a certain distance (for example, 10 to 50 μm), and then a pulsed laser is irradiated to the rear surface of the transparent substrate on which the dopant thin film is deposited, so that the dopant thin film is transferred to the silicon wafer (110) by the pulsed laser. Here, when the pulsed laser is irradiated to the rear surface of the transparent substrate on which the dopant thin film is deposited, it is preferable that the pulsed laser is aligned and irradiated to the position where the rear electrode layer (160) and the rear passivation layer (120) are removed.
[0170] The dopant thin film deposited on the transparent substrate may be composed of, but is not limited to, boron (B), phosphorus (In), aluminum (Al), or an alloy comprising these.
[0171] In the third step, a pulsed laser having lower energy than the pulsed laser used in the first and second steps is used to irradiate the hole processed through the first and second steps. That is, a pulsed laser having lower intensity than the pulsed laser used in the first and second steps is irradiated to the hole processed through the first and second steps. This allows the dopant to diffuse into the silicon wafer (110) and increase the doping concentration near the opening.
[0172] After forming the rear electrode layer (160) through the above-described step S160, FGA (Forming Gas Annealing) can be performed at 200°C for 20 minutes to remove heat damage caused by the high energy of the laser (S170).
[0173] FIG. 9 and FIG. 10 are drawings showing exemplary results of performance comparison between a PERC solar cell according to the prior art and a hybrid PERC solar cell according to the present invention. It can be confirmed that the open circuit voltage (Voc) of the hybrid PERC solar cell according to the present invention increases by approximately 40 mV or more and the efficiency increases by approximately 0.6% or more compared to the PERC solar cell according to the prior art.
[0174] FIG. 11 is a schematic diagram showing the structure of a tandem solar cell based on a hybrid PERC solar cell according to one embodiment of the present invention.
[0175] As shown in Fig. 11, a tandem solar cell according to the present invention can be formed by including a lower solar cell (100) and an upper solar cell (200).
[0176] In an embodiment of the present invention, the lower solar cell (100) can be implemented as a hybrid PERC solar cell (100) having a structure as shown in FIG. 4. Since the structure of the hybrid PERC solar cell (100) has already been described above, a further description thereof will be omitted.
[0177] The upper solar cell (200) can be formed on the lower solar cell (100) to be electrically connected to the lower solar cell (100).
[0178] The upper solar cell (200) can be laminated on the lower solar cell (100) through a solution or vacuum deposition process.
[0179] In an embodiment of the present invention, the upper solar cell (200) is a solar cell with a relatively large energy band gap, and preferably has a band gap larger than the energy band gap of the lower solar cell (100).
[0180] The upper solar cell (200) can be implemented as a chalcogenide thin film solar cell, a Cu(In,Ga)Se2 thin film solar cell, an amorphous silicon thin film solar cell, a metal halide perovskite thin film solar cell, a CdTe thin film solar cell, an organic thin film solar cell, etc., but is not limited thereto.
[0181] For example, in an embodiment of the present invention, the upper solar cell (200) may be implemented as a metal halide perovskite thin film solar cell having a structure including a hole transport layer (HTL) (210), a perovskite layer (220), an electron transport layer (ETL) (230), and a TCO layer (240).
[0182] FIG. 12 is a drawing showing a tandem solar cell manufacturing process based on a hybrid PERC solar cell according to one embodiment of the present invention.
[0183] First, a lower solar cell (100) is formed (S100).
[0184] In an embodiment of the present invention, the lower solar cell (100) can be implemented as a hybrid PERC solar cell (100) having a structure as shown in FIG. 4. Since the manufacturing process of the hybrid PERC solar cell (100) has already been described above, a further description thereof will be omitted.
[0185] Afterwards, an upper solar cell (200) is formed on the lower solar cell (100) (S200).
[0186] In an embodiment of the present invention, the upper solar cell (200) may have a structure including an HTL (210), a perovskite layer (220), an ETL (230), and a TCO layer (240).
[0187] Accordingly, in the above step S200, the HTL (210), the perovskite layer (220), the ETL (230), and the TCO layer (240) can be sequentially formed on the lower solar cell (100).
[0188] Here, the HTL (210) deposited on the TCO layer (150) of the lower solar cell (100) performs hole transport from the perovskite layer (220) to the TCO layer (150) of the lower solar cell (100) without damaging transparency and conductivity.
[0189] The perovskite layer (220) is deposited on the HTL (210), absorbs light, and generates holes and electrons, which can then diffuse to the HTL (210) and ETL (230), respectively.
[0190] ETL (230) is deposited on the perovskite layer (220) and performs electron transport from the perovskite layer (220) to the TCO layer (240) without damaging transparency and conductivity.
[0191] After forming the upper solar cell (200) through the above-described step S210, a metal electrode can be formed on the front surface of the upper solar cell (200) to complete the tandem solar cell (S220).
[0192] Specifically, after forming an anti-reflective layer on the TCO layer (240) of the upper solar cell (200), a Ag grid electrode can be vacuum-deposited to form a metal electrode on the front surface of the upper solar cell (200).
[0193] FIG. 13 is a diagram exemplarily showing the performance of a tandem solar cell based on a hybrid PERC solar cell according to the present invention, and it can be confirmed that the tandem solar cell based on the hybrid PERC solar cell according to the present invention achieves an efficiency of approximately 26.7%.
[0194] In this way, according to the present invention, the front surface of a PERC solar cell is formed with a heterojunction emitter structure, thereby minimizing the loss of open circuit voltage (Voc).
[0195] And since the rear electrode layer formed on the rear surface is formed through the LFC process performed at room temperature, the process compatibility with the heterojunction emitter structure formed on the front surface of the silicon wafer (110) is very high, and the post-heat treatment process temperature does not exceed 200°C, so the hybrid PERC solar cell manufacturing process according to the present invention can be performed at a low temperature not exceeding 200°C, and since there is no wafer warping problem due to the difference in thermal expansion coefficients between silicon and metal, it can be adapted to a very thin wafer thickness.
[0196] In addition, it will be possible to implement a high-efficiency tandem solar cell based on a hybrid PERC solar cell in which the front surface of the PERC solar cell is formed with a heterojunction emitter structure.
[0197] Above, although some examples have been given and various preferred embodiments of the present invention have been described, the description of the various embodiments described in the “Specific Details for Carrying Out the Invention” section is merely exemplary, and those skilled in the art to which the present invention pertains will readily understand that they can carry out various modifications of the present invention or carry out equivalent implementations of the present invention based on the above description.
[0198] In addition, since the present invention can be implemented in various other forms, the present invention is not limited by the above description, and the above description is provided only to make the disclosure of the present invention complete and to fully inform a person having ordinary skill in the art to which the present invention belongs of the scope of the present invention, and it should be understood that the present invention is defined only by each claim of the claims.
[0199] [Explanation of symbols]
[0200] 100. Hybrid PERC solar cell / sub-solar cell
[0201] 110. Silicon wafer
[0202] 120. Rear passivation layer
[0203] 130. Front passivation layer
[0204] 140. Emitter layer
[0205] 150, 240. TCO layer
[0206] 160. Rear electrode layer
[0207] 200. Top solar cell
[0208] 210. HTL
[0209] 220. Perovskite layer
[0210] 230. ETL
Claims
1. Has a PERC rear structure on the back, Characterized by having a heterojunction structure of amorphous silicon and crystalline silicon on the front surface, Hybrid PERC solar cells.
2. Silicon wafer; A rear passivation layer formed on the rear surface of the silicon wafer; A front passivation layer formed on the front surface of the silicon wafer; An emitter layer formed on the front passivation layer; A TCO layer formed on the emitter layer; A rear electrode layer formed under the rear passivation layer and electrically connected to the silicon wafer through an opening; characterized in that it includes; Hybrid PERC solar cells.
3. In paragraph 2, The above front passivation layer is, characterized by being formed of true amorphous silicon, Hybrid PERC solar cells.
4. In paragraph 2, The above emitter layer is, characterized in that it is formed of doped amorphous silicon, Hybrid PERC solar cells.
5. In paragraph 2, The above rear electrode layer is, Characterized in that after being deposited under the rear passivation layer, it is electrically connected to the silicon wafer through a laser fired contact (LFC) process. Hybrid PERC solar cells.
6. In paragraph 2, The above rear electrode layer is, Characterized in that after being deposited under the above rear passivation layer, it is electrically connected to the silicon wafer through a multi-step LFC process. Hybrid PERC solar cells.
7. Step for preparing silicon wafers; A step of forming a rear passivation layer on the rear surface of the silicon wafer; A step of forming a front passivation layer on the front surface of the silicon wafer; A step of forming an emitter layer on the front passivation layer; A step of forming a TCO layer on the emitter layer; A step of forming a rear electrode layer under the rear passivation layer; and A step of electrically connecting the rear electrode layer to the silicon wafer to form a rear electric field region; characterized in that it includes; Method for manufacturing hybrid PERC solar cells.
8. In paragraph 7, In the step of forming a passivation layer on the front surface of the silicon wafer, The above front passivation layer is characterized in that it is formed through a PECVD (Plasma Enhanced Chemical Vapor Deposition) process. Method for manufacturing hybrid PERC solar cells.
9. In paragraph 7, In the step of forming an emitter layer on the above front passivation layer, The above emitter layer is characterized in that it is formed through a PECVD process. Method for manufacturing hybrid PERC solar cells.
10. In paragraph 7, In the step of forming a TCO layer on the above emitter layer, The above TCO layer is characterized in that it is formed through a sputtering process. Method for manufacturing hybrid PERC solar cells.
11. In paragraph 7, The step of forming the above rear electric field region is: Characterized by being formed through a laser fired contact (LFC) process, Method for manufacturing hybrid PERC solar cells.
12. In paragraph 11, A single hole array is formed by removing a portion of the rear electrode layer and the rear passivation layer at regular intervals through the laser firing bonding process. Method for manufacturing hybrid PERC solar cells.
13. In paragraph 11, A multi-hole array is formed by removing a portion of the rear electrode layer and the rear passivation layer at regular intervals through the laser firing bonding process. Method for manufacturing hybrid PERC solar cells.
14. In paragraph 11, The step of forming the above rear electric field region is: After forming the rear electric field region through the above LFC process, a post-heat treatment process is performed, but the post-heat treatment process temperature does not exceed 200°C. Method for manufacturing hybrid PERC solar cells.
15. In paragraph 7, The step of forming the above rear electric field region is: Characterized by being carried out through a multi-stage LFC process, Method for manufacturing hybrid PERC solar cells.
16. In paragraph 15, The above multi-stage LFC process is, A step of removing a portion of the rear electrode layer and the rear passivation layer using a laser; A step of transferring a metal material to a space from which the rear electrode layer and the rear passivation layer have been removed; and A step of forming a rear electric field region through a laser firing process so that the metal material, the rear electrode layer, and the silicon wafer are electrically bonded; characterized in that it includes; Method for manufacturing hybrid PERC solar cells.
17. A lower solar cell implemented with a hybrid PERC solar cell according to any one of claims 1 to 6; and characterized in that it comprises an upper solar cell formed on the lower solar cell to be electrically connected to the lower solar cell; Tandem solar cells.
18. A step of forming a lower solar cell according to a method for manufacturing a hybrid PERC solar cell according to any one of claims 7 to 16; and A step of forming an upper solar cell on the lower solar cell to electrically connect with the lower solar cell; characterized in that it includes; Method for manufacturing tandem solar cells.
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