Optoelectronic device and method of processing the same

The horizontal pLED design with an electrically isolated mirror addresses the challenges of luminosity, emission efficiency, and oxygen corrosion in optoelectronic devices, achieving improved performance and manufacturing simplicity.

WO2025056620A1PCT designated stage expired Publication Date: 2025-03-20AMS OSRAM INT GMBH
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Patent Information

Application Number
PCT/EP2024/075396
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-14
Filing Date
2024-09-11
Publication Date
2025-03-20

AI Technical Summary

Technical Problem

Existing optoelectronic devices, particularly pLEDs, face challenges in increasing luminosity and emission efficiency while minimizing power consumption and preventing oxygen corrosion, which affects their lifetime.

Method used

The proposed solution involves a horizontal pLED design with an electrically isolated mirror to reflect light towards the main emission surface, allowing for independent selection of mirror and contact materials, and embedding the mirror within a dielectric layer to prevent oxygen corrosion.

Benefits of technology

This design enhances the luminosity and emission efficiency of pLEDs, reduces the risk of oxygen corrosion, and simplifies the manufacturing process while maintaining output efficiency comparable to conventional solutions.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention concerns a µLED comprising a mesa etched layer stack with a first layer of a first doping type, a second layer of a second doping type having a main emission surface, an active layer arranged in between. A dielectric layer is disposed on inclined sidewalls of the first, second and active layer and partially a surface opposite the main emission surface. A first contact contacts through a first opening in the first layer and a second contact contacts through a second opening in the second layer. A mirror layer is embedded within the material of the dielectric layer disposed on the inclined sidewalls of the first, second and active layer and partially the surface opposite the main emission surface, the mirror layer laterally separated from the first and the second contact by a portion of the material of the dielectric layer.
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Description

[0001] OPTOELECTRONIC DEVICE AND METHOD OF PROCESSING THE SAME

[0002] The present application claims priority of DE patent application No DE 10 2023 124 911 dated September 14 , 2023 , the disclosure of which is incorporated herein in its entirety by reference . The present invention concerns an optoelectronic device , in particular a pLED and a method for processing such a pLED or optoelectronic device .

[0003] BACKGROUND

[0004] Optoelectronic devices and pLEDs enable new and different applications , particularly in the area of data communication . For instance , in data centers and computer networks , data communication is a key aspect to provide high-speed networks and to meet the demand of the current and the next generation cloud centers . Such data centers can be characterized by two factors , the data storage capabilities as well as the data communication requirements to access the data storage .

[0005] While data storage capabilities scale with a factor of n, the data communication required for such data storage scales with a factor proportional to n*n . Consequently, conventional techniques based on the copper and other classical radio frequency communication may not be sufficient to fulfil the required bandwidth, particularly between individual server architectures like blades and the like . Several proposals and solutions have been implemented by now to provide optical data communication networks in such data centers and even down to the communication between hardware components on the main boards in the racks of such data centers .

[0006] Optoelectronic devices are used for this purpose , wherein the dimension and sizes of such devices are becoming increasingly small . Small optoelectronic components and devices , which comprise a dimension of less than 50 pm in size and down to a few micrometers are generally referred to as pLEDs . Such pLEDs are particularly suitable for short range optical data communication due to their low power consumption, their low heat generation and their high switching capabilities . In addition, these pLEDs can be based on different semiconductor material systems , enabling the emission of light with different wavelengths . However, it has been a challenge to increase the luminosity of such pLEDs to ensure that even at low power consumption, sufficient light is generated, improving the overall signal-to-noise ratio is such optical data communication systems . Likewise , it is generally desirable to increase the overall emission efficiency irrespectively of the actual application in order to provide more light output at lower power consumption .

[0007] At the same time , the lifetime of such pLEDs could be increased, as it has been found that solder material may actually enhance corrosion due to creeping . Corrosion can also occur at locations , at which portions of the pLED are subj ect to the presence of air oxygen . Thus , there is a desire to provide optoelectronic devices , in particular pLEDs , which provide a better performance against oxygen corrosion while maintaining the luminosity or light output .

[0008] SUMMARY OF THE INVENTION

[0009] This and other obj ects are addressed by the subj ect matter of the independent claims . Features and further aspects of the proposed principles are outlined in the dependent claims .

[0010] The inventors propose a horizontal pLEDs , with an electrically isolated mirror to reflect the generated light towards the main emission surface . The mirror is electrically isolated from the n- or p-contacts thereby giving an additional degree of freedom in terms of metal choice for the mirror material as well as for the contact material . For example , due to the isolation, for instance being generated by a lateral offset or separation between the contact material and the mirror material , it is possible to utilize dielectric layers as well as metal layers a mirror . Furthermore , the contact material can be included in the soldiering metal , which allows saving one layer in the front line processing . As a result , the pLED in accordance with the proposed principle can be manufactured simpler as well as with the same output efficiency as conventional solutions . In addition, the electrically isolated mirror cannot be influenced by oxygen, thereby reducing the corrosion probability of the mirror material . Consequently, the lifetime of the optical device is enhanced .

[0011] In accordance with the proposed principle , a pLED or optoelectronic device comprises a layer stack with the first layer of a first doping type , the second layer of a second doping type having a main emission surface and an active layer arranged between the first and second doped layer . The active layer in this regard may comprise two cladding layers arranged on opposite sides and facing the first and second doped layer . The cladding layers are usually used to prevent an undesired diffusion of dopants into the active layer . The active layer, in itself , may comprise a single pn-j unction or more preferably a quantum well or a multi-quantum well structure .

[0012] The layer stack comprises mesa-etched sidewalls , which are covered by a dielectric layer . Hence , the dielectric layer is disposed on inclined sidewalls of the first , the second and the active layer . Furthermore , the dielectric layer extends partially onto a surface opposite the main emission surface . The dielectric material comprises a first and second opening exposing a portion of the surface opposite the main emission surface . A first conductive contact contacts the first layer through the first opening, and a second conductive contact contacts the second layer through the second opening .

[0013] Finally, in accordance with the proposed principle , a mirror layer is embedded within the material of the dielectric layer disposed on the inclined sidewalls of the first , the second and the active layer and partially on a surface opposite the main emission surface . The mirror layer is laterally separated from the first and second contact by a portion of the material of the dielectric layer . Consequently, the mirror layer is not in contact with the first or second contact material or respective opening through the dielectric layer but laterally separated from it .

[0014] As a result , the mirror layer may be a floating layer in some instances . Such a floating layer is therefore in operation of the device neither connected to a potential applied to the first contact , nor to a potential applied to the second contact . Rather , in some instances , the potential of the mirror layer in operation of the device can be undefined ( that is floating ) . In some further aspects , the potential of the mirror layer in operation of the device can be a third potential different from the potential supplied to the first and second contacts for operating the device . In some further instances , the mirror layer is electrically insulated from the first and second contacts .

[0015] The proposed principle allows providing contact metals like the n- contact metal but also the p-contact metal independently of the selection of the material of the isolated mirror layer . This gives an additional degree of freedom . Furthermore , the n-contact metal can be included in the soldering metal , which further provides saving in the manufacturing process . In addition, the soldering metal can have different properties like a reduced reflection and the like . Hence , the reflection properties of the mirror layer can be adj usted independently of the properties of the metal contact layer , and the process can be optimized independent of each other .

[0016] To facilitate a horizontal pLED, the pLED comprises in some aspects an inclined sidewall having two laterally separated inclined portions . More particularly, the inclined sidewalls may comprise a first portion extending from the surface opposite the main emission surface towards the active layer and optionally towards the first portion of the first layer . The inclined sidewall also comprises a second portion along the first layer . The first portion and the second portion of the inclined sidewalls are laterally offset at least along a first direction . This will generate two planar surfaces , which are substantially parallel to the main emission surface . One of the planar surfaces corresponds to the first layer material , while the other planar surface corresponds to the second material . Hence , by forming recesses over the respective planar surface portions , one is able to electrically contact the first and second layer , respectively .

[0017] In some other aspects , the inclined sidewalls form a step on the surface opposite the main emission surface , thereby exposing a planar first portion of the second layer opposite the main emission surface . That planar surface portion is contacted by the second conductive contact . The planar surface portion of the step portion is usually smaller than the respective other portion of the surface , being opposite to the main emission surface .

[0018] As already stated above , the mirror layer can comprise an electrically floating conductive material might , in particular a metal . Depending on the wavelengths emitted by the pLEDs during operation of the device , such metal can comprise gold, platin, silver , or aluminum . In the case of using silver , further materials may be required to prevent diffusion from the mirror into the semiconductor material .

[0019] In a further aspect , the mirror layer can comprise a plurality of dielectric and or conductive layers forming a DBR mirror or another insulated reflective component . The periphery of the mirror layer in this regard around the first and / or second opening is smaller than a periphery of the respective contact material forming the contact on the dielectric layer . In other words , when viewed from the bottom or top, the contact material of the contact covers a portion of the mirror layer around the first and or second opening . In case of the contact material for the contract being also reflective , the proposed solution will ensure a high reflectivity of light towards the contact material , either being reflected by the barrier layer or by the material of contact . Furthermore , the increased contact size provides an easier access for contacting the pLED .

[0020] Some aspects concern the material of the second conductive contact . In some aspects , the material of the second conductive contact comprises a metal , which contacts the second layer directly . Alternatively, the material of the second conductive contact may comprise a metal , which contacts a contact structure disposed on a planar surface portion of the second layer opposite the main emission surface . That additional contact structure may contain in particular gold or germanium. The respective connection between the conductive contact material and the second layer is dependent on the semiconductor material system used for the layer stack and the pLED . For example , nitride-based material systems suitable to provide wavelengths in the green and blue portion of the visible spectrum can be contacted directly by a respective metal of the conductive contacts . However, a phosphide material systems or arsenide material systems , which are used to provide orange or red light or even infrared light may require an additional contact structure suitable to provide the necessary electrical contact . This is partially due to the brittle characteristics of the respective semiconductor materials , but also depending on the connection properties at the interface of the conductive contacts and the layer material . The combination of gold or germanium is suited for phosphide material systems with the gold having an additional benefit of providing high reflectivity towards red or infrared light .

[0021] Likewise , the first conductive contact may comprise a metal contacting contact structure disposed on the planar surface portion of the first layer opposite the main emission surface . This contact structure contacting the first layer may comprise in particular ITO or another transparent oxide . Similar to the above , one can also provide a direct contact between the material of the first conductive contact and the first layer . Depending on the base material for the semiconductor layer stack . In the use case of ITO , phosphide or arsenide material systems are suitable choices for the layer stack . In the case of a direct connection, nitride material systems are usually used .

[0022] The additional contact structure usually comprise a larger area than the respective conductive contact through the dielectric layer . Consequently, the contact structure or more generally the electrical contact , in case the contact structure is associated with the electrical contact , may comprise the bulge shape when viewed in a cut view .

[0023] Another aspect is related to the choice of the dielectric material . In some aspects , the dielectric material comprises SiN, Si02 or a A12O3 . In this regard, it is possible to dispose a small re-growth layer on the sidewalls of the layer stack and in particularly on the sidewalls of the active layer prior to applying the dielectric material will reduce non-radiative recombination centers being formed during the mesa etching process .

[0024] In some further aspects , the main emission surface is covered by a dielectric out coupling structure . Said structure may also optionally cover portions of the mirror layer adj acent to the out coupling structure , thereby completely isolating the mirror layer and embedding the mirror layer within dielectric material .

[0025] In some further aspects , the main emission surface can comprise a roughened surface . A periodic structure is suitable as an alternative , forming an optical element for example to collimate light , thereby improving the output efficiency of the optoelectronic device and the pLED . For example , a photonic crystal can be formed on the main emission surface . For this purpose , material of the main emission surface can be used . In another embodiment , a small dielectric layer , in particularly comprising Si02 or similar, is disposed on the main emission surface . The refractive index of the material of the main emission surface can be different from the semiconductor material and particularly the second layer, thereby further improving the output efficiency . Transparent conductive oxides , TCO like ITO can be used, but need to be electrically isolated from the mirror layer . In some aspects , anti-reflective coatings and similar structures are possible .

[0026] Another aspect concerns a method for processing a pLED and optoelectronic device . In a first step, a layer stack is provided having a first layer of a first doping type and a second layer of a second doping type with the main emission surface as well as an active layer arranged between the first and second doped layers . Such a layer stack is usually provided on a growth substrate using various epitaxial deposition techniques . In this regard, the first layer having a first doping type can comprise a plurality of layers having different doping concentration and various thicknesses . Likewise , the second layer of a second doping type may comprise various layers of different doping concentrations as well as slightly different material compositions . The active layer may comprise a simple pn-j unction, although a quantum well or a multi-quantum well structure is preferred as the active layer . The active layer may also comprise two cladding layers on opposing sides between the active layer and the respective first and second layers . The cladding layers are used to prevent diffusion of dopants from the doped layers into the active layer . The multi-quantum well structure of an active layer may comprise a plurality of barrier and quantum well structures , wherein the barrier structures comprise a slightly different material composition than the adj acent quantum well layer structures .

[0027] In the next step , a mesa etching process is conducted to structure the layer stack as to form inclined sidewalls . These inclined sidewalls form exposed surface areas of the first layer , the active layer and optionally an exposed area portion of the second layer . A first dielectric layer is deposited on the inclined sidewalls on the surface opposite the main emission surface . Then, a structured reflective material layer is deposited on the dielectric layer . The structured reflective layer comprises a first opening as well as a second opening on the surface opposite the main emission surface . Then, a second dielectric layer is deposited on the structured reflective material layer, thereby embedding the reflective material layer within the dielectric material . The second dielectric layer material also fills the first and second openings previously formed in the structured reflective layer .

[0028] In accordance with the proposed principle , a first electric contact is now provided through the material of the first and second dielectric layer and the first opening . It will expose a part of the surface of the first layer . Subsequently, material of the first electric contact is provided in such opening , thereby electrically contacting the first layer . Likewise , a second electrically contact is provided through the material of first and second dielectric layer as well as the second opening electrically contacting the second layer . Consequently, a horizontal pLEDs is formed, wherein both contacts are on a side opposite the main emission surface . In accordance with the proposed principle , material of the first and the second contact through the respective openings are separated from the reflective material layer by dielectric material of the first and second dielectric layer . In other words , the reflective layer material is not in contact with material of the first and second contacts in the respective openings but isolated from it by the first or second dielectric layer material .

[0029] The proposed method forms a pLED, which is suitable either in an array or as a separate device . Different kinds of base material systems like nitrites , phosphide and arsenide can be used to implement LEDs suitable to emit light of various colors within the visible spectrum .

[0030] Some aspects concern the step of structuring the layer stack, as indicated above . For this purpose , a shallow Mesa etch may be conducted to form a first portion of the sidewalls . Said first portion exposes sidewalls of the first layer , the active layer , as well as a surface portion of the second layer . The exposed sidewalls may be optionally annealed or otherwise treated to reduce the amount of non-radiative recombination centers on the exposed sidewalls . In some aspects , the exposed sidewalls may be overgrown / regrown by a thin doped or undoped semiconductor layer material .

[0031] Then, a step of depositing a first dielectric layer is usually performed to cover the exposed sidewalls with a dielectric layer material . Afterward, a deep Mesa etch is conducted to form a second portion of the sidewalls , thereby exposing the sidewalls of the second layer . These newly generated sidewalls are laterally offset with respect to the first portion of the sidewalls . This will generate two substantially planar surfaces , which are vertically offset when seen at a cut view .

[0032] In some aspects , a conductive contact material can be deposited on the surface of the first layer prior to conducting a deep Mesa etch . The contact material may, in particular, comprise ITO . Such an additional conductive contact material is suitable in certain material systems for the layer stack, that does not allow a good direct electrical contact to metal . As for example , a phosphide material systems .

[0033] Another aspect concerns the deposition of the first dielectric layer on the inclined sidewalls and the surface portion opposite the main emission surface . In such case , material of the first dielectric layer is deposited on the surface exposed after the mesa etching process . A structured mas k is deposited on the first dielectric layer , and the material of the first dielectric layer is etched to form recesses in the first dielectric layer over a surface portion of the second layer .

[0034] SHORT DESCRIPTION OF THE DRAWINGS Further aspects and embodiments in accordance with the proposed principle will become apparent in relation to the various embodiments and examples described in detail in connection with the accompanying drawings in which

[0035] Figure 1 shows a first embodiment of a pLED in accordance with some aspects of the proposed principle ;

[0036] Figure 2 illustrates a second embodiment of a pLED in accordance with some aspects of the proposed principle ;

[0037] Figure 3 shows a third embodiment of a pLED in accordance with some aspects of the proposed principle ;

[0038] Figure 4 illustrates a fourth embodiment of a pLED in accordance with some aspects of the proposed principle ;

[0039] Figures 5A to 5C illustrate some aspects of an embodiment of an optoelectronic device and pLED in accordance with some aspects of the proposed principle . ;

[0040] Figures 6A to 6D illustrate some aspect for a method of processing an pLED in accordance with some aspects of the proposed principle ; Figures 7A to 7H illustrate several views of method steps for a method of processing an pLED in accordance with some aspects of the proposed principle .

[0041] DETAILED DESCRIPTION

[0042] The following embodiments and examples disclose various aspects and their combinations according to the proposed principle . The embodiments and examples are not always to scale . Likewise , different elements can be displayed enlarged or reduced in size to emphasize individual aspects . It goes without saying that the individual aspects of the embodiments and examples shown in the figures can be combined with each other without further ado , without this contradicting the principle according to the invention . Some aspects show a regular structure or form . It should be noted that in practice slight differences and deviations from the ideal form may occur without , however , contradicting the inventive idea .

[0043] In addition, the individual figures and aspects are not necessarily shown in the correct size , nor do the proportions between individual elements have to be essentially correct . Some aspects are highlighted by showing them enlarged . However , terms such as "above" , "over" , "below" , "under" "larger" , "smaller" and the like are correctly represented with regard to the elements in the figures . So it is possible to deduce such relations between the elements based on the figures .

[0044] Figure 1 illustrates an embodiment of a pLED in accordance with the proposed principle . The pLED 1 comprises a mesa etched layer stack having a main emission surface 14 . The main emission surface 14 is the upper surface of n-doped layer 11 , which forms a part of the layer stack . The doped layer as seen in this view comprises a mesa etched sidewall with a planar surface 15 at its lower portion . This causes a protrusion of the active layer 12 and the p-doped layer 13 . Doped layer 13 corresponds to the first doped layer , on which, when viewed from bottom to top- , the multi-quantum well structure of active layer 12 is deposited upon . On top of offset multi-quantumwell layer structure 12 , the second doped layer 11 is deposited, which forms the main emission surface 14 on the opposing surface side .

[0045] The pLED 1 in accordance with the proposed principle comprises sidewalls with two portions . A First portion extends from the bottom surface of the doped semiconductor layer 13 towards the n-doped semiconductor 11 , thereby exposing the sidewalls of the multiquantumwell structure itself . A second portion of the inclined sidewalls extends along the second doped layer 11 toward the main emission surface 14 . As illustrated in Figure 1 , the two sidewall portions of the inclined sidewalls form a planar step or recess 15 around the active layer 12 , thereby exposing the surface of n-doped layer 11 . This allows to contact the n-doped layer through contact 30 , while second contact 40 is used to contact the p-doped layer 13 through a contact structure 42 made of ITO .

[0046] In accordance with the proposed principle , the surface of the inclined sidewalls as well as the surface of the doped layer 11 is covered by material of a dielectric layer 20 . In the present embodiment , the dielectric material layer 20 may comprise A12O3 , although -depending on the base material system for the layer stack- different insulating and dielectric material for layer 20 can be used . A reflective mirror layer material 21 is deposited on top of the dielectric layer 20 . The reflective layer 21 extends along the sidewalls and also onto a portion of the surface is of n-doped layer 11 as well as p-doped layer 13 as illustrated . However, it is laterally offset and separated by dielectric material 23 forming contact plug 31 as well as 41 of contacts 30 and 40 , respectively . In other words , contacts 30 and 40 contact the second and first doped layers 11 and 13 through respective recesses 230 , which are filled with a metal and conductive material .

[0047] A dielectric material 23 is deposited and located between the conductive plugs 31 and 41 and the reflective layer 21 to prevent an electrical connection between the reflective layer 21 and the contacts 30 and 40 , respectively . Dielectric material 23 comprises the same material as dielectric layer 20 covering the sidewalls . Furthermore , a second dielectric layer portion 22 is disposed on the surface of reflective layer 21 , thereby embedding the material of reflective layer 21 completely within dielectric material as for example , illustrated in the central portion of the pLED . The reflective layer 21 is completely surrounded and embedded by the dielectric layer material of layers 20 , 22 and 23 , respectively . In this regard, the reflective layer material 21 is floating, that means it is neither connected to the same potential as contact 30 or contact 40 , respectively .

[0048] This physical separation and isolation of the reflective layer 21 and the respective contacts 30 and 40 has several benefits . For example , the respective contact material for contacts 30 and 40 as well as for the metal plugs 31 and 41 can be selected independent of the material for the reflective layer 21 . Particularly, the n-contact 30 as well as the p-contact 40 , respectively can comprise a solder metal , which is already prepared for subsequent processing steps .

[0049] In the present embodiment of Figure 1 the base material system for the layer stack is a nitride material system . This material system allows to directly a contact the semiconductor material using a metal contact , as illustrated for the contact 30 . Another contact structure 42 can be applied on the surface layer of the doped layer 13 as illustrated, thereby increasing the overall contact area to the semiconductor material and providing a better current inj ection into the doped layer .

[0050] The proposed principle is not limited to a specific base material system . Rather, phosphide , nitride and arsenide material systems are likely suitable as horizontal pLEDs shown in the embodiments with a reflective and conductive but isolated and floating mirror layer 21 embedded in dielectric material .

[0051] Figure 2 illustrates an embodiment for a pLED with the layer stack based on a phosphide material system . While the general structure is similar with two side wall portions forming the overall structure , an additional n-contact structure 32 is provided on the surface of the n- doped material 11 . This n-contact structure comprises gold, germanium or a combination thereof , which allows contacting the metal 31 in the recess 230 of dielectric material 23 .

[0052] Furthermore , gold used for the contact structure 32 has high reflective properties for wavelength generated by phosphide systems , thereby improving the overall output efficiency . As illustrated, the n-contact structure 32 comprises a lateral dimension, which is larger than the corresponding recess 230 and the area of the plug material 31 therein . This will allow current and current spreading from the n-contact structure 32 into the n-doped layer material 11 . Further , as illustrated and indicated already above , the peripheral area of contact 30 and contact 40 overlaps slightly over a portion of the mirror layer material 21 . Hence , from a bottom view, contact 30 and 40 cover a portion of the reflective layer beneath . Depending on the contact material used, an additional reflectivity is thereby generated, further improving the output efficiency .

[0053] Likewise , the contact structure , 42 comprising IPO is used to contact the metal plug 41 in the recess 230 to the p-doped semiconductor layer 13 .

[0054] The first portion of the inclined sidewalls , extending from the bottom surface of the doped layer 13 towards the bottom surface and doped layer 11 is approximately 500 nm. The second portion of the inclined sidewalls can be larger, but this may also dependent on the design choice .

[0055] Yet another embodiment of pLED is illustrated in Figure 3 . This includes an additional reflective metal contact structure 43 disposed between the p-contact structure 42 and the metal plug 41 . Similar to the previous embodiments , the metal contact structure 43 is laterally offset to the material of the mirror layer 21 and separated from it by dielectric material . In some instances , the metal contact structure 43 comprises the same material as metal layer 21 . However, it is usually used to provide better reflectivity for light being emitted directly towards the contact 40 and plug material 41 . Furthermore , in some instances , the contact material in contact structure 42 is ITO and the additional reflective structure 43 is used to provide better contact adhesion to the material for contact 40 .

[0056] The plugs 31 and 41 as well as the respective contacts 30 and 40 comprise either a single metal or a combination of various metal layers or alloys including gold, nickel , platinum, silver , copper and others suitable materials . The material layer can be stacked based on the required properties . Usually, the overall peripheral size of the respective contacts 30 and 40 is significantly large to de better solder contact . As such, the peripheral contact area overlaps a portion of the mirror layer material on the planar surface . The large contact area contacts 30 and 40 allow better contact for the horizontal pLED to a solder material . In the illustrated embodiments , there is a small vertical step between contact 30 and 40 , respectively generated by the mesa etching process and the subsequent process steps . However , in practice , the soldering metal contacts 30 and 40 are usually on the same level due to either a respective thickness of dielectric layer material 20 providing an overall even surface or different thicknesses of the respective contacts 30 and 40 .

[0057] Figure 4 illustrates another embodiment , in which a small dielectric mirror portion of material 44 is arranged on the surface of the p- doped layer 13 . This layer does not extend or cover the contact layer 13 completely but is arranged in this aspect over a portion covering a proj ection of element 41 . It supports reflecting light emitted into a direction towards the contact 40 and therefore improve the overall efficiency of the device . Material 44 is selected to adhere to semiconductor layer 13 and as such may provide an interface between the metal of contact structure 42 and the semiconductor material of layer 3 . It has been observed that a direct contact between materials of layer 13 and 42 may develop an increasing transition resistance over time . In some aspects , material of layer 42 is transparent , thus contact structure 42 is implemented with a reflective material . In some other aspects , element 44 comprises a DBR mirror structure additionally reflecting light towards the main emission surface 14 for light being emitted towards contact 40 . Further aspects of the proposed principle relate to a specific out coupling structure , which are illustrated in Figure 5A to 5C . It is noted that the out coupling structures can be combined very easily with the different implementations illustrated in the previous embodiments . For illustration purposes , only one of these design structures for a pLED in accordance with the proposed principle is referenced and the different out coupling structures are applied thereto . Figure 5A illustrates an out coupling structure , which provides on the main emission surface a periodic roughened surface 14 ' . The periodic roughened surface is formed by periodically etched surface of layer 11 , for instance implementing a photonic crystal . However , the surface can also be simply roughened in a non-periodic way, thereby simply providing a better out coupling to the air interface .

[0058] Figure 5B illustrates a further example , in which a plurality of dielectric layers of different refractive indices are applied to the main emission surface 14 . These dielectric layers act as a DBR layer stack having different optical properties . The DBR layer stack is an optical element attached to or directly deposited after removing the growth substrate upon the main emission surface 14 for collimating light , for instance . Furthermore , it is ensured when using a dielectric layer as a DBR layer stack that mirror layer material 21 is completely embedded within a dielectric material , thereby providing a floating structure .

[0059] An adhesive layer 17 can be applied as an alternative to the main emission surface 14 illustrated in Figure 5C . Another substrate or another optical element 18 is then attached to the main emission surface using the adhesive layer .

[0060] Figure 6A to 6D illustrate an embodiment for processing an optoelectronic device or pLED in accordance with the proposed principle .

[0061] In a first step, a layer stack is deposited on a growth substrate 50 and buffer layer 51 . For this purpose , growth substrate 50 and buffer layer 51 are prepared accordingly suited for the respective base material system. The semiconductor layer stack with the various doped and undoped layers is epitaxially deposited on buffer layer 51 . The first n-doped layer 11 is epitaxially deposited . Suitable deposition techniques like chemical vapor deposition, gas phase deposition, and other techniques are known in the art are applied depending on the design choices , the materials used and other parameters . The doped layer 11 comprises various sublayer with different doping concentrations and / or material compositions to provide a current inj ection and current spreading throughout its lateral area . For example , in phosphide material systems like InAlGaP , various aluminum or gallium contents can be used to generate a sublayer with different band gaps and other characteristics of the n-doped layer 11 suitable for different purposes . Then, a small cladding layer 121 is deposited thereupon, the small cladding layer being part of active layer 12 . The cladding layer 121 is used to prevent dopant diffusion from the n- doped layer 11 into the following multi-quantum well structure 122 deposited on cladding layer 121 . A second cladding layer 123 is epitaxially deposited on the multi-quantum well structure 122 , thereby embedding the multi-quantum layer structure between the two cladding layers . The thickness of the cladding layers is a few tens of nanometers . On top of the cladding layer 123 , one or more p-doped layers , again with varying dopant concentrations or material compositions , are epitaxially deposited .

[0062] The layer stack is then covered by a hard mask material 60 , which is subsequently structured to expose portion 13 ' of the top surface of the p-doped layer 13 . The portion 13 ' later forms the connection to a recess , providing access to the n-doped layer 11 during a subsequent etching process .

[0063] Figure 6B illustrates the result of the process , wherein a mesa etching process has been conducted . The mesa etching process forms a recess exposing a top surface 11 ' on the n-doped layer 11 . The shallow mesa etching performed exposes the top surface of doped layer 11 , as well as sidewall surfaces of the active layer 12 and p-doped layer 30 . This mesa etching process can be done by plasma etching, dry or wet etching or any technique suitable for the respective base material systems . Afterward, depending on the base material system, the sidewalls a cleaned and annealed to reduce the non-radiative recombination centers . In certain cases , the sidewalls can also slightly be overgrown by a regrowth layer .

[0064] The hard mas k 60 is then removed and a photo mas k layer 70 is deposited within the etched portions as well as the top surface of the doped layer 13 . The photo resist material 70 is subsequently structured to provide access to the top surface of layer 30 . Then, the contact material 42 is deposited thereupon, to provide the p-structured contact layer 42 as illustrated in the previous embodiments . The material is , for example , a transparent conductive contact like ITO, which covers the top surface of layer 13 , but does not extend into the etched portions which are filled by the photoresist layer 70 . Ernativley, if the resist layer 70 is omitted, a selective etching process has to be performed to remove the ITO from the recess . Figure 6G illustrates a top view of the respective pLEDs , in which the transparent conductive oxide material 42 covers the whole area except for a small circle formed by the etching process . In this particular case , the circular portion of the recess exposes the top surface of layer 11 .

[0065] The next process steps are illustrated in Figure 7A to 7H . Following the deposition of the material 42 , a second hard mas k is applied to the top surface of layer 42 and into the recess 70 . The hard mas k is structured to expose surface portions of layer 42 . Then, a second deep Mesa etching process is performed resulting in inclined side wall structures exposing the sidewalls of the layer stack with layers 12 , 13 and 11 always down to buffer layer 51 . The resulting structure is illustrated in Figure 7A, in which the inclined sidewalls of the etch reach down to the exposed surface of the buffer layer 51 .

[0066] The material of the hard mask layer 61 is removed in a subsequent step and material of the first dielectric layer 20 is deposited within the shallow recess 70 as well as on the sidewalls and facets of the deeply etched parts of the layer stack . The dielectric layer material 20 comprises A12O3 in this particular embodiment , but can also be a different material like SiO2 or SiN . It covers the hole surface of the device . A photoresist material is applied on top in a subsequent step ( not shown herein ) , structured and a short etching process is performed until a portion of the surface of layer 11 in the shallow recess 70 is exposed again . A contact deposition process is then performed to provide the contact structure 32 in the shallow mesa etched recess and on the surface 15 as shown in Figure 7C .

[0067] The top view of the resulting structure is illustrated in Figure 7D . The contact structure 32 is larger than the subsequent contact pillar and plug 31 as illustrated, but still smaller than the overall size of the shallow Mesa etched recess .

[0068] Figure 7E illustrates the next step after providing the contact deposition . The resist material is stripped, and a photo resist material 62 mas k layer applied covering the shallow mesa structure as well as a portion on the top surface above layer 42 . The mas k material structured to expose portions of layer 20 . Then, the mirror material 22 is applied . The mirror layer material 22 is deposited on the exposed surfaces of dielectric layer 20 , leaving the shallow mesa etched recess with the n-contact structure 32 uncovered .

[0069] As a result , the top view in Figure 7 F illustrates the two recess portions with the right recess forming contact structure 32 in the shallow mesa etched recess , while the photoresist layer 62 covers a portion of the first dielectric layer material 20 and the layer 42 beneath .

[0070] In a subsequent step , photoresist material 62 is removed, and a selective etching process performed to cut through the dielectric layer material 20 , exposing the surface of layer 42 . After providing a second dielectric layer 23 , the mirror layer material 22 is now completely embedded between the dielectric material of layer 20 and 22 . A structured etching process can now be performed to open recesses through the dielectric layer material 22 and 20 , thereby exposing a small portion of the surface of layers 42 and 32 , respectively . The recesses are filled with contact metal material , on which larger contact 30 and 40 are disposed . The resulting structure is substantially even when viewed from a side view and can now be bonded to a temporary surface carrier . Alternatively, the resulting structure can be bonded using wafer to wafer bonding onto a CMOS wafer or another wafer including integrated circuitry, which then acts as a permanent structure . This will get access to the top side and particularly the growth substrate and buffer layer 51 . Those are subsequently removed to further structure the main emission surface in a way as illustrated in the exemplary embodiments Figure 5A to 5C .

[0071] LIST OF REFERENCES LED second layer, n- doped layer active layer first layer , p-doped layer main emission surface ' outcoupling structure step portion, surface DBR adhesive substrate reflective mirror , 22 dielectric layer dielectric material contact contact material contact structure contact contact material contact structure contact structure growth substrate buffer layer 0 opening through dielectric material

Claims

CLAIMS1 . Optoelectronic device , in particular a pLED comprising : a layer stack with a first layer of a first doping type , a second layer of a second doping type having a main emission surface , an active layer arranged in between the first and second doped layer ; a dielectric layer disposed on inclined sidewalls of the first , second and active layer and partially a surface opposite the main emission surface ; a first and a second opening through the dielectric material disposed on the surface opposite the main emission surface ; a first conductive contact contacting through the first opening , the first layer ; a second conductive contact contacting through the second opening , the second layer ; a mirror layer embedded within the material of the dielectric layer disposed on the inclined sidewalls of the first , second and active layer and partially the surface opposite the main emission surface , the mirror layer laterally separated from the first and the second contact by a portion of the material of the dielectric layer .2 . Optoelectronic device according to claim 1 , wherein the inclined sidewalls comprises : a first portion extending from the surface opposite the main emission surface towards the active layer and optionally the first portion of the first layer; and a second portion along the first layer; wherein the first portion and the second portion are laterally offset at least along a first direction .3 . The device according to any of the preceding claims , wherein the mirror layer comprises an electrically floating conductive material , particularly a metal .4 . The device according to any of the preceding claims , wherein the inclined sidewalls form a step on the surface opposite the main emission surface , thereby exposing a planar surface portion of the second layer opposite the main emission surface , said planar surface portion being contacted by the second conductive contact .5 . The device according to any of the preceding claims , wherein a periphery of the mirror layer around the first and / or second opening is smaller than a periphery of respective contact material forming the contact on the dielectric layer .6 . The device according to any of the preceding claims , wherein- material of the second conductive contact comprises a metal contacting the second layer directly; or- material of the second conductive contact comprises a metal contacting a contact structure disposed on a planar surface portion of the second layer opposite the main emission surface , said contact structure in particular containing at least one of Gold and Germanium .7 . The device according to any of the preceding claims , wherein material of the first conductive contact comprises a metal contacting a contact structure disposed on a planar surface portion of the first layer opposite the main emission surface , said contact structure in particular containing ITO .8 . The device according to any of the preceding claims , wherein the first and / or second conductive contact comprise in a cut view a bulge in the respective opening .9 . The device according to any of the preceding claims , wherein the dielectric material comprises at least one of SiN, Si02 and A12O3 .10 . The device according to any of the preceding claims , wherein the main emission surface is covered by a dielectric out coupling structure , said structure optionally covering end portions of the mirror layer adj acent to the out coupling structure .11 . The device according to any of the preceding claims comprises wherein the main emission surface comprises at least one of : a roughened surface ; a periodic structure forming an optical band gap; a small dielectric layer, in particularly comprising Si02 ; a TCO electrically isolated from the mirror layer ; and an anti-reflective coating .12 . The device according to any of the preceding claims , wherein the mirror layer comprises at least one of aluminum; gold; platinum; and an alloy containing silver .13 . Method of processing an optoelectronic device , comprising :Providing a layer stack having a first layer of a first doping type and a second layer of a second doping type with a main emission surface and an active layer arranged in between the first and second doped layer;Mesa structuring the layer stack to form inclined sidewalls ;Depositing a first dielectric layer on the inclined sidewalls and a surface opposite the main emission surface ;Depositing a structured reflective material layer on the dielectric layer, the structured reflective layer having a first and a second opening on the surface opposite the main emission surface ;Depositing a second dielectric layer on the structured reflective material layer , thereby embedding the reflective material layer ; Providing a first electrical contact through the material of the first and second dielectric layer and the first opening electrically contacting the first layer ;Providing a second electrical contact through the material of the first and second dielectric layer and the second opening electrically contacting the second layer;wherein material of the first and second contact through the respective opening is separated from the reflective material layer by material of the first and / or second dielectric layer .14 . Method according to claim 13 , wherein the step of mesa structuring comprises :Conducting a shallow mesa etch to form a first portion of the sidewalls , thereby exposing sidewalls of the first layer, the active layer and a surface portion of the second layer; Optionally annealing the exposed sidewalls ;Conducting a deep mesa etch to form a second portion of the sidewalls , -particularly after the step of depositing a first dielectric layer- , thereby exposing sidewalls of the second layer , said exposed sidewalls laterally offset with respect to the first portion of the sidewalls .15 . Method according to claim 14 , further comprising :Depositing a conductive p-contact material on the surface of the first layer prior to conducting a deep mesa etch, said p-contact material in particularly comprising ITO .16 . Method according to any of claims 13 to 15 , wherein the step of depositing a first dielectric layer on the inclined sidewalls and a surface portion opposite the main emission surface comprises :Depositing material of the first dielectric layer ;Depositing a structured mas k on the first dielectric layer ;Etching the material of the first dielectric layer to form recesses in the first dielectric layer over a surface portion of the second layer; andOptionally depositing a contact structure in said recess .17 . Method according to any of claims 13 to 16 , wherein the step of depositing a second dielectric layer on the structured reflective layer comprises :Depositing material of the second dielectric layer;Depositing a structured mas k on the second dielectric layer;Etching the material of the second dielectric layer to form recesses in the second dielectric layer over a surface portion of the first layer; and Optionally depositing a contact structure in said recess .18 . Method according to any of claims 13 to 17 , further comprising : Rebonding the processed devices and removing the growth substrate ;Structuring the main emission surface with at least one of : o Roughening the main emission surface ; o Depositing one or more dielectric layer on the main emission surface ; o Attaching an optical element onto the main emission surface ; o Providing a photonic crystal on the main emission surface .

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