Crystal, semiconductor device and system

WO2025057994A1PCT designated stage expired Publication Date: 2025-03-20PATENTIX INC +3
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Patent Information

Application Number
PCT/JP2024/032609
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-14
Filing Date
2024-09-11
Publication Date
2025-03-20

AI Technical Summary

Technical Problem

Ga2O3, as an ultra-widebandgap semiconductor, has insurmountable challenges in manufacturing P-type semiconductors, and its cost is high, limiting its wide application in power electronic devices.

Method used

The new atomization CVD equipment is adopted and the guide partitioning technology is used to form a crystal film containing GeO2, achieving full coverage of high-quality crystal films on a 10mm square substrate and improving the electrical properties of the crystal.

Benefits of technology

High-quality crystal thin film formation is achieved, with excellent electrical properties, solving the problems of Ga2O3 in manufacturing P-type semiconductors, and reducing production costs.

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Abstract

[Problem] To provide a crystal having excellent electrical characteristics and excellent crystallinity useful for a semiconductor device or the like, and to provide a semiconductor device having excellent electrical characteristics. [Solution] A crystal having an oxide semiconductor having a rutile structure as a main component, wherein the oxide semiconductor contains germanium, the mobility is 10 cm2 / Vs or more, and the carrier density is 1×1018 / cm3 or more, is applied to, for example, a semiconductor device such as a power device.
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Description

Crystal, semiconductor device and system

[0001] The present invention relates to a crystal useful for a semiconductor device, a semiconductor device, and a system thereof.

[0002] Conventionally, Ga 2 O 3 is attracting attention as a promising ultra-wide bandgap (UWBG) semiconductor for future power electronics devices.

[0003] However, Ga 2 O 3 However, there are problems with the difficulty of manufacturing P-type semiconductors, and it is not easy to make them inexpensive, so there are still many issues to be overcome before they can be widely used. In recent years, rutile germanium dioxide (r-GeO) has been developed as a new UWBG semiconductor (band gap 4.44-4.68 eV). 2 ) has been studied, and rutile germanium dioxide can be used as n-type and p-type semiconductors and can be produced inexpensively, so Ga 2 O 3 It is expected to be a UWBG semiconductor to replace r-TiO 2 r-GeO on (001) substrate 2 Layered structures in which crystalline films are stacked have been investigated (Non-Patent Document 1, Patent Document 1, Patent Document 2, and Patent Document 3). However, Non-Patent Document 2 was submitted as an erratum after the peer review of Non-Patent Document 1 (Non-Patent Document 2). It was found that the crystal grains (abnormal grains) described in Non-Patent Document 1, Patent Document 1, Patent Document 2, and Patent Document 3 were rutile-type germanium dioxide crystals, and the remaining portions were amorphous phases. In other words, only amorphous phases were formed in the majority of the structures, and even if a crystalline phase was formed, crystal grains were only formed in a small portion of the structures. For example, even if an SBD was prototyped, there was a problem that the electrical properties such as mobility were deteriorated, and a method for producing crystals suitable for semiconductor applications was eagerly awaited.

[0004] Takane, K. Kaneko, “Establishment of a growth route of crystallized rutile GeO2 thin film (≧ 1 mm / h) and its structural “Applied Physics Letters Vol. 119, pp. 062104(1-6) (2021). Takane, K. Kaneko, Erratum: “Establishment of a growth route of crystallized rutile GeO2 thin film (≧1 μm / h) and its “structural properties” Applied Physics Letters Vol. 120, 099903(1-3) (2022).

[0005] International Publication No. 2023 / 008454 International Publication No. 2023 / 008453 International Publication No. 2023 / 008452

[0006] An object of the present invention is to provide a crystal having excellent crystallinity and excellent electrical characteristics that is useful for semiconductor devices and the like, and a semiconductor device having excellent electrical characteristics.

[0007] As a result of intensive research into achieving the above object, the present inventors have newly developed a mist CVD apparatus using a guide partition, and have used the mist CVD apparatus using the guide partition to produce GeO 2 The inventors have found that when a crystalline film containing as a main component is formed, a high-quality crystalline film can be formed over the entire surface of a 10 mm square substrate, and that the obtained crystalline film has excellent electrical properties, and have discovered that such a crystalline film can solve all of the above-mentioned conventional problems at once. After obtaining the above-mentioned findings, the inventors have further investigated and completed the present invention.

[0008] That is, the present invention relates to the following inventions: [1] A crystal mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium, and a mobility of 10 cm 2 [2] A crystal characterized in that the carrier density is 1×1018 / cm 3 [3] The crystal according to [1], wherein the oxide semiconductor further contains tin and / or silicon. [4] The crystal according to [3], wherein the oxide semiconductor contains germanium at an atomic ratio of 1 or more to the tin and / or silicon. [5] The crystal according to [3], wherein the mobility is 20 cm 2 [6] The crystal according to the above [1], which is in the form of a film or a plate. [7] 100 μm 2 [8] A semiconductor device comprising at least a semiconductor layer and a Schottky electrode in Schottky junction with the semiconductor layer, wherein the semiconductor layer is made of a crystal containing an oxide semiconductor having a rutile structure as a main component, the oxide semiconductor contains germanium, and the crystal has a mobility of 10 cm or more. 2 / Vs or more. [9] A semiconductor device including the crystal according to [1] above.

[10] The semiconductor device according to [8] or [9] above, including a Schottky electrode in Schottky junction with the crystal.

[11] The semiconductor device according to [8] or [9] above, which is a power device.

[12] A product including a semiconductor device, wherein the semiconductor device is the semiconductor device according to [8] or [9] above.

[13] A semiconductor system including the semiconductor device according to [8] or [9] above.

[0009] The crystal of the present invention has excellent electrical properties and is useful for semiconductor devices and the like.

[0010] FIG. 1 is an example of a schematic configuration diagram of a film forming apparatus preferably used in the present invention. FIG. 2 is a diagram schematically showing an atomization apparatus preferably used in the present invention. FIG. 3 is a diagram showing XRD diffraction results in Example 1. FIG. 4 is a diagram showing an EDS image in Example 1. FIG. 5 is a diagram showing an SEM image in Example 1. FIG. 6 is a diagram showing the results of IV measurement in Example 1. FIG. 7 is a diagram showing the results of IV measurement in Example 2. FIG. 8 is a diagram schematically showing a preferred example of a Schottky barrier diode (SBD) of the present invention. FIG. 9 is a diagram schematically showing a preferred example of a high electron mobility transistor (HEMT) of the present invention. FIG. 10 is a diagram schematically showing a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) of the present invention. FIG. 11 is a diagram schematically showing a preferred example of a junction field effect transistor (JFET) of the present invention. FIG. 12 is a diagram schematically showing a preferred example of an insulated gate bipolar transistor (IGBT) of the present invention. FIG. 13 is a diagram schematically showing a preferred example of a light emitting device (LED) of the present invention. FIG. 14 is a diagram schematically showing a preferred example of a junction barrier Schottky diode (JBS) of the present invention. 1 is a diagram schematically illustrating another preferred example of a Schottky barrier diode (SBD) according to the present invention. FIG. 2 is a diagram schematically illustrating a preferred example of an enlarged cross-sectional view of the atomization device according to the first embodiment.

[0011] The present invention relates to a crystal mainly composed of an oxide semiconductor having a rutile structure, wherein the oxide semiconductor contains germanium and has a mobility of 10 cm 2 In the present invention, the mobility is 20 cm / Vs or more. 2 / Vs or more, and the carrier density is preferably 1×10 18 / cm 3It is also preferable that the crystal is in the form of a film or plate, and the crystal size is 100 μm or more. According to such a preferred range, the semiconductor properties can be improved more easily. Furthermore, in the present invention, it is preferable that the oxide semiconductor further contains tin and / or silicon, and it is more preferable that the oxide semiconductor contains germanium at an atomic ratio of 1 or more to the tin and / or silicon. According to such a preferred range, the interface with the electrode can be more easily improved, and for example, a Schottky junction can be more easily formed. Furthermore, in the present invention, it is preferable that the crystal is in the form of a film or plate, and the crystal size is 100 μm or more. 2 It is more preferable that the area is within the above range. According to such a preferable range, semiconductor devices can be manufactured with more industrial advantages.

[0012] The above-mentioned preferred crystals can be easily produced, for example, by using the film-forming apparatus shown in FIG.

[0013] In this specification, "film" can be read as "layer." A "laminated structure" is a structure including one or more crystalline layers, and may also include layers other than crystalline layers (e.g., amorphous layers). The crystalline layer is preferably a single crystalline layer, but may also be a polycrystalline layer. In this specification, for convenience, the orientation state can be confirmed by X-ray diffraction. More specifically, for example, when the crystal is oriented in the (001) plane, it can be determined that the crystal is oriented in the (001) plane when the integrated intensity ratio of the peak derived from the (001) plane to the peak derived from other crystal planes is larger than the integrated intensity ratio of the peak derived from the (001) plane to the peak derived from other crystal planes of the same randomly oriented crystal.

[0014] In the present invention, the term "main component" refers to a composition ratio of the oxide semiconductor having a rutile structure in the crystal of 50% or more. In an embodiment of the present invention, the content of the oxide semiconductor having a rutile structure in the crystal is preferably 70% or more, more preferably 90% or more, in terms of composition ratio in the crystal. The oxide semiconductor is not particularly limited as long as it has a rutile structure and further contains germanium. In the present invention, the oxide semiconductor preferably contains a germanium dioxide crystal having a rutile structure. The oxide semiconductor may also contain a metal other than germanium. Examples of the other metal include metals of Group 14 of the periodic table other than germanium (such as tin or silicon), with tin and / or silicon being preferred. The atomic ratio of germanium among the metal elements in the crystal is preferably 0.5 or more. By setting the atomic ratio of germanium in this preferred range, a crystal with better semiconductor properties can be achieved.

[0015] In the present invention, the area of ​​the crystal is 100 μm 2 It is preferable that the area is 100 mm or more. 2 It is more preferable that the crystal has an area of ​​1 μm or more. In the present invention, the crystal is preferably a single crystal, and is preferably in the form of a film or plate, and more preferably in the form of a film (hereinafter also referred to as a "crystalline film"). The film thickness of the crystalline film is not particularly limited as long as it does not impede the object of the present invention, but in the present invention, it is preferably 0.5 μm or more, and more preferably 1 μm or more. Within these preferred ranges, the semiconductor film can have better breakdown voltage.

[0016] The crystalline film is formed by using, for example, the film-forming apparatus shown in FIG. 2By forming a crystalline film and its mixed crystal film, it can be obtained more easily. Furthermore, it is also possible to appropriately perform doping using the film forming apparatus. The doped crystal can be suitably used as a semiconductor film or semiconductor layer, and n-type dopants or p-type dopants can be applied to conventional doping methods for oxide semiconductors. Examples of the n-type dopant include antimony (Sb), arsenic (As), bismuth (Bi), or fluorine (F). Examples of the p-type dopant include aluminum (Al), gallium (Ga), or indium (In).

[0017] Furthermore, when the crystals are formed on a crystalline substrate using the film-forming apparatus, the crystalline substrate is not particularly limited as long as it does not impede the object of the present invention, and may be a known substrate. It may be an insulating substrate, a conductive substrate, or a semiconductor substrate, but in the present invention, a semiconductor substrate is preferable. It may be a single crystal substrate or a polycrystalline substrate. The crystalline substrate may be a substrate having a metal film on its surface. Note that, when the crystalline substrate is a conductive substrate, a vertical device can be fabricated without removing the substrate. The crystalline structure of the crystalline substrate is also not particularly limited as long as it does not impede the object of the present invention, but it is preferable that the crystalline substrate has a rutile structure. An example of a substrate having a rutile structure is GeO. 2 Substrate, SrTiO 3 Substrate, TiO 2 Substrate or MgF 2 The crystal substrate may have an off-axis angle.

[0018] In the present invention, the crystal film may be formed directly on the crystal substrate. Alternatively, other layers such as a layer different from the oxide semiconductor (for example, an n-type semiconductor layer, an n+-type semiconductor layer, an n-type semiconductor layer, etc.), an insulator layer (including a semi-insulator layer), or a buffer layer may be stacked on the crystal substrate, and then the crystal film may be formed on the crystal substrate via the other layers.

[0019] The semiconductor device of the present invention is a semiconductor device including at least a semiconductor layer and a Schottky electrode that is in Schottky junction with the semiconductor layer, wherein the semiconductor layer is made of a crystal containing an oxide semiconductor having a rutile structure as a main component, the oxide semiconductor contains germanium, and the mobility is 10 cm 2 / Vs or more. The crystals can be used, for example, as semiconductor devices, either directly or after known processing such as substrate peeling. Examples of such semiconductor devices include Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSs), high electron mobility transistors (HEMTs), metal oxide semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETs), insulated gate bipolar transistors (IGBTs), and light-emitting diodes (LEDs). The semiconductor devices may also be used in a variety of products, including modules incorporating such semiconductor devices, electronic devices incorporating such semiconductor devices, and components thereof. In the present invention, the semiconductor device is preferably a power device. Semiconductor devices can be classified into horizontal devices (horizontal devices) in which an electrode is formed on one side of a semiconductor layer, and vertical devices (vertical devices) in which electrodes are formed on both the front and back sides of a semiconductor layer. In the present invention, the semiconductor device can be suitably used in both horizontal and vertical devices.

[0020] Examples of semiconductor devices that can be suitably used in the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these examples. 2 A preferred example of a crystal layer containing the above as a main component as a semiconductor layer is shown below.

[0021] 8 shows a preferred example of a Schottky barrier diode (SBD) including an n-type semiconductor layer 101a, an n+ type semiconductor layer 101b, a p-type semiconductor layer 102, a metal layer 103, an insulator layer 104, a Schottky electrode 105a, and an ohmic electrode 105b. The metal layer 103 is made of a metal such as Al, and covers the Schottky electrode 105a.

[0022] FIG. 9 shows a preferred example of a high electron mobility transistor (HEMT) including an n-type semiconductor layer 121 a having a wide band gap, an n-type semiconductor layer 121 b having a narrow band gap, an n+ type semiconductor layer 121 c, a p-type semiconductor layer 123, a gate electrode 125 a, a source electrode 125 b, a drain electrode 125 c, and a substrate 129.

[0023] 10 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+ type semiconductor layer 131b, a second n+ type semiconductor layer 131c, a p-type semiconductor layer 132, a p+ type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. Note that the p+ type semiconductor layer 132a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132.

[0024] FIG. 11 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a p-type semiconductor layer 142, a gate electrode 145a, a source electrode 145b, and a drain electrode 145c.

[0025] FIG. 12 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.

[0026] (LED) An example of a semiconductor device of the present invention that is a light-emitting diode (LED) is shown in Figure 13. The semiconductor light-emitting device of Figure 13 includes an n-type semiconductor layer 161 on a second electrode 165b, and a light-emitting layer 163 is stacked on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is stacked on the light-emitting layer 163. A translucent electrode 167 that transmits light generated by the light-emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is stacked on the translucent electrode 167. The semiconductor light-emitting device of Figure 13 may be covered with a protective layer except for the electrode portion.

[0027] Examples of materials for the translucent electrode include conductive oxide materials containing indium (In) or titanium (Ti). 2 O 3 , ZnO, SnO 2 , Ga 2 O 3 , TiO 2 , CeO 2 Alternatively, a mixed crystal of two or more of these materials or a doped material thereof may be used. A translucent electrode can be formed by applying these materials by a known method such as sputtering. After the formation of the translucent electrode, thermal annealing may be performed to make the translucent electrode transparent.

[0028] In the semiconductor light-emitting element of FIG. 13, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and current is passed through these electrodes to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, causing the light-emitting layer 163 to emit light.

[0029] Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, and Ag, or alloys thereof; conductive metal oxide films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), and indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, and polypyrrole; and mixtures thereof. The method for forming the electrodes is not particularly limited, and they can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating; physical methods such as vacuum deposition, sputtering, and ion plating; and chemical methods such as CVD and plasma CVD, taking into consideration their suitability for the material.

[0030] FIG. 14 shows the main components of a junction barrier Schottky diode (JBS) according to a preferred embodiment of the present invention. The JBS shown in FIG. 14 includes an ohmic electrode 1020, an n-type semiconductor layer 1010a, an n+-type semiconductor layer 1010b, a Schottky electrode 1030, and an electric field buffer region 1060. The Schottky electrode 1030 is composed of metal layers 1030a, 1030b, and 1030c. In the semiconductor device shown in FIG. 14, the outer ends of metal layers 1030a and / or 1030b serving as second electrode layers are located outside the outer end of metal layer 1030c serving as a first electrode layer. In the semiconductor device shown in FIG. 14, the electric field buffer region 1060 includes at least two electric field buffer regions 1060 in a plane including at least a portion of the second electrode layer located outside the outer end of the first electrode layer and the outer end of the second electrode. In the semiconductor device of FIG. 14, the electric field relaxation region 1060 is made of a p-type semiconductor, and forms a PN junction with the n-type semiconductor layer 1010a.

[0031] 15 may be formed by any known method without particular limitation, as long as it does not impede the object of the present invention, such as forming a film by vacuum deposition, CVD, sputtering, or various coating techniques, followed by patterning by photolithography, or directly patterning by printing or the like.

[0032] FIG. 15 shows a preferred example of a Schottky barrier diode (SBD) including an ohmic electrode 1110 a , an ohmic electrode 1110 b , a Schottky electrode 1120 , an n-type semiconductor layer 1130 , and a substrate 1140 .

[0033] Example 1 1. Formation of n-type semiconductor layer 1-1. Film formation apparatus An example of a film formation apparatus suitable for use in this example will be described with reference to Figure 1. The film formation apparatus 19 in Figure 1 includes a sample stage 21 on which a film formation sample 20 is placed, a carrier gas source 22a that supplies a carrier gas, a carrier gas source 22b that supplies a carrier gas (dilution), a flow rate control valve 23a that adjusts the flow rate of the carrier gas sent from the carrier gas source 22a, a flow rate control valve 23b that adjusts the flow rate of the carrier gas (dilution) sent from the carrier gas source 22b, a heater 28 provided in a film formation chamber 27, and an atomization device 30. The atomization device 30 is composed of a raw material partition 24 containing the atomization raw material liquid 24a, an ultrasonically transparent substrate 24b provided at the bottom of the raw material partition 24, a base 24c, an ultrasonic vibrator 26 provided on the bottom surface of the raw material partition 24, a guide partition 31 in contact with the ultrasonically transparent substrate 24b, an ultrasonic transmission liquid tank 35 containing an ultrasonic transmission liquid 36, and an ultrasonic transmission liquid 36 that transmits ultrasonic waves emitted from the ultrasonic vibrator 26 to the ultrasonically transparent substrate 24b. The guide partition 31 can locally transmit ultrasonic waves emitted by the ultrasonic vibrator to the ultrasonically transparent substrate 24b via the ultrasonic transmission liquid 36, thereby further improving atomization efficiency and increasing the amount of atomization. Figure 2 shows an example of an atomization device preferably used in this embodiment. The atomization device 30 in FIG. 2 is composed of a flow control valve 23a, a flow control valve 23b, a liquid source for atomization 24a, an ultrasonically transparent substrate 24b, a base 24c, a guide partition 31, a diluent gas supply pipe 33, a carrier gas supply pipe 34, an ultrasonic transmission liquid tank 35, an ultrasonic transmission liquid 36, and a jig 40. By using the guide partition 31, ultrasonic waves generated by the ultrasonic vibrator can be directed through the ultrasonically transparent substrate 24b to atomize the liquid source for atomization 24a. This improves atomization efficiency and increases the amount of atomization. Furthermore, by using the diluent gas supply pipe 33 and the carrier gas supply pipe 34, the mist generated by the ultrasonic waves can be sent to the deposition chamber. FIG. 16 is a schematic cross-sectional view of the atomization device 30. The atomization device 30 is composed of the liquid source for atomization 24a, the ultrasonically transparent substrate 24b, the base 24c, the ultrasonic vibrator 26, the guide partition 31, and the ultrasonic transmission liquid tank 35. The guide partition 31 is provided on the ultrasonic transducer 26 and is in contact with the ultrasonically transparent substrate 24b.With this configuration, the transmission efficiency of ultrasonic waves can be further improved.

[0034] 1-2. Preparation of raw solution for atomization When preparing the raw solution for atomization, the concentration in the raw solution for atomization was adjusted to 0.05 M biscarboxygermanium sesquioxide and 0.025 M tin chloride dihydrate. During the adjustment, hydrochloric acid was added at a volume ratio of 10%, and this was used as the raw solution for atomization.

[0035] 1-3. Preparation for film formation The atomization raw material liquid 24a obtained in 1-2 above was contained in the raw material partition wall 24. Next, r-TiO 2 The (001) was placed on the sample stage 21, and the heater 28 was operated to raise the temperature inside the film deposition chamber 27 to 725°C. Next, the flow control valves 23a and 23b were opened to supply carrier gas from the carrier gas sources 22a and 22b into the film deposition chamber 27. After the atmosphere inside the film deposition chamber 27 was sufficiently replaced with the carrier gas, the flow rates of the carrier gas and the carrier gas (dilution) were adjusted to 3.0 L / min and 0.5 L / min, respectively. Nitrogen was used as the carrier gas.

[0036] 1-4. Formation of Oxide Semiconductor Crystal Film Next, the ultrasonic vibrator 26 was vibrated, and the vibrations were propagated to the atomization raw material liquid 24a through the ultrasonic transmission liquid, thereby atomizing the atomization raw material liquid 24a and generating mist. This mist was introduced into the deposition chamber 27 through a supply pipe (not shown) by the carrier gas, and the mist thermally reacted in the deposition chamber 27 at 725°C under atmospheric pressure, forming a thin film on the deposition sample 20.

[0037] The thin film obtained in 1-4 was measured using an X-ray diffractometer. The XRD diffraction results are shown in Figure 3. The obtained thin film has a rutile structure and is oriented in the (001) plane. 52 , Sn 48 ) O 2 The film was a crystalline film. The film thickness was 73 nm. When the obtained thin film was evaluated using an energy dispersive X-ray analyzer (EDS), it was found that a thin film was formed on the entire surface, as shown in FIG.

[0038] Furthermore, as a result of observing the film surface with a scanning electron microscope (SEM), it was found that a crystalline film with excellent surface smoothness and good crystallinity was formed, as shown in Figure 5.

[0039] 2. Formation of electrodes r-(Ge) 52 , Sn 48 ) O 2An electrode was formed on the crystal film. (Ohmic electrode formation conditions) Cleaning: O3 5min Photoresist coating: HMDS 3000rpm 20s nonbake, LOR5A 3000rpm 60s 180oC5min, AZ-MiR703 3000rpm 60s 110oC1min Laser lithography: dwl66+ 10mmHead, power 70mW, filter 100%, intensity 70% Bake: 60s 110oC1min Development: TMAH 2.3wt% 90s, Water 30s Descum: O3 1min EB deposition: Ti 75 nm 0.2nm / s, Au 75 nm 0.2nm / s Liftoff: NMP 80oC 30 min, IPA×2, Water RTA: N2 0.2ccm, 500oC, 30s Bake: 60s, 110°C, 1min. Development: TMAH 2.3wt% 90s, Water 30s. Etching: BHF 1:10, 30s. Cleaning: Acetone, IPA, Water. (Conditions for forming Schottky electrodes) Cleaning: O3, 1min. Photoresist coating: HMDS 3000rpm, 20s (non-bake), LOR5A 3000rpm, 60s, 180°C, 5min. AZ-MiR703 3000rpm, 60s, 110°C, 1min. Laser lithography: dwl66+ 10mm head, power 70mW, filter 100%, intensity 70%. Bake: 60s, 110°C, 1min. Development: TMAH 2.3wt% 90s, Water 30s. Descum: O3, 1min. EB deposition: Ni 75nm. 0.15nm / s, Au 75 nm 0.2nm / s Liftoff: NMP 80oC 30 min, IPA×2, Water

[0040] 4. Hall Effect Measurement The Hall effect of the semiconductor device obtained above was measured by the van der Pauw method, and the mobility was found to be 29 cm 2 / Vs. The carrier density was 9.7 × 10 18 / cm 3 It was.

[0041] 5. IV Measurement The semiconductor device obtained as described above was subjected to IV measurement. The results are shown in Fig. 6. These results show that the semiconductor device of Example 1 has excellent semiconductor characteristics and Schottky characteristics.

[0042] Example 2 The thickness of the oxide semiconductor crystal film was set to 110 nm, and the r-(Ge 52 , Sn 48 ) O 2The conditions were the same as in Example 1, except that an electrode was formed on the crystal film. 2. Electrode formation (Ohmic electrode formation conditions) Cleaning: O3 15min Photoresist coating: HMDS 3000rpm 20s nonbake, LOR5A 3000rpm 60s 180oC5min, AZ-MiR703 3000rpm 60s 110oC1min Laser lithography: dwl66+ 10mmHead, power 70mW, filter 100%, intensity 70% Bake: 60s 110oC1min Development: TMAH 2.3wt% 90s, Water 30s Descum: O3 1min EB deposition: Ti 75 nm 0.2nm / s, Au 75 nm 0.2nm / s Liftoff: NMP 80oC 30 min, IPA×2, Water RTA: N2 0.2ccm, 450oC, 30s (Conditions for forming Schottky electrodes) Cleaning: O3 1min Photoresist coating: HMDS 3000rpm 20s non-bake, LOR5A 3000rpm 60s 180oC 5min, AZ-MiR703 3000rpm 60s 110oC 1min Laser lithography: dwl66+ 10mm head, power 70mW, filter 100%, intensity 70% Bake: 60s 110oC 1min Development: TMAH 2.3wt% 90s, Water 30s Descum: O3 1min EB deposition: Pt 100nm 0.05nm / s Liftoff: NMP 80oC 10min, IPA×2, Water

[0043] 4. Hall Effect Measurement The Hall effect of the semiconductor device obtained above was measured by the van der Pauw method, and the mobility was found to be 24 cm 2 / Vs. The carrier density was 7.8 × 10 18 / cm 3 It was.

[0044] 5. IV Measurement The semiconductor device obtained as described above was subjected to IV measurement. The results are shown in Fig. 7. These results show that the semiconductor device of Example 1 has excellent semiconductor characteristics and Schottky characteristics.

[0045] Comparative Example 1 When a film was formed using a conventional mist CVD apparatus under the same conditions as in Example 1, a crystalline film could not be formed, and only some crystal grains were formed on the substrate. As a result, it was not possible to measure the electrical properties.

[0046] The crystal of the present invention is particularly useful for semiconductor devices such as power devices.

[0047] 19 Film forming apparatus 20 Film forming sample 21 Sample stage 22a Carrier gas source 22b Dilution gas source 23a Flow rate control valve 23b Flow rate control valve 24 Raw material partition 24a Raw material liquid for atomization 24b Ultrasonic transmitting substrate 24c Stand 26 Ultrasonic vibrator 27 Film forming chamber 28 Heater 30 Atomization device 31 Guide partition 33 Dilution gas supply pipe 34 Carrier gas supply pipe 35 Ultrasonic transmitting liquid tank 36 Ultrasonic transmitting liquid 37 Film forming chamber 101a n-type semiconductor layer 101b n+ type semiconductor layer 102 p-type semiconductor layer 103 Metal layer 104 Insulator layer 105a Schottky electrode 105b Ohmic electrode 111a n-type semiconductor layer 111b n+ type semiconductor layer 114 Semi-insulating layer 115a Gate electrode 115b Source electrode 115c Drain electrode 118 Buffer layer 121a Wide band gap n-type semiconductor layer 121b Narrow band gap n-type semiconductor layer 121c N+ type semiconductor layer 123 P-type semiconductor layer 124 Semi-insulating layer 125a Gate electrode 125b Source electrode 125c Drain electrode 128 Buffer layer 129 Substrate 131a N- type semiconductor layer 131b First n+ type semiconductor layer 131c Second n+ type semiconductor layer 132 P-type semiconductor layer 134 Gate insulating film 135a Gate electrode 135b Source electrode 135c Drain electrode 138 Buffer layer 139 Semi-insulating layer 141a N- type semiconductor layer 141b First n+ type semiconductor layer 141c Second n+ type semiconductor layer 142 P type semiconductor layer 145a Gate electrode 145b Source electrode 145c Drain electrode 151 N type semiconductor layer 151a n- type semiconductor layer 151b n+ type semiconductor layer 152 P type semiconductor layer 154 Gate insulating film 155a Gate electrode 155b Emitter electrode 155c Collector electrode 161 N type semiconductor layer 162 P type semiconductor layer 163 Light emitting layer 165a First electrode 165b Second electrode 167 Light-transmitting electrode 169 Substrate 1010a N- type semiconductor 1010b N+ type semiconductor 1020 Ohmic electrode 1030 Schottky electrode 1030a Metal layer 1030b Metal layer 1030c Metal layer 1060 Electrolytic relaxation region1110a Ohmic electrode 1110b Ohmic electrode 1120 Schottky electrode 1130 N-type semiconductor layer 1140 Substrate

Claims

1. A crystal mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium, and a mobility of 10 cm 2 / Vs or more.

2. Carrier density is 1×10 18 / cm 3 The crystal according to claim 1, 3. The crystal according to claim 1, wherein the oxide semiconductor further contains tin and / or silicon.

4. The crystal according to claim 3, wherein the oxide semiconductor contains the germanium with respect to the tin and / or silicon in an atomic ratio of 1 or more.

5. The mobility is 20 cm 2 The crystal according to claim 1, wherein the crystal has a molecular weight of 1:1 or more.

6. The crystal according to claim 1, which is in the form of a film or plate.

7. 100μm 2 The crystal according to claim 6, having an area of ​​at least 100 nm.

8. A semiconductor device including at least a semiconductor layer and a Schottky electrode that is in Schottky junction with the semiconductor layer, the semiconductor layer being made of crystals mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium, and having a mobility of 10 cm 2 / Vs or more.

9. A semiconductor device comprising the crystal according to claim 1.

10. The semiconductor device according to claim 8 or 9, further comprising a Schottky electrode in Schottky junction with said crystal.

11. The semiconductor device according to claim 8 or 9, which is a power device.

12. A product including a semiconductor device, the semiconductor device being the semiconductor device according to claim 8 or 9.

13. A semiconductor system comprising the semiconductor device according to claim 8 or 9.

Citation Information

Patent Citations

  • Oxide semiconductor and semiconductor device

    WO2023008452A1

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