Crystal film, laminated structure, semiconductor device, electronic equipment, and system
Patent Information
- Application Number
- PCT/JP2024/032610
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-14
- Filing Date
- 2024-09-11
- Publication Date
- 2025-03-20
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Figure JP2024032610_20032025_PF_FP_ABST
Abstract
Description
Crystalline film, laminated structure, semiconductor device, electronic device and system
[0001] The present invention relates to a crystalline film and a laminated structure useful for semiconductor devices.
[0002] Conventionally, Ga 2 O 3 is attracting attention as a promising ultra-wide bandgap (UWBG) semiconductor for future power electronics devices.
[0003] However, Ga 2 O 3 However, there are problems with the difficulty of producing p-type semiconductors, and it is not easy to make them inexpensive, so there are still many issues to be overcome before they can be widely used. In recent years, rutile germanium dioxide (r-GeO) has been developed as a new UWBG semiconductor (band gap 4.44-4.68 eV). 2 ) has been studied, and rutile germanium dioxide can be used as n-type and p-type semiconductors and can be produced inexpensively, so Ga 2 O 3 It is expected to be a UWBG semiconductor to replace r-TiO 2 r-GeO on (001) substrate 2 Laminated structures in which crystalline films are stacked have been studied (Non-Patent Document 1, Patent Document 1, Patent Document 2, and Patent Document 3). However, Non-Patent Document 2 was submitted as an erratum after the peer review of Non-Patent Document 1 (Non-Patent Document 2). It was found that the crystal grains (abnormal grains) described in Non-Patent Document 1, Patent Document 1, Patent Document 2, and Patent Document 3 were rutile-type germanium dioxide crystals, and the remaining portions were amorphous phases. In other words, only amorphous phases were formed in the majority of the structures, and even if a crystalline phase was formed, crystal grains were only formed in a small area. Therefore, a method for producing large-area crystals on a substrate surface has been eagerly awaited.
[0004] Takane, K. Kaneko, “Establishment of a growth route of crystallized rutile GeO2 thin film (≧ 1 mm / h) and its structural “Applied Physics Letters Vol. 119, pp. 062104(1-6) (2021). Takane, K. Kaneko, Erratum: “Establishment of a growth route of crystallized rutile GeO2 thin film (≧1 μm / h) and its “structural properties” Applied Physics Letters Vol. 120, 099903(1-3) (2022).
[0005] International Publication No. 2023 / 008454 International Publication No. 2023 / 008453 International Publication No. 2023 / 008452
[0006] An object of the present invention is to provide a crystalline film and a layered structure having excellent crystallinity that are useful for semiconductor devices and the like.
[0007] As a result of intensive research to achieve the above object, the present inventors have discovered a crystal film containing a metal oxide containing germanium as a main component, the crystal film having an area of 100 μm 2 As described above, the inventors have succeeded in creating a crystalline film having a thickness of 1 μm or more, and have found that the obtained crystalline film has excellent crystallinity and is useful for semiconductor devices, etc., and have discovered that such a crystalline film can solve all of the above-mentioned conventional problems at once. Furthermore, after obtaining the above-mentioned findings, the inventors have conducted further research and have completed the present invention.
[0008] That is, the present invention relates to the following inventions: [1] A crystalline film containing a metal oxide containing germanium as a main component, wherein the area of the crystalline film is 100 μm 2A crystalline film having a thickness of 1 μm or more. [2] The crystalline film according to [1] above, wherein the crystalline film has a tetragonal crystal structure. [3] The crystalline film according to [1] above, which is a single crystal film. [4] A laminated structure in which a crystalline film is laminated on a crystalline substrate directly or via another layer, wherein the crystalline film is the crystalline film according to [1] above. [5] The laminated structure according to [4] above, wherein the crystalline substrate has a tetragonal crystal structure. [6] A semiconductor device including a crystalline film or a laminated structure, wherein the crystalline film is the crystalline film according to [1] above, and the laminated structure is the laminated structure according to [4] above. [7] The semiconductor device according to [6] above, which is a power device. [8] The semiconductor device according to [6] above, which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED). [9] An electronic device including a semiconductor device, wherein the semiconductor device is the semiconductor device according to [6] above.
[10] A system including an electronic device, wherein the electronic device is the electronic device according to [6] above.
[0009] The crystalline film and laminated structure of the present invention are useful for semiconductor devices and the like, and exhibit excellent crystallinity.
[0010] 1 is an example of a schematic configuration diagram of a film forming apparatus preferably used in the present invention. FIG. 2 is a diagram showing XRD analysis results in Example 1. FIG. 3 is a diagram showing an SEM image in Example 1. FIG. 4 is a diagram showing an EDS image in Example 1. FIG. 5 is a diagram showing XRD analysis results in Comparative Example 1. FIG. 6 is a diagram showing an SEM image in Comparative Example 1. FIG. 7 is a diagram showing an EDS image in Comparative Example 1. FIG. 8 is a diagram showing a preferred example of a Schottky barrier diode (SBD) of the present invention. FIG. 9 is a diagram showing a preferred example of a high electron mobility transistor (HEMT) of the present invention. FIG. 10 is a diagram showing a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) of the present invention. FIG. 11 is a diagram showing a preferred example of a junction field effect transistor (JFET) of the present invention. FIG. 12 is a diagram showing a preferred example of an insulated gate bipolar transistor (IGBT) of the present invention. FIG. 13 is a diagram showing a preferred example of a light emitting device (LED) of the present invention. FIG. 14 is a diagram showing a preferred example of a junction barrier Schottky diode (JBS) of the present invention.
[0011] The crystal film of the present invention is a crystal film containing a metal oxide containing germanium as a main component, and the area of the crystal film is 100 μm 2 The present invention is characterized by the above thickness and a film thickness of 1 μm or more. Furthermore, in the present invention, it is preferable that the crystalline film has a tetragonal crystal structure. According to this preferred range, the semiconductor characteristics can be made more excellent. Furthermore, it is preferable that the crystalline film is a single crystal film. According to this preferred range, the semiconductor characteristics can be made more excellent, the breakdown voltage can be made more excellent, and the semiconductor device can be manufactured with more industrial advantages.
[0012] The laminated structure of the present invention is characterized in that the crystalline film is laminated on a crystalline substrate via another layer. Furthermore, in the laminated structure of the present invention, the crystalline substrate preferably has a tetragonal crystal structure. This preferred range can improve semiconductor characteristics and crystallinity. The term "oriented" refers to a state in which a crystal plane, such as the (111) plane, is aligned in a specific direction. In this specification, "film" can be read as "layer." A "laminated structure" refers to a structure containing one or more crystalline layers, and may also contain layers other than crystalline layers (e.g., amorphous layers). The crystalline layer is preferably a single crystalline layer, but may also be a polycrystalline layer. In this specification, the orientation state can be confirmed by X-ray diffraction. More specifically, for example, when the crystal film is oriented in the (111) plane, it can be determined that the crystal film is oriented in the (111) plane if the integrated intensity ratio between the peak derived from the (111) plane and the peak derived from other crystal planes is larger than the integrated intensity ratio between the peak derived from the (111) plane and the peak derived from other crystal planes of the same randomly oriented crystal.
[0013] In the present invention, the term "main component" refers to a content of the germanium-containing metal oxide in the crystalline film being 50% or more in terms of composition ratio in the crystalline film. In an embodiment of the present invention, the content of the germanium-containing metal oxide in the crystalline film is preferably 70% or more, more preferably 90% or more, in terms of composition ratio in the crystalline film. The crystalline film may also contain metals other than germanium. Examples of such metals include metals in Group 14 of the periodic table other than germanium (such as tin or silicon) or metals in Group 4 of the periodic table (such as titanium, zirconia, or hafnium). The atomic ratio of germanium among the metal elements in the crystalline film is preferably 0.5 or more. By setting the atomic ratio of germanium in this preferred range, a crystalline film with better semiconductor properties can be achieved.
[0014] In the present invention, the area of the crystal film is 100 μm 2It is preferable that the area is 100 mm or more. 2 It is more preferable that the crystal film has an area of 1 μm or more. In the present invention, it is preferable that the crystal film is a single crystal film. Furthermore, it is preferable that the thickness of the crystal film is 1 μm or more. Within these preferable ranges, the withstand voltage of the semiconductor film can be improved.
[0015] The above-mentioned preferred crystal film and laminated structure may be formed using a known film forming apparatus such as a mist CVD film forming apparatus.
[0016] The crystal substrate is not particularly limited as long as it does not impede the objectives of the present invention, and may be a known substrate. It may be an insulating substrate, a conductive substrate, a semiconductor substrate, a single crystal substrate, or a polycrystalline substrate. The crystal substrate may also be a substrate having a metal film on its surface. When the crystal substrate is a conductive substrate, a vertical device can be fabricated without removing the substrate. The crystal structure of the crystal substrate is also not particularly limited as long as it does not impede the objectives of the present invention. Examples of the crystal structure of the crystal substrate include a hexagonal crystal structure, a cubic crystal structure, and a tetragonal crystal structure. Examples of crystal substrates having a hexagonal crystal structure include a GaN substrate, a SiC substrate, and a sapphire substrate (e.g., a-plane sapphire, c-plane sapphire, m-plane sapphire, and r-plane sapphire substrate). Examples of crystal substrates having a tetragonal crystal structure include GeO. 2 Substrate, SrTiO 3 Substrate, TiO 2 Substrate or MgF 2 Examples of the crystalline substrate having a cubic crystal structure include a Si substrate and a SiC substrate. The crystalline substrate may have an off-angle, specifically, an off-angle of 0.1° to 10°, for example.
[0017] In the present invention, a film may be formed directly on the substrate, or other layers such as a layer different from the oxide semiconductor (for example, an n-type semiconductor layer, an n+ type semiconductor layer, an n- type semiconductor layer, etc.), an insulator layer (including a semi-insulator layer), or a buffer layer may be stacked on the substrate, and then the film may be formed on the substrate via the other layers. In particular, a buffer layer can be suitably used to reduce the difference in lattice constant between the crystal substrate and the oxide crystal. Examples of materials constituting the buffer layer include SnO 2 , TiO 2 , V.O. 2 , MnO 2 , RuO 2 , CsO 2 , IrO 2 , GeO 2 , CuO 2 , PbO 2 , AgO 2 , CrO 2 , SiO 2 , SiC, GaN, and mixed crystals thereof.
[0018] Doping can also be performed appropriately using the film-forming apparatus. The doped crystal can be suitably used as a semiconductor film or semiconductor layer, and n-type or p-type dopants can be applied using conventional doping methods for oxide semiconductors. Examples of n-type dopants include antimony (Sb), arsenic (As), bismuth (Bi), phosphorus (P), fluorine (F), niobium (Nb), vanadium (V), tantalum (Ta), and tungsten (W). Examples of p-type dopants include aluminum (Al), gallium (Ga), and indium (In). The present invention also encompasses the stacked structure obtained in this manner.
[0019] The crystal film or the laminated structure can be used as is or after known processing such as substrate peeling, using known means, for example, in semiconductor devices. Examples of such semiconductor devices include Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSs), high electron mobility transistors (HEMTs), metal oxide semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETs), insulated gate bipolar transistors (IGBTs), and light-emitting diodes (LEDs). These semiconductor devices can also be used in modules incorporating these semiconductor devices, electronic devices incorporating these semiconductor devices, and their components. These devices are useful for a variety of applications, particularly power devices. Semiconductor devices can be classified into horizontal devices (horizontal devices) in which an electrode is formed on one side of a semiconductor layer, and vertical devices (vertical devices) in which electrodes are formed on both the front and back sides of a semiconductor layer. In the present invention, the semiconductor device can be used in both horizontal and vertical devices.
[0020] Examples of semiconductor devices that can be suitably used in the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these examples. 2 A preferred example of a crystal layer containing the above as a main component as a semiconductor layer is shown below.
[0021] 8 shows a preferred example of a Schottky barrier diode (SBD) including an n-type semiconductor layer 101a, an n+ type semiconductor layer 101b, a p-type semiconductor layer 102, a metal layer 103, an insulator layer 104, a Schottky electrode 105a, and an ohmic electrode 105b. The metal layer 103 is made of a metal such as Al, and covers the Schottky electrode 105a.
[0022] FIG. 9 shows a preferred example of a high electron mobility transistor (HEMT) including an n-type semiconductor layer 121 a having a wide band gap, an n-type semiconductor layer 121 b having a narrow band gap, an n+ type semiconductor layer 121 c, a p-type semiconductor layer 123, a gate electrode 125 a, a source electrode 125 b, a drain electrode 125 c, and a substrate 129.
[0023] 10 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+ type semiconductor layer 131b, a second n+ type semiconductor layer 131c, a p-type semiconductor layer 132, a p+ type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. Note that the p+ type semiconductor layer 132a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132.
[0024] FIG. 11 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a p-type semiconductor layer 142, a gate electrode 145a, a source electrode 145b, and a drain electrode 145c.
[0025] FIG. 12 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.
[0026] (LED) An example of a semiconductor device of the present invention that is a light-emitting diode (LED) is shown in Figure 14. The semiconductor light-emitting device of Figure 14 includes an n-type semiconductor layer 161 on a second electrode 165b, and a light-emitting layer 163 is stacked on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is stacked on the light-emitting layer 163. A translucent electrode 167 that transmits light generated by the light-emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is stacked on the translucent electrode 167. The semiconductor light-emitting device of Figure 15 may be covered with a protective layer except for the electrode portion.
[0027] Examples of materials for the translucent electrode include conductive oxide materials containing indium (In) or titanium (Ti). 2 O 3 , ZnO, SnO 2 , Ga 2 O 3 , TiO2 , CeO 2 Alternatively, a mixed crystal of two or more of these materials or a doped material thereof may be used. A translucent electrode can be formed by applying these materials by a known method such as sputtering. After the formation of the translucent electrode, thermal annealing may be performed to make the translucent electrode transparent.
[0028] In the semiconductor light-emitting element of FIG. 13, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and current is passed through these electrodes to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, causing the light-emitting layer 163 to emit light.
[0029] Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, and Ag, or alloys thereof; conductive metal oxide films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), and indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, and polypyrrole; and mixtures thereof. The method for forming the electrodes is not particularly limited, and they can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating; physical methods such as vacuum deposition, sputtering, and ion plating; and chemical methods such as CVD and plasma CVD, taking into consideration their suitability for the material.
[0030] FIG. 14 shows the main components of a junction barrier Schottky diode (JBS) according to a preferred embodiment of the present invention. The JBS shown in FIG. 14 includes an ohmic electrode 1020, an n-type semiconductor layer 1010a, an n+-type semiconductor layer 1010b, a Schottky electrode 1030, and an electric field buffer region 1060. The Schottky electrode 1030 is composed of metal layers 1030a, 1030b, and 1030c. In the semiconductor device shown in FIG. 14, the outer ends of metal layers 1030a and / or 1030b serving as second electrode layers are located outside the outer end of metal layer 1030c serving as a first electrode layer. In the semiconductor device shown in FIG. 14, the electric field buffer region 1060 includes at least two electric field buffer regions 1060 in a plane including at least a portion of the second electrode layer located outside the outer end of the first electrode layer and the outer end of the second electrode. In the semiconductor device of FIG. 14, the electric field relaxation region 1060 is made of a p-type semiconductor, and forms a PN junction with the n-type semiconductor layer 1010a.
[0031] 14 may be formed by any known method without particular limitation, as long as it does not impede the object of the present invention, such as forming a film by vacuum deposition, CVD, sputtering, or various coating techniques, followed by patterning by photolithography, or directly patterning by printing or the like.
[0032] 1 is a diagram showing an example of a preferred embodiment of a film formation apparatus when the atomization device of the present invention is used as a film formation atomization stage. The film formation apparatus 19 is composed of a film formation sample 20, a sample stage 21, a carrier gas source 22a, a carrier gas source 22b, a flow rate control valve 23a, a flow rate control valve 23b, a film formation chamber 27, a heater 28, and an atomization device 30. The atomization device 30 is composed of a raw material partition wall 24, a raw material liquid to be atomized 24a, an ultrasonic transmission substrate 24b, a stage 24c, an ultrasonic vibrator 26, an ultrasonic transmission liquid tank 35, and an ultrasonic transmission liquid 36.
[0033] Next, a TiO2 (001) substrate having a tetragonal rutile structure, 10 mm square on a 10 mm side and an average thickness of 500 nm, was placed on the sample stage 21 as the film formation sample 20, and the heater 28 was operated to raise the temperature inside the film formation chamber 27 to 750°C. Next, the flow rate control valve 23 was opened to supply carrier gas from the carrier gas source 22 into the film formation chamber 27. After the atmosphere inside the film formation chamber 27 was sufficiently replaced with the carrier gas, the flow rate of the carrier gas was adjusted to 3 L / min. Oxygen gas was used as the carrier gas.
[0034] Next, the ultrasonic vibrator 26 was vibrated at 3.0 MHz, and the vibration was propagated to the atomization raw material liquid 24a through the ultrasonic transmitter 25a, thereby atomizing the atomization raw material liquid 24a to generate raw material fine particles. These raw material fine particles were introduced into the film formation chamber 27 by the carrier gas, reacted in the film formation chamber 27, and formed tetragonal GeO on the film formation sample 20 by a CVD reaction on the film formation surface of the film formation sample 20. 2 A crystalline film was formed.
[0035] Next, the amorphous phase was removed by immersing the sample in ultrapure water for 3 minutes and applying ultrasonic vibrations. After removing the amorphous phase, the source material 24a was supplied to the crystal on the TiO2 substrate (001) to re-grow the crystal. GeO with a tetragonal rutile structure 2 A crystal film having a thickness of 1.7 μm was formed.
[0036] The obtained crystalline film was measured using an X-ray diffractometer. The XRD analysis results are shown in Figure 2. As is clear from Figure 2, the obtained crystalline film is GeO with a (002) oriented tetragonal rutile structure and good crystallinity. 2 It was a crystalline film.
[0037] The surface of the obtained crystalline film was observed using an SEM. The SEM image is shown in Figure 3. As is clear from Figure 3, the surface of the obtained crystalline film was excellent in smoothness and had a good crystallinity. 2 Furthermore, when the surface of the obtained crystalline film was evaluated using EDS, it was found that a crystalline film was formed over the entire surface, as shown in FIG.
[0038] Comparative Example 1 The same procedure as in Example 1 was carried out, except that after the amorphous phase was removed with ultrapure water, no raw material was supplied to the crystal again. The result of measuring the obtained crystal film using an XRD diffractometer is shown in Figure 5. From Figure 5, it was found that the crystallinity was poor. From this, it was found that the crystal film obtained in Example 1 had excellent crystallinity.
[0039] The surface of the obtained crystalline film was observed using an SEM. Figure 6 shows an SEM image. As is clear from Figure 6, crystal grains were only partially formed. This indicates that the crystalline film obtained in Example 1 is a GeO film with excellent surface smoothness and good crystallinity across a large area. 2 It was found that a crystalline film was obtained.
[0040] Furthermore, when the surface of the obtained crystal film was evaluated using EDS, it was found that GeO 2 It was found that crystals were partially formed. This indicates that the crystal film obtained in Example 1 had a crystal film formed over the entire surface.
[0041] The crystal and layered structure of the present invention are suitable for use in, for example, semiconductor devices.
[0042] 19 Film forming apparatus 20 Film forming sample 21 Sample stage 22a Carrier gas source 22b Dilution gas source 23a Flow rate control valve 23b Flow rate control valve 24 Raw material partition 24a Raw material liquid for atomization 24b Ultrasonic transmitting substrate 24c Stand 26 Ultrasonic vibrator 27 Film forming chamber 28 Heater 30 Atomization device 35 Ultrasonic transmitting liquid tank 36 Ultrasonic transmitting liquid 37 Film forming chamber 101a n-type semiconductor layer 101b n+ type semiconductor layer 102 p-type semiconductor layer 103 Metal layer 104 Insulator layer 105a Schottky electrode 105b Ohmic electrode 111a n-type semiconductor layer 111b n+ type semiconductor layer 114 Semi-insulator layer 115a Gate electrode 115b Source electrode 115c Drain electrode 118 Buffer layer 121a N-type semiconductor layer with wide band gap 121b N-type semiconductor layer with narrow band gap 121c N+ type semiconductor layer 123 P-type semiconductor layer 124 Semi-insulating layer 125a Gate electrode 125b Source electrode 125c Drain electrode 128 Buffer layer 129 Substrate 131a N- type semiconductor layer 131b First n+ type semiconductor layer 131c Second n+ type semiconductor layer 132 P-type semiconductor layer 134 Gate insulating film 135a Gate electrode 135b Source electrode 135c Drain electrode 138 Buffer layer 139 Semi-insulating layer 141a N- type semiconductor layer 141b First n+ type semiconductor layer 141c Second n+ type semiconductor layer 142 P-type semiconductor layer 145a Gate electrode 145b Source electrode 145c Drain electrode 151 n-type semiconductor layer 151a n-type semiconductor layer 151b n+ type semiconductor layer 152 p-type semiconductor layer 154 Gate insulating film 155a Gate electrode 155b Emitter electrode 155c Collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 Light-emitting layer 165a First electrode 165b Second electrode 167 Light-transmitting electrode 169 Substrate 1010a n-type semiconductor 1010b n+ type semiconductor 1020 Ohmic electrode 1030 Schottky electrode 1030a Metal layer 1030b Metal layer 1030c Metal layer 1060 Electrolytic relaxation region
Claims
1. A crystal film containing a metal oxide containing germanium as a main component, the area of the crystal film being 100 μm 2 The crystal film is characterized in that the film thickness is 1 μm or more.
2. The crystalline film according to claim 1, wherein said crystalline film has a tetragonal crystal structure.
3. The crystal film according to claim 1, which is a single crystal film.
4. A laminated structure in which a crystal film is laminated directly or via another layer on a crystal substrate, said crystal film being the crystal film according to claim 1.
5. The laminated structure according to claim 4, wherein said crystal substrate has a tetragonal crystal structure.
6. A semiconductor device including a crystal film or a laminated structure, wherein the crystal film is the crystal film according to claim 1, and the laminated structure is the laminated structure according to claim 4.
7. The semiconductor device according to claim 6, which is a power device.
8. The semiconductor device according to claim 6, which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT) or a light emitting diode (LED).
9. An electronic device including a semiconductor device, characterized in that said semiconductor device is the semiconductor device according to claim 6.
10. A system including an electronic device, said electronic device being the electronic device according to claim 6.
Citation Information
Patent Citations
Oxide crystal, crystalline oxide film, crystalline laminated structure, and semiconductor device
WO2023008453A1