System and method for testing devices, computer readable medium

The system addresses the challenge of achieving high accuracy in radio frequency device testing by using a distribution matrix unit and test processor to flexibly assign measurement units to devices, enabling both high accuracy and high throughput testing configurations.

WO2025073382A1PCT designated stage expired Publication Date: 2025-04-10ADVANTEST CORP +6
View PDF 8 Cites 0 Cited by

Patent Information

Application Number
PCT/EP2023/077780
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-10-06
Publication Date
2025-04-10

AI Technical Summary

Technical Problem

Existing methods for testing radio frequency devices struggle with achieving high accuracy measurements, as imperfections in the measurement units can be mistaken for those in the device under test, and there is a need for efficient testing procedures for devices with varying quality standards.

Method used

A system comprising a DUT-interface with multiple ports, a distribution matrix unit that connects these ports to measurement units, and a test processor that controls the connections and measurements, allowing for flexible assignment of measurement units to DUTs and enabling both high accuracy and high throughput testing configurations.

Benefits of technology

The system allows for precise distinction between device and measurement unit imperfections, supports flexible testing configurations, and improves the efficiency and accuracy of radio frequency device testing, accommodating devices with different quality standards.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure EP2023077780_10042025_PF_FP_ABST
    Figure EP2023077780_10042025_PF_FP_ABST
Patent Text Reader

Abstract

The present invention relates to a system and method for testing devices. Moreover, the present invention relates to a corresponding computer readable medium. In particular, the present invention discloses a system for testing devices, the system comprising: a DUT-interface (10) comprising a plurality of DUT-ports (1,…,8); a distribution matrix unit (20) having an input side configured to be connected to the plurality of DUT-ports (1,…,8) and an output side configured to be connected to one or more measurement units (M1, M2); and a test processor (30). The test processor (30) is configured to: receive test setting data; control the distribution matrix unit (20) such that, according to the test setting data, at least one of the plurality of DUT-ports (1,…,8) is connected to at least one of the measurement units (M1, M2); and control one or more of the measurement units (M1, M2) to perform a respective measurement.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] System and method for testing devices, computer readable medium

[0002] Description

[0003] The present invention relates to a system and method for testing devices, in particular radio frequency devices, especially high-frequency devices. Moreover, the present invention relates to a corresponding computer readable medium.

[0004] In the testing of radio frequency devices, for example as part of quality control, some parameters to be tested have only little margin and thus require high accuracy measurements. However, it is often difficult to obtain measurements of high accuracy, even when the testing is performed under laboratory conditions. For example, if a single device is tested with a single measurement unit, it is impossible to distinguish imperfections of the signal provided by the device under test (DUT) from imperfections caused by the measurement unit.

[0005] Against this background, it is known to provide the signal of the device under test to multiple measurement units in parallel by using an external signal splitter. This way, the accuracy of measurement of a single device can be improved, however, at the cost of designating multiple measurement units to a single device under test.

[0006] On the other hand, for other types of radiofrequency devices having lower quality standards, it is not necessary to test each device under a maximum accuracy setting. In fact, an average accuracy may be sufficient to sort out defective devices. In such cases, the efficiency of the test procedure is of key importance.

[0007] Against this background, it is an object of the present invention to provide an improved system for testing devices and a corresponding method. In particular, the improved system shall be adaptable to different testing configurations. In particular, the improved system shall have an easy interface for the user. The above object is solved by a system for testing devices according to claim 1 and a method for testing devices according to claim 10. Furthermore, the object is solved by a computer readable medium according to claim 16.

[0008] Specifically, the object is solved by a system for testing devices, wherein the system comprises:

[0009] - a DUT-interface comprising a plurality of DUT-ports;

[0010] - a distribution matrix unit having an input side configured to be connected to the plurality of DUT-ports and an output side configured to be connected to one or more measurement units; and

[0011] - a test processor.

[0012] The test processor is configured to perform the following steps:

[0013] - receive test setting data;

[0014] - control the distribution matrix unit such that, according to the test setting data, at least one of the plurality of DUT-ports is connected to at least one of the measurement units; and

[0015] - control one or more of the measurement units to perform a respective measurement.

[0016] One aspect of the present invention is that measurement units can be assigned to DUTs in a flexible way. More specifically, through the distribution matrix unit, each DUT-port at the input side may be connected to one or more measurement units at the output side, wherein various mappings can be implemented.

[0017] In particular, a single DUT-port may be connected with a single measurement unit (one-to-one mapping), or the single DUT-port may be connected to multiple measurement units (one-to-many mapping) at the same time. As the DUT-ports can be connected to one or more measurement units essentially independently of each other, overall many-to-many mappings can be implemented.

[0018] Due to the plurality of DUT-ports of the DUT-interface, it is possible to connect multiple DUTs to the test system at the same time and thus to test the multiple DUTs in parallel. In order to configure the test system according to a desired test setup as described above, the test processor is configured to receive test setting data. The test setting data may be provided as a user input to the test system, or be provided by an external system.

[0019] Within the context of this invention, a test setting specifies a (partial) mapping of the DUT-ports to one or more measurement units, such that each DUT-port is associated with any subset of the one or more measurement units (including the empty set), however, no measurement unit is associated with more than one DUT port.

[0020] The test setting data received by the test processor may include a test setting itself, or may include an identifier of a test setting. In the latter case, the test processor may have an internal database comprising test settings associated with corresponding identifiers. In addition, the test setting data may comprise calibration or configuration data for the measurement units and / or at least one criterion for checking a test result. Alternatively, the additional information may be only referenced in the test setting data by a suitable key, rather than being included in the test setting data.

[0021] After controlling the distribution matrix unit such that at least one of the DUT- ports is connected to at least one of the measurement units according to the received test setting data (that is, the respective test setting), the test processor controls the one or more designated measurement units to perform respective measurements. More precisely, the test processor controls each measurement unit that is associated with a DUT port according to the test setting to perform a respective measurement. The test processor may not only control the measurement unit(s) to initiate the respective measurement, but also configure the measurement unit(s) with calibration or configuration data.

[0022] In particular, any one of the following measurements may be performed by the measurement units: EVM, SNR, Phase Noise, SFDR, ACLR, Noise Floor, Discretization error.

[0023] After the measurement has been performed, the test processor may provide a test result. In particular, the test result may be a list of the respective measurement result(s) provided by the measurement unit(s), or be a single value calculated based on the respective measurement result(s) (e.g., an average or a cross-relation).

[0024] This way, the test system allows using the testing resources in a flexible way, providing an improved utilization of measurement units. As in principle, any DUT- port can be connected to any subset of measurement units connected to an output side of the distribution matrix unit, the test system further provides an easy interface to the user.

[0025] In one embodiment, the distribution matrix unit comprises at least one of the following: a switch, a splitter, a splitch, and a switchable amplifier. In particular, the distribution matrix unit may comprise combinations of the aforementioned components.

[0026] By means of an N-throw switch, a single port on the input side of the switch can be connected to any one of the N output ports of the switch or vice versa. By means of an N-way splitter, a signal provided to the input port of the splitter is duplicated and provided at each of the N output ports of the splitter at the same time. A splitch, for example as described in the U.S. patent US 9 712 133 B2 and the disclosure of which is explicitly included in its entirety in the present application, provides the functionalities of both a switch and a splitter. That is, by means of an N-way splitch, a single port on the input side of the splitch can be connected with any subset of the N output ports of the splitch.

[0027] In one embodiment, the distribution matrix unit comprises a splitter and a switchable amplifier configured to provide an amplified signal to an input of the splitter. Therefore, signal loss at the output side of the splitter can be prevented by activating the amplifier on the input side of the splitter. In particular, this can be advantageous when processing signals that are close to the thermal noisefloor.

[0028] In one embodiment, the distribution matrix unit comprises a splitter and, for any output of the splitter, a switchable amplifier configured to amplify a signal provided by an output of the splitter. This way, split signals provided at the output side of the splitter can be provided to a corresponding measurement unit in an amplified form. This can be advantageously used when performing ultra low phase-noise measurements. In contrast to an amplifier connected to the input of a splitter, amplifiers connected to the outputs of a splitter generate uncorrelated noise, which can be cancelled out later in the respective measurement units measuring the amplified signal. However, signal degradation may still occur on the path up to the amplifiers, in which case signal amplification before the splitter may lead to a better overall performance.

[0029] Preferably, each splitter in the distribution matrix unit is surrounded by a switchable input-side amplifier and corresponding switchable output-side amplifiers, so that the (input) signal provided to the splitter and / or the (output) signals provided by the splitter to the respective measurement units can be amplified independently of each other according to the requirements of the measurement to be performed.

[0030] In one embodiment, the test processor is configured to control the distribution matrix unit according to a first test setting, such that at least two of the plurality of DUT-ports are connected to at least two measurement units.

[0031] According to the first test setting, the test system is adapted to perform at least two measurements of separate DUTs simultaneously. In particular, a first DUT may be connected, via the distribution matrix unit, to a first measurement unit, while a second DUT may be connected, via the distribution matrix unit, to a second measurement unit.

[0032] This way, multiple measurement units can be used to sample waveforms of multiple DUTs or multiple pins of DUTs in parallel. Therefore, the test system can be operated in a high throughput mode.

[0033] In one embodiment, the test processor is configured to control the distribution matrix unit according to a second test setting, such that at least one of the plurality of DUT-ports is connected to at least two measurement units.

[0034] According to the second test setting, the test system is adapted to perform at least two measurements of a single DUT connected to a DUT-port separately. In particular, the signal of the DUT may be split and provided to each of the at least two measurement units in parallel. This way, the at least two measurement units can sample waveforms of a single device. For this purpose, the measurement units may be operated in different settings, for example, multiple narrowband measurement units may be operated in different frequency ranges.

[0035] Therefore, according to the aforementioned embodiment, the test system can be operated in a high accuracy mode, in which one DUT is tested by two or more measurement units. In particular, this way, imperfections of the measurement units can be distinguished from imperfections of the signal provided by the DUT.

[0036] In one embodiment, the test processor is configured to control the measurement units, when present, such that the respective measurements of the measurement units are performed simultaneously.

[0037] Specifically, averaging of measurements sequentially taken will take out noise added by the measurement units as well as noise caused by the DUT. Averaging of measurements simultaneously taken will take out noise added by the measurement units, but not noise caused by the DUT.

[0038] Therefore, performing measurements simultaneously helps to identify noise caused by the DUT.

[0039] In one embodiment, the test processor is configured to provide a test result calculated based on the respective measurements of the measurement units, when present. In particular, the test processor may be configured to calculate an average and / or a cross-relation of the respective measurement results. Here, the term averaging relates to any type of calculating a (convex) combination of the measurement results, in particular a weighted combination of the measurement results. For example, the weights may be chosen in accordance with an accuracy or other property of the respective measurement unit.

[0040] In one embodiment, the test setting data is further indicative of configuration information related to at least one measurement unit, and the test processor is configured to control the at least one of the measurement units according to the configuration information. In particular, the configuration information may include calibration data. Such calibration data can be defined to compensate the effects of any hardware component in the test system (e.g., splitters in the distribution matrix unit), in particular the specific hardware components that are activated according to the corresponding test setting. This way, the operation of the measurement unit(s) can be further adapted and optimized to the specific test setting. Therefore, the test procedure can be further improved. Specifically, according to this embodiment, the test system itself includes all necessary data for suitable noise compensation, which makes the system significantly easier to use.

[0041] In one embodiment, the test processor comprises a memory in which a plurality of test settings are stored, and wherein the received test setting data includes an identifier of one of the plurality of test settings stored in the memory.

[0042] This way, the size of the test setting data, provided as an input to the test processor, can be further reduced.

[0043] In one embodiment, the test processor is configured to perform the following (further) steps:

[0044] - receive respective measurement results from the one or more measurement units;

[0045] - check if a test result and / or the respective measurement results satisfy at least one criterion;

[0046] - select a second test setting based on an outcome of the checking;

[0047] - control the distribution matrix unit according to the second test setting; and

[0048] - control at least one of the one or more measurement units to perform respective second measurements.

[0049] According to this embodiment, the test system is adapted to perform a repeated measurement process, in which, after a first test of one or more DUTs has been performed according to the first test setting, a second test is performed based on a second test setting. In particular, the second test setting may be selected based on an outcome of the first test.

[0050] For example, in the case where the measurement results received after the first test indicate that a variation of measurement results exceeds a threshold, the second test setting may be a test setting that provides higher accuracy (for example, by connecting each DUT to a higher number of measurement units, as described above).

[0051] In particular, the process described above can be generalized to an iterative measurement process, in which the test setting is adapted in each iteration until the at least one criterion is satisfied.

[0052] This way, the efficiency of the test system can be further improved.

[0053] The object is further solved by a method for testing devices. In particular, the method may be implemented using a system as described above. The method comprises the following steps:

[0054] - receiving test setting data indicative of a mapping of at least one of a plurality of DUT-ports to one or more measurement units;

[0055] - controlling a distribution matrix unit according to the test setting data, wherein the distribution matrix unit has an input side connected to the plurality of DUT-ports and an output side connectable to the one or more measurement units; and

[0056] - providing an output to control the one or more measurement units to perform respective measurements.

[0057] With respect to the above-described method, technical effects and advantages similar to those described in connection with the system arise.

[0058] In one embodiment, controlling the distribution matrix unit comprises controlling at least one of the following: a switch, a splitter, and a splitch.

[0059] In one embodiment, at least two measurement units are controlled such that the respective measurements of the measurement units are performed simultaneously.

[0060] In one embodiment, the method further comprises the following steps:

[0061] - receiving respective measurement results from the one or more measurement units; - calculating an average and / or a cross-relation based on the respective measurement results;

[0062] - providing a test result based on the average and / or cross-relation.

[0063] Alternatively or additionally to calculating the average, any other value derived from the respective measurement results may be calculated and provided as a test result, including the maximum or minimum value, a median, etc.

[0064] In one embodiment, the method further comprises configuring the one or more measurement units according to configuration information indicated in the test setting data.

[0065] In one embodiment, the method further comprises the following steps:

[0066] - receiving respective measurement results from the one or more measurement units;

[0067] - checking if the test result and / or the respective measurement results satisfy at least one criterion;

[0068] - selecting a second test setting based on the outcome of the checking;

[0069] - controlling the distribution matrix unit according to the second test setting; and

[0070] - controlling one or more measurement units to perform respective second measurements.

[0071] The object is further solved by a computer readable medium. The computer readable medium stores instructions that when executed by at least one processor cause the at least one processor to implement a method as described above.

[0072] The advantages and preferred embodiments described above with regard to the system are to be applied mutatis mutandis to the method and the computer readable medium, and vice versa.

[0073] In the following, embodiments of the invention will be described using the figures, wherein Fig. 1 shows a test system according to a first embodiment;

[0074] Figs. 2a-2b show the test system from Figure 1 in different configurations;

[0075] Fig. 3 shows a portion of the test system from Figures 2a-2b according to a second embodiment;

[0076] Fig. 4 show a test system according to a third embodiment; and

[0077] Fig. 5 shows a test method according to a first embodiment.

[0078] Figure 1 shows a high-level view of a test system according to a first embodiment. The system comprises the DUT-interface 10 having the DUT-ports 1-8, the distribution matrix unit 20 and the test processor 30. As shown in Figure 1, the system may be connected to one or more measurement units when in use, the Figure 1 showing the option that two measurement units Ml and M2 are present.

[0079] It should be noted that the present invention relates to the system with or without the measurement units Ml, M2 being present and is irrespective of the type of measurement unit Ml, M2. Whilst the present disclosure is explained with two measurement units Ml, M2, it will be apparent to the person skilled in the art that only one measurement unit, or more than two measurement units Ml, M2 may be provided. The connections at the output side of the distribution matrix unit 20 being appropriate in number and configuration therefor.

[0080] The distribution matrix unit 20 is connected, at an input side thereof, with the DUT-interface 10 and, with an output side thereof, is connected with or at least is connectable to the two measurement units Ml and M2. Each of the DUT-ports 1-8 can be connected to one or both of the measurement units Ml and M2 through the distribution matrix unit 20 in accordance with a test setting. The internal structure of the distribution matrix unit 20 will be described in connection with Figures 2a-2b further below.

[0081] The test processor 30 may be connected to the distribution matrix unit 20 and adapted to control the distribution matrix unit 20 (or the components therein) according to the received test setting data, wherein the test setting determines n which of the DUT-ports 1-8 is connected to, or will be connectable to when present, which of the measurement units Ml, M2 or both of them. Moreover, the test processor 30 may be connected to, or at least is configured such that it may be connectable with, the measurement units Ml, M2. The test processor 30 may be adapted to configure the measurement units Ml, M2 according to parameters included in the test setting as well as to control the measurement units Ml, M2 to perform respective measurements.

[0082] Figures 2a and 2b show the test system of Figure 1 in greater detail. In this design of the test system, the DUT interface 10 comprises eight DUT-ports 1-8, eight ports being shown purely by way of example. Each of DUT-ports 1-4 is connected to a respective input of the distribution matrix unit 20 and, in particular, to a respective input of a first switch SW21. This first switch SW21 is a 4-pole switch which allows selective connection between each of the four inputs and a single output. The single output of the first switch SW21 is connected to the input of a 2-pole second switch SW22; this second switch SW22 allowing selective connection between the input and two outputs.

[0083] A first output of the second switch SW22 is connected directly to one of the three inputs of a third switch SW23, this being a 3-pole switch allowing selective connection between each of the three inputs and an output. The output of the third switch SW23 is a first output of the distribution matrix 20 and is connectable to a first measurement unit Ml.

[0084] The second output of the second switch SW22 is provided to the input of a first splitter SPR27 - this first splitter SPR27 splitting any signal which is input and providing this at each of its two outputs. A first output from the first splitter SPR27 is connected to a second input of the third switch SW23.

[0085] Each of DUT-ports 5-8 is connected to a respective input of the distribution matrix unit 20 and, in particular, to a respective input of a fourth switch SW24. This fourth switch SW24 is a 4-pole switch which allows selective connection between each of the four inputs with a single output. The single output of the fourth switch SW24 is connected to the input of a 2-pole fifth switch SW25; this fifth switch SW25 allowing selective connection between the input and two outputs. A first output of the fifth switch SW25 is connected directly to one of the three inputs of a sixth switch SW26, this being a 3-pole switch allowing selective connection between each of the three inputs and an output. The output of the sixth switch SW26 is a second output of the distribution matrix 20 and is connectable to a second measurement unit M2.

[0086] The second output of the fifth switch SW25 is provided to the input of a second splitter SPR28 - this second splitter SPR28 splitting any signal which is input and providing this at each of its two outputs. A first output from the second splitter SPR28 is connected to a second input of the sixth switch SW26.

[0087] The second output of the first splitter SPR27 is connected to the third input of the sixth switch SW26. The second output of the second splitter SPR28 is connected to the third input of the third switch SW23.

[0088] Here, the distribution matrix unit 20 comprises the switches SW21 -SW26 as well as the splitters SPR27, SPR28, each being controlled or controllable by the test processor 30. As mentioned, the splitters SPR27, SPR28 are configured to duplicate and output a signal provided on their input side. The test processor 30 may be configured to control each element of the distribution matrix unit 20, that is, to control the configuration of the switches SW21-SW26 and to activate the splitters SPR27, SPR28.

[0089] By controlling the switches SW21, SW22, SW23 and SW26 appropriately and, if necessary, activating the splitter SPR27, any one of the DUT-ports 1-4 can be connected either

[0090] - to measurement unit Ml; or

[0091] - to measurement unit M2; or

[0092] - to both measurement units Ml, M2.

[0093] Similarly, by controlling the switches SW24, SW25, SW26 and SW23 appropriately, and, if necessary, activating the splitter SPR28, any one of the DUT-ports 5-8 can be connected either to measurement unit Ml; or - to measurement unit M2; or

[0094] - to both measurement units Ml, M2.

[0095] In particular, in the configuration shown in Figure 2a, the test system is adapted to operate in a high accuracy test setting, for example, specified by the following test setting:

[0096] Upon receiving the above test setting, the test processor 30 is adapted to control the switches SW21 and SW22 such that the DUT-port 2 is connected to the splitter SPR27. Moreover, the test processor 30 is adapted to control the switches SW23 and SW26 such that the two signals provided by the splitter SPR27 are provided to the measurement units Ml and M2. This configuration of the switches is shown in Figure 2a.

[0097] This way, a signal provided at the DUT-port 2 is passed through the switches SW21 and SW22 to the splitter SPR27, is duplicated (split) by the splitter SPR27, and either signal is passed through the switch SW23 and SW26 to the measurement unit Ml and M2, respectively.

[0098] Therefore, in this embodiment, the test system is adapted to measure a device under test connected to the DUT-port 2 by both measurement units Ml, M2 simultaneously in order to perform a high accuracy test.

[0099] Figure 2b shows the test system from Figure 2a in a second configuration. Here, the switches are configured such that the DUT-port 2 is connected via switches SW21, SW22 and SW23 to measurement unit Ml, while DUT-port 6 is connected via switches SW24, SW25 and SW26 to measurement unit M2. No signals are provided to the splitters SPR27 and SPR28.

[0100] Therefore, two devices under test connected to DUT-ports 2 and 6 can be measured in parallel by the measurement units Ml and M2, just as in the test system of Figure 2. The configuration shown in Figure 2b corresponds to the following test setting:

[0101] Notably, only by changing the configuration of the elements of the distribution matrix unit 20, the test system from Figure 2a can be configured according to a high accuracy setting (Fig. 2a) or a high throughput setting (Fig. 2b).

[0102] As will be appreciated, by changing the number of poles for the switches, more or fewer connections can be made through the distribution matrix 20 as required. If the first and fourth switches SW21 and SW24 are 5-pole switches, for example, they may each selective connect up to five DUT ports through the distribution matrix 20 to the output ports and then on to the respective measurement units Ml, M2. Furthermore, by making each of the splitters SPR27, SPR28 3-way splitters, it would be possible to connect a single DUT port throug h to three measurement units Ml, M2 by providing additional switches at the output side of the splitters SPR27, SPR28. Additionally, by providing more switches in addition to the third and sixth switches SW23, SW26, it would be possible to connect through the distribution matrix 20 from more than two DUT ports to more than two measurement units, either providing more than two measurements of the same DUT port signal or more than two parallel measurements of more than two DUT ports. To this end, the distribution matrix 20 is fully scalable.

[0103] Figure 3 shows a portion of the test system from Figures 2a-2b according to a second embodiment. Specifically, Figure 3 shows a modification of the circuitry portion 21 around the splitter SPR27 and the switch SW22 (see dashed rectangle in Figures 2a-2b). Using the modified circuitry portion 21 as shown in Figure 3 in the system of Figures 2a-2b, the system is configured for amplification of the signal processed by the splitter SPR27 before and / or after the splitting . For this purpose, on a high level, the splitter SPR27 is surrounded by:

[0104] - the amplifier AMP1 at the input side of the splitter SPR27; and

[0105] - the amplifiers AMP2 and AMP3 at the output side of the splitter SPR27, wherein several additional switches SW31-SW37 are provided to enable bypassing of the amplifiers AMP1-AMP3. Specifically, the switches SW31 and SW32 are configured to provide the signal provided at input line 11 to the switch SW33 either by: bypassing the amplifier AMP1 (that is, when switches SW31 and SW32 are in configuration A); or routing the signal through the amplifier AMP1 (that is, when switches SW31 and SW32 are in configuration B).

[0106] From switch SW33, the signal can be either provided directly to output line 12, or may be provided to the input of the splitter SPR27.

[0107] The splitter SPR27 is configured to split the signal into two signals which are provided at two corresponding outputs of the splitter SPR27. At the first output, a circuitry is provided that includes

[0108] - the amplifier AMP2;

[0109] - the switch SW34 at the input side of the amplifier AMP2; and

[0110] - the switch SW35 at the output side of the amplifier AMP2.

[0111] Switches SW34 and SW35 enable to bypass the amplifier AMP2 similar as described above in connection with amplifier AMP1 and switches SW31, SW32. At the second output, a corresponding circuitry including the amplifier AMP3 and the switches SW36, SW37 for bypassing the amplifier AMP3 is provided.

[0112] Overall, the circuitry shown in Figure 3 allows to provide the signal provided at input line 11 (which corresponds to the connection between SW21 and SW22 in Figures 2a-2b) either

[0113] - at output line 12, while bypassing the splitter SPR27 and optionally being amplified by AMP1; or

[0114] - at output lines 13 and 14, wherein the signals can be optionally amplified before passing the splitter SPR27 using the amplifier AMP1 and / or after passing the splitter SPR27 using the amplifiers AMP2 and / or AMP3.

[0115] In particular, similar as shown in Figures 2a-2b, any one of the output lines 12, 13, 14 can be connected to a corresponding measurement unit Ml, M2.

[0116] Figure 4 shows a test system according to a third embodiment. The test system shown in Figure 4 provides the same functionality as the test system shown in Figures 2a-2b, however, the structure of the distribution matrix unit 20 is simpler. More precisely, the switches SW21, SW22 and the splitter SPR27 can be replaced by the splitch SPC37, and the switches SW23, SW25 and the splitter SPR28 can be replaced by the splitch SPC38. Moreover, the use of splitches SPC37, SPC38 allows to reduce the number of throws of the switches SW23, SW26.

[0117] As shown in Figure 4, the DUT interface 10 comprises eight DUT-ports 1-8, eight ports being shown purely by way of example. Each of DUT-ports 1-4 is connected to a respective input of the distribution matrix unit 20 and, in particular, to a respective input of a seventh switch SW31. This seventh switch SW31 is a 4-pole switch which allows selective connection between each of the four inputs with a single output. The single output of the seventh switch SW31 is connected to the input of a 4-pole first splitch SPC37; this first splitch SPC37 allowing selective connection between the input and any one or any multiple of the four outputs.

[0118] A first output of the first splitch SPC37 is connected to one of the inputs of a 2- pole eighth switch SW32. The output of the eighth switch SW32 being an output of the distribution matrix unit 20 and being connectable to a first measurement unit Ml.

[0119] Each of DUT-ports 5-8 is connected to a respective input of the distribution matrix unit 20 and, in particular, to a respective input of a ninth switch SW33. This ninth switch SW33 is a 4-pole switch which allows selective connection between each of the four inputs with a single output. The single output of the ninth switch SW33 is connected to the input of a 4-pole second splitch SPC38; this second splitch SPC38 allowing selective connection between the input and any one or any multiple of the four outputs.

[0120] A first output of the second splitch SPC38 is connected to one of the inputs of a 2-pole tenth switch SW34. The output of the tenth switch SW34 being an output of the distribution matrix unit 20 and being connectable to a second measurement unit M2.

[0121] A second output of the first splitch SPC37 is connected to the second input of the tenth switch SW34. The second output of the second splitch SPC38 is connected to the second input of the eighth switch SW32. In a similar manner as for the connections shown in each of Figs. 2a and 2b, appropriate control of each of the seventh to tenth switches SW31 to SW34 and the two splitches SPC37, SPC38 by the test processor 30 will allow connection of a number of DUT ports to respective measurement units Ml, M2 in parallel, or from a single DUT port to multiple measurement units Ml, M2 at the same time. This allows for either higher throughput measurements to be made or high sensitivity measurements of a single part of the DUT.

[0122] The distribution matrix 20 comprising the splitches SPC37, SPC38 as shown in Fig. 4 may readily be expanded to allow more than two DUT ports to be monitored in parallel or to allow a single DUT port to be monitored by more than two measurement units Ml, M2. Increasing the number of poles for each of the seventh and ninth switches SW31 and SW33 will allow more DUT ports to be selected for provision of signaling to the distribution matrix 20. Also, by adding more switches at the input of the distribution matrix 20, it would be possible to monitor more DUT ports in parallel and pass the signals therefrom through an increased number of splitches through to more measurement units. This would allow more DUT ports to be measured by more measurement units, as desired. Additionally, by connecting more switches (in addition to the eighth and tenth switches SW32, SW34) at the output side of the distribution matrix 20 to the unused (as shown in Fig. 4) outputs of the two splitches SPC37, SPC38, it would be possible to split the signal from a single DUT port to up to four measurement units. If the splitches SPC37, SPC38 are configured to provide more than four parallel and split outputs, then it is clear that more than four measurement units could be addressed for each splitch SPC37, SPC38 and therefore a single DUT port could be measured by more than four measurement units in parallel.

[0123] Figure 5 shows a flowchart of a method for testing devices according to a first embodiment. For ease of presentation, in the context of this embodiment, it is assumed that the method is implemented in the test system of Figures 2a-2b, wherein the method steps are performed by the test processor 30.

[0124] In step SI, the test processor 30 receives test setting data. In particular, the test setting data may include an identifier of a (first) test setting, wherein a plurality of test settings with associated identifiers may be stored in an internal memory of the test processor 30.

[0125] In step S2, the test processor 30 controls the distribution matrix unit 20 so that the DUT-ports 1-8 are connected to the measurement units Ml, M2 in accordance with the test setting. For this purpose, the test processor 30 controls the configurations of one or more of the switches SW21-SW26 and, if necessary, may activate the splitters SPR27, SPR28.

[0126] Assuming that after step S2, the distribution matrix unit 20 is configured as shown in Fig. 2b, a first device under test connected to DUT-port 2 is connected to the measurement unit Ml, and a second device under test connected to DUT- port 6 is connected to the measurement unit M2.

[0127] In step S3, the test processor 30 controls the measurement units M l, M2 to perform respective measurements, when they are present. This step may include configuring the measurement unit Ml, M2 according to calibration data or other settings provided by the test processor. In particular, the calibration data or settings may be associated with the test setting to compensate the effects of hardware components (e.g., splitters) activated in the test setting .

[0128] In step S4, the test processor 30 receives the respective measurement results from the measurement units Ml and M2 and calculates an overall test result. In addition, the test processor 30 may receive additional information provided by the measurement units Ml and M2, such as error codes associated with the performed measurement. Based on the received information, the test processor 30 may provide an overall result, which may be obtained from calculating an average of the results obtained by the measurement units Ml, M2, or may be a list of the respective single measurement results.

[0129] In step S5, it is checked whether the test result satisfies at least one criterion. In particular, the at least one criterion may be defined such that the criterion is satisfied if the test result does not exceed a certain threshold value. The criterion may be chosen depending on the test setting.

[0130] If the at least one criterion is satisfied in step S5, the method proceeds to step S6, in which the test result calculated in step S4 is provided as the final test result.

[0131] If the at least one criterion is not satisfied in step S5, the method proceeds to step S7, in which a second test setting is determined. In particular, the second test setting may be determined based on the test result and / or the first test setting. For example, the second test setting may be a high-accuracy test setting if the first test setting was a high-throughput setting and in step S5, it was determined that according to the test result, the tested device does not pass the test.

[0132] In another example, both the first test setting and the second test setting are (different) high-accuracy test settings, and according to the second test setting, the measurement is performed using additional test resources (i.e., more measurement units in parallel) and / or different configurations of the measurement units. Therefore, performing a second test according to the second test setting allows improving the accuracy or quality of the test performed in the first test setting.

[0133] After determining the second test setting in step S7, the method steps S2 to S5 may be performed again with respect to the second test setting.

[0134] However, the checking of a criterion and the iteration of the test procedure with a second test setting must not be necessarily performed. That is, steps S5 and S7 as described above must not be necessarily present, in which case the method proceeds from step S4 directly to step S6.

[0135] The invention is not limited to the embodiments described above. Rather, other variants of the invention can also be derived therefrom by the person skilled in the art without leaving the object of the invention. Furthermore, in particular, all individual features described in connection with the embodiment examples can also be combined with each other in other ways without leaving the object of the invention.

[0136] For example, although the test system shown in Figures 2a and 2b is designed for two measurement units Ml and M2, it should be clear that it can be extended to any number N of measurement units. For this purpose, the switches SW22 and SW25 need to be replaced by N-throw switches, the switches SW23 and SW26 by (N + l)-throw switches, and the splitters SPR27, SPR28 by N-way splitters.

[0137] Similarly, by extending the number of throws of the switches SW21 and SW24, the number of DUT-ports at the DUT-interface can be extended.

[0138] Moreover, only for ease of presentation, in the above description, merely a maximum throughput setting and high accuracy setting have been discussed as test settings. It should be understood that with the system and method of the present described above, any individual test setting can be implemented . For example, given a sufficient number of measurement units, hybrid test settings can be implemented, where a single DUT-port is connected to a plurality of measurement units (for improved accuracy) while, at the same time, other DUT- ports are each connected so separate measurement units (for improved throughput).

[0139] List of reference numerals

[0140] 1-8 DUT-port

[0141] 10 DUT-interface

[0142] 20 distribution matrix unit

[0143] 21 portion of distribution matrix unit

[0144] 30 test processor

[0145] Ml, M2 measurement unit

[0146] AMP1, AMP2, AMP3 amplifier

[0147] SPC37, SPC38 splitch

[0148] SPR27, SPR28 splitter

[0149] SW21-SW26 switch

[0150] SW31-SW34 switch

[0151] 51 Receiving (first) test setting

[0152] 52 Controlling distribution matrix unit

[0153] 53 Controlling measurement units

[0154] 54 Calculating test result

[0155] 55 Checking criterion

[0156] 56 Providing final test result

[0157] 57 Determining second test setting

Claims

Claims1. System for testing devices, the system comprising:- a DUT-interface (10) comprising a plurality of DUT-ports (1,...,8);- a distribution matrix unit (20) having an input side configured to be connected to the plurality of DUT-ports (1,...,8) and an output side configured to be connected to one or more measurement units (Ml, M2); and- a test processor (30), wherein the test processor (30) is configured to:- receive test setting data;- control the distribution matrix unit (20) such that, according to the test setting data, at least one of the plurality of DUT-ports (1,...,8) is connected to at least one of the measurement units (Ml, M2); and- control one or more of the measurement units (Ml, M2) to perform a respective measurement.

2. System according to claim 1, wherein the distribution matrix unit (20) comprises at least one of the following: a switch (SW21-SW26, SW31-SW34), a splitter (SPR27, SPR28), a splitch (SPC37, SPC38), a switchable amplifier (AMP1, AMP2, AMP3).

3. System according to claims 1 or 2, wherein the distribution matrix unit (20) comprises a splitter (SPR27, SPR28) and a switchable amplifier (AMP1) configured to provide an amplified signal to an input of the splitter (SPR27, SPR28).

4. System according to one of claims 1 to 3, wherein the distribution matrix unit (20) comprises a splitter (SPR27,SPR28) and, for any output of the splitter (SPR27, SPR28), a switchable amplifier (AMP2, AMP3) configured to amplify a signal provided by an output of the splitter (SPR27, SPR28).

5. System according to one of claims 1 to 4, wherein the test processor (30) is configured to control the distribution matrix unit (20) according to a first test setting, such that at least two of the plurality of DUT-ports (1,...,8) are each connected to a respective one of at least two measurement units (Ml, M2).

6. System according to one of claims 1 to 5, wherein the test processor (30) is configured to control the distribution matrix unit (20) according to a second test setting, such that at least one of the plurality of DUT-ports (1,...,8) is connected to at least two measurement units (Ml, M2) simultaneously.

7. System according to claims 1 to 6, wherein the test processor (30) is configured to control the measurement units (Ml, M2), when present, such that the respective measurements of the measurement units (Ml, M2) are performed simultaneously.

8. System according to claims 1 to 7, wherein the test processor (30) is configured to provide a test result calculated based on respective measurement results provided by the measurement units (Ml, M2), when present, in particular by calculating an average and / or cross-relation.

9. System according to one of claims 1 to 8, wherein the test setting data is indicative of configuration information, in particular calibration data, related to at least one measurement unit (Ml, M2), and wherein the test processor (30) is configured to control the at least one measurement unit (Ml, M2) according to the configuration information.

10. System according to one of claims 1 to 9,wherein the test processor (30) comprises a memory in which a plurality of test settings are stored, and wherein the received test setting data includes an identifier of one of the plurality of test settings stored in the memory.

11. System according to one of claims 1 to 10, wherein the test processor (30) is configured to:- receive respective measurement results from the one or more measurement units (Ml, M2);- check if a test result and / or the respective measurement results satisfy at least one criterion;- select a second test setting based on an outcome of the checking;- control the distribution matrix unit (20) according to the second test setting; and- control at least one of the one or more measurement units (Ml, M2) to perform respective second measurements.

12. System according to any one of claims 1 to 11, wherein the distribution matrix (20) is configurable to allow the following connections: a) at least two of the plurality of DUT-ports (1,...,8) are connected to a respective, and different, output of the distribution matrix (20) at the output side thereof; b) one of the plurality of DUT-ports (1,...,8) is connected to at least two outputs of the distribution matrix (20) at the output side thereof.

13. Method for testing devices, in particular using a system according to any one of the preceding claims, wherein the method comprises the following steps: receiving test setting data indicative of a mapping of at least one of a plurality of DUT-ports (1,...,8) to one or more measurement units (Ml, M2); controlling a distribution matrix unit (20) according to the test setting data, wherein the distribution matrix unit (20) has an input side connected to the plurality of DUT-ports (1,...,8) and an outputside connectable to the one or more measurement units (Ml, M2); and providing an output to control the one or more measurement units (Ml, M2) to perform respective measurements.

14. Method according to claim 13, wherein controlling the distribution matrix unit (20) comprises controlling at least one of the following: a switch (SW21-SW26, SW31-SW34), a splitter (SPR27, SPR28), a splitch (SPC37, SPC38), and a switchable amplifier (AMP1, AMP2, AMP3).

15. Method according to claim 13 or claim 14, wherein at least two measurement units (Ml, M2) are controlled such that the respective measurements of the measurement units (Ml, M2) are performed simultaneously.

16. Method according to any one of claims 13 to 15, further comprising the following steps:- receiving respective measurement results from the one or more measurement units (Ml, M2);- calculating an average and / or a cross-relation based on the respective measurement results;- providing a test result based on the average and / or cross-relation.

17. Method according to any one of claims 13 to 16, further comprising configuring the one or more measurement units (Ml, M2) according to configuration information indicated in the test setting data.

18. Method according to any one of claims 13 to 17, further comprising the following steps:- receiving respective measurement results from the one or more measurement units (Ml, M2);- checking if a test result and / or the respective measurement results satisfy at least one criterion;- selecting a second test setting based on an outcome of the checking;- controlling the distribution matrix unit (20) according to the second test setting; and- controlling one or more measurement units (Ml, M2) to perform respective second measurements.

19. Computer readable medium storing instructions that when executed by at least one processor cause the at least one processor to implement a method according to any of the claims 13-18.

Citation Information

Patent Citations

  • Switchable signal routing circuit

    US9712133B2

  • Signal combining apparatus

    EP2642672A1

  • Testing apparatus

    US20050240852A1

  • Digital communications test system for multiple input, multiple output (MIMO) systems

    US20110096821A1

  • tester

    US20160252601A1