Encoding device, decoding device, and non-transitory computer readable medium for bitstream

Abstract

An electronic device for decoding / encoding a bitstream is provided.　The electronic device includes at least one processor and at least one non-transitory computer-readable medium coupled to the at least one processor and storing one or more computer-executable instructions that, when executed by the at least one processor, cause the electronic device to: receive the bitstream; determine a block unit from an image frame according to the bitstream; predict the block unit based on a template-based intra mode derivation (TIMD) merge mode, including: determining one or more neighboring blocks of the block unit which are reconstructed based on at least one of a TIMD mode or the TIMD merge mode; determining, for the block unit, a TIMD merge list based on the one or more neighboring blocks; and determining a prediction of the block unit based on the TIMD merge list; and reconstruct the block unit based on the prediction.

Description

ENCODING DEVICE, DECODING DEVICE, AND NON-TRANSITORY COMPUTER READABLE MEDIUM FOR BITSTREAM

[0001] The present disclosure is generally related to video coding and, more specifically, to techniques for intra predictions.

[0002] The present disclosure claims the benefit of and priority to U.S. Provisional Patent Application Serial No. 63 / 588,170, filed on October 5, 2023, entitled “TIMD MERGE MODE,” the content of which is hereby incorporated herein fully by reference in its entirety into the present disclosure for all purposes.

[0003] Template-based intra mode derivation (TIMD) is a technique used in video compression standards like HEVC (High Efficiency Video Coding) to efficiently reduce the amount of data required for encoding video frames. TIMD operates by predicting the pixel values of a block based on neighboring pixels in the same frame, thus allowing for more efficient intra-frame compression. As such, TIMD significantly reduces spatial redundancy by utilizing the correlation between adjacent pixels, enabling the prediction of a large portion of the image without needing to explicitly encode every pixel.

[0004] TIMD relies on various modes of prediction that are selected based on the content of the image and its local characteristics. These modes provide flexibility in adapting to different textures and structures in the video frame, ensuring that the prediction is accurate, and the data overhead is minimized. Through effective use of TIMD, video encoders can achieve high compression ratios while preserving the visual quality of the video.

[0005] Over time, many optimizations and improvements have been proposed based on TIMD to further enhance the efficiency of video coding systems. These optimizations are not limited to enhancing TIMD itself but also involve modifications and advancements in related components of the video encoding process. Consequently, TIMD has become a foundational component of modern video compression techniques, and its ongoing optimization remains a critical area of research and development.Summery of Invention

[0006] The present disclosure is directed to an encoding device, a decoding device, and a non-transitory computer readable medium for bitstream, aimed at a technique for the intra prediction based on a template-based intra mode derivation (TIMD).

[0007] In a first aspect of the present disclosure, an electronic device for decoding / encoding a bitstream, and a non-transitory computer-readable medium of the electronic device are provided. The electronic device includes at least one processor and at least one non-transitory computer-readable medium coupled to the at least one processor and storing one or more computer-executable instructions that, when executed by the at least one processor, cause the electronic device to: receive the bitstream; determine a block unit from an image frame according to the bitstream; predict the block unit based on a template-based intra mode derivation (TIMD) merge mode, including: determining one or more neighboring blocks of the block unit which are reconstructed based on at least one of a TIMD mode or the TIMD merge mode; determining, for the block unit, a TIMD merge list based on the one or more neighboring blocks; and determining a prediction of the block unit based on the TIMD merge list; and reconstruct the block unit based on the prediction.

[0008] In an implementation of the first aspect, the one or more neighboring blocks include at least one of an adjacent block of the block unit and a non-adjacent block of the block unit.

[0009] In another implementation of the first aspect, the TIMD merge list includes a plurality of TIMD candidates corresponding to the one or more neighboring blocks. Each of the plurality of TIMD candidates includes at least two TIMD modes of the corresponding neighboring block.

[0010] In another implementation of the first aspect, each of the plurality of TIMD candidates further includes a fusion flag.

[0011] In another implementation of the first aspect, predicting the block unit based on the TIMD merge mode further includes: calculating, based on each of the plurality of TIMD candidates, a template cost of the block unit; and sorting the TIMD merge list based on the template cost.

[0012] In another implementation of the first aspect, the one or more computer-executable instructions, when executed by the at least one processor, further cause the electronic device to: determine, from the bitstream, an enable flag indicating whether to predict the block unit based on the TIMD merge mode.

[0013] Aspects of the present disclosure are best understood from the following detailed disclosure and the corresponding figures. Various features are not drawn to scale and dimensions of various features may be arbitrarily increased or reduced for clarity of discussion.

[0014] FIG. 1 is a block diagram illustrating a system having a first electronic device and a second electronic device for encoding and decoding a bitstream, in accordance with one or more example implementations of this disclosure.

[0015] FIG. 2 is a block diagram illustrating a decoder module of the second electronic device illustrated in FIG. 1, in accordance with one or more example implementations of this disclosure.

[0016] FIG. 3 is a flowchart illustrating a method / process for decoding and / or encoding a bitstream by an electronic device, in accordance with one or more example implementations of this disclosure.

[0017] FIG. 4 is a schematic diagram illustrating scanned adjacent blocks of a block unit, in accordance with one or more example implementations of this disclosure.

[0018] FIG. 5 is a block diagram illustrating an encoder module of the first electronic device illustrated in FIG. 1, in accordance with one or more example implementations of this disclosure.

[0019] The following disclosure contains specific information pertaining to implementations in the present disclosure. The figures and the corresponding detailed disclosure are directed to example implementations. However, the present disclosure is not limited to these example implementations. Other variations and implementations of the present disclosure will occur to those skilled in the art.

[0020] Unless noted otherwise, like or corresponding elements among the figures may be indicated by like or corresponding reference designators. The figures and illustrations in the present disclosure are generally not to scale and are not intended to correspond to actual relative dimensions.

[0021] For the purposes of consistency and ease of understanding, features are identified (although, in some examples, not illustrated) by reference designators in the exemplary figures. However, the features in different implementations may differ in other respects and shall not be narrowly confined to what is illustrated in the figures.

[0022] The present disclosure uses the phrases “in one implementation,” or “in some implementations,” which may refer to one or more of the same or different implementations. The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The term “comprising” means “including, but not necessarily limited to” and specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the equivalent.

[0023] For purposes of explanation and non-limitation, specific details, such as functional entities, techniques, protocols, and standards, are set forth for providing an understanding of the disclosed technology. Detailed disclosure of well-known methods, technologies, systems, and architectures are omitted so as not to obscure the present disclosure with unnecessary details.

[0024] Persons skilled in the art will recognize that any disclosed coding function(s) or algorithm(s) described in the present disclosure may be implemented by hardware, software, or a combination of software and hardware. Disclosed functions may correspond to modules that are software, hardware, firmware, or any combination thereof.

[0025] A software implementation may include a program having one or more computer-executable instructions stored on a computer-readable medium, such as memory or other types of storage devices. For example, one or more microprocessors or general-purpose computers with communication processing capability may be programmed with computer-executable instructions and perform the disclosed function(s) or algorithm(s).

[0026] The microprocessors or general-purpose computers may be formed of application-specific integrated circuits (ASICs), programmable logic arrays, and / or one or more digital signal processors (DSPs). Although some of the disclosed implementations are oriented to software installed and executing on computer hardware, alternative implementations implemented as firmware, as hardware, or as a combination of hardware and software are well within the scope of the present disclosure. The computer-readable medium includes, but is not limited to, random-access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, compact disc read-only memory (CD ROM), magnetic cassettes, magnetic tape, magnetic disk storage, or any other equivalent medium capable of storing　computer-executable instructions. The computer-readable medium may be a non-transitory computer-readable medium.

[0027] FIG. 1 is a block diagram illustrating a system 100 having a first electronic device and a second electronic device for encoding and decoding a bitstream, in accordance with one or more example implementations of this disclosure.

[0028] The system 100 includes a first electronic device 110, a second electronic device 120, and a communication medium 130.

[0029] The first electronic device 110 may be a source device including any device configured to encode a bitstream and transmit the encoded bitstream to the communication medium 130. The second electronic device 120 may be a destination device including any device configured to receive encoded bitstream via the communication medium 130 and decode the encoded bitstream. The bitstream may include, for example, video data.

[0030] The first electronic device 110 may communicate via wire, or wirelessly, with the second electronic device 120 via the communication medium 130. The first electronic device 110 may include a source module 112, an encoder module 114, and a first interface 116, among other components. The second electronic device 120 may include a display module 122, a decoder module 124, and a second interface 126, among other components. The first electronic device 110 may be a video encoder and the second electronic device 120 may be a video decoder.

[0031] The first electronic device 110 and / or the second electronic device 120 may be a mobile phone, a tablet, a desktop, a notebook, or other electronic devices. FIG. 1 illustrates one example of the first electronic device 110 and the second electronic device 120. The first electronic device 110 and second electronic device 120 may include greater or fewer components than illustrated or have a different configuration of the various illustrated components.

[0032] The source module 112 may include a video capture device to capture new video, a video archive to store previously captured video, and / or a video feed interface to receive the video from a video content provider. The source module 112 may generate computer graphics-based data, as the source video, or may generate a combination of live video, archived video, and computer-generated video, as the source video. The video capture device may include a charge-coupled device (CCD) image sensor, a complementary metal-oxide-semiconductor (CMOS) image sensor, or a camera.

[0033] The encoder module 114 and the decoder module 124 may each be implemented as any one of a variety of suitable encoder / decoder circuitry, such as one or more microprocessors, a central processing unit (CPU), a graphics processing unit (GPU), a system-on-a-chip (SoC), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combinations thereof. When implemented partially in software, a device may store the program having computer-executable instructions for the software in a suitable, non-transitory computer-readable medium and execute the stored computer-executable instructions using one or more processors to perform the disclosed methods. Each of the encoder module 114 and the decoder module 124 may be included in one or more encoders or decoders, any of which may be integrated as part of a combined encoder / decoder (CODEC) in a device.

[0034] The first interface 116 and the second interface 126 may utilize customized protocols or follow existing standards or de facto standards including, but not limited to, Ethernet, IEEE 802.11 or IEEE 802.15 series, wireless USB, or telecommunication standards including, but not limited to, Global System for Mobile Communications (GSM), Code-Division Multiple Access 2000 (CDMA2000), Time Division Synchronous Code Division Multiple Access (TD-SCDMA), Worldwide Interoperability for Microwave Access (WiMAX), Third Generation Partnership Project Long-Term Evolution (3GPP-LTE), or Time-Division LTE (TD-LTE). The first interface 116 and the second interface 126 may each include any device configured to transmit a compliant video bitstream via the communication medium 130 and to receive the compliant video bitstream via the communication medium 130.

[0035] The first interface 116 and the second interface 126 may include a computer system interface that enables a compliant video bitstream to be stored on a storage device or to be received from the storage device. For example, the first interface 116 and the second interface 126 may include a chipset supporting Peripheral Component Interconnect (PCI) and Peripheral Component Interconnect Express (PCIe) bus protocols, proprietary bus protocols, Universal Serial Bus (USB) protocols, Inter-Integrated Circuit (I2C) protocols, or any other logical and physical structure(s) that may be used to interconnect peer devices.

[0036] The display module 122 may include a display using liquid crystal display (LCD) technology, plasma display technology, organic light-emitting diode (OLED) display technology, or light-emitting polymer display (LPD) technology, with other display technologies used in some other implementations. The display module 122 may include a High-Definition display or an Ultra-High-Definition display.

[0037] FIG. 2 is a block diagram illustrating a decoder module 124 of the second electronic device 120 illustrated in FIG. 1, in accordance with one or more example implementations of this disclosure. The decoder module 124 may include an entropy decoder (e.g., an entropy decoding unit 2241), a prediction processor (e.g., a prediction processing unit 2242), an inverse quantization / inverse transform processor (e.g., an inverse quantization / inverse transform unit 2243), a summer (e.g., a summer 2244), a filter (e.g., a filtering unit 2245), and a decoded picture buffer (e.g., a decoded picture buffer 2246). The prediction processing unit 2242 further may include an intra prediction processor (e.g., an intra prediction unit 22421) and an inter prediction processor (e.g., an inter prediction unit 22422). The decoder module 124 receives a bitstream, decodes the bitstream, and outputs a decoded video.

[0038] The entropy decoding unit 2241 may receive the bitstream including multiple syntax elements from the second interface 126, as shown in FIG. 1, and perform a parsing operation on the bitstream to extract syntax elements from the bitstream. As part of the parsing operation, the entropy decoding unit 2241 may entropy decode the bitstream to generate quantized transform coefficients, quantization parameters, transform data, motion vectors, intra modes, partition information, and / or other syntax information.

[0039] The entropy decoding unit 2241 may perform context-adaptive variable length coding (CAVLC), context-adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding, or another entropy coding technique to generate the quantized transform coefficients. The entropy decoding unit 2241 may provide the quantized transform coefficients, the quantization parameters, and the transform data to the inverse quantization / inverse transform unit 2243 and provide the motion vectors, the intra modes, the partition information, and other syntax information to the prediction processing unit 2242.

[0040] The prediction processing unit 2242 may receive syntax elements, such as motion vectors, intra modes, partition information, and other syntax information, from the entropy decoding unit 2241. The prediction processing unit 2242 may receive the syntax elements including the partition information and divide image frames according to the partition information.

[0041] Each of the image frames may be divided into at least one image block according to the partition information. The at least one image block may include a luminance block for reconstructing multiple luminance samples and at least one chrominance block for reconstructing multiple chrominance samples. The luminance block and the at least one chrominance block may be further divided to generate macroblocks, coding tree units (CTUs), coding blocks (CBs), sub-divisions thereof, and / or other equivalent coding units.

[0042] During the decoding process, the prediction processing unit 2242 may receive predicted data including the intra mode or the motion vector for a current image block of a specific one of the image frames. The current image block may be the luminance block or one of the chrominance blocks in the specific image frame.

[0043] The intra prediction unit 22421 may perform intra-predictive coding of a current block unit relative to one or more neighboring blocks in the same frame as the current block unit based on syntax elements related to the intra mode in order to generate a predicted block. The intra mode may specify the location of reference samples selected from the neighboring blocks within the current frame. The intra prediction unit 22421 may reconstruct multiple chroma components of the current block unit based on multiple luma components of the current block unit when the multiple chroma components is reconstructed by the prediction processing unit 2242.

[0044] The intra prediction unit 22421 may reconstruct multiple chroma components of the current block unit based on the multiple luma components of the current block unit when the multiple luma components of the current block unit is reconstructed by the prediction processing unit 2242.

[0045] The inter prediction unit 22422 may perform inter-predictive coding of the current block unit relative to one or more blocks in one or more reference image blocks based on syntax elements related to the motion vector in order to generate the predicted block.

[0046] The inter prediction unit 22422 may receive the reference image block stored in the decoded picture buffer 2246 and reconstruct the current block unit based on the received reference image blocks.

[0047] The inverse quantization / inverse transform unit 2243 may apply inverse quantization and inverse transformation to reconstruct the residual block in the pixel domain. The inverse quantization / inverse transform unit 2243 may apply inverse quantization to the residual quantized transform coefficient to generate a residual transform coefficient and then apply inverse transformation to the residual transform coefficient to generate the residual block in the pixel domain.

[0048] The inverse transformation may be inversely applied by the transformation process, such as a discrete cosine transform (DCT), a discrete sine transform (DST), an adaptive multiple transform (AMT), a mode-dependent non-separable secondary transform (MDNSST), a Hypercube-Givens transform (HyGT), a signal-dependent transform, a Karhunen-Loeve transform (KLT), a wavelet transform, an integer transform, a sub-band transform, or a conceptually similar transform. The inverse transformation may convert the residual information from a transform domain, such as a frequency domain, back to the pixel domain, etc. The degree of inverse quantization may be modified by adjusting a quantization parameter.

[0049] The summer 2244 may add the reconstructed residual block to the predicted block provided by the prediction processing unit 2242 to produce a reconstructed block.

[0050] The filtering unit 2245 may include a deblocking filter, a sample adaptive offset (SAO) filter, a bilateral filter, and / or an adaptive loop filter (ALF) to remove the blocking artifacts from the reconstructed block. Additional filters (in loop or post loop) may also be used in addition to the deblocking filter, the SAO filter, the bilateral filter, and the ALF. Such filters (which are not explicitly illustrated for the brevity of description) may filter the output of the summer 2244. The filtering unit 2245 may output the decoded video to the display module 122 or other video receiving units after the filtering unit 2245 performs the filtering process for the reconstructed blocks of the specific image frame.

[0051] The decoded picture buffer 2246 may be a reference picture memory that stores the reference block to be used by the prediction processing unit 2242 in decoding the bitstream (e.g., in inter-coding modes). The decoded picture buffer 2246 may be formed by any one of a variety of memory devices, such as a dynamic random-access memory (DRAM), including synchronous DRAM (SDRAM), magneto-resistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The decoded picture buffer 2246 may be on-chip along with other components of the decoder module 124 or may be off-chip relative to those components.

[0052] FIG. 3 is a flowchart illustrating a method / process 300 for decoding and / or encoding a bitstream by an electronic device, in accordance with one or more example implementations of this disclosure. The method / process 300 is an example implementation, as there may be a variety of methods of decoding the video data.

[0053] The method / process 300 may be performed by an electronic device using the configurations illustrated in FIGS. 1 and 2, where various elements of these figures may be referenced to describe the method / process 300. Each block illustrated in FIG. 3 may represent one or more processes, methods, or subroutines performed by an electronic device.

[0054] The order in which the blocks appear in FIG. 3 is for illustration only, and may not be construed to limit the scope of the present disclosure, thus may be different from what is illustrated. Additional blocks may be added or fewer blocks may be utilized without departing from the scope of the present disclosure.

[0055] At block 310, the method / process 300 may start by receiving (e.g., by the decoder module 124) a bitstream. The bitstream received by the decoder module 124 may be provided by the encoder module 114 and include video data, which may include information of multiple image frames.

[0056] With reference to FIG. 1 and FIG. 2, the second electronic device 120 may receive the bitstream from an encoder, such as the first electronic device 110, or from other video providers, via the second interface 126. The second interface 126 may provide the bitstream to the decoder module 124.

[0057] The entropy decoding unit 2241 may decode the bitstream to determine multiple prediction indications and multiple partitioning indications for multiple video images. Then, the decoder module 124 may further reconstruct the multiple video images based on the prediction indications and the partitioning indications. The prediction indications and the partitioning indications may include multiple flags and multiple indices.

[0058] At block 320, the process 300 may determine (e.g., by the decoder module 124), a block unit from an image frame according to the bitstream. Specifically, the bitstream may include video data, and a block unit may be determined from an image frame according to the video data.

[0059] With reference to FIG. 1 and FIG. 2, the decoder module 124 may determine the image frames based on the bitstream and may divide each image frame to determine the block unit according to the partition indications in the bitstream. For example, the decoder module 124 may divide the image frames to generate multiple CTUs, and further divide one of the CTUs to determine the block unit according to the partition indications based on any video coding standard.

[0060] In some implementations, the block unit may be a current block. For example, the current block may include at least one of a coding unit, a prediction unit, a macroblock, a luma block, and a chrome block.

[0061] At block 330, the process 300 may predict (e.g., by the decoder module 124), the block unit based on a TIMD merge mode. Specifically, block 330 may include blocks 3301, 3303, and 3305, and details of which will be described below.

[0062] In some implementations, the decoder module 124 may determine, from the bitstream, an enable flag (e.g., a merge flag) that indicates whether the TIMD merge mode is the intra prediction mode for the block unit. For example, in a case that the merge flag is true (e.g., includes a value of “1”), the decoder module 124 may predict the block unit based on the TIMD merge mode, otherwise, the decoder module 124 may not predict the block unit based on the TIMD mode.

[0063] In some implementations, the TIMD merge mode may be a sub-mode of the TIMD mode. For example, the decoder module 124 may determine a block-level TIMD enable flag (e.g., that indicates whether the TIMD mode is applied to the block unit) first and determine the merge flag when the block-level TIMD enable flag is true (e.g., indicates a value of “1”).

[0064] At block 3301, the process 300 may determine (e.g. by the decoder module 124) one or more neighboring blocks of the block unit which are reconstructed based on at least one of a TIMD mode or the TIMD merge mode.

[0065] In some implementations, the decoder module 124 may scan a plurality of adjacent blocks of the block unit, and determine one or more adjacent blocks (e.g., also referred to as a plurality of adjacent spatial neighboring candidates) that are reconstructed based on at least one of the TIMD or the TIMD merge mode.

[0066] FIG. 4 is a schematic diagram illustrating scanned adjacent blocks of a block unit, in accordance with one or more example implementations of this disclosure.

[0067] With reference to FIG. 4, the scanned adjacent blocks of the block unit 400 may include the below-left block 420, the left block 421, the above-left block 423, the above block 425, and the above-right block 426 of the block unit 400. For example, the decoder module 124 may scan the adjacent blocks 420, 421, 423, 425, and 426 in an order of {421, 425, 426, 420, 423}.

[0068] It should be noted that, the scanned adjacent blocks of the block unit 400 may not be limited to the above-mentioned implementation. In other implementations, the scanned adjacent blocks of the block unit 400 may include the blocks 420, 422, 423, 424, and 426.

[0069] In some implementations, the decoder module 124 may scan a plurality of non-adjacent blocks of the block unit and determine one or more adjacent blocks (e.g., also referred to as a plurality of non-adjacent spatial neighboring candidates) that are reconstructed based on at least one of the TIMD or the TIMD merge mode. In some implementations, the decoder module 124 may scan a plurality of adjacent and non-adjacent blocks of the block unit and determine one or more (e.g., adjacent or non-adjacent) spatial neighboring candidates.

[0070] Based on the above-mentioned method, one or more neighboring blocks of the block unit which are reconstructed based on at least one of the TIMD mode or the TIMD merge mode may be determined.

[0071] At block 3303, the process 300 may determine (e.g., by the decoder module 124), for the block unit, a TIMD merge list based on the one or more neighboring blocks.

[0072] In some implementations, the TIMD merge list (e.g., denoted as TimdMergeList in the disclosure) may include one or more TIMD candidates corresponding to the one or more neighboring blocks, and each TIMD candidate may include at least one prediction mode. In other words, each of the one or more neighboring blocks may contribute a piece of TIMD information (e.g., also referred to as the TIMD candidate) to the TIMD merge list, and each piece of TIMD information may include at least one prediction mode. In some implementations, each piece of TIMD information may include at least two prediction modes. In some implementations, each piece of TIMD information may include a fusion flag.

[0073] In some implementations, the prediction mode(s) of one piece of TIMD information may include the TIMD mode(s) selected during the TIMD process of the corresponding neighboring block.

[0074] For example, in a case that a first neighboring block of the block unit is reconstructed based on the TIMD mode, the TIMD candidate corresponding to the first neighboring block may include two prediction modes that are selected as the TIMD modes during the TIMD process of the first neighboring block. The selection may be performed based on a template cost of the neighboring block.

[0075] It should be noted that the template cost may include at least one of sum of absolute transform differences (SATD), sum of absolute differences (SAD), and a structural similarity index measure (SSIM).

[0076] For example, in a case that the TIMD candidate corresponding to the first neighboring block may further include a fusion flag indicating whether a fusion is applied during the TIMD process of the first neighboring block.

[0077] For example, in a case that the fusion flag is true, the TIMD candidate corresponding to the first neighboring block may include all the TIMD modes (e.g., 2) selected during the TIMD process; in a case that the fusion flag is false, the TIMD candidate corresponding to the first neighboring block may include only one TIMD mode.

[0078] In some implementations, each TIMD candidate included in the TIMD merge list may correspond to a list index, e.g., from 0 to N, where N may be the number of the neighboring block(s) determined in block 3301.

[0079] At block 3305, the process 300 may determine (e.g., by the decoder module 124) a prediction of the block unit based on the TIMD merge list.

[0080] In some implementations, one of the TIMD candidates in the TIMD merge list may be selected for determining the predication of the block unit.

[0081] In some implementations, with reference to FIG. 4, the TIMD candidates (e.g., CAN_421, CAN_425, and CAN_423) included in the TIMD merge list may correspond to the blocks 421, 425, and 423 adjacent to the block unit 400, respectively.

[0082] In some examples, each TIMD candidate (e.g., CAN_421, CAN_425, and CAN_423) may correspond to a list index, as shown in Table 1 below.

[0083] In some implementations, for each TIMD candidate (e.g., CAN_421, CAN_425, and CAN_423), the decoder module 124 may determine a prediction (e.g., P_421, P_425, and P_423) of the block unit 400.

[0084] In some implementations, the application of fusion during the prediction may be determined based on the template cost of the block unit 400.

[0085] For example, the TIMD candidate CAN_421 may include a first prediction mode M1 (e.g., iBestMode) and a second prediction mode M2 (e.g., iSecondaryMode). The decoder module 124 may calculate a first template cost C1 using the first prediction mode M1, calculate a second template cost C2 using the second prediction mode M2, and determine whether to apply fusion during prediction based on the first template cost C1 and the second template cost C2. In a case that the first template cost C1 and the second template cost C2 meet a predetermined condition (e.g., C1 < C2 and C2 < 2*C1), the fusion is applied, otherwise, the first prediction mode M1 is applied. In addition, the fusion weights W1, W2 of the first prediction mode M1 and the second prediction mode M2 may be negatively related to the corresponding template costs C1, C2, e.g., 　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　W1 = C2 / (C1+C2); 　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　W2 = C1 / (C2+C1).

[0086] Therefore, the prediction P_421 may be determined based on the following equation: 　　　　　　　　　　　　　　　　　　　　　　　　 P_421 = W1 * P1_421 + W2 * P2_421,

[0087] where P1_421 represents a first prediction of the block unit 400 using the first prediction mode M1, and P2_421 represents a second prediction of the block unit 400 using the second prediction mode M2. In a case that only the first prediction mode M1 is applied, the prediction P_421 may equal to P1_421.

[0088] In some implementations, the application of fusion during the prediction may be determined based on the fusion flag included in each TIMD candidate. For example, in a case that the fusion flag is true (e.g., “1”), the fusion is applied, otherwise, the first prediction mode M1 is applied.

[0089] In some implementations, once the predictions (e.g., P_421, P_425, and P_423) are determined for the TIMD candidates (e.g., CAN_421, CAN_425, and CAN_423), the decoder module 124 may calculate a rate distortion (RD) cost for each prediction (e.g., P_421, P_425, and P_423), and select the TIMD candidate that corresponds to the prediction with a smaller RD cost for determining the predication of the block unit 400.

[0090] In some implementations, the decoder module 124 may determine a merge index from the bitstream for selecting the TIMD candidate from the TIMD merge list for determining the prediction of the block unit 400. For example, in a case that the merge index is “0”, the decoder module 124, based on the TIMD merge list shown in Table 1, may select the TIMD candidate CAN_421 corresponding to the list index “0” for determining the prediction of the block unit 400. In other words, the merge index may be signaled into the bitstream by the encoder module 114 (e.g., after the encoder module 114 selects the TIMD candidate that corresponds to the prediction with a smaller RD cost for determining the predication of the block unit 400).

[0091] In some implementations, for each TIMD candidate (e.g., CAN_421, CAN_425, and CAN_423), the decoder module 124 may determine a prediction (e.g., Pt_421, Pt_425, and Pt_423) of the template of the block unit 400.

[0092] For example, the TIMD candidate CAN_421 may include a first prediction mode M1 and a second prediction mode M2. The decoder module 124 may calculate a first template cost C1 using the first prediction mode M1, calculate a second template cost C2 using the second prediction mode M2, and determine whether to apply fusion during prediction based on the first template cost C1 and the second template cost C2. In a case that the first template cost C1 and the second template cost C2 meet a predetermined condition (e.g., C1 < C2 and C2 < 2*C1), the fusion is applied, otherwise, the first prediction mode M1 is applied. In addition, the fusion weights W1, W2 of the first prediction mode M1 and the second prediction mode M2 may be negatively related to the corresponding template costs C1, C2, e.g., 　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　 W1 = C2 / (C1+C2); 　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　 W2 = C1 / (C2+C1).

[0093] Therefore, the prediction Pt_421 may be determined based on the following equation: 　　　　　　　　　　　　　　　　　　　　　　　　　 Pt_421 = W1 * Pt1_421 + W2 * Pt2_421,

[0094] where Pt1_421 represents a first prediction of the template of the block unit 400 using the first prediction mode M1, and Pt2_421 represents a second prediction of the template of the block unit 400 using the second prediction mode M2. In a case that only the first prediction mode M1 is applied, the prediction Pt_421 may equal to Pt1_421.

[0095] In some implementations, the application of fusion during the prediction may be determined based on the fusion flag included in each TIMD candidate. For example, in a case that the fusion flag is true (e.g., “1”), the fusion is applied, otherwise, the first prediction mode M1 is applied.

[0096] In some implementations, once the predictions (e.g., Pt_421, Pt_425, and Pt_423) are determined for the TIMD candidates (e.g., CAN_421, CAN_425, and CAN_423), the decoder module 124 may determine a final template cost (e.g., C_421, C_425, and C_423) for each TIMD candidate based on the predictions of the template of the block unit 400 and the reconstruction of the template of the block unit 400.

[0097] In some implementations, the decoder module 124 may sort the TIMD merge list based on the final template costs corresponding to the TIMD candidates, e.g., in an ascending order. For example, in a case that the final template costs, from smallest to largest, are C_425, C_421, and C_423, the TIMD merge list may be sorted as {CAN_425, CAN_421, CAN_423}. In such a case, the first TIMD candidate (e.g., CAN_425) in the sorted TIMD merge list may be selected for determining the prediction of the block unit 400.

[0098] In some implementations, the decoder module 124 may sort the TIMD merge list and reassign the list index based on the final template costs corresponding to the TIMD candidates, e.g., in an ascending order. For example, in a case that the final template costs, from smallest to largest, are C_425, C_421, and C_423, the TIMD merge list may be sorted as shown in Table 2 below:

[0099] In some implementations, the decoder module 124 may determine a merge index from the bitstream for selecting the TIMD candidate from the TIMD merge list for determining the prediction of the block unit 400. For example, in a case that the merge index is “0”, the decoder module 124, based on the TIMD merge list shown in Table 2, may select the TIMD candidate CAN_425 corresponding to the list index “0” for determining the prediction of the block unit 400.

[0100] In other words, the merge index may be signaled into the bitstream by the encoder module 114. For example, after sorting the TIMD merge list, the encoder module 114 may determine a prediction (e.g., P_425, P_421, and P_423) of the block unit 400 for each TIMD candidate (e.g., CAN_425, CAN_421, and CAN_423). Once the predictions (e.g., P_425, P_421, and P_423) are determined for the TIMD candidates (e.g., CAN_425, CAN_421, and CAN_423), the encoder module 114 may calculate an RD cost for each prediction (e.g., P_425, P_421, and P_423), select the TIMD candidate (e.g., CAN_425) that corresponds to the prediction with a smaller RD cost for determining the predication of the block unit 400, and signal the corresponding list index (e.g., “0”) as the merge index into the bitstream.

[0101] In some implementations, the fusion flag and the fusion weights (e.g., W1, W2) corresponding to the selected TIMD candidate may be used when determining the prediction of the block unit.

[0102] For example, the selected TIMD candidate may include a first prediction mode M1, a second prediction mode M2, and a fusion flag. The first prediction mode M1 may correspond to a first fusion weight W1 and the second prediction mode M2 may correspond to a second fusion weight W2. In a case that the fusion flag is false (e.g., “0”), the prediction P of the block unit may be determined based on the first prediction mode M1 only (e.g., Pt1); and in a case that the fusion flag is true (e.g., “1”), the prediction P of the block unit may be determined based on the following equation: 　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　P = W1 * Pt1 + W2 * Pt2,

[0103] where Pt1 represents a first prediction of the block unit 400 using the first prediction mode M1, and Pt2 represents a second prediction of the block unit 400 using the second prediction mode M2.

[0104] In some implementations, two of the prediction modes in the TIMD merge list may be selected for determining the prediction of the block unit.

[0105] In some implementations, with reference to FIG. 4, the TIMD candidates (e.g., CAN_425 and CAN_423) included in the TIMD merge list may correspond to the blocks 425 and 423 adjacent to the block unit 400, respectively. Each TIMD candidate may contribute a first prediction mode (e.g., iBestMode) and a second prediction mode (e.g., iSecondaryMode) to the TIMD merge list.

[0106] In some examples, all the prediction modes contributed by the TIMD candidates may be included in the TIMD merge list and each prediction mode may correspond to a list index, as shown in Table 3 below.

[0107] Specifically, the TIMD merge list may sequentially include a first prediction mode M1_425 contributed by the TIMD candidate CAN_425, a second prediction mode M2_425 contributed by the TIMD candidate CAN_425, a first prediction mode M1_423 contributed by the TIMD candidate CAN_423, and a second prediction mode M1_423 contributed by the TIMD candidate CAN_423.

[0108] In some examples, all the first prediction modes may be included into the TIMD merge list prior to the second prediction modes, as shown in Table 4 below.

[0109] Specifically, the TIMD merge list may sequentially include a first prediction mode M1_425 contributed by the TIMD candidate CAN_425, a second prediction mode M2_425 contributed by the TIMD candidate CAN_425, a first prediction mode M1_423 contributed by the TIMD candidate CAN_423, and a second prediction mode M1_423 contributed by the TIMD candidate CAN_423.

[0110] In some implementations, the decoder module 124 may select two prediction modes for determining a prediction of the block unit 400 based on the template cost.

[0111] For example, for each prediction modes in the TIMD merge list, a template cost of the block unit 400 may be calculated, and two prediction modes with the smallest template cost may be selected for determining the prediction of the block unit 400.

[0112] For example, a first prediction mode M1 and a second prediction mode M2 may be selected from the TIMD merge list. The decoder module 124 may calculate a first template cost C1 using the first prediction mode M1, calculate a second template cost C2 using the second prediction mode M2, and determine whether to apply fusion during prediction based on the first template cost C1 and the second template cost C2. In a case that the first template cost C1 and the second template cost C2 meet a predetermined condition (e.g., C1 < C2 and C2 < 2*C1), the fusion is applied, otherwise, the first prediction mode M1 is applied. In addition, the fusion weights W1, W2 of the first prediction mode M1 and the second prediction mode M2 may be negatively related to the corresponding template costs C1, C2, e.g., 　　　　　　　　　　　　　　　　　　　　　　　　　　　　W1 = C2 / (C1+C2); 　　　　　　　　　　　　　　　　　　　　　　　　　　　　W2 = C1 / (C2+C1).

[0113] Therefore, the prediction P of the block unit 400 may be determined based on the following equation: 　　　　　　　　　　　　　　　　　　　　　　　　　 P = W1 * Pt1 + W2 * Pt2,

[0114] where Pt1 represents a first prediction of the template of the block unit 400 using the first prediction mode M1, and Pt2 represents a second prediction of the template of the block unit 400 using the second prediction mode M2. In a case that only the first prediction mode M1 is applied, the prediction P may equal to Pt1.

[0115] In some implementations, the decoder module 124 may determine two merge indexes from the bitstream for selecting the two prediction modes from the TIMD merge list (as shown in Table 3 or Table 4) for determining the prediction of the block unit 400. In other words, the merge indexes may be signaled into the bitstream by the encoder module 114 (e.g., after the encoder module 114 selects two prediction modes with the smallest template cost for determining the prediction of the block unit 400).

[0116] In some implementations, each prediction mode within the TIMD merge list may be accompanied by a fusion flag. With reference to FIG. 4, the TIMD candidates (e.g., CAN_425 and CAN_423) included in the TIMD merge list may correspond to the blocks 425 and 423 adjacent to the block unit 400, respectively. Each TIMD candidate may contribute a first prediction mode (e.g., iBestMode), a second prediction mode (e.g., iSecondaryMode), and a fusion flag to the TIMD merge list. Therefore, the TIMD merge list may be represented as {(M1_425, FL_425), (M2_425, FL_425), (M1_423, FL_423), (M2_423, FL_423)}, where FL_425 represents the fusion flag contributed from the TIMD candidate CAN_425, and FL_423 represents the fusion flag contributed from the TIMD candidate CAN_423.

[0117] In some implementations, the two prediction modes selected for determining the prediction may be contributed from different TIMD candidates. Therefore, a mechanism may need to be provided for determining whether to apply fusion when determining the prediction of the block unit based on the two selected prediction modes.

[0118] For example, in a case that the prediction mode M1_425 (e.g., corresponding to the fusion flag FL_425) and the prediction mode M1_423 (e.g., corresponding to the fusion flag FL_423) are with the smallest and the second smallest template cost respectively, the prediction modes M1_425 and the prediction mode M1_423 may be selected for determining the prediction of the block unit 400. In such a case, there may be four possible scenarios, and the mechanism will be described for the four scenarios in the following.

[0119] In a first scenario that both fusion flags FL_425 and FL_423 are true, the fusion may be applied when determining the prediction of the block unit 400.

[0120] In a second scenario that both fusion flags FL_425 and FL_423 are false, the fusion may be applied when determining the prediction of the block unit 400.

[0121] In a third scenario that the fusion flag FL_425 is true and the fusion flag FL_423 is false, the fusion may be applied when determining the prediction of the block unit 400.

[0122] In a fourth scenario that the fusion flags FL_425 is false and the fusion flag FL_423 is true, the fusion may not be applied when determining the prediction of the block unit 400.

[0123] For example, in a case that the fusion is applied, the decoder module 124 may calculate a first template cost C1 using the prediction mode M1_425, calculate a second template cost C2 using the prediction mode M1_423, and calculate the fusion weights W1, W2 of the prediction mode M1_425 and the prediction mode M1_423 based on, e.g., 　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　W1 = C2 / (C1+C2); 　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　　W2 = C1 / (C2+C1).

[0124] Therefore, the prediction P of the block unit 400 may be determined based on the following equation: 　　　　　　　　　　　　　　　　　　　　　　　　　　P = W1 * P1_425 + W2 * P1_423,

[0125] where P1_425 represents a prediction of the block unit 400 using the prediction mode M1_425, and P1_423 represents a prediction of the block unit 400 using the prediction mode M1_423.

[0126] In some implementations, the template of the block unit may be filtered by a low pass filter before the template cost is calculated. In some implementations, the decoder module 124 may determine, from the bitstream, an index that indicates the type of filter used.

[0127] Based on blocks 3301 to 3305 described above, the prediction of the block unit may be determined based on the TIMD merge list.

[0128] Returning to FIG. 3, at block 340, the decoder module 124 may reconstruct the block unit based on the prediction of the block unit.

[0129] In some implementations, the decoder module 124 may add a plurality of residual components into the prediction block (e.g., the prediction of the block unit determined at block 330) to reconstruct the block unit. The residual components may be determined from the bitstream.

[0130] Referring back to FIG. 3, once the block unit is reconstructed, the method / process 300 may then end. By repeating the method / process 300, the multiple image frames included in the video data may be reconstructed.

[0131] FIG. 5 is a block diagram illustrating an encoder module 114 of the first electronic device 110 illustrated in FIG. 1, in accordance with one or more example implementations of this disclosure. The encoder module 114 may include a prediction processor (e.g., a prediction processing unit 5141), at least a first summer (e.g., a first summer 5142) and a second summer (e.g., a second summer 5145), a transform / quantization processor (e.g., a transform / quantization unit 5143), an inverse quantization / inverse transform processor (e.g., an inverse quantization / inverse transform unit 5144), a filter (e.g., a filtering unit 5146), a decoded picture buffer (e.g., a decoded picture buffer 5147), and an entropy encoder (e.g., an entropy encoding unit 5148). The prediction processing unit 5141 of the encoder module 114 may further include a partition processor (e.g., a partition unit 51411), an intra prediction processor (e.g., an intra prediction unit 51412), and an inter prediction processor (e.g., an inter prediction unit 51413).

[0132] The encoder module 114 may receive the source video and encode the source video to output a bitstream. The encoder module 114 may receive source video including multiple image frames and then divide the image frames according to a coding structure. Each of the image frames may be divided into at least one image block.

[0133] The at least one image block may include a luminance block having multiple luminance samples and at least one chrominance block having multiple chrominance samples. The luminance block and the at least one chrominance block may be further divided to generate macroblocks, CTUs, CBs, sub-divisions thereof, and / or other equivalent coding units.

[0134] The encoder module 114 may perform additional sub-divisions of the source video. It should be noted that the disclosed implementations are generally applicable to video coding regardless of how the source video is partitioned prior to and / or during the encoding.

[0135] During the encoding process, the prediction processing unit 5141 may receive a current image block of a specific one of the image frames. The current image block may be the luminance block or one of the chrominance blocks in the specific image frame.

[0136] The partition unit 51411 may divide the current image block into multiple block units. The intra prediction unit 51412 may perform intra-predictive coding of a current block unit relative to one or more neighboring blocks in the same frame as the current block unit in order to provide spatial prediction. The inter prediction unit 51413 may perform inter-predictive coding of the current block unit relative to one or more blocks in one or more reference image blocks to provide temporal prediction.

[0137] The prediction processing unit 5141 may select one of the coding results generated by the intra prediction unit 51412 and the inter prediction unit 51413 based on a mode selection method, such as a cost function. The mode selection method may be a rate-distortion optimization (RDO) process.

[0138] The prediction processing unit 5141 may determine the selected coding result and provide a predicted block corresponding to the selected coding result to the first summer 5142 for generating a residual block and to the second summer 5145 for reconstructing the encoded block unit. The prediction processing unit 5141 may further provide syntax elements, such as motion vectors, intra-mode indicators, partition information, and / or other syntax information, to the entropy encoding unit 5148.

[0139] The intra prediction unit 51412 may intra-predict the current block unit. The intra prediction unit 51412 may determine an intra prediction mode directed toward a reconstructed sample neighboring the current block unit in order to encode the current block unit.

[0140] The intra prediction unit 51412 may encode the current block unit using various intra prediction modes. The intra prediction unit 51412 of the prediction processing unit 5141 may select an appropriate intra prediction mode from the selected modes. The intra prediction unit 51412 may encode the current block unit using a cross-component prediction mode to predict one of the two chroma components of the current block unit based on the luma components of the current block unit. The intra prediction unit 51412 may predict a first one of the two chroma components of the current block unit based on the second of the two chroma components of the current block unit.

[0141] The inter prediction unit 51413 may inter-predict the current block unit as an alternative to the intra prediction performed by the intra prediction unit 51412. The inter prediction unit 51413 may perform motion estimation to estimate motion of the current block unit for generating a motion vector.

[0142] The motion vector may indicate a displacement of the current block unit within the current image block relative to a reference block unit within a reference image block. The inter prediction unit 51413 may receive at least one reference image block stored in the decoded picture buffer 5147 and estimate the motion based on the received reference image blocks to generate the motion vector.

[0143] The first summer 5142 may generate the residual block by subtracting the prediction block determined by the prediction processing unit 5141 from the original current block unit. The first summer 5142 may represent the component or components that perform this subtraction.

[0144] The transform / quantization unit 5143 may apply a transform to the residual block in order to generate a residual transform coefficient and then quantize the residual transform coefficients to further reduce the bit rate. The transform may be one of a DCT, DST, AMT, MDNSST, HyGT, signal-dependent transform, KLT, wavelet transform, integer transform, sub-band transform, and a conceptually similar transform.

[0145] The transform may convert the residual information from a pixel value domain to a transform domain, such as a frequency domain. The degree of quantization may be modified by adjusting a quantization parameter.

[0146] The transform / quantization unit 5143 may perform a scan of the matrix including the quantized transform coefficients. Alternatively, the entropy encoding unit 5148 may perform the scan.

[0147] The entropy encoding unit 5148 may receive multiple syntax elements from the prediction processing unit 5141 and the transform / quantization unit 5143, including a quantization parameter, transform data, motion vectors, intra modes, partition information, and / or other syntax information. The entropy encoding unit 5148 may encode the syntax elements into the bitstream.

[0148] The entropy encoding unit 5148 may entropy encode the quantized transform coefficients by performing CAVLC, CABAC, SBAC, PIPE coding, or another entropy coding technique to generate an encoded bitstream. The encoded bitstream may be transmitted to another device (e.g., the second electronic device 120, as shown in FIG. 1) or archived for later transmission or retrieval.

[0149] The inverse quantization / inverse transform unit 5144 may apply inverse quantization and inverse transformation to reconstruct the residual block in the pixel domain for later use as a reference block. The second summer 5145 may add the reconstructed residual block to the prediction block provided by the prediction processing unit 5141 in order to produce a reconstructed block for storage in the decoded picture buffer 5147.

[0150] The filtering unit 5146 may include a deblocking filter, an SAO filter, a bilateral filter, and / or an ALF to remove blocking artifacts from the reconstructed block. Other filters (in loop or post loop) may be used in addition to the deblocking filter, the SAO filter, the bilateral filter, and the ALF. Such filters are not illustrated for brevity and may filter the output of the second summer 5145.

[0151] The decoded picture buffer 5147 may be a reference picture memory that stores the reference block to be used by the encoder module 114 to encode video, such as in intra-coding or inter-coding modes. The decoded picture buffer 5147 may include a variety of memory devices, such as DRAM (e.g., including SDRAM), MRAM, RRAM, or other types of memory devices. The decoded picture buffer 5147 may be on-chip with other components of the encoder module 114 or off-chip relative to those components.

[0152] The method / process 300 for decoding / encoding video data may be performed by the first electronic device 110. The encoder module 114 may receive the bitstream. The bitstream received by the encoder module 114 may include video data. The encoder module 114 may determine a block unit from an image frame according to the bitstream / video data.

[0153] The encoder module 114 may predict the block unit based on the TIMD merge mode. In some implementations, the encoder module 114 may determine one or more neighboring blocks of the block unit which are reconstructed based on at least one of the TIMD mode or the TIMD merge mode; the encoder module 114 may further determine, for the block unit, a TIMD merge list based on the one or more neighboring blocks; and then the encoder module 114 may determine a prediction of the block unit based on the TIMD merge list.

[0154] In some implementations, the encoder module 114 may use the method 300 described above and encode the merge flag (e.g., for the block unit) into the bitstream for indicating that the TIMD merge mode is applied for the block unit.

[0155] In some implementations, the encoder module 114 may use the method 300 described above and encode the merge index(es) (e.g., for the block unit) into the bitstream for indicating the TIMD candidate or the predication modes in the TIMD merge list, for determining the prediction of the block unit.

[0156] The encoder module 114 may further reconstruct the block unit based on the prediction, for example, to generate a reconstructed block including a plurality of reconstructed samples. The reconstructed samples of the block unit may be used as references for predicting a plurality of following blocks in the video data.

[0157] Therefore, the encoder module 114 may also use the method 300 to predict and reconstruct the block unit for encoding the video data into the bitstream. Since the encoder module 114 and the decoder module 124 may use the same method 300, the encoder module 114 and the decoder module 124 may apply the same TIMD merge mode and generate the same TIMD merge list for the corresponding block unit.

[0158] The disclosed implementations are to be considered in all respects as illustrative and not restrictive. It should also be understood that the present disclosure is not limited to the specific disclosed implementations, but that many rearrangements, modifications, and substitutions are possible without departing from the scope of the present disclosure.

Claims

1. An electronic device for decoding a bitstream, the electronic device comprising: 　　　　　at least one processor; and 　　　　　at least one non-transitory computer-readable medium coupled to the at least one processor and storing one or more computer-executable instructions that, when executed by the at least one processor, cause the electronic device to: 　　　　　　　　　　receive the bitstream; 　　　　　　　　　　determine a block unit from an image frame according to the bitstream; 　　　　　　　　　　predict the block unit based on a template-based intra mode derivation (TIMD) merge mode, comprising: 　　　　　　　　　　　　　　　determining one or more neighboring blocks of the block unit which are reconstructed based on at least one of a TIMD mode or the TIMD merge mode; 　　　　　　　　　　　　　　　determining, for the block unit, a TIMD merge list based on the one or more neighboring blocks; and 　　　　　　　　　　　　　　　determining a prediction of the block unit based on the TIMD merge list; and 　　　　　　　　　　reconstruct the block unit based on the prediction.

2. The electronic device of claim 1, wherein the one or more neighboring blocks comprise at least one of an adjacent block of the block unit and a non-adjacent block of the block unit.

3. The electronic device of claim 1, wherein the TIMD merge list comprises a plurality of TIMD candidates corresponding to the one or more neighboring blocks, wherein each of the plurality of TIMD candidates comprises at least two TIMD modes of the corresponding neighboring block.

4. The electronic device of claim 3, wherein each of the plurality of TIMD candidates further comprises a fusion flag.

5. The electronic device of claim 3, wherein predicting the block unit based on the TIMD merge mode further comprises: 　　　　　calculating, based on each of the plurality of TIMD candidates, a template cost of the block unit; and 　　　　　sorting the TIMD merge list based on the template cost.

6. The electronic device according to claim 1, wherein the one or more computer-executable instructions, when executed by the at least one processor, further cause the electronic device to: 　　　　　determine, from the bitstream, an enable flag indicating whether to predict the block unit based on the TIMD merge mode.

7. An electronic device for encoding a bitstream, the electronic device comprising: 　　　　　at least one processor; and 　　　　　at least one non-transitory computer-readable medium coupled to the at least one processor and storing one or more computer-executable instructions that, when executed by the at least one processor, cause the electronic device to: 　　　　　　　　　　receive the bitstream; 　　　　　　　　　 determine a block unit from an image frame according to the bitstream; 　　　　　　　　　　predict the block unit based on a template-based intra mode derivation (TIMD) merge mode, comprising: 　　　　　　　　　　　　　　　determining one or more neighboring blocks of the block unit which are reconstructed based on at least one of a TIMD mode or the TIMD merge mode; 　　　　　　　　　　　　　　　determining, for the block unit, a TIMD merge list based on the one or more neighboring blocks; and 　　　　　　　　　　　　　　　determining a prediction of the block unit based on the TIMD merge list; and 　　　　　　　　　　reconstruct the block unit based on the prediction.

8. The electronic device of claim 7, wherein the one or more neighboring blocks comprises at least one of an adjacent block of the block unit and a non-adjacent block of the block unit.

9. The electronic device of claim 7, wherein the TIMD merge list comprises a plurality of TIMD candidates corresponding to the one or more neighboring blocks, wherein each of the plurality of TIMD candidates comprises at least two TIMD modes of the corresponding neighboring block.

10. The electronic device of claim 9, wherein each of the plurality of TIMD candidates further comprises a fusion flag.

11. The electronic device of claim 9, wherein predicting the block unit based on the TIMD merge mode further comprises: 　　　　　calculating, based on each of the plurality of TIMD candidates, a template cost of the block unit; and 　　　　　sorting the TIMD merge list based on the template cost.

12. The electronic device according to claim 7, wherein the one or more computer-executable instructions, when executed by the at least one processor, further cause the electronic device to: 　　　　　determine, from the bitstream, an enable flag indicating whether to predict the block unit based on the TIMD merge mode.

13. A non-transitory computer-readable medium storing one or more computer-executable instructions that, when executed by at least one processor of an electronic device, cause the electronic device to: 　　　　　receive the bitstream; 　　　　　determine a block unit from an image frame according to the bitstream; 　　　　　predict the block unit based on a template-based intra mode derivation (TIMD) merge mode, comprising: 　　　　　　　　　　determining one or more neighboring blocks of the block unit which are reconstructed based on at least one of a TIMD mode or the TIMD merge mode; 　　　　　　　　　　determining, for the block unit, a TIMD merge list based on the one or more neighboring blocks; and 　　　　　　　　　　 determining a prediction of the block unit based on the TIMD merge list; and 　　　　　reconstruct the block unit based on the prediction.

14. The non-transitory computer-readable medium of claim 13, wherein the one or more neighboring blocks comprises at least one of an adjacent block of the block unit and a non-adjacent block of the block unit.

15. The non-transitory computer-readable medium of claim 13, wherein the TIMD merge list comprises a plurality of TIMD candidates corresponding to the one or more neighboring blocks, wherein each of the plurality of TIMD candidates comprises at least two TIMD modes of the corresponding neighboring block.

16. The non-transitory computer-readable medium of claim 15, wherein each of the plurality of TIMD candidates further comprises a fusion flag.

17. The non-transitory computer-readable medium of claim 15, wherein predicting the block unit based on the TIMD merge mode further comprises: 　　　　　calculating, based on each of the plurality of TIMD candidates, a template cost of the block unit; and 　　　　　sorting the TIMD merge list based on the template cost.

18. The non-transitory computer-readable medium according to claim 13, wherein the one or more computer-executable instructions, when executed by the at least one processor, further cause the electronic device to: 　　　　　determine, from the bitstream, an enable flag indicating whether to predict the block unit based on the TIMD merge mode.

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