System-side harmonic impedance estimation method and apparatus, and storage medium and electronic device

Abstract

A system-side harmonic impedance estimation method and apparatus, and a storage medium and an electronic device. The method comprises: acquiring an h-th harmonic parameter equivalent circuit simplified on the basis of power grid characteristics, h being a positive integer greater than or equal to 2 (S1); on the basis of the h-th harmonic parameter equivalent circuit, establishing a system-side harmonic impedance estimation mathematical model (S2); acquiring amplitude and phase data of a harmonic voltage and a harmonic current at a PCC (S3); dividing the amplitude data of the harmonic voltage at the PCC into several stable intervals (S4); on the basis of the amplitude and phase data of the harmonic voltage and the harmonic current in the several stable intervals, establishing a variable coefficient regression model between a harmonic voltage phasor and a harmonic current phasor (S5); selecting an optimal window width of a kernel function of the variable coefficient regression model (S6); and calculating a system harmonic impedance on the basis of the variable coefficient regression model and the optimal window width (S7).

Description

System-side harmonic impedance estimation method, device, storage medium, and electronic device

[0001] Related applications

[0002] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on October 11, 2023, with application number CN202311324006.X and invention name “System side harmonic impedance estimation method and its device, storage medium, and electronic device”. The entire contents of the above patent are incorporated into this application by reference. Technical Field

[0003] The present invention relates to the field of electric power technology, and in particular to a system-side harmonic impedance estimation method and device, storage medium, and electronic equipment. Background Art

[0004] With the large-scale grid connection of various power electronic devices, the level of harmonic pollution in the power system has worsened. Harmonics generated by a large number of nonlinear loads injected into the grid can cause voltage waveform distortion on the power supply bus and increase the risk of grid harmonic resonance, affecting the normal operation of electrical equipment and even threatening the safe and stable operation of the grid. Effective technical supervision and control of grid harmonics or resonance issues is an important technical means to improve the operational quality of grid power and reduce economic losses from grid power quality. Whether conducting technical supervision and control work such as harmonic flow tracing, resonance risk analysis, harmonic responsibility division, or harmonic / resonance suppression, the key lies in accurately estimating the harmonic impedance on the system side.

[0005] At present, the estimation methods of system harmonic impedance usually adopt "non-interventional" methods, including the wave quantity method, linear regression method, and independent component analysis method. Most of the above methods are based on the premise that the background harmonic parameters remain stable. In the new power system, changes in the grid operation status such as grid operation mode adjustment, new energy stations or capacitor switching, grid short-circuit faults, etc. will cause sudden changes in the background harmonic parameters, resulting in large errors in the system harmonic impedance estimation results, affecting the harmonic or resonance analysis conclusions, and even affecting the harmonic or resonance control effect. Therefore, in the scenario of sudden changes in background harmonic parameters, how to track the time-varying laws of background harmonic parameters and accurately estimate the system harmonic impedance is a key technical problem that needs to be solved urgently in carrying out technical supervision and control of grid harmonics or resonance.

[0006] Summary of the Invention

[0007] The purpose of this application is to propose a system-side harmonic impedance estimation method and device, computer-readable storage medium, and electronic device to solve the technical difficulties of accurate estimation and real-time tracking of system-side harmonic impedance in scenarios where background harmonic parameters suddenly change in new power systems.

[0008] To achieve the above objectives, an embodiment of the present application provides a system-side harmonic impedance estimation method, the method comprising:

[0009] Obtain an h-th harmonic parameter equivalent circuit simplified according to the grid characteristics; h is a positive integer greater than or equal to 2;

[0010] According to the hth harmonic parameter equivalent circuit, a system-side harmonic impedance estimation mathematical model is established;

[0011] Obtain the amplitude and phase data of harmonic voltage and harmonic current at the PCC;

[0012] Divide the harmonic voltage amplitude data at the PCC into several stable intervals;

[0013] Establishing a variable coefficient regression model between the harmonic voltage phasor and the harmonic current phasor based on the amplitude and phase data of the harmonic voltage and harmonic current in the plurality of stable intervals;

[0014] Selecting the optimal window width of the kernel function of the variable coefficient regression model;

[0015] The system harmonic impedance is calculated according to the variable coefficient regression model and the optimal window width.

[0016] Preferably, obtaining the hth harmonic parameter equivalent circuit simplified according to the grid characteristics includes:

[0017] The background harmonics of the upper power grid are equivalent to harmonic voltage sources, and the nonlinear loads of the local power grid are equivalent to harmonic current sources. The Thevenin-Norton equivalent circuit model is converted to the same voltage level, which is the hth harmonic parameter equivalent circuit.

[0018] Preferably, the system-side harmonic impedance estimation mathematical model is as follows:

[0019] Among them, Z S,h is the hth harmonic impedance on the system side, is the hth harmonic voltage phasor on the system side, is the hth harmonic current phasor at the PCC, is the hth harmonic voltage phasor at the PCC.

[0020] Preferably, dividing the harmonic voltage amplitude data at the PCC into several stable intervals includes:

[0021] First, the wavelet transform modulus maximum method is used to find the number and rough positions of the data mutation points in the harmonic voltage amplitude data at the PCC, and then the sliding difference maximum method is used to accurately locate the positions of the data mutation points in the harmonic voltage amplitude data at the PCC. If the positions located by the wavelet transform modulus maximum method and the sliding difference maximum method are too different, the transformation scale D of the wavelet transform modulus maximum method is changed, and the wavelet transform modulus maximum method is used to find the number and rough positions of the data mutation points in the harmonic voltage amplitude data at the PCC again, until the positions located by the wavelet transform modulus maximum method and the sliding difference maximum method are approximately the same, then the data mutation points are determined; finally, the harmonic voltage amplitude data at the PCC is divided into several stable intervals according to the time corresponding to these data mutation points.

[0022] Preferably, the variable coefficient regression model between the harmonic voltage phasor and the harmonic current phasor is as follows:

[0023] Where t represents the sampling time, is the hth harmonic voltage phasor at PCC at time t, is the hth harmonic current phasor at PCC at time t, Z S,h (t) is the hth harmonic impedance on the system side at time t, is the hth harmonic voltage phasor on the system side at time t.

[0024] Preferably, selecting the optimal window width of the variable coefficient regression model kernel function includes:

[0025] The data of several stable intervals are calculated independently, and the optimal window width of the kernel function of the variable coefficient regression model in each stable interval is obtained by optimizing the adaptive particle swarm algorithm.

[0026] Preferably, the calculating the system harmonic impedance according to the variable coefficient regression model and the optimal window width includes:

[0027] Calculate the system harmonic impedance according to the following formula;

[0028] in, is the regression coefficient matrix obtained according to the optimal window width, is the estimated value of the harmonic impedance on the system side.

[0029] An embodiment of the present application further provides a system-side harmonic impedance estimation device, comprising a module for implementing the system-side harmonic impedance estimation method as described above.

[0030] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the system-side harmonic impedance estimation method as described above is implemented.

[0031] An embodiment of the present application also provides an electronic device, including a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor implements the system-side harmonic impedance estimation method as described above when executing the computer program.

[0032] The embodiments of the present application provide a system-side harmonic impedance estimation method and device, a computer-readable storage medium, and an electronic device, which have the following beneficial effects:

[0033] (1) A section of PCC harmonic voltage or current amplitude data with sudden changes can be divided into several sections with only small disturbances, solving the problem of sudden changes in background harmonic parameters;

[0034] (2) PCC harmonic data is divided according to wavelet transform and sliding difference maximum method. The selection of parameters in this method is a purely objective way, which avoids the tediousness of subjective parameter selection.

[0035] (3) The optimal window width of the kernel function of the variable coefficient regression model is selected by combining the adaptive particle swarm optimization algorithm with the generalized cross-validation method, which further reduces the calculation error of the system harmonic impedance.

[0036] (4) In scenarios where background harmonic parameters are time-varying and have mutations, better estimation performance and tracking capabilities than existing methods can be obtained.

[0037] Other features and advantages of the embodiments of the present application will be described in the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0039] FIG1 is a flow chart of a system-side harmonic impedance estimation method in an embodiment of the present application.

[0040] FIG2 is a simplified h-th harmonic parameter equivalent circuit diagram in an embodiment of the present application.

[0041] FIG3 is a flow chart of wavelet transform and sliding difference maximum method data partitioning in an embodiment of the present application.

[0042] FIG4 is a flowchart of selecting the optimal window width of the kernel function in an embodiment of the present application.

[0043] FIG5 is PCC harmonic sample data in an embodiment of the present application.

[0044] FIG6 is a schematic diagram of data division using the sliding difference maximum value method in an embodiment of the present application.

[0045] FIG7 is a diagram showing the estimation results of the system harmonic impedance in an embodiment of the present application. DETAILED DESCRIPTION

[0046] The detailed description of the accompanying drawings is intended to serve as an illustration of the presently preferred embodiment of the present application, and is not intended to represent the only form in which the present application can be implemented. It should be understood that the same or equivalent functions can be accomplished by different embodiments intended to be included in the spirit and scope of the present application.

[0047] An embodiment of the present application provides a system-side harmonic impedance estimation method, as shown in FIG1 , the method comprising the following steps:

[0048] Step S1, obtaining an h-th harmonic parameter equivalent circuit simplified according to the grid characteristics; h is a positive integer greater than or equal to 2;

[0049] Step S2, establishing a system-side harmonic impedance estimation mathematical model based on the hth harmonic parameter equivalent circuit;

[0050] Step S3, obtaining amplitude and phase data of harmonic voltage and harmonic current at the PCC;

[0051] Step S4, dividing the harmonic voltage amplitude data at the PCC into several stable intervals;

[0052] Step S5, establishing a variable coefficient regression model between the harmonic voltage phasor and the harmonic current phasor based on the amplitude and phase data of the harmonic voltage and harmonic current in the plurality of stable intervals;

[0053] Step S6, selecting the optimal window width of the variable coefficient regression model kernel function;

[0054] Step S7: calculating the system harmonic impedance according to the variable coefficient regression model and the optimal window width.

[0055] Furthermore, the step S1 includes:

[0056] The background harmonics of the upper power grid are equivalent to harmonic voltage sources, and the nonlinear loads of the local power grid are equivalent to harmonic current sources. The Thevenin-Norton equivalent circuit model is converted to the same voltage level, which is the hth harmonic parameter equivalent circuit, as shown in Figure 2.

[0057] In Figure 2: is the hth harmonic voltage phasor on the system side; Z S,h is the system hth harmonic impedance; is the hth harmonic voltage phasor at PCC; is the hth harmonic current phasor at PCC; is the load side harmonic current phasor; Z C,h is the hth harmonic impedance on the load side; h is the harmonic order, h = 2, 3, 4...

[0058] Furthermore, the system-side harmonic impedance estimation mathematical model is as follows:

[0059] Among them, Z S,h is the hth harmonic impedance on the system side, is the background hth harmonic voltage phasor on the system side, is the hth harmonic current phasor at the PCC, is the hth harmonic voltage phasor at the PCC.

[0060] Specifically, the harmonic voltage phasor and harmonic current phasor at the PCC are the result of the superposition of the harmonic sources on the system side and the user side. Based on the relationship between the harmonic sources on both sides in the model, the following circuit equation can be obtained:

[0061] The system impedance is related to the short-circuit capacity at the PCC. For typical industrial nonlinear users, the harmonic impedances on the user side and the system side are often much greater than each other, that is, |Z C,h |>>|Z S,h |, so the above formula can be simplified to:

[0062] Then we get: Therefore, when |Z C,h |>>|Z S,h | Under the premise of S,h and constant, then the harmonic voltage at PCC and harmonic current There is a linear relationship between them, and Z can be obtained by regression method. S,h However, when this assumption is not met, the traditional regression method is used to obtain Z S,h There is a large error, and the variable coefficient regression method is used to obtain the system harmonic impedance. S,h and It is considered as a function that changes over time, which has greater flexibility and can obtain an estimation result that is closer to the true value.

[0063] Furthermore, the step S3 includes:

[0064] Specifically, the seamless sampling technology is used to sample the time domain signals of the voltage and current at the PCC point, and the voltage and current signals at the PCC point are transformed by 256 points to obtain the voltage phasor of the hth harmonic. and the current phasor of the hth harmonic The calculation formula for the 256-point Fourier transform of the discrete sampling signals of the voltage and current at points A and B is as follows:

[0065] Where N is the number of sampling points, n is the serial number of the sampling point, u(n) is the voltage time domain signal sampled by the PCC point, i(n) is the current time domain signal sampled by the PCC point, U PCC,h is the amplitude of the hth harmonic voltage at PCC point, I PCC,h is the amplitude of the hth harmonic current at PCC point, θ U,h is the phase angle of the hth harmonic voltage at PCC point, θ I,h is the phase angle of the hth harmonic current at the PCC point. The sliding time window width always selects 256 sampling points, and the calculation interval is 78.125 microseconds of the sampling period of each sampling point. The amplitude and phase data of each harmonic of the voltage and current time domain signals at the PCC point are obtained.

[0066] When there is a sudden change in the background harmonic parameters, the estimated value of the system harmonic impedance near the mutation point will be far from the actual value. Therefore, data segmentation is required before estimating the system harmonic impedance. Because the wavelet transform modulus maximum method will deviate from the actual value when the data fluctuation amplitude is large or the wavelet function and transformation scale are not appropriately selected, the embodiment of the present application proposes a sliding difference maximum method combined with wavelet transform to accurately locate the mutation point. The process is shown in Figure 3. Referring to Figure 3, further, step S4 includes:

[0067] First, the wavelet transform modulus maximum method is used to find the number and rough positions of the data mutation points in the harmonic voltage amplitude data at the PCC, and then the sliding difference maximum method is used to accurately locate the positions of the data mutation points in the harmonic voltage amplitude data at the PCC. If the positions located by the wavelet transform modulus maximum method and the sliding difference maximum method are too different, the transformation scale D of the wavelet transform modulus maximum method is changed (the initial value is set to 10 at the beginning, and then gradually reduced by 1), and the wavelet transform modulus maximum method is used to find the number and rough positions of the data mutation points in the harmonic voltage amplitude data at the PCC again, until the positions located by the wavelet transform modulus maximum method and the sliding difference maximum method are approximately the same, then the data mutation points are determined; finally, the harmonic voltage amplitude data at the PCC is divided into several stable intervals according to the time corresponding to these data mutation points.

[0068] The principle of the sliding difference maximum value method is as follows: First, set the window width w of the sliding window and the sliding difference maximum value threshold s t , then slide the window point by point with w as the sliding window width, and calculate the sum s of the absolute values ​​of the last w / 2 data minus the first w / 2 data in each sliding window. After traversing all the data, we can get an image of how s changes with the number of sliding times i (i = 0, 1, ···, nw), as shown in the following formula:

[0069] Wherein, j represents the sampling time, j=1,2,···,n.

[0070] Finally, find the maximum value of s, and arrange the maximum points from large to small according to the corresponding maximum value, recorded as S, and add w / 2+1 to each data in S as the position of the mutation point detected by the sliding difference maximum method; the number of mutation points detected by the wavelet transform modulus maximum method is k and the rough position is index_pre, take the first k values ​​of S as index_deal and compare them with index_pre. If the difference is too large, reduce the transformation scale D, and use the wavelet transform modulus maximum method again until the positions located by the two methods are approximately the same. At this time, index_deal is the actual detected mutation point moment.

[0071] Furthermore, the variable coefficient regression model between the harmonic voltage phasor and the harmonic current phasor is as follows:

[0072] Where t represents the sampling time, is the first-order derivative of the hth harmonic voltage phasor at PCC at time t, is the first-order derivative of the hth harmonic current phasor at the PCC at time t, Z S,h (t) is the hth harmonic impedance on the system side at time t, is the hth harmonic voltage phasor on the system side at time t.

[0073] If the background harmonic parameter Z S,h and If they are all considered as functions that change with time t, the following variable coefficient regression model can be established:

[0074] The variable coefficient regression method requires Z S,h (t) and With respect to the sampling time t, it has a first-order continuous derivative, that is, Z is required to be S,h (t) and The change curve of Z is flat and smooth. In the actual power grid, short circuit faults, large-capacity power supplies, loads or capacitor switching will cause Z S,h (t) and Therefore, it is necessary to screen the harmonic voltage amplitude data of the PCC point first and divide it into several relatively stable intervals to ensure that Z S,h (t) and There are no mutation points.

[0075] Let the regression coefficient matrix corresponding to the sampling time t be For the n groups of harmonic voltage and harmonic current sampling values ​​measured at the PCC, in order to obtain the regression coefficient matrix corresponding to the sampling time t0, it is necessary to find a set of Make the following formula take the minimum value.

[0076] Where K H (t) is a weighting function, and K H (t) = K(t / H) / H; H is the window width of the kernel function; K(t) is the Gaussian kernel function, and its formula is as follows:

[0077] Further obtain: W(t0)=Diag(K H (1-t0),K H (2-t0),…,K H (n-t0))

[0078] Combine the following two formulas:

[0079] Can be obtained:

[0080] Finally, the estimated value of the system harmonic impedance is obtained

[0081] Furthermore, the selecting of the optimal window width of the variable coefficient regression model kernel function includes:

[0082] The data of several stable intervals are calculated independently, and the optimal window width of the kernel function of the variable coefficient regression model in each stable interval is obtained by optimizing the adaptive particle swarm algorithm.

[0083] Specifically, for variable coefficient regression models, the size of the kernel function window width controls the smoothness of the weighting function. A value that is too large will make the regression curve too smooth, resulting in insufficient fit, while a value that is too small will cause the regression curve to overfit. To address this issue, the present embodiment combines the particle swarm optimization algorithm with the generalized cross-validation method to find the optimal kernel function window width. The process is shown in Figure 4.

[0084] Specifically, when the window width is H, the regression coefficient matrix corresponding to the sampling time t0 can be calculated by the variable coefficient regression method, and the fitting value of the dependent variable can be calculated by the following formula:

[0085] Where, e t0 is a 1×n-dimensional row matrix with the t0th element being 1 and the rest being 0.

[0086] Combine the following two equations: T(t0)=(X T (t0)*W(t0)*X(t0)) -1 *X T (t0)*W(t0)

[0087] The fitted value of the dependent variable at each moment can be obtained as:

[0088] The statistic GCV(H) of the generalized cross validation method is defined as:

[0089] The kernel function's window width is used as the independent variable of the particle swarm algorithm, and the minimum value of the cross-validation statistic is used as the objective function of the particle swarm algorithm. The optimal window width is selected iteratively, thereby improving the estimation accuracy and tracking ability of the system harmonic impedance.

[0090] Furthermore, the calculating of the system harmonic impedance according to the variable coefficient regression model and the optimal window width includes:

[0091] Calculate the system harmonic impedance according to the following formula;

[0092] in, is the regression coefficient matrix obtained according to the optimal window width, is the estimated value of harmonic impedance on the system side;

[0093] Based on the above formula, it can be seen that the regression coefficient matrix corresponding to each sampling moment can be obtained by combining the variable coefficient regression method, and the estimated value of the system harmonic impedance at each moment can be obtained.

[0094] In order to better introduce the embodiments of the present application, a specific embodiment is described in detail below:

[0095] Taking the 5th harmonic as an example, the specific parameters are shown in the following table.

[0096] Among them, Mean is the average value of the set parameters, Sin and Randn are the sinusoidal fluctuation and random disturbance added to Mean, respectively.

[0097] Sampling is performed every 0.02s, and the simulation time is set to 18s, resulting in a total of 900 sets of sample data. To simulate the change of background harmonic parameters, let Z S,5 Changes occur at [6s, 12s], The changes occur at [3s, 15s], where the amplitudes of the PCC harmonic voltage and current are shown in Figure 5(A) and Figure 5(B), respectively, and the correlation analysis is shown in Figure 5(C). As shown in Figure 5(C), there is a certain relationship between the harmonic voltage and harmonic current at the PCC, and they can be roughly divided into three states, corresponding to different operating scenarios, that is, different Z S,5 and

[0098] As shown in Figure 5(A) and Figure 5(B), the position of the harmonic voltage mutation point at the PCC is easier to distinguish than the position of the harmonic current mutation point during the entire sampling time. Therefore, it is necessary to detect the mutation point of the harmonic voltage amplitude data at the PCC. The wavelet function is "DB2", the transformation scale after iteration is 3, and the sliding window width is 25 sample points. The results are shown in Figure 6.

[0099] The positions of the data mutation points obtained by different algorithms are shown in the table below. It can be seen that the wavelet transform proposed in the embodiment of the present application can more accurately locate the position of the harmonic voltage amplitude data mutation point at the PCC and the positions corresponding to the four maximum points in Figure 6 compared with the sliding difference maximum method.

[0100] The robust regression method was used as method 1, and the leading wave momentum method was used as method 2. A sliding window method was used to track the time-varying characteristics of the system's harmonic impedance, with a window width of 25 sample points, and an interpolation function was used to supplement missing data. The improved particle swarm-variable coefficient regression method proposed in the examples of this application was selected as method 3, and three additional methods for pre-screening data were added for comparative analysis.

[0101] Figure 7 (A) and Figure 7 (B) are comparisons of the results of estimating the system harmonic impedance using different methods with and without data screening. It can be seen that, without data screening, the estimated values ​​of the three methods will suddenly increase or decrease at the locations where the system harmonic impedance and background harmonic voltage suddenly change. After data screening based on the wavelet transform sliding difference maximum method proposed in the embodiment of the present application, the estimation error at the data mutation point is eliminated, making the estimated values ​​of the three methods significantly closer to the true value. Among the six estimation methods with and without data screening, the estimated curve of the improved particle swarm variable coefficient regression method with data screening proposed in the embodiment of the present application is closest to the true value, verifying the effectiveness and superiority of the method proposed in the embodiment of the present application.

[0102] Furthermore, the system harmonic parameter calculation errors of different algorithms are compared, as shown in the following table, where RMSE stands for root mean square error and MAPE stands for mean absolute percentage error. It can be seen that under the above simulation conditions, the method of pre-screening data has a smaller error than the method without data screening, which once again demonstrates the necessity and effectiveness of data screening. Among them, the various error indices of the improved particle swarm variable coefficient regression method with data screening proposed in the embodiment of the present application are far smaller than those of other methods, indicating that the proposed method is superior to other algorithms in terms of estimation accuracy, verifying the accuracy and superiority of the method proposed in the embodiment of the present application.

[0103] An embodiment of the present application further provides a system-side harmonic impedance estimation device, comprising a module for implementing the system-side harmonic impedance estimation method as described above.

[0104] It should be noted that the system-side harmonic impedance estimation device of this embodiment corresponds to the system-side harmonic impedance estimation method of the above-mentioned embodiment. Therefore, the parts of the system-side harmonic impedance estimation device of the above-mentioned embodiment that are not described in detail can be obtained by referring to the contents of the system-side harmonic impedance estimation method of the above-mentioned embodiment. That is, the specific steps recorded in the system-side harmonic impedance estimation method of the above-mentioned embodiment can be understood as the functions that can be achieved by the system-side harmonic impedance estimation device of the above-mentioned embodiment, so they will not be repeated here.

[0105] Another embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the system-side harmonic impedance estimation method as described in the above embodiment is implemented.

[0106] Specifically, the computer-readable storage medium may include: any entity or recording medium that can carry the computer program instructions, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium, etc.

[0107] Another embodiment of the present application provides an electronic device, comprising a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the system-side harmonic impedance estimation method as described in the above embodiment is implemented.

[0108] Wherein, electronic equipment can also include the bus connecting different components (including memory and processor).Memory can include computer-readable medium in the form of volatile memory, such as random access memory (RAM) and / or cache memory.Memory can also include at least one program product, and this program product has one group (such as at least one) program module, and these program modules are configured to perform the function of each embodiment of the present application.Electronic equipment can also communicate with one or more external devices (such as keyboard, pointing device, display etc.), can also communicate with one or more devices that enable users to interact with this electronic equipment, and / or communicate with any device (such as network card) that enables this electronic equipment to communicate with one or more other computing devices, this communication can be carried out through input / output (I / O) interface, and electronic equipment can also communicate with one or more networks (such as local area network (LAN), wide area network (WAN) and / or public network, such as the Internet) through network adapter.

[0109] In summary, through the description of various embodiments of the present invention, it can be seen that the present invention has the following advantages:

[0110] (1) Data volume control: Using a circular storage module and event triggering mechanism, only the data of key events is recorded to avoid recording excessive redundant data; this can effectively control the data volume, reduce storage requirements, and lower storage costs;

[0111] (2) High precision and accuracy: By adopting high-resolution periodic sampling, the details of voltage and current waveforms can be captured, and transient events can be analyzed more accurately. By using the interval period comparison trigger method, fault overvoltage events can be more accurately identified and recorded, improving the accuracy and reliability of fault detection.

[0112] (3) Real-time monitoring and response: Equipped with an intelligent event triggering mechanism, it can monitor the operating status of the power system in real time and collect relevant data immediately when key events occur; this can quickly respond to potential problems, reduce fault diagnosis time, and improve system reliability;

[0113] (4) Flexibility and scalability: The solution can be flexibly adjusted and expanded according to actual needs; thresholds and parameters can be adjusted according to the requirements of specific applications to adapt to different power system environments; at the same time, storage capacity can be increased as needed to meet the needs of more data storage.

[0114] In summary, the embodiments of the present invention have the advantages of controlling data volume, improving accuracy, realizing real-time monitoring and flexible expansion, etc., which can effectively solve the problem of excessive transient sampling data volume in modern power system monitoring equipment and enhance the monitoring and protection capabilities of the power system.

[0115] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A system-side harmonic impedance estimation method, characterized in that: The method comprises: Obtain an h-th harmonic parameter equivalent circuit simplified according to the power grid characteristics; h is a positive integer greater than or equal to 2; According to the h-th harmonic parameter equivalent circuit, a system-side harmonic impedance estimation mathematical model is established; Obtaining amplitude and phase data of harmonic voltage and harmonic current at the PCC; Divide the harmonic voltage amplitude data at the PCC into several stable intervals; According to the amplitude and phase data of the harmonic voltage and the harmonic current in the plurality of stable intervals, a variable coefficient regression model between the harmonic voltage phasor and the harmonic current phasor is established; Selecting the optimal window width of the kernel function of the variable coefficient regression model; The system harmonic impedance is calculated according to the variable coefficient regression model and the optimal window width.

2. The method according to claim 1, characterized in that The obtaining of the hth harmonic parameter equivalent circuit simplified according to the grid characteristics comprises: The background harmonics of the upper power grid are equivalent to harmonic voltage sources, and the nonlinear loads of the local power grid are equivalent to harmonic current sources. The Thevenin-Norton equivalent circuit model is obtained by converting them to the same voltage level, which is the h-th harmonic parameter equivalent circuit.

3. The method according to claim 2, characterized in that The system-side harmonic impedance estimation mathematical model is as follows: Among them, Z S,h is the hth harmonic impedance on the system side, is the hth harmonic voltage phasor on the system side, is the hth harmonic current phasor at the PCC, is the hth harmonic voltage phasor at the PCC.

4. The method according to claim 3, characterized in that: The harmonic voltage amplitude data at the PCC is divided into several stable intervals, including: First, the wavelet transform modulus maximum method is used to find the number and rough position of the data mutation points in the harmonic voltage amplitude data at the PCC, and then the sliding difference maximum method is used to accurately locate the position of the data mutation points in the harmonic voltage amplitude data at the PCC. If the positions located by the wavelet transform modulus maximum method and the sliding difference maximum method are too different, the transformation scale D of the wavelet transform modulus maximum method is changed. The wavelet transform modulus maximum method is used to find the number and rough position of the data mutation points in the harmonic voltage amplitude data at the PCC again, until the positions located by the wavelet transform modulus maximum method and the sliding difference maximum method are approximately the same, then the data mutation points are determined; finally, the harmonic voltage amplitude data at the PCC is divided into several stable intervals according to the time corresponding to these data mutation points.

5. The method according to claim 4, characterized in that The variable coefficient regression model between the harmonic voltage phasor and the harmonic current phasor is as follows: Where t represents the sampling time, is the hth harmonic voltage phasor at PCC at time t, is the hth harmonic current phasor at PCC at time t, Z S,h (t) is the hth harmonic impedance of the system side at time t, is the hth harmonic voltage phasor on the system side at time t.

6. The method according to claim 5, characterized in that Selecting the optimal window width of the variable coefficient regression model kernel function includes: The data of several stable intervals are calculated independently, and the optimal window width of the kernel function of the variable coefficient regression model in each stable interval is obtained by optimizing the adaptive particle swarm algorithm.

7. The method according to claim 6, characterized in that The calculating the system harmonic impedance according to the variable coefficient regression model and the optimal window width includes: Calculate the system harmonic impedance according to the following formula; in, is the regression coefficient matrix obtained according to the optimal window width, is the estimated value of harmonic impedance on the system side.

8. A system-side harmonic impedance estimation device, characterized in that: The method comprises a module for implementing the system side harmonic impedance estimation method according to any one of claims 1 to 7.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the system-side harmonic impedance estimation method according to any one of claims 1 to 7 is implemented.

10. An electronic device, characterized in that: The method comprises a processor, a memory and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the method for estimating harmonic impedance on the system side according to any one of claims 1 to 7 is implemented.

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