Pixel driving circuit and display panel

Abstract

A pixel driving circuit (111) and a display panel (10). The pixel driving circuit (111) comprises eight, nine or ten transistors, one or two storage capacitors, one data signal line, one light-emitting control signal line, two scanning signal lines, and two high-frequency reset signal lines. The ninth transistor (T9), the first capacitor (C1), and the second reset signal (R2n) together form a core component of an emission charge recovery structure. Under the action of the second reset signal (R2n), the ninth transistor (T9) is continuously turned on and off within the time of a picture frame; when the ninth transistor (T9) is turned off, charges are emitted to the first capacitor (C1), and the brightness of the display panel (10) decreases accordingly; and when the ninth transistor (T9) is turned on, charges are captured from the first capacitor (C1), and the brightness of the display panel (10) rises again to form flicker. In this way, the process is repeated several times before the next frame arrives, and the brightness flicker of the display panel (10) is changed to high frequency, so that the brightness flicker cannot be recognized by human eyes, thereby improving the display effect.

Description

Pixel driving circuit and display panel Technical Field

[0001] The present invention relates to the field of display panel circuits, and in particular to a pixel driving circuit and a display panel. Background Art

[0002] Compared to traditional liquid crystal display panels, OLED (Organic Light Emitting Diode) display panels offer faster response times, improved color purity and brightness, higher contrast, and wider viewing angles. Consequently, they are gaining increasing attention from display technology developers. An OLED display panel comprises a pixel array and a pixel driver circuit that controls the pixel array. The pixels in the pixel array emit light through the combined action of the pixel driver circuit, a scanning driver circuit, and a light-emitting driver circuit.

[0003] In static scenes on OLED display panels, reducing the refresh rate can significantly reduce power consumption. At low refresh rates, due to the hysteresis effect of the pixel driver circuit's driving transistor (Driving TFT), leakage of the switching transistor (Switch TFT), and charging delays in the OLED device, the display panel will experience noticeable flicker, affecting the user experience and image quality. Unbalanced high leakage caused by defective charge emission is a major cause of flicker.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to ordinary technicians in this field.

[0005] Summary of the Invention

[0006] In view of this, the present invention provides a pixel driving circuit and a display panel to at least solve the above-mentioned problem.

[0007] One aspect of the present invention provides a pixel driving circuit, comprising:

[0008] a first transistor, wherein a first electrode of the first transistor is connected to the data signal, a second electrode is connected to the first node, and a gate is connected to the second scan signal;

[0009] a second transistor, wherein a first electrode of the second transistor is connected to the first node, a second electrode of the second transistor is connected to the third node, and a gate of the second transistor is connected to the second node;

[0010] a third transistor, wherein a second electrode of the third transistor is connected to the third node, and a gate of the third transistor is connected to the second scanning signal;

[0011] a fourth transistor, wherein a first electrode of the fourth transistor is connected to the first power supply voltage, a second electrode of the fourth transistor is connected to the first node, and a gate of the fourth transistor is connected to a light emitting control signal;

[0012] a fifth transistor, wherein a first electrode of the fifth transistor is connected to the third node, a second electrode of the fifth transistor is connected to the first electrode of the light-emitting diode, and a gate of the fifth transistor is connected to the light-emitting control signal;

[0013] a sixth transistor, wherein a second electrode of the sixth transistor is connected to the first initialization signal, and a gate electrode of the sixth transistor is connected to the first scan signal;

[0014] a seventh transistor, wherein a first electrode of the seventh transistor is connected to the first electrode of the light-emitting diode, a second electrode is connected to the second initialization signal, and a gate is connected to the first reset signal;

[0015] a ninth transistor, wherein a first electrode of the ninth transistor is connected to the second node, a second electrode of the ninth transistor is connected to the first electrode of the sixth transistor, and a gate of the ninth transistor is connected to a second reset signal;

[0016] A first capacitor, wherein a first electrode of the first capacitor is connected to the first power supply voltage, and a second electrode of the first capacitor is connected to the second node.

[0017] In some embodiments, the first electrode of the third transistor is connected to a fourth node.

[0018] In some embodiments, the pixel driving circuit further includes:

[0019] An eighth transistor, wherein a first electrode of the eighth transistor is connected to the first node, a second electrode is connected to the third initialization signal, and a gate is connected to the first reset signal.

[0020] In some embodiments, the first to ninth transistors are all P-type MOS transistors.

[0021] In some embodiments, the first to eighth transistors are P-type MOS transistors, and the ninth transistor is an N-type MOS transistor.

[0022] In some embodiments, the pixel driving circuit further includes:

[0023] an eighth transistor, wherein a first electrode of the eighth transistor is connected to the first node, a second electrode of the eighth transistor is connected to the third initialization signal, and a gate of the eighth transistor is connected to the first reset signal;

[0024] A tenth transistor, wherein a first electrode of the tenth transistor is connected to the second node, a second electrode is connected to the first electrode of the third transistor, and a gate is connected to the second reset signal.

[0025] In some embodiments, the second transistor has a back-gate structure, and a back gate thereof is connected to a first reference potential.

[0026] In some embodiments, the pixel driving circuit further includes:

[0027] A second capacitor, wherein a first electrode of the second capacitor is connected to the fourth node, and a second electrode is connected to the first power supply voltage.

[0028] In some embodiments, the second electrode of the light emitting diode is connected to a second power supply voltage.

[0029] In some embodiments, during the same high-level phase of the light-emitting control signal, the second reset signal and the first scan signal have falling edges at the same time, and the second reset signal and the second scan signal have rising edges at the same time;

[0030] In the same high-level phase of the light-emitting control signal, the falling edge of the first reset signal is after the rising edge of the second reset signal, and the rising edge of the first reset signal is before the end of the current high-level phase of the light-emitting control signal.

[0031] In some embodiments, within one frame time of a display image, the frequencies of the first reset signal, the second reset signal, and the light emitting control signal are the same, and the frequencies of the first scanning signal and the second scanning signal are the same;

[0032] During one frame of display image, the frequency of the first reset signal is at least twice that of the first scan signal.

[0033] Another aspect of the present invention further provides a display panel, characterized by comprising any one of the above-mentioned pixel driving circuits.

[0034] The beneficial effects of the present invention compared with the prior art include at least:

[0035] The pixel driving circuit and display panel of the present invention, by adding an "emission charge recovery" structure in the pixel driving circuit, convert the screen flicker caused by the emission charge into a high frequency so that it cannot be recognized by the human eye. Specifically, under the action of the first reset signal, the ninth transistor is continuously turned on and off within one frame of the picture. When the ninth transistor is turned off, it emits charge to the first capacitor, and the brightness of the display panel decreases accordingly. When it is turned on, it captures charge from the first capacitor, that is, the emission charge is recovered, and the brightness of the display panel rises accordingly, forming a flicker. In this way, before the next frame arrives, the brightness flicker of the display panel is turned into a high frequency several times, which cannot be recognized by the human eye, thereby improving the display effect.

[0036] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The accompanying drawings are incorporated into and constitute a part of this specification, illustrate embodiments consistent with the present invention, and together with the description, serve to explain the principles of the present invention. Obviously, the drawings described below are only some embodiments of the present invention, and it is clear that those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0038] FIG1 is a schematic diagram showing a circuit structure of a display panel according to the present invention;

[0039] FIG2 shows a circuit diagram of a pixel driving circuit according to a first embodiment of the present invention;

[0040] FIG3 shows a waveform diagram of the pixel driving circuit shown in FIG2 when it is working;

[0041] FIG4 is a schematic diagram showing the working state of the pixel driving circuit at stage t11 in FIG3 ;

[0042] FIG5 is a schematic diagram showing the working state of the pixel driving circuit at stage t12 in FIG3 ;

[0043] FIG6 is a schematic diagram showing the working state of the pixel driving circuit at stage t13 in FIG3 ;

[0044] FIG7 is a schematic diagram showing the working state of the pixel driving circuit at stage t2 in FIG3 ;

[0045] FIG8 is a schematic diagram showing the working state of the pixel driving circuit at stage t31 in FIG3 ;

[0046] FIG9 is a schematic diagram showing the working state of the pixel driving circuit at stage t32 in FIG3 ;

[0047] FIG10 is a circuit diagram showing a pixel driving circuit according to a second embodiment of the present invention;

[0048] FIG11 is a circuit diagram of a pixel driving circuit according to a third embodiment of the present invention;

[0049] FIG12 is a circuit diagram showing a pixel driving circuit according to a fourth embodiment of the present invention;

[0050] FIG13 is a circuit diagram showing a pixel driving circuit according to a fifth embodiment of the present invention;

[0051] FIG. 14 is a circuit diagram showing a pixel driving circuit according to a sixth embodiment of the present invention.

[0052] Reference Signs: 10 display panel 11 display area 111 pixel driving circuit 121 data driver ELVDD first power supply voltage ELVSS second power supply voltage DATA data signal Em light emission control signal Sn-1 first scan signal Sn second scan signal R1n first reset signal R2n second reset signal Vint1 first initialization signal Vint2 second initialization signal Vint3 third initialization signal ref1 first reference potential T1 to T10 first to tenth transistors C1 first capacitor C2 second capacitors N1 to N4 first to fourth nodes D light emitting diode DETAILED DESCRIPTION

[0053] To make the technical problems solved by the present invention, the technical solutions adopted, and the technical effects achieved more clearly, the technical solutions of the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.

[0054] In addition, the described features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure can be practiced without one or more of the specific details, or other methods, modules, devices, steps, etc. can be adopted. In other cases, well-known modules, methods, devices, implementations, steps, or operations are not shown or described in detail to avoid blurring the various aspects of the present disclosure.

[0055] Through meticulous and in-depth research, the inventors of this case have provided a solution to the problems existing in the prior art. Figure 1 shows a schematic diagram of the circuit structure of a display panel of the present invention; Figure 2 shows a circuit diagram of a pixel driving circuit according to a first embodiment of the present invention; Figure 10 shows a circuit diagram of a pixel driving circuit according to a second embodiment of the present invention; Figure 11 shows a circuit diagram of a pixel driving circuit according to a third embodiment of the present invention; Figure 12 shows a circuit diagram of a pixel driving circuit according to a fourth embodiment of the present invention; and Figure 13 shows a circuit diagram of a pixel driving circuit according to a fifth embodiment of the present invention. Figure 14 shows a circuit diagram of a pixel driving circuit according to a sixth embodiment of the present invention. As shown in Figures 1 to 2 and 10 to 14, the present invention discloses pixel driving circuits 111 and display panels 10, wherein the pixel driving circuit 111 includes at least 8, 9, or 10 transistors, 1 or 2 storage capacitors, 1 data signal line, 1 light emission control signal line, 2 scan signal lines, and 2 high-frequency reset signal lines. The pixel driving circuit 111 and display panel 10 of the present invention, by adding an "emission charge recovery" structure to the pixel driving circuit 111, converts the image flicker caused by the emission charge into a high frequency, making it undetectable to the human eye. Specifically, at a low refresh rate, the ninth transistor T9, under the action of the first reset signal R1n, repeatedly turns on and off within a frame. When the ninth transistor T9 is off, it emits charge to the first capacitor C1, causing the brightness of the display panel to decrease. When it is on, it captures charge from the first capacitor C1, which is the recycling of the emitted charge, and the brightness of the display panel increases, causing flicker. In this way, before the next frame arrives, the brightness flicker of the display panel is turned into a high frequency, which is not visible to the human eye and improves the display effect.

[0056] The technical solution of the present invention will be further described below with reference to the accompanying drawings and through specific implementation methods.

[0057] As shown in FIG1 , one aspect of the present invention provides a display panel 10 comprising a display area 11 and a non-display area. A scan driver circuit, a light driver circuit, and a data driver 121 are located in the non-display area of ​​the display panel 10. The display area 11 comprises an array of light-emitting pixels and a pixel driver circuit 111. The light-emitting pixels emit light under the combined action of at least the scan driver circuit, the light driver circuit, the data driver 121, and the pixel driver circuit 111.

[0058] Based on the same inventive concept, another aspect of the present invention provides pixel driving circuits 111. As shown in FIG2 , the pixel driving circuit 111 of the first embodiment of the present invention includes: first to ninth transistors T1 to T9, and a first capacitor C1. The first transistor T1 has a first electrode connected to the data signal DATA, a second electrode connected to the first node N1, and a gate connected to the second scan signal Sn. The second transistor T2 has a first electrode connected to the first node N1, a second electrode connected to the third node N3, and a gate connected to the second node N2. The third transistor T3 has a second electrode connected to the third node N3, and a gate connected to the second scan signal Sn. The fourth transistor T4 has a first electrode connected to the first power supply voltage ELVDD, a second electrode connected to the first node N1, and a gate connected to the light emission control signal Em. The fifth transistor T5 has a first electrode connected to the third node N3, a second electrode connected to the first electrode of the light emitting diode D, and a gate connected to the light emission control signal Em. The sixth transistor T6 has a second electrode connected to the first initialization signal Vint1, and a gate connected to the first scan signal Sn-1. The first electrode of the seventh transistor T7 is connected to the first electrode of the light-emitting diode D, the second electrode is connected to the second initialization signal Vint2, and the gate is connected to the first reset signal R1n. The first electrode of the ninth transistor T9 is connected to the second node N2, the second electrode is connected to the first electrode of the sixth transistor T6, and the gate is connected to the second reset signal R2n. The first electrode of the first capacitor C1 is connected to the first power supply voltage ELVDD, and the second electrode is connected to the second node N2. In this embodiment, the first electrode of the third transistor T3 is connected to the fourth node N4. In addition, the pixel driving circuit 111 further includes an eighth transistor T8. The first electrode of the eighth transistor T8 is connected to the first node N1, the second electrode is connected to the third initialization signal Vint3, and the gate is connected to the first reset signal R1n.

[0059] In this embodiment, the first transistor T1 to the ninth transistor T9 are all P-type MOS transistors. P-type MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET) is referred to as P-type MOS transistor or PMOS transistor. The control terminal of a PMOS transistor is the gate, the first terminal is the source, and the second terminal is the drain, or the first terminal is the drain and the second terminal is the source. The on-level of a PMOS transistor is a low level, and the off-level is a high level. In other embodiments, those skilled in the art will readily appreciate that the pixel driving circuit 111 provided by the present invention can be easily modified to include all N-type MOS transistors. Furthermore, the pixel driving circuit 111 provided by the present invention can also be easily modified to include CMOS transistors. It should be noted that the high and low levels of transistors when turned on and off are described below using PMOS transistors as an example. When other corresponding transistor types are selected according to design requirements, the high and low levels of their on and off states will also vary accordingly.

[0060] In this embodiment, the second electrode of the light emitting diode D is connected to the second power voltage ELVSS, wherein the first power voltage ELVDD is a positive power voltage and the second power voltage ELVSS is a negative power voltage, but the present invention is not limited thereto.

[0061] In this embodiment, the first initialization signal Vint1 , the second initialization signal Vint2 , and the third initialization signal Vint3 are negative voltages, and the voltages of the three are all lower than the second power voltage ELVSS, but the present invention is not limited thereto.

[0062] In this embodiment, the light emitting diode D may be an OLED or an AMOLED (Active-matrix organic light emitting diode).

[0063] FIG3 shows a waveform diagram of the pixel driving circuit shown in FIG2 during operation. FIG4 shows a schematic diagram of the operating state of the pixel driving circuit during stage t11 in FIG3. FIG5 shows a schematic diagram of the operating state of the pixel driving circuit during stage t12 in FIG3. FIG6 shows a schematic diagram of the operating state of the pixel driving circuit during stage t13 in FIG3. FIG7 shows a schematic diagram of the operating state of the pixel driving circuit during stage t2 in FIG3. FIG8 shows a schematic diagram of the operating state of the pixel driving circuit during stage t31 in FIG3. FIG9 shows a schematic diagram of the operating state of the pixel driving circuit during stage t32 in FIG3.

[0064] The pixel circuit in the embodiment of the present invention operates at a low frequency, where low frequency refers to an operating frequency of less than 60 Hz, but the minimum operating frequency is 1 Hz. Specifically, Figure 3 is a timing diagram of the pixel driving circuit 111 of the present invention when the operating frequency is 60 Hz and black and light are inserted twice in each frame. Of course, the pixel driving circuit 111 of the present invention can also insert black and light multiple times in each frame, and it is only necessary to repeat the t3 and t4 stages after the t1 and t2 stages. The following only takes the 2 times in Figure 3 as an example, and the multiple situations are similar and will not be repeated. "×" in Figures 4 to 9 indicates that the transistor is cut off.

[0065] As shown in Figure 3, in this embodiment, during the same high-level phase of the light-emission control signal Em, the second reset signal R2n and the first scan signal Sn-1 have falling edges at the same time, and the second reset signal R2n and the second scan signal Sn have rising edges at the same time. Furthermore, the second reset signal R2n maintains a low level between these falling and rising edges. During the same high-level phase of the light-emission control signal Em, the falling edge of the first reset signal R1n occurs after the rising edge of the second reset signal R2n, and the rising edge of the first reset signal R1n occurs before the end of the current high-level phase of the light-emission control signal Em. Furthermore, the first reset signal R1n maintains a low level between these falling and rising edges.

[0066] As shown in FIG3 , in this embodiment, within one frame of the display image, the first reset signal R1n, the second reset signal R2n, and the light-emitting control signal Em have the same frequency, and the first scan signal Sn-1 and the second scan signal Sn have the same frequency. Within one frame of the display image, the frequency of the first reset signal R1n is twice that of the first scan signal Sn-1.

[0067] As shown in FIG3 , in this embodiment, within one frame of the display image, the operation process of the pixel driving circuit 111 is divided into four phases, t1 to t4, wherein t1 includes sub-phases such as t11 to t13, and t3 includes sub-phases such as t31 and t32.

[0068] In the t1 stage, the light-emitting control signal Em is input at a high level, and the light-emitting diode D does not emit light. The specific sub-stages are described as follows:

[0069] As shown in Figure 4, at stage t11, the light-emitting control signal Em, the second scan signal Sn, and the first reset signal R1n are input at a high level, while the first scan signal Sn-1 and the second reset signal R2n are input at a low level. The first transistor T1, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the seventh transistor T7, and the eighth transistor T8 are turned off, while the sixth transistor T6 and the ninth transistor T9 are turned on. The low potential of the first initialization signal Vint1 is written to the gate of the second transistor T2 through the sixth transistor T6 and the ninth transistor T9. In this stage, the light-emitting control signal Em is input at a high level, and the light-emitting diode D does not emit light. At this time, since the sixth transistor T6 is turned on, the ninth transistor T9 captures the charge from the first initialization signal Vint1 through the sixth transistor T6.

[0070] As shown in Figure 5, at stage t12, the emission control signal Em, the first scan signal Sn-1, and the first reset signal R1n are input at a high level, while the second scan signal Sn and the second reset signal R2n are input at a low level. The fourth through eighth transistors T4 to T8 are turned off, while the first, second, third, and ninth transistors T1 and T2 are turned on. The data signal DATA writes the data voltage to the first node N1 through the first transistor T1. During this stage, the emission control signal Em is input at a high level, and the light-emitting diode D does not emit light. At this time, since the third transistor T3 is turned on, the ninth transistor T9 captures the charge from the data signal DATA through the third transistor T3.

[0071] As shown in Figure 6, at stage t13, the light-emission control signal Em, the first scan signal Sn-1, the second scan signal Sn, and the second reset signal R2n are input at a high level, and the first reset signal R1n is input at a low level. The first transistor T1, the third transistor T3 to the sixth transistor T6, and the ninth transistor T9 are turned off, and the seventh transistor T7 and the eighth transistor T8 are turned on. In this stage, the light-emission control signal Em is input at a high level, and the light-emitting diode D does not emit light. At this time, the ninth transistor T9 is turned off and emits charge into the first capacitor C1, causing the potential of the second node N2 to rise.

[0072] As shown in Figure 7, during phase t2, the first scan signal Sn-1, the second scan signal Sn, the second reset signal R2n, and the first reset signal R1n are input at a high level, and the light-emission control signal Em is input at a low level. The first transistor T1, the third transistor T3, and the sixth transistor T6 through the ninth transistor T9 are turned off, while the second transistor T2, the fourth transistor T4, and the fifth transistor T5 are turned on. The first power supply voltage ELVDD and the second power supply voltage ELVSS are applied to the two electrodes of the light-emitting diode D, causing it to emit light. During this phase, the light-emission control signal Em is input at a low level, causing the light-emitting diode D to emit light. At the same time, the ninth transistor T9 remains off and continues to emit charge into the first capacitor C1, gradually decreasing the brightness of the light-emitting diode D, and thus the brightness of the display panel.

[0073] In the t3 phase, the light-emitting control signal Em is input at a high level, and the light-emitting diode D does not emit light. The specific subdivision phases are described as follows:

[0074] As shown in Figure 8, at stage t31, the light-emission control signal Em, the first scan signal Sn-1, the second scan signal Sn, and the first reset signal R1n are input at a high level, while the second reset signal R2n is input at a low level. The first transistor T1, the third transistor T3, the eighth transistor T8 are turned off, and the ninth transistor T9 is turned on. During this stage, the light-emission control signal Em is input at a high level, and the light-emitting diode D does not emit light. Simultaneously, the ninth transistor T9 is turned on again, capturing charge from the first capacitor C1 and recycling it into the ninth transistor T9, causing the potential of the second node N2 to drop.

[0075] As shown in Figure 9, at stage t32, the light-emission control signal Em, the first scan signal Sn-1, the second scan signal Sn, and the second reset signal R2n are input at a high level, and the first reset signal R1n is input at a low level. The first transistor T1, the third transistor T3 through the sixth transistor T6, and the ninth transistor T9 are turned off, while the seventh transistor T7 and the eighth transistor T8 are turned on. During this stage, the light-emission control signal Em is input at a high level, and the light-emitting diode D does not emit light. At the same time, the ninth transistor T9 is turned off, and the charge captured by the ninth transistor T9 is gradually released, causing the potential of the second node N2 to rise again.

[0076] During stage t4, the pixel driving circuit 111 operates in the same manner as during stage t2. During this stage, the light-emission control signal Em is input at a low level, causing the light-emitting diode D to emit light at a brightness comparable to that observed without charge emission. The ninth transistor T9 then remains off and continues to emit charge into the first capacitor C1, gradually decreasing the brightness of the light-emitting diode D and, consequently, the display panel.

[0077] In this embodiment, the ninth transistor T9, the first capacitor C1, the first reset signal R1n, and the second reset signal R2n together form the core components of the "emission charge recovery" structure. The ninth transistor T9, under the action of the first reset signal R1n, is continuously turned on and off within a frame. When off, the ninth transistor T9 emits charge to the first capacitor C1, and when on, it captures charge from the first capacitor C1, thus recovering the emitted charge. From t1 to t4, the charge capture and release process in the ninth transistor T9 is completely repeated twice, and the display panel brightness decreases and recovers twice. When the switching frequency of the ninth transistor T9 is relatively high, such as 120 Hz in this embodiment, the brightness changes caused by this capture and release process become undetectable to the human eye. In other embodiments, the t3 and t4 stages of this embodiment can be repeated to achieve a higher frequency of charge capture and release, and a higher frequency of display panel brightness decreases and recovers. This reduces the image flicker caused by the emitted charge to a high frequency, making it undetectable to the human eye, further reducing the impact of leakage on the brightness flicker of the display panel 10 and improving the display quality of the display panel 10.

[0078] Figure 10 shows a circuit diagram of a pixel driving circuit according to a second embodiment of the present invention. As shown in Figure 10 , the pixel driving circuit 111 according to the second embodiment of the present invention does not include the eighth transistor T8 and other circuit structures connected thereto, as compared to the first embodiment. In this embodiment, since the eighth transistor T8 is not included, the first node N1 is not reset. However, this embodiment retains the first reset signal R1n and the second reset signal R2n for the seventh transistor T7 and the ninth transistor T9. This significantly improves flicker at low refresh rates while reducing the number of components and lowering the difficulty and cost of the production process.

[0079] FIG11 shows a circuit diagram of a pixel driving circuit according to a third embodiment of the present invention. As shown in FIG11 , the pixel driving circuit 111 according to the third embodiment of the present invention has the same circuit connection structure as that of the first embodiment. However, in this embodiment, the ninth transistor T9 is made of indium gallium zinc oxide or amorphous silicon. Specifically, the ninth transistor T9 uses a wide bandgap, low leakage material to further reduce the release of charge, such as indium gallium zinc oxide (IGZO) or amorphous silicon (a-Si), etc. The corresponding signal only needs to change the high and low potentials according to the polarity of the ninth transistor T9 to achieve the same effect, and the repeated parts will not be repeated.

[0080] FIG12 shows a circuit diagram of a pixel driving circuit according to a fourth embodiment of the present invention. As shown in FIG12 , the pixel driving circuit 111 according to the fourth embodiment of the present invention has the same connection method for the eighth transistor T8 as in the first embodiment, and the first electrode of the third transistor T3 is not connected to the fourth node N4. Furthermore, the pixel driving circuit 111 according to this embodiment further includes a tenth transistor T10. The first electrode of the tenth transistor T10 is connected to the second node N2, the second electrode is connected to the first electrode of the third transistor T3, and the gate is connected to the second reset signal R2n. In this embodiment, the first transistor T1 to the tenth transistor T10 are all P-type MOS transistors. This embodiment uses the ninth transistor T9 and the tenth transistor T10 to replace the ninth transistor T9 in the first embodiment. The timing of this embodiment is the same as that of the first embodiment, and the same effects can be achieved. The repeated parts will not be repeated here.

[0081] FIG13 shows a circuit diagram of a pixel driving circuit according to a fifth embodiment of the present invention. As shown in FIG13 , the pixel driving circuit 111 according to the fifth embodiment of the present invention has a back-gate structure for the second transistor, as compared to the first embodiment, and its back gate is connected to a first reference potential ref1. The first reference potential ref1 is usually constant to improve the stability of the second transistor T2, but can also be slightly adjusted to meet specific display requirements. This embodiment adds an emission charge recovery structure to the ninth transistor T9 of the first embodiment, and adds a back-gate structure to the driving transistor, i.e., the second transistor T2. While achieving the advantages of the first embodiment, it can also improve the stability of the second transistor T2 and its ability to resist external electric fields, thereby improving the flicker problem caused by the influence of external electric fields on the display panel.

[0082] Figure 14 shows a circuit diagram of a pixel driving circuit according to a sixth embodiment of the present invention. As shown in Figure 14 , the pixel driving circuit 111 according to the sixth embodiment of the present invention, compared to the first embodiment, includes a second capacitor C2, whose first electrode is connected to the fourth node N4 and whose second electrode is connected to the first power supply voltage ELVDD. This embodiment, while building on the advantages of the first embodiment, further incorporates a second capacitor C2 between the fourth node N4 and the first power supply voltage ELVDD. While achieving the advantages of the first embodiment, this embodiment regulates the potential change at the fourth node N4 caused by gate-source and gate-drain capacitance coupling after the ninth transistor T9 is turned off, thereby adjusting the Vds of the ninth transistor T9, the third transistor T3, and the sixth transistor T6, thereby adjusting the direction and rate of charge emission and further refining the flicker effect.

[0083] Based on the same inventive concept, embodiments of the present invention further provide a display device comprising the display panel 10 described above. The display device can be any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigation system. For implementation of the display device, reference can be made to the embodiments of the display panel 10 described above, and any overlapping technical solutions and effects will not be further described.

[0084] In summary, the pixel driving circuit 111 and the display panel 10 of the present invention, by adding an "emission charge recovery" structure in the pixel driving circuit 111, convert the screen flicker caused by the emission charge into a high frequency so that it cannot be recognized by the human eye. Specifically, under the action of the first reset signal R1n, the ninth transistor T9 is continuously turned on and off within a frame time. When the ninth transistor T9 is turned off, it emits charge to the first capacitor C1, and the brightness of the display panel decreases accordingly. When it is turned on, it captures charge from the first capacitor C1, that is, the emission charge is recovered, and the brightness of the display panel rises accordingly, forming a flicker. In this way, before the next frame arrives, the brightness flicker of the display panel is turned into a high frequency several times, which cannot be recognized by the human eye, thereby improving the display effect.

[0085] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A pixel driving circuit, characterized in that: include: A first transistor, wherein a first electrode of the first transistor is connected to a data signal, a second electrode is connected to a first node, and a gate is connected to a second scanning signal; a second transistor, wherein a first electrode of the second transistor is connected to the first node, a second electrode of the second transistor is connected to the third node, and a gate of the second transistor is connected to the second node; a third transistor, wherein a second electrode of the third transistor is connected to the third node, and a gate of the third transistor is connected to the second scanning signal; a fourth transistor, wherein a first electrode of the fourth transistor is connected to the first power supply voltage, a second electrode of the fourth transistor is connected to the first node, and a gate of the fourth transistor is connected to a light emitting control signal; a fifth transistor, wherein a first electrode of the fifth transistor is connected to the third node, a second electrode of the fifth transistor is connected to the first electrode of the light emitting diode, and a gate of the fifth transistor is connected to the light emitting control signal; a sixth transistor, wherein a second electrode of the sixth transistor is connected to the first initialization signal, and a gate electrode of the sixth transistor is connected to the first scanning signal; a seventh transistor, wherein a first electrode of the seventh transistor is connected to the first electrode of the light emitting diode, a second electrode of the seventh transistor is connected to the second initialization signal, and a gate of the seventh transistor is connected to the first reset signal; a ninth transistor, wherein a first electrode of the ninth transistor is connected to the second node, a second electrode of the ninth transistor is connected to the first electrode of the sixth transistor, and a gate of the ninth transistor is connected to a second reset signal; A first capacitor, wherein a first electrode of the first capacitor is connected to the first power supply voltage, and a second electrode of the first capacitor is connected to the second node.

2. The pixel driving circuit according to claim 1, characterized in that: The first electrode of the third transistor is connected to the fourth node.

3. The pixel driving circuit according to claim 2, characterized in that: Also includes: An eighth transistor, wherein a first electrode of the eighth transistor is connected to the first node, a second electrode of the eighth transistor is connected to a third initialization signal, and a gate of the eighth transistor is connected to the first reset signal.

4. The pixel driving circuit according to claim 3, characterized in that: The first transistor to the ninth transistor are all P-type MOS transistors.

5. The pixel driving circuit according to claim 3, characterized in that: The first transistor to the eighth transistor are P-type MOS transistors, and the ninth transistor is an N-type MOS transistor.

6. The pixel driving circuit according to claim 1, characterized in that: Also includes: an eighth transistor, wherein a first electrode of the eighth transistor is connected to the first node, a second electrode of the eighth transistor is connected to a third initialization signal, and a gate of the eighth transistor is connected to the first reset signal; A tenth transistor, wherein a first electrode of the tenth transistor is connected to the second node, a second electrode of the tenth transistor is connected to the first electrode of the third transistor, and a gate of the tenth transistor is connected to the second reset signal.

7. The pixel driving circuit according to claim 4, characterized in that: The second transistor is a back-gate structure, and a back-gate of the second transistor is connected to a first reference potential.

8. The pixel driving circuit according to claim 4, characterized in that: Also includes: A second capacitor, wherein a first electrode of the second capacitor is connected to the fourth node, and a second electrode of the second capacitor is connected to the first power supply voltage.

9. The pixel driving circuit according to claim 1, characterized in that: The second electrode of the light emitting diode is connected to a second power supply voltage.

10. The pixel driving circuit according to claim 1, characterized in that: In the same high potential phase of the light emitting control signal, the second reset signal and the first scanning signal have a falling edge at the same time, and the second reset signal and the second scanning signal have a rising edge at the same time; In the same high potential phase of the light emitting control signal, the falling edge of the first reset signal is after the rising edge of the second reset signal, and the rising edge of the first reset signal is before the end of the current high potential phase of the light emitting control signal.

11. The pixel driving circuit according to claim 1, characterized in that: In one frame time of the display picture, the frequencies of the first reset signal, the second reset signal and the light emitting control signal are the same, and the frequencies of the first scanning signal and the second scanning signal are the same; During one frame time of a display picture, the frequency of the first reset signal is at least twice that of the first scan signal.

12. A display panel, characterized in that: The method comprises a pixel driving circuit according to any one of claims 1 to 11.

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