Methods for multiplying matrices using a plurality of chiplets

By employing chiplets for parallel processing in matrix multiplication, the inefficiencies and resource-intensity of traditional methods are addressed, resulting in improved computational performance and reduced energy consumption.

WO2025090116A1PCT designated stage expired Publication Date: 2025-05-01PERSIMMONS INC
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Patent Information

Application Number
PCT/US2024/018158
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-10-23
Filing Date
2024-03-01
Publication Date
2025-05-01

AI Technical Summary

Technical Problem

Existing matrix multiplication methods are inefficient and resource-intensive, particularly in the context of large-scale computations, leading to high energy consumption and computational bottlenecks.

Method used

The use of chiplets, which are small, specialized computing units that can be combined to form larger computing systems, enabling parallel processing and efficient matrix multiplication operations.

Benefits of technology

This approach reduces computational latency and energy consumption by distributing matrix multiplication tasks across multiple chiplets, enhancing performance and efficiency in large-scale computations.

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Abstract

A plurality of chiplets may be used to multiply two matrices A and B. Matrix A may be decomposed into horizontal stripes and matrix B may be decomposed into vertical stripes. Each of the horizontal stripes may be multiplied by each of the vertical stripes to form the output matrix C. Specifically, horizontal stripes may be stored in a stationary, distributed manner across the chiplets, while the vertical stripes (or sub-vertical stripes) may be passed between respective pairs of the chiplets until each of the vertical stripes (or sub-vertical stripes) of matrix B has been received and processed by each of the chiplets. The vertical stripes may be passed along one or more paths that interconnect the chiplets. Similar techniques can be applied to an arrangement in which the vertical stripes are stationary and the horizontal stripes (or sub-horizontal stripes) are passed between respective pairs of the chiplets.
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Description

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Claims

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