Information transmission method, control system, electronic device, and storage medium

Abstract

Provided are an information transmission method, a control system, an electronic device, and a storage medium. The method comprises: a first controller receives, by means of a first GPIO, a first GPIO signal sent by a second controller, the first GPIO signal carrying waveform information; and the first controller determines, on the basis of the waveform information of the first GPIO signal, an operation mode of the second controller.

Description

Information transmission method, control system, electronic device and storage medium

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on October 30, 2023, with application number 202311435663.1 and application name “Information Transmission Method, Control System, Electronic Device and Storage Medium”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of electronic circuit technology, and in particular to an information transmission method, a control system, an electronic device, and a storage medium. Background Art

[0003] In automotive control systems, controllers in the intelligent driving domain have high safety and reliability requirements and complex control systems. General-purpose input / output (GPIO) interfaces (GPIOs) are used to transmit information, offering simple hardware and software, high reliability, and a wide range of applications. Currently, controllers in control systems communicate using the GPIO heartbeat method to transmit system operation information indicating whether the controllers are functioning properly. However, the amount of information that can be transmitted through GPIO communication between controllers is currently limited.

[0004] Summary of the Invention

[0005] Embodiments of the present application provide an information transmission method and device, a control system, an electronic device, and a storage medium, which can determine the operating mode of a controller through the waveform information of a GPIO signal transmitted by the GPIO.

[0006] A first aspect of an embodiment of the present application provides an information transmission method, which is applied to a control system, wherein the control system includes a first controller and a second controller, wherein the first controller is connected to the second controller via a first general purpose input / output (GPIO) port; the method includes:

[0007] The first controller receives a first GPIO signal sent by the second controller through the first GPIO, wherein the first GPIO signal carries waveform information; and

[0008] The first controller determines an operation mode of the second controller based on the waveform information of the first GPIO signal.

[0009] In some embodiments, the waveform information of the first GPIO signal includes a first frequency, and the first controller determines the operating mode of the second controller based on the waveform information of the first GPIO signal, including:

[0010] The first controller determines the operating mode of the second controller based on a frequency band to which the first frequency belongs, wherein the first frequency is a frequency of the first GPIO signal.

[0011] In some embodiments, the first controller determines the operating mode of the second controller based on a frequency band to which the first frequency belongs, including:

[0012] The first controller sets the operating mode corresponding to the frequency band to which the first frequency belongs as the operating mode of the second controller based on the mapping relationship between the frequency band set and the operating mode set, wherein the frequency band set includes at least two frequency bands, the operating mode set includes at least two operating modes, the at least two frequency bands correspond one-to-one to the at least two operating modes, any two of the at least two frequency bands do not overlap with each other, and any two of the at least two operating modes are different.

[0013] In some embodiments, the at least two operating modes include at least two of the following modes: power-on startup mode, normal operating mode, standby mode, firmware update mode, sleep mode, dead mode, shutdown mode, or shutdown mode.

[0014] In some embodiments, the waveform information of the first GPIO signal includes level information, and the first controller determines the operating mode of the second controller based on the waveform information of the first GPIO signal, including:

[0015] The first controller determines the operation mode of the second controller based on the level information.

[0016] In some embodiments, the waveform information of the first GPIO signal includes a first frequency and a first duty cycle, and the first controller determines the operating mode of the second controller based on the waveform information of the first GPIO signal, including:

[0017] The first controller determines an operating mode of the second controller based on a frequency band to which the first frequency belongs, and determines a subdivision state of the operating mode of the second controller based on the first duty cycle.

[0018] In some embodiments, the first controller is connected to the second controller via a second GPIO; the method further includes:

[0019] After the first controller is powered on and started, the first controller sends the operation mode information of the first controller to the second controller through the second GPIO.

[0020] In some embodiments, the first controller is connected to the second controller via a second GPIO, the first controller is connected to the second controller via a first serial communication line, the control system further includes a switching module, and the method further includes:

[0021] After the first controller operates normally, the first controller sends the operating mode information of the first controller to the second controller through at least one of the second GPIO, the first serial communication line, or the switching module.

[0022] In some embodiments, the switching module includes an RGMII interface and an XFI interface, the first controller is communicatively connected to the switching module via the RGMII interface, and the second controller is communicatively connected to the switching module via the XFI interface.

[0023] In some embodiments, the operating mode includes at least one of the following modes: power-on startup mode, normal operating mode, standby mode, firmware update mode, sleep mode, dead mode, shutdown mode, or shutdown mode.

[0024] In some embodiments, the control system further includes a third controller and a fourth controller, the third controller is connected to the fourth controller via a third GPIO, and the method further includes:

[0025] The third controller is configured to receive a third GPIO signal sent by the fourth controller through the third GPIO, wherein the third GPIO signal carries waveform information; and

[0026] The third controller is further configured to determine an operating mode of the fourth controller based on waveform information of the third GPIO signal.

[0027] In some embodiments, the first controller is connected to the third controller via a fourth GPIO, and the method further includes:

[0028] After the first controller is powered on and started, the first controller sends the operation mode information of the first controller to the third controller through the fourth GPIO.

[0029] In some embodiments, the first controller is connected to the third controller via a fourth GPIO, the first controller is connected to the third controller via a third serial communication line, the control system further includes a switching module, and the method further includes:

[0030] After the first controller operates normally, the first controller sends the operating mode information of the first controller to the third controller through at least one of the fourth GPIO, the third serial communication line, or the switching module.

[0031] In some embodiments, after the first controller determines the operating mode of the second controller based on the waveform information of the first GPIO signal, the method further includes:

[0032] When the operating mode of the second controller is different from the expected operating mode of the second controller and / or the operating mode of the second controller is a dead mode, the first controller sends a reset signal to a reset pin of the second controller to reset the second controller.

[0033] In some embodiments, after the third controller determines the operating mode of the fourth controller based on the waveform information of the third GPIO signal, the method further includes: when the operating mode of the fourth controller is different from the expected operating mode of the fourth controller, and / or the operating mode of the fourth controller is a freeze mode, the third controller sends a reset signal to the reset pin of the fourth controller to reset the fourth controller.

[0034] In some embodiments, the first controller and the third controller cannot be reset with each other, and the second controller and the fourth controller cannot be reset with each other.

[0035] In some embodiments, when the second controller is in different operating modes, the frequency of the first GPIO signal sent by the second controller is different.

[0036] In some embodiments, the first controller or the third controller is designated as a main control chip, wherein the main control chip as a control core can ensure the control unity of the control system.

[0037] A second aspect of an embodiment of the present application provides a control system, including a first controller and a second controller, wherein the first controller is connected to the second controller via a first general purpose input and output port (GPIO);

[0038] The first controller is configured to receive a first GPIO signal sent by the second controller through the first GPIO, wherein the first GPIO signal carries waveform information;

[0039] The first controller is further configured to determine an operating mode of the second controller based on waveform information of the first GPIO signal.

[0040] A third aspect of an embodiment of the present application provides an information transmission device, wherein the method is applied to a control system, the control system including a first controller and a second controller, the first controller being connected to the second controller via a first general purpose input / output (GPIO) port, the device including:

[0041] a communication unit, configured to receive, through a first GPIO, a first GPIO signal sent by the second controller, wherein the first GPIO signal carries waveform information; and

[0042] A determining unit is configured to determine an operating mode of the second controller based on waveform information of the first GPIO signal.

[0043] The fourth aspect of an embodiment of the present application provides an electronic device, including a processor and a memory, the memory being used to store a computer program, the computer program including program instructions, and the processor being configured to call the program instructions and execute operating instructions as in the first aspect of the embodiment of the present application.

[0044] The fifth aspect of the embodiments of the present application provides a computer-readable storage medium, wherein the above-mentioned computer-readable storage medium stores a computer program for electronic data exchange, wherein the above-mentioned computer program enables the computer to perform part or all of the operations described in the first aspect of the embodiments of the present application.

[0045] A sixth aspect of the present application provides a computer program product, wherein the computer program product includes a computer program that is operable to cause a computer to perform some or all of the operations described in the first aspect of the present application. The computer program product may be a software installation package.

[0046] In the information transmission method of the embodiment of the present application, a first controller receives a first GPIO signal sent by a second controller via a first GPIO; the first GPIO signal carries waveform information; the first controller determines the operating mode of the second controller based on the waveform information of the first GPIO signal. The second controller can send the first GPIO signal to the first controller via the first GPIO, and the first controller determines the operating mode of the second controller based on the waveform information of the first GPIO signal. The operating mode of the controller can be determined based on the waveform information of the GPIO signal transmitted by the GPIO, thereby increasing the amount of information transmitted between the controllers via the GPIO signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without paying any creative work.

[0048] FIG1 is a schematic structural diagram of a control system provided in an embodiment of the present application.

[0049] FIG2 is a schematic structural diagram of a control system provided in another embodiment of the present application.

[0050] FIG3 is a flow chart of an information transmission method provided in an embodiment of the present application.

[0051] FIG4 is a waveform diagram of a general purpose input / output (GPIO) signal provided in an embodiment of the present application.

[0052] FIG5 is a flow chart of an information transmission method provided in another embodiment of the present application.

[0053] FIG6 is a schematic structural diagram of a detailed control system proposed in an embodiment of the present application.

[0054] FIG7 is a schematic structural diagram of an information transmission device provided in an embodiment of the present application.

[0055] FIG8 is a schematic structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0056] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0057] The terms "first," "second," and the like in the specification and claims of this application and the accompanying drawings are used to distinguish between different objects, not to describe a particular order. Furthermore, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, system, product, or device that includes a series of operations or units is not limited to the listed operations or units, but may optionally include operations or units that are not listed, or may optionally include other operations or units that are inherent to the process, product, or device.

[0058] References to "embodiments" in this application mean that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described in this application may be combined with other embodiments.

[0059] Please refer to Figure 1, which is a structural diagram of a control system provided in an embodiment of the present application. As shown in Figure 1, the control system includes a first controller 10 and a second controller 20. The first controller 10 is connected to the second controller 20 through a first general purpose input / output (GPIO). The first controller 10 is used to receive a first GPIO signal sent by the second controller 20 through the first GPIO, wherein the first GPIO signal carries waveform information. The first controller 10 is also used to determine the operating mode of the second controller 20 based on the waveform information of the first GPIO signal.

[0060] The first controller 10 can determine the operation mode of the second controller 20 through the waveform information of the first GPIO signal transmitted by the first GPIO. The first controller 10 is more reliable than the second controller 20, and the second controller 20 has a stronger computing power than the first controller 10.

[0061] The first GPIO may be a GPIO for communication between a GPIO pin on the first controller 10 and a GPIO pin on the second controller 20 .

[0062] In an embodiment of the present application, the first controller 10 may be a microcontroller unit (MCU) on a vehicle, and the second controller 20 may be a system on chip (SOC) on a vehicle. SOC may also be referred to as a system on chip. Compared with SOC, MCU may be more stable, reliable, and lower cost. Compared with MCU, SOC has better performance and stronger computing power. For example, for the control system in the intelligent driving domain, SOC can be used to implement the function of automatic driving, and MCU can ensure the normal driving of the vehicle when SOC fails. For another example, for the control system in the vehicle-computer domain, SOC can be used to implement functions such as navigation, music playback, and automatic driving, and MCU can ensure the normal driving of the vehicle when SOC fails.

[0063] In an embodiment of the present application, the first controller receives a first GPIO signal sent by the second controller through the first GPIO, and the first controller determines the operating mode of the second controller based on the waveform information of the first GPIO signal. In this way, the operating mode of the controller can be determined by the waveform information of the GPIO signal transmitted by the GPIO, thereby increasing the amount of information transmitted between the controllers through the GPIO signal.

[0064] In some embodiments, the waveform information of the first GPIO signal includes a first frequency, and the first controller 10 determines the operating mode of the second controller 20 based on the waveform information of the first GPIO signal, including: the first controller 10 determines the operating mode of the second controller 20 based on the frequency band to which the first frequency belongs.

[0065] In some embodiments, the first controller 10 determines the operating mode of the second controller 20 based on the frequency band to which the first frequency belongs, including:

[0066] The first controller 10 determines the operating mode corresponding to the frequency band in which the first frequency falls based on a mapping relationship between a frequency band set and an operating mode set, wherein the frequency band set includes at least two frequency bands, the operating mode set includes at least two operating modes, the at least two frequency bands correspond one-to-one to the at least two operating modes, any two of the at least two frequency bands do not overlap with each other, and any two of the at least two operating modes are different.

[0067] The at least two operating modes include at least two of the following modes: power-on startup mode, normal operating mode, standby mode, firmware update mode, sleep mode, dead mode, shutdown mode and shutdown mode.

[0068] In some embodiments, as shown in FIG1 , the first controller 10 is connected to the second controller 20 via a second GPIO; the first controller 10 is further configured to send operating mode information of the first controller 10 to the second controller 20 via the second GPIO.

[0069] In the embodiment of the present application, the first controller 10 may send a second GPIO signal to the second controller 20 via the second GPIO, and the second controller 20 determines the operation mode of the first controller 10 based on the waveform information carried by the second GPIO signal.

[0070] It should be noted that the first GPIO and the second GPIO only express the difference in data flow direction. From a hardware perspective, the first GPIO and the second GPIO can be the same interface or two different interfaces, which is not limited in the embodiments of the present application.

[0071] In some embodiments, as shown in FIG1 , the first controller 10 is connected to the second controller 20 via a first serial communication line; the first controller 10 is configured to communicate with the second controller 20 via the first serial communication line to obtain operating mode information of the second controller 20 .

[0072] The first serial communication line may be a serial peripheral interface (SPI) communication line or a universal asynchronous receiver / transmitter (UART) communication line.

[0073] The first controller 10 can communicate with the second controller 20 not only through the first GPIO but also through the first serial communication line to obtain the operating mode information of the second controller 20. If either the first GPIO or the first serial communication line fails, the first controller 10 can still obtain the operating mode information of the second controller 20, thereby ensuring the reliability of the control system operation.

[0074] In some embodiments, as shown in FIG. 1 , the control system further includes a switching module 50 ; the first controller 10 is further configured to communicate with the second controller 20 through the switching module 50 to obtain operation mode information of the second controller 20 .

[0075] The switch module 50 is a module for Ethernet communication. For example, the switch module 50 may be an Ethernet switch chip. The switch module 50 may include XFI and a reduced gigabit media independent interface (RGMII). XFI is a 10Gbit network interface.

[0076] The switching module 50 can connect the first controller 10 and the second controller 20 via a network interface. The connection between the switching module 50 and the first controller 10 can use the RGMII interface, and the connection between the switching module 50 and the second controller 20 can use the XFI interface. Through the switching of the switching module 50, network communication can be achieved between the first controller 10 and the second controller 20 when the entire control system is operating normally.

[0077] The first controller 10 can not only communicate with the second controller 20 via the first GPIO to obtain the operating mode information of the second controller 20, but can also communicate with the second controller 20 via the first serial communication line to obtain the operating mode information of the second controller 20. In addition, the first controller 10 can also communicate with the second controller 20 via the switching module 50 to obtain the operating mode information of the second controller 20. If any one or any two of the first GPIO, the first serial communication line, or the switching module 50 fail, the first controller 10 can still obtain the operating mode information of the second controller 20, thereby ensuring the reliability of the control system operation. In this way, effective communication and backup between the first controller 10 and the second controller 20 can be achieved. When the control system is operating normally, the control system can exchange information efficiently and quickly.

[0078] In some embodiments, as shown in FIG1 , the first controller 10 is further configured to send a reset signal to a reset pin of the second controller 20 via a first reset signal line (reset signal line 1 shown in FIG1 ) to reset the second controller 20 when the operating mode of the second controller 20 is different from the expected operating mode of the second controller 20. The reset signal line 1 can be implemented via a GPIO.

[0079] The expected operating mode of the second controller 20 is the operating mode that the second controller 20 should currently be in. The operating mode of the second controller 20 is the operating mode reported by the second controller 20. When the operating mode of the second controller 20 is different from the expected operating mode of the second controller 20, the second controller 20 may have failed. In this case, the first controller 10 can send a reset signal to the reset pin of the second controller 20 via the reset signal line 1 to reset the second controller 20, thereby eliminating the failure of the second controller 20. For example, if the first controller 10 detects that the second controller 20 is in a dead state, and the expected operating mode of the second controller 20 is the normal operating mode, the first controller 10 sends a reset signal to the reset pin of the second controller 20 via the reset signal line 1 to reset the second controller 20.

[0080] Please refer to Figure 2, which is a structural diagram of a control system provided by other embodiments of the present application. Figure 2 is obtained on the basis of Figure 1. As shown in Figure 2, the control system may further include a third controller 30 and a fourth controller 40. The third controller 30 is connected to the fourth controller 40 via a third GPIO. The third controller 30 is used to receive a third GPIO signal sent by the fourth controller 40 via the third GPIO, wherein the third GPIO signal carries waveform information. The third controller 30 is also used to determine the operating mode of the fourth controller 40 based on the waveform information of the third GPIO signal.

[0081] In the embodiment of the present application, the third controller 30 can determine the operating mode of the fourth controller 40 based on the waveform information of the third GPIO signal transmitted by the third GPIO. The third controller 30 is more reliable than the fourth controller 40, and the fourth controller 40 has greater computing power than the third controller 30. The third controller 30 can be an MCU on the vehicle, and the fourth controller 40 can be an SOC on the vehicle.

[0082] The third controller 30 can perform the same functions as the first controller 10, and the fourth controller 40 can perform the same functions as the second controller 20. If the first controller 10 fails, the third controller 30 can perform the corresponding functions, preventing system crashes. If the second controller 20 fails, the fourth controller 40 can perform the corresponding functions.

[0083] When the first controller 10 and the third controller 30 are operating normally at the same time, a control core is required to control the entire control system to ensure the control uniformity of the control system and avoid control disorder and confusion that may occur with multiple controllers. The control core can be the first controller 10 or the third controller 30.

[0084] In some embodiments, the third controller 30 is further configured to, if the operating mode of the fourth controller 40 is different from the expected operating mode of the fourth controller 40 and / or the operating mode of the fourth controller 40 is a dead mode, send a reset signal to the reset pin of the fourth controller 40 via a second reset signal line (reset signal line 2 as shown in FIG. 2 ) to reset the fourth controller 40. The reset signal line 2 can be implemented via a GPIO.

[0085] The expected operating mode of the fourth controller 40 is the operating mode that the fourth controller 40 should currently be in. The operating mode of the fourth controller 40 is the operating mode reported by the fourth controller 40. When the operating mode of the fourth controller 40 is different from the expected operating mode of the fourth controller 40, and / or the operating mode of the fourth controller 40 is a dead mode, the fourth controller 40 may have a fault. At this time, the third controller 30 can send a reset signal to the reset pin of the fourth controller 40 via the reset signal line 2 to reset the fourth controller 40, thereby eliminating the fault of the fourth controller 40. For example, if the third controller 30 detects that the fourth controller 40 is in a dead state, and the expected operating mode of the fourth controller 40 is a normal operating mode, the third controller 30 sends a reset signal to the reset pin of the fourth controller 40 via the reset signal line 2 to reset the fourth controller 40.

[0086] When the operating mode of the fourth controller 40 is different from the expected operating mode of the fourth controller 40, and / or the operating mode of the fourth controller 40 is a freeze mode, it includes any one of the following situations: the operating mode of the fourth controller 40 is different from the expected operating mode of the fourth controller 40, the operating mode of the fourth controller 40 is a freeze mode, the operating mode of the fourth controller 40 is different from the expected operating mode of the fourth controller 40 and the operating mode of the fourth controller 40 is a freeze mode.

[0087] In an embodiment of the present application, the third controller receives the third GPIO signal sent by the fourth controller through the third GPIO. The third controller can determine the operating mode of the fourth controller through the waveform information carried by the third GPIO signal transmitted by the third GPIO, thereby increasing the amount of information transmitted between controllers through the GPIO signal.

[0088] In some embodiments, as shown in FIG2 , the first controller 10 is connected to the third controller 30 via a fourth GPIO; the first controller 10 is further configured to send operating mode information of the first controller 10 to the third controller 30 via the fourth GPIO.

[0089] In the embodiment of the present application, the first controller 10 may send a fourth GPIO signal to the third controller 30 via the fourth GPIO, and the third controller 30 determines the operation mode information of the first controller 10 based on the waveform information carried by the fourth GPIO signal.

[0090] In some embodiments, as shown in FIG2 , the third controller 30 is connected to the fourth controller 40 via the fifth GPIO; the third controller 30 sends the operation mode information of the third controller 30 to the fourth controller 40 via the fifth GPIO.

[0091] In the embodiment of the present application, the third controller 30 may send a fifth GPIO signal to the fourth controller 40 via the fifth GPIO, and the fourth controller 40 determines the operation mode of the third controller 30 based on the waveform information carried by the fifth GPIO signal.

[0092] In some embodiments, as shown in FIG2 , the first controller 10 is connected to the third controller 30 via the sixth GPIO; the first controller 10 is further configured to receive operation mode information of the third controller 30 sent by the third controller 30 via the sixth GPIO.

[0093] In the embodiment of the present application, the first controller 10 may receive a sixth GPIO signal sent by the third controller 30 through the sixth GPIO, and the first controller 10 may determine the operating mode of the third controller 30 based on waveform information carried by the sixth GPIO signal.

[0094] In some embodiments, as shown in FIG2 , the second controller 20 is connected to the fourth controller 40 via the seventh GPIO; the second controller 20 is further configured to send operating mode information of the second controller 20 to the fourth controller 40 via the seventh GPIO.

[0095] In the embodiment of the present application, the second controller 20 can send a seventh GPIO signal to the fourth controller 40 through the seventh GPIO, and the fourth controller 40 determines the operation mode of the second controller 20 based on the waveform information carried by the seventh GPIO signal.

[0096] In some embodiments, as shown in FIG2 , the second controller 20 is connected to the fourth controller 40 via the eighth GPIO; the second controller 20 is further configured to receive operation mode information of the fourth controller 40 sent by the fourth controller 40 via the eighth GPIO.

[0097] In the embodiment of the present application, the second controller 20 may receive the eighth GPIO signal sent by the fourth controller 40 through the eighth GPIO, and the second controller 20 may determine the operation mode of the fourth controller 40 based on the waveform information carried by the eighth GPIO signal.

[0098] It should be noted that the third GPIO and the fifth GPIO only express the difference in data flow direction. From a hardware perspective, the third GPIO and the fifth GPIO can be the same interface or two different interfaces, and this embodiment of the application does not limit this.

[0099] Similarly, the fourth GPIO and the sixth GPIO only express different data flow directions. From a hardware perspective, the fourth GPIO and the sixth GPIO can be the same interface or two different interfaces, which is not limited in the embodiments of the present application.

[0100] Similarly, the seventh GPIO and the eighth GPIO only express different data flow directions. From a hardware perspective, the seventh GPIO and the eighth GPIO can be the same interface or two different interfaces, which is not limited in the embodiments of the present application.

[0101] Please refer to Figure 3, which is a flow chart of an information transmission method provided by an embodiment of the present application. The method of Figure 3 can be applied to the control system of Figure 1 or Figure 2. As shown in Figure 3, the method includes the following operations.

[0102] 301. A first controller receives a first GPIO signal sent by a second controller through a first GPIO, where the first GPIO signal carries waveform information.

[0103] In an embodiment of the present application, the first GPIO signal can be a square wave signal. Please refer to FIG. 4 , which is a schematic diagram of a waveform of a GPIO signal provided in an embodiment of the present application. As shown in FIG. 4 , the GPIO signal is a square wave signal. The frequency of the GPIO signal during period t1 is f1, the frequency of the GPIO signal during period t2 is f2, and the frequency of the GPIO signal during period t3 is f3, where f3 < f1 < f2.

[0104] For example, when the second controller is in the power-on startup phase (such as the t1 period in Figure 4, when the second controller is in the power-on startup mode), the GPIO signal output by the second controller has the characteristics of low frequency and large interval time difference due to the unequal initialization time of the peripherals. When the second controller is in the normal operation phase (such as the t2 period in Figure 4, when the second controller is in the normal operation mode), the GPIO signal output by the second controller has the characteristics of high frequency and stable interval time. When the second controller is in the sleep phase (such as the t3 period in Figure 4, when the second controller is in the sleep mode), the control system requires lower power consumption, and the GPIO signal output by the second controller has the characteristics of low frequency and stable interval time.

[0105] 302. The first controller determines an operating mode of the second controller based on waveform information of the first GPIO signal.

[0106] The waveform information of the first GPIO signal may include at least one of a frequency of the first GPIO signal, level information of the first GPIO signal, or a duty cycle of the first GPIO signal.

[0107] In some embodiments, when the waveform information of the first GPIO signal includes a first frequency, operation 302 may specifically include the following operations: the first controller determines the operating mode of the second controller based on a frequency band to which the first frequency belongs.

[0108] In an embodiment of the present application, the first controller may determine an operating mode corresponding to a frequency band within which the first frequency falls based on a mapping relationship between a frequency band set and an operating mode set; the frequency band set includes at least two frequency bands, the operating mode set includes at least two operating modes, the at least two frequency bands correspond one-to-one to the at least two operating modes, any two of the at least two frequency bands do not overlap, and any two of the at least two operating modes are different. The first frequency is a frequency of the first GPIO signal.

[0109] In embodiments of the present application, the mapping relationship between frequency band sets and operating mode sets can be stored in the first controller. For example, the mapping relationship between frequency band sets and operating mode sets can be stored in the first controller in a table format. See Table 1 for an exemplary mapping relationship table between frequency band sets and operating mode sets provided in embodiments of the present application.

[0110] Table 1

[0111] As shown in Table 1, the frequency band set includes frequency band 1, frequency band 2, and frequency band 3, wherein frequency band 1, frequency band 2, and frequency band 3 do not overlap. The operating mode set includes operating mode 1, operating mode 2, and operating mode 3, wherein operating mode 1, operating mode 2, and operating mode 3 are different operating modes. For example, if the frequency band in which the first frequency falls is frequency band 1, then the operating mode corresponding to the frequency band in which the first frequency falls is operating mode 1.

[0112] The at least two operating modes include at least two of the following modes: power-on startup mode, normal operating mode, standby mode, firmware update mode, sleep mode, dead mode, shutdown mode and shutdown mode.

[0113] The waveform information of the GPIO signal output by the controller is different in different operating modes.

[0114] In some embodiments, when the waveform information of the first GPIO signal includes level information, operation 302 may specifically include the following operations: the first controller determines the operating mode of the second controller based on the level information.

[0115] In an embodiment of the present application, the level information may be the level information of the waveform of the first GPIO signal. When the waveform information of the first GPIO signal does not include frequency, the level information of the first GPIO signal may be used as the waveform information of the first GPIO signal. For example, when the waveform of the first GPIO signal is a continuous high level, the level information of the first GPIO signal is a high level; or, when the waveform of the first GPIO signal is a continuous low level, the level information of the first GPIO signal is a low level. For example, when the second controller is in dead mode or shutdown mode, the waveform of the first GPIO signal output by the second controller is a continuous high level or low level.

[0116] In some embodiments, when the waveform information of the first GPIO signal includes a first frequency and a first duty cycle, operation 302 may specifically include the following operations: the first controller determines the operating mode of the second controller based on the frequency band to which the first frequency belongs, and determines the subdivision state of the operating mode of the second controller based on the first duty cycle.

[0117] In an embodiment of the present application, when the waveform information of the first GPIO signal includes a first frequency and a first duty cycle, the first controller can determine the operating mode of the second controller based on the frequency band to which the first frequency belongs, and determine the subdivision state of the operating mode of the second controller based on the first duty cycle.

[0118] The first controller may determine a subdivision state corresponding to the duty cycle interval within which the first duty cycle falls based on a mapping relationship between a set of duty cycle intervals and a set of subdivision states; the set of duty cycle intervals includes at least two duty cycle intervals, the set of subdivision states includes at least two subdivision states, the at least two duty cycle intervals correspond one-to-one to the at least two subdivision states, any two of the at least two duty cycle intervals do not overlap, and any two of the at least two subdivision states are different. The first duty cycle is the duty cycle of the first GPIO signal.

[0119] In embodiments of the present application, the mapping relationship between the set of duty cycle intervals and the set of subdivision states can be stored in the first controller. For example, the mapping relationship between the set of duty cycle intervals and the set of subdivision states can be stored in the first controller in a table format. See Table 2 for an exemplary mapping relationship between the set of duty cycle intervals and the set of subdivision states provided in embodiments of the present application.

[0120] Table 2

[0121] As shown in Table 2, the duty cycle interval set includes duty cycle interval 1, duty cycle interval 2, and duty cycle interval 3, wherein duty cycle interval 1, duty cycle interval 2, and duty cycle interval 3 do not intersect with each other. The subdivision state set includes subdivision state 1, subdivision state 2, and subdivision state 3, wherein subdivision state 1, subdivision state 2, and subdivision state 3 are different operating modes. For example, if the duty cycle interval that the first duty cycle falls into is duty cycle interval 1, then the subdivision state corresponding to the duty cycle interval that the first duty cycle falls into is subdivision state 1.

[0122] For details of how the first controller determines the operating mode of the second controller based on the frequency band to which the first frequency belongs, please refer to the above-mentioned related embodiments and will not be repeated here.

[0123] In an embodiment of the present application, the operating mode of the second controller can be determined by the first frequency included in the waveform information of the first GPIO signal, and the subdivision state of the operating mode of the second controller can be determined by the first duty cycle included in the waveform information of the first GPIO signal. In this way, more information can be transmitted through GPIO.

[0124] Exemplarily, when the first controller and the second controller are in normal operation mode or firmware update mode, stable and reliable output of GPIO signals can be guaranteed. Therefore, in normal operation and firmware update states, more status information is reserved by setting the duty cycle of the GPIO signal.

[0125] For example, in normal operating mode, the GPIO signal outputs a square wave with an average frequency of 2Hz and an error of ±5% (the frequency range corresponding to normal operating mode can be set to 1-3Hz). The GPIO output level duty cycle ranges from 10% to 90% in 20% increments, with a total of five subdivisions reserved for indicating the subdivision state in normal operating mode. For example, a duty cycle of approximately 10% (duty cycle interval 1 is 5%-15%) corresponds to subdivision state 1; a duty cycle of approximately 30% (duty cycle interval 2 is 25%-35%) corresponds to subdivision state 2; a duty cycle of approximately 50% (duty cycle interval 3 is 45%-55%) corresponds to subdivision state 3; a duty cycle of approximately 70% (duty cycle interval 4 is 65%-75%) corresponds to subdivision state 4; and a duty cycle of approximately 90% (duty cycle interval 5 is 85%-95%) corresponds to subdivision state 5.

[0126] For example, in firmware update mode, the GPIO signal outputs a square wave with an average frequency of 10Hz and an error of ±5% (the frequency band corresponding to the firmware update mode can be set to 8-12Hz). The GPIO output level duty cycle ranges from 10% to 90% in 20% increments, with a total of five subdivisions reserved for indicating the subdivision status in firmware update mode. For example, a duty cycle of approximately 10% (duty cycle interval 1 is 5%-15%) corresponds to subdivision 1; a duty cycle of approximately 30% (duty cycle interval 2 is 25%-35%) corresponds to subdivision 2; a duty cycle of approximately 50% (duty cycle interval 3 is 45%-55%) corresponds to subdivision 3; a duty cycle of approximately 70% (duty cycle interval 4 is 65%-75%) corresponds to subdivision 4; and a duty cycle of approximately 90% (duty cycle interval 5 is 85%-95%) corresponds to subdivision 5.

[0127] In an embodiment of the present application, the first controller receives a first GPIO signal sent by the second controller through the first GPIO, and the first controller can identify the frequency of the first GPIO signal, and then determine the operating mode corresponding to the frequency band into which the frequency of the first GPIO signal falls based on the mapping relationship between the frequency band set and the operating mode set. In this way, the operating mode of the controller can be determined by the frequency of the GPIO signal transmitted by the GPIO, thereby improving the amount of information transmitted between the controllers through the GPIO signal.

[0128] Please refer to Figure 5, which is a flowchart of an information transmission method provided in another embodiment of the present application. The method of Figure 5 can be applied to the control system of Figure 1 or Figure 2. As shown in Figure 5, the method may include the following operations.

[0129] 501. A first controller receives a first GPIO signal sent by a second controller through a first GPIO, where the first GPIO signal carries waveform information.

[0130] 502. The first controller determines an operating mode of the second controller based on waveform information of the first GPIO signal.

[0131] The details of operations 501 to 502 may refer to the above operations 301 to 302 and will not be repeated here.

[0132] In some embodiments, FIG5 may further include the following operations: (11) the first controller communicates with the second controller via the first serial communication line to obtain operation mode information of the second controller.

[0133] In the embodiment of the present application, the first serial communication line can be an SPI communication line or a UART communication line. The first controller can not only communicate with the second controller via the first GPIO to obtain the operating mode information of the second controller (such as the operating mode of the second controller in operation 502), but also communicate with the second controller via the first serial communication line to obtain the operating mode information of the second controller. If either the first GPIO or the first serial communication line fails, the first controller can still obtain the operating mode information of the second controller, thereby ensuring the reliability of the control system operation.

[0134] In some embodiments, FIG5 may further include the following operations: (12) The first controller communicates with the second controller through the switching module to obtain operation mode information of the second controller.

[0135] In an embodiment of the present application, the first controller can not only communicate with the second controller through the first GPIO to obtain the operating mode information of the second controller (the operating mode of the second controller in operation 502), but also communicate with the second controller through the first serial communication line to obtain the operating mode information of the second controller. In addition, the first controller can also communicate with the second controller through the switching module to obtain the operating mode information of the second controller. When any one of the first GPIO, the first serial communication line, and the switching module fails or any two of them fail, the first controller can still obtain the operating mode information of the second controller, thereby ensuring the reliability of the control system operation. Effective communication and backup can be achieved between the first controller and the second controller, and a variety of communication means can be used to prevent a certain communication means from being abnormal and causing the control system to be paralyzed. When the control system is operating normally, information can be exchanged efficiently and quickly.

[0136] Operation 502, operation (11) and operation (12) may be performed simultaneously or at different times, which is not limited in this application.

[0137] In operations (11) and (12), the second controller may proactively report its own operating mode information to the first controller, or the first controller may send a corresponding request to the second controller, and the second controller may respond to the request and report its own operating mode information to the first controller. In operations (11) and (12), the operating mode information of the second controller may be the current operating mode information of the second controller.

[0138] It should be noted that when the controller is in operating modes such as power-on, firmware update, sleep, and shutdown, the controller cannot transmit its own operating mode information to other controllers through SPI, UART, or network, but can transmit its own operating mode information to other controllers through GPIO. In this way, it can adapt to the transmission of operating mode information in different operating modes and meet the timely and reliable transmission of operating mode information between controllers in operating modes such as power-on, firmware update, sleep, and shutdown.

[0139] 503. When the operation mode of the second controller is different from the expected operation mode of the second controller and / or the operation mode of the second controller is a dead mode, the first controller sends a reset signal to the reset pin of the second controller to reset the second controller.

[0140] In an embodiment of the present application, the expected operating mode of the second controller is the operating mode that the second controller should currently be in, and the operating mode of the second controller is the operating mode reported by the second controller through the first GPIO. When the operating mode of the second controller is different from the expected operating mode of the second controller, and / or the operating mode of the second controller is a dead mode, the second controller may have a fault. At this time, the first controller can reset the second controller by sending a reset signal to the reset pin of the second controller, thereby eliminating the fault of the second controller. For example, if the first controller detects that the second controller is in a dead state, and the expected operating mode of the second controller is a normal operating mode, the first controller resets the second controller by sending a reset signal to the reset pin of the second controller.

[0141] The operating mode of the second controller is different from the expected operating mode of the second controller, and / or the operating mode of the second controller is a freeze mode, including any of the following situations: the operating mode of the second controller is different from the expected operating mode of the second controller, the operating mode of the second controller is a freeze mode, the operating mode of the second controller is different from the expected operating mode of the second controller and the operating mode of the second controller is a freeze mode.

[0142] In some embodiments, FIG5 may further include the following operations: (13) After the first controller is powered on, the first controller sends the operating mode information of the first controller to the second controller via the second GPIO.

[0143] In an embodiment of the present application, after the first controller is powered on, the first controller can send a second GPIO signal to the second controller via the second GPIO. The second controller determines the operating mode of the first controller based on the waveform information carried by the second GPIO signal. The first controller and the second controller can communicate their respective operating modes to each other.

[0144] In some embodiments, FIG5 may further include the following operations: (14) After the first controller operates normally, the first controller sends the operating mode information of the first controller to the second controller via the second GPIO, the first serial communication line, and the switching module.

[0145] In the embodiment of the present application, after the first controller is operating normally, the first controller can communicate with the second controller not only via the second GPIO to send the first controller's operating mode information to the second controller, but also via the first serial communication line to send the first controller's operating mode information to the second controller. The first controller can also communicate with the second controller via the switching module to send the first controller's operating mode information to the second controller. If any one or any two of the second GPIO, the first serial communication line, and the switching module fail, the first controller can still send the first controller's operating mode information to the second controller, thereby ensuring the reliability of the control system operation.

[0146] In some embodiments, FIG5 may further include the following operations: (15) After the first controller is powered on, the first controller sends the operating mode information of the first controller to the third controller via the fourth GPIO.

[0147] In an embodiment of the present application, after the first controller is powered on, the first controller can send a fourth GPIO signal to the third controller via the fourth GPIO. The third controller determines the operating mode of the first controller based on the waveform information carried by the fourth GPIO signal. The first and third controllers can communicate their respective operating modes to each other.

[0148] In some embodiments, Figure 5 may also include the following operations: (16) After the first controller operates normally, the first controller sends the operating mode information of the first controller to the third controller through at least one communication method among the fourth GPIO, the third serial communication line, and the switching module.

[0149] In the embodiment of the present application, after the first controller operates normally, the first controller can communicate with the third controller via the fourth GPIO to send its operating mode information to the third controller; the first controller can also communicate with the third controller via the third serial communication line to send its operating mode information to the third controller; and the first controller can also communicate with the third controller via the switching module to send its operating mode information to the third controller. If any one or any two of the fourth GPIO, the third serial communication line, and the switching module fail, the first controller can still send its operating mode information to the third controller, thereby ensuring the reliability of the control system operation.

[0150] Controllers in the automotive intelligent driving domain have high safety and reliability requirements and complex control systems. Multiple MCUs and multiple SOCs are common. Using hardware GPIO to transmit operating mode information is characterized by simple hardware and software, high reliability, and a wide range of applicable scenarios. This embodiment of the application proposes a specific structural diagram of a control system for exchanging operating mode information between various controllers, providing a highly reliable and stable operating mode monitoring method for the control system in multiple scenarios.

[0151] Controllers within automotive domain control systems have numerous operating modes, including power-on, normal operation, standby, firmware update, sleep, frozen, shutting down, and shutdown. When a controller is operating normally, information exchange with other controllers is straightforward, using methods such as SPI, UART, and the network. However, various constraints limit information exchange during power-on, firmware update, sleep, and shutdown modes.

[0152] The current GPIO heartbeat method used between controllers can only transmit normal operation information, and cannot convey various operating mode information such as power-on, standby, firmware update, sleep, freeze, shutdown, etc.

[0153] Please refer to Figure 6, which is a schematic diagram of the structure of a detailed control system proposed in an embodiment of the present application. As shown in Figure 6, the control system includes two MCUs and two SOC chips, namely MCU1, MUC2, SOC1, and SOC2. To coordinate and control the entire system, MCU1 is designated as the main control chip.

[0154] MCU1 and SOC1 are connected via GPIO1, which sends a GPIO1 signal. Depending on the SOC1's operating mode, the frequency of the GPIO1 signal varies. MCU1 detects the frequency band of the GPIO1 signal to determine the SOC1's operating mode. Determining the operating mode based on GPIO signals is simpler and more reliable, adapting to a wider range of scenarios. MCU1 can make decisions and process them more quickly and directly.

[0155] MCU1 and SOC1 also communicate via SPI1 or UART1. When both SOC1 and MCU1 are in normal operation mode, SPI1 or UART1 communication can transmit richer operation mode information. For example, in addition to the operation mode, it can also include operation parameters. For example, for sleep mode, in addition to the sleep mode field, it can also transmit fields including sleep mode power consumption and sleep mode duration.

[0156] When MCU1 and SOC1 are in the normal operating mode, the operating mode information can also be transmitted through the switching module.

[0157] If MCU1 detects that SOC1 is in a dead state, MCU1 sends a reset signal (RESET1 signal) through reset signal line 1 to reset SOC1, and continues to monitor whether SOC1 is reset successfully through GPIO1, that is, monitors whether SOC1 is in power-on startup mode and then transitions to normal operating mode.

[0158] It should be noted that the GPIO1 signal in the freeze mode and shutdown mode is the same, that is, it is always high or low. The difference is that the shutdown mode must be experienced before the shutdown mode.

[0159] The connection and communication between MCU2 and SOC2 are similar to those between MCU1 and SOC1, and will not be described in detail here.

[0160] MCU2 is relatively independent of MCU1. MCU1 can send a reset signal to SOC1 via reset signal line 1 to reset SOC1, and MCU2 can send a reset signal to SOC2 via reset signal line 2 to reset SOC2. However, MCU1 cannot reset MCU2, ensuring the relative independence of the two MCUs. In the event of a malfunction of MCU1, MCU2 can still operate independently to a certain extent, preventing a complete system crash.

[0161] In Figure 6, SOC1 and SOC2 communicate using SPI4 or UART4, and GPIO7 and GPIO8 are connected between them, but SOC1 and SOC2 do not reset each other. MCU1 and MCU2 communicate using SPI3 and UART3, and GPIO4 and GPIO6 are connected between them, but MCU1 and MCU2 do not reset each other.

[0162] The communication between MCU1 and MCU2 uses SPI3 and UART3. At the same time, GPIO4 and GPIO6 are connected between MCU1 and MCU2. MCU1 and MCU2 will not reset each other.

[0163] The switch module in Figure 6 connects the dual MCUs and dual SOCs via network interfaces. The switch module connects to the MCUs using the RGMII interface, and to the SOCs using the XFI interface. Through the switch module's connections, all MCUs and SOCs can communicate freely across the network while the entire control system is operating normally.

[0164] For example, if the GPIO signal output by the MCU or SOC is a square wave, the square wave frequency of the GPIO signal output by the SOC can be specified as follows:

[0165] Power-on startup state: the square wave frequency of the GPIO signal is less than 0.2Hz;

[0166] Standby or sleep state: GPIO signal square wave frequency 0.5Hz, error ±20%;

[0167] Normal operation: The square wave frequency of the GPIO signal is 2Hz, with an error of ±5%;

[0168] Firmware update: The square wave frequency of the GPIO signal is 10Hz, with an error of ±5%;

[0169] Deep sleep or dead state: The GPIO signal level does not change and is fixed at high or low level;

[0170] During shutdown: The average square wave frequency of the GPIO signal is 0.5 Hz, with an error of ±20%. After 25 seconds, the GPIO signal level is fixed at low.

[0171] Shutdown: The GPIO signal level is fixed at low level.

[0172] The MCU detects the square wave frequency of the GPIO signal output by the SOC and the MCU to know whether the status of the SOC and the MCU is in a correct state (ie, whether the operation mode is in a normal operation mode).

[0173] The square wave frequency of the GPIO signal output by the MCU is the same as that of the SOC.

[0174] MCU1 and MCU2 can detect each other's operating mode; during some periods when the domain controller is powered on, shut down, or in deep sleep (and the MCU is in the shutdown state), the MCU itself is in an abnormal state and cannot monitor external signals.

[0175] In a domain controller, the MCU manages system startup, shutdown, power supply, and power failure functions. The SOC is passive and therefore only monitors the following states of the MCU and other SOCs: firmware update, normal operation, and abnormal state. It cannot monitor other states of the MCU.

[0176] The frequency of the SoC's shutdown, standby, and sleep states is the same. Since these SoC states are controlled by the MCU and fall within different ranges of the MCU's state machine, the MCU can distinguish them. Similarly, the MCU can distinguish between the SoC's dead and shutdown states and respond accordingly.

[0177] The SoC and MCU can ensure stable and reliable GPIO signal output when they are in normal operation mode or firmware update mode. Therefore, in normal operation mode and firmware update mode, more status information is reserved by setting the duty cycle:

[0178] Normal operation mode: The square wave average frequency of the GPIO signal is 2Hz, with an error of ±5%. The level duty cycle of the GPIO signal is 10% to 90%, with a step of 20%, and a total of 5 subdivision states, which are reserved for indicating the subdivision state.

[0179] Firmware update mode: The GPIO signal's square wave average frequency is 10 Hz, with an error of ±5%. The GPIO signal's level duty cycle ranges from 10% to 90% in 20% increments, with a total of five subdivision states, reserved for indicating the subdivision state.

[0180] In the embodiment of the present application, a control core, namely MCU1, is used to control the entire control system to ensure the uniformity of the control system control; GPIO is used between controllers to transmit operating mode information, which can adapt to multiple operating modes; GPIO is used to realize the transmission of operating mode information, which is simple in hardware and software, applicable to many scenarios, low in cost and high in reliability; GPIO transmits information of different operating modes through different square wave frequencies and frequency windows; when the control system is operating normally, a variety of backup communication means are used, such as SPI, UART, Ethernet, etc., to provide richer operating mode information interaction to meet the high reliability and high stability requirements of the automotive system.

[0181] The following uses MCU1 as an example to illustrate the process from startup to normal operation of MCU1. After powering on, MCU1 sends its own operating mode (power-on startup) information to MCU2 via GPIO4, and sends its own operating mode (power-on startup) information to SOC1 via GPIO2. When MCU1 is operating normally: MCU1 sends its own operating mode information to MCU2 via GPIO4, SPI3 / UART3, and Ethernet; MCU1 sends its own operating mode information to SOC1 via GPIO2, SPI1 / UART1, and Ethernet; MCU1 obtains MCU2's operating mode information via GPIO6, SPI3 / UART3, and Ethernet; and MCU1 obtains SOC1's operating mode information via GPIO1, SPI1 / UART1, and Ethernet.

[0182] The mesh communication method of the embodiment of the present application can realize effective communication and backup between various controllers (MCU, SOC), and the network communication and the signal communication between each controller form a complementary backup. In this way, during normal operation, the system can exchange information efficiently and quickly; when an abnormality occurs in a certain controller, the situation of complete information interruption can be avoided, such as when the network fails, and the MCU can also communicate with other controllers through the SPI and UART buses. If a controller freezes, etc., the exchange of operating mode information can still be guaranteed through the GPIO signal. Therefore, the efficiency of the control system during normal operation and the reliability in the event of an abnormality are guaranteed.

[0183] The above describes the solution of the embodiment of the present application from the perspective of the execution process of the method side. It is understandable that, in order to realize the above functions, the electronic device includes a hardware structure and / or software module corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the units and algorithm operations of each example described in the embodiment provided herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in a hardware or computer software driven hardware manner depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0184] The embodiment of the present application can divide the functional units of the electronic device according to the above method example. For example, each functional unit can be divided according to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units. It should be noted that the division of units in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0185] Please refer to FIG. 7 , which is a schematic diagram of the structure of an information transmission device provided in an embodiment of the present application. The information transmission device 700 may include a communication unit 701 and a determination unit 702 , wherein:

[0186] The communication unit 701 is configured to receive a first GPIO signal sent by the second controller through the first GPIO, where the first GPIO signal carries waveform information;

[0187] The determining unit 702 is configured to determine an operating mode of the second controller based on the waveform information of the first GPIO signal.

[0188] In some embodiments, when the waveform information of the first GPIO signal includes a first frequency, the determination unit 702 determines the operating mode of the second controller based on the waveform information of the first GPIO signal, including: determining the operating mode of the second controller based on the frequency band to which the first frequency belongs.

[0189] In some embodiments, the determination unit 702 determines the operating mode of the second controller based on the frequency band to which the first frequency belongs, including: determining the operating mode corresponding to the frequency band in which the first frequency falls based on a mapping relationship between a frequency band set and an operating mode set; the frequency band set includes at least two frequency bands, the operating mode set includes at least two operating modes, the at least two frequency bands correspond one-to-one to the at least two operating modes, any two of the at least two frequency bands do not overlap with each other, and any two of the at least two operating modes are different.

[0190] In some embodiments, the at least two operating modes include at least two of the following modes: power-on startup mode, normal operating mode, standby mode, firmware update mode, sleep mode, dead mode, shutdown mode, and shutdown mode.

[0191] In some embodiments, when the waveform information of the first GPIO signal includes level information, the determining unit 702 determines the operating mode of the second controller based on the waveform information of the first GPIO signal, including: determining the operating mode of the second controller based on the level information.

[0192] In some embodiments, when the waveform information of the first GPIO signal includes a first frequency and a first duty cycle, the determination unit 702 determines the operating mode of the second controller based on the waveform information of the first GPIO signal, including: determining the operating mode of the second controller based on the frequency band to which the first frequency belongs, and determining the subdivision state of the operating mode of the second controller based on the first duty cycle.

[0193] In some embodiments, the first controller is connected to the second controller via a second GPIO; the communication unit 701 is further configured to send operating mode information of the first controller to the second controller via the second GPIO after the first controller is powered on.

[0194] In some embodiments, the first controller is connected to the second controller via a first serial communication line, the control system further includes a switching module, and the communication unit 701 is further used to send the operating mode information of the first controller to the second controller through at least one communication method among the second GPIO, the first serial communication line, and the switching module after the first controller is operating normally.

[0195] In some embodiments, the switching module includes an RGMII interface and an XFI interface, the first controller is communicatively connected to the switching module via the RGMII interface, and the second controller is communicatively connected to the switching module via the XFI interface.

[0196] In some embodiments, the operating mode includes at least one of the following modes: power-on startup mode, normal operating mode, standby mode, firmware update mode, sleep mode, dead mode, shutdown mode, and shutdown mode.

[0197] In some embodiments, the first controller is connected to the third controller via a fourth GPIO, and the communication unit 701 is further configured to send operating mode information of the first controller to the third controller via the fourth GPIO after the first controller is powered on.

[0198] In some embodiments, the first controller is connected to the third controller via a second serial communication line, and the communication unit 701 is further used to send the operating mode information of the first controller to the third controller through at least one communication method among the third GPIO, the second serial communication line, and the switching module after the first controller is operating normally.

[0199] In some embodiments, the communication unit 701 is also used to send a reset signal to the reset pin of the second controller to reset the second controller when the operating mode of the second controller is different from the expected operating mode of the second controller and / or the operating mode of the second controller is a dead mode.

[0200] In some embodiments, the first controller and the third controller cannot be reset with each other, and the second controller and the fourth controller cannot be reset with each other.

[0201] Among them, the communication unit 701 in the embodiment of the present application may include at least one of the GPIO, SIP signal line, UART signal line, and reset signal line in the first controller, and the determination unit 702 may be a processor in the first controller.

[0202] In an embodiment of the present application, the second controller can send a first GPIO signal to the first controller through the first GPIO. The first controller determines the operating mode of the second controller based on the waveform information carried by the first GPIO signal. The operating mode of the controller can be determined by the waveform information of the GPIO signal transmitted by the GPIO, thereby increasing the amount of information transmitted between controllers through the GPIO signal.

[0203] Please refer to Figure 8, which is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. As shown in Figure 8, the electronic device 800 includes a processor 801 and a memory 802. The processor 801 and the memory 802 can be connected to each other via a communication bus 803. The communication bus 803 can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus or a controller area network (CAN) bus, etc. The communication bus 803 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in Figure 8, but it does not mean that there is only one bus or one type of bus. The memory 802 is used to store computer programs, which include program instructions. The processor 801 is configured to call program instructions. The above program includes instructions for executing some or all of the operations in the methods included in Figures 3, 5, and 7.

[0204] The processor 801 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the above program. Specifically, the processor 801 may be a processor in the above-mentioned MCU or SOC.

[0205] The memory 802 may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, an optical disc storage (including a compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may exist independently and be connected to the processor via a bus. The memory may also be integrated with the processor.

[0206] The electronic device 800 may further include a display (eg, a vehicle-mounted display screen), a speaker, a microphone, and the like.

[0207] In addition, the electronic device 800 may also include common components such as a communication interface (eg, a USB interface, a microphone interface, etc.), an antenna, etc., which will not be described in detail here.

[0208] In an embodiment of the present application, the second controller can send a first GPIO signal to the first controller through the first GPIO. The first controller determines the operating mode of the second controller based on the waveform information carried by the first GPIO signal. The operating mode of the controller can be determined by the waveform information of the GPIO signal transmitted by the GPIO, thereby increasing the amount of information transmitted between controllers through the GPIO signal.

[0209] An embodiment of the present application also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data exchange, and the computer program enables a computer to execute part or all of the operations of any one of the refueling control methods described in the above method embodiments.

[0210] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain operations can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all exemplary embodiments, and the actions and modules involved are not necessarily required by this application.

[0211] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0212] In the several embodiments provided in this application, it should be understood that the disclosed devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.

[0213] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to implement the solution of this embodiment according to actual needs.

[0214] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software program modules.

[0215] If the integrated unit is implemented in the form of a software program module and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a memory, including a number of instructions for enabling a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the operations of the methods described in each embodiment of the present application. The aforementioned memory includes: various media that can store program codes, such as a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0216] Those skilled in the art will understand that all or part of the operations in the various methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable memory, which may include: a flash drive, a read-only memory, a random access memory, a magnetic disk or an optical disk, etc.

[0217] The above is a detailed introduction to the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for those skilled in the art, according to the idea of ​​the present application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An information transmission method, characterized in that: The method is applied to a control system, the control system includes a first controller and a second controller, the first controller is connected to the second controller via a first general purpose input and output port GPIO; the method includes: The first controller receives (301, 501) a first GPIO signal sent by the second controller through the first GPIO, wherein the first GPIO signal carries waveform information; and The first controller determines (302, 502) an operation mode of the second controller based on the waveform information of the first GPIO signal.

2. The method according to claim 1, characterized in that: The waveform information of the first GPIO signal includes a first frequency, and the first controller determines the operating mode of the second controller based on the waveform information of the first GPIO signal, including: the first controller determines the operating mode of the second controller based on the frequency band to which the first frequency belongs, wherein the first frequency is the frequency of the first GPIO signal.

3. The method according to claim 1 or 2, characterized in that: The waveform information of the first GPIO signal includes level information, and the first controller determines the operation mode of the second controller based on the waveform information of the first GPIO signal, including: The first controller determines the operation mode of the second controller based on the level information.

4. The method according to any one of claims 1 to 3, characterized in that: The waveform information of the first GPIO signal includes a first frequency and a first duty cycle, and the first controller determines an operation mode of the second controller based on the waveform information of the first GPIO signal, including: The first controller determines an operation mode of the second controller based on a frequency band to which the first frequency belongs, and determines a subdivision state of the operation mode of the second controller based on the first duty cycle.

5. The method according to any one of claims 1 to 4, characterized in that: The first controller is connected to the second controller via a second GPIO; the method further includes: After the first controller is powered on and started, the first controller sends the operation mode information of the first controller to the second controller through the second GPIO.

6. The method according to any one of claims 1 to 5, characterized in that: The first controller is connected to the second controller via a second GPIO, the first controller is connected to the second controller via a first serial communication line, the control system further includes a switching module, and the method further includes: After the first controller operates normally, the first controller sends the operation mode information of the first controller to the second controller through at least one of the second GPIO, the first serial communication line, or the switching module.

7. The method according to claim 6, characterized in that The switching module includes an RGMII interface and an XFI interface, the first controller is communicatively connected to the switching module via the RGMII interface, and the second controller is communicatively connected to the switching module via the XFI interface.

8. The method according to any one of claims 1 to 7, characterized in that: The operation mode includes at least one of the following modes: a power-on startup mode, a normal operation mode, a standby mode, a firmware update mode, a sleep mode, a dead mode, a shutdown mode, or a shutdown mode.

9. The method according to any one of claims 1 to 8, characterized in that: The control system further includes a third controller and a fourth controller, the third controller is connected to the fourth controller via a third GPIO, and the method further includes: The third controller is configured to receive a third GPIO signal sent by the fourth controller through the third GPIO, wherein the third GPIO signal carries waveform information; and The third controller is further used to determine the operation mode of the fourth controller based on the waveform information of the third GPIO signal.

10. The method according to claim 9, characterized in that The first controller is connected to the third controller via a fourth GPIO, and the method further includes: After the first controller is powered on and started, the first controller sends the operation mode information of the first controller to the third controller through the fourth GPIO.

11. The method according to claim 9 or 10, characterized in that: The first controller is connected to the third controller via a fourth GPIO, the first controller is connected to the third controller via a third serial communication line, the control system further includes a switching module, and the method further includes: After the first controller operates normally, the first controller sends the operation mode information of the first controller to the third controller through at least one of the fourth GPIO, the third serial communication line, or the switching module.

12. The method according to any one of claims 1 to 11, characterized in that: After the first controller determines the operation mode of the second controller based on the waveform information of the first GPIO signal, the method further includes: When the operating mode of the second controller is different from the expected operating mode of the second controller and / or the operating mode of the second controller is a dead mode, the first controller sends (503) a reset signal to a reset pin of the second controller to reset the second controller.

13. The method according to any one of claims 9 to 11, characterized in that: After the third controller determines the operation mode of the fourth controller based on the waveform information of the third GPIO signal, the method further includes: When the operating mode of the fourth controller is different from the expected operating mode of the fourth controller and / or the operating mode of the fourth controller is a dead mode, the third controller sends a reset signal to the reset pin of the fourth controller to reset the fourth controller.

14. The method according to any one of claims 9 to 11, characterized in that: The first controller and the third controller cannot be reset with each other, and the second controller and the fourth controller cannot be reset with each other.

15. The method according to claim 2, characterized in that The first controller determines the operating mode of the second controller based on the frequency band to which the first frequency belongs, including: The first controller corresponds to the frequency band to which the first frequency belongs based on the mapping relationship between the frequency band set and the operation mode set. as the operating mode of the second controller, wherein the frequency band set includes at least two frequency bands, the operating mode set includes at least two operating modes, the at least two frequency bands correspond to the at least two operating modes one-to-one, any two of the at least two frequency bands do not overlap with each other, and any two of the at least two operating modes are different.

16. The method according to claim 2, characterized in that When the second controller is in different operation modes, the frequency of the first GPIO signal sent by the second controller is different.

17. The method according to claim 9, characterized in that The first controller or the third controller is designated as a main control chip, wherein the main control chip as a control core can ensure the control uniformity of the control system.

18. A control system, characterized in that: It comprises a first controller (10) and a second controller (20), wherein the first controller is connected to the second controller via a first general purpose input and output port (GPIO); The first controller is configured to receive, through the first GPIO, a first GPIO signal sent by the second controller, wherein the first GPIO signal carries waveform information; and The first controller is further used to determine the operation mode of the second controller based on the waveform information of the first GPIO signal.

19. An electronic device (800), characterized in that: The electronic device comprises a processor (801) and a memory (802), wherein the memory is used to store a computer program, the computer program comprises program instructions, and the processor is configured to call the program instructions so that the electronic device executes the method according to any one of claims 1 to 17.

20. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor is caused to perform the method according to any one of claims 1 to 17.

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