Semiconductor element

Abstract

A plurality of patterns (10, 11, 12) are formed in different layers of a plurality of stacked layers (7, 8, 9) of a semiconductor element (1). The plurality of patterns (10, 11, 12) are obtained by dividing a two-dimensional code of ID information.

Description

semiconductor elements

[0001] The present disclosure relates to semiconductor devices.

[0002] To achieve traceability for semiconductor devices, it is necessary to form ID information within the device that can identify the product type, lot number, wafer number, chip address, etc. However, small devices have the problem of not being able to secure the space to form the ID information. To address this issue, it has been proposed to divide the two-dimensional code for the ID information and place it in multiple surplus spaces on the surface of the device (see, for example, Patent Document 1).

[0003] Japanese Patent Application Publication No. 2006-351620

[0004] However, when the element size is small and there is not enough free space on the element surface, there is a problem that even if the two-dimensional code is divided, it cannot be completely formed on the element surface.

[0005] The present disclosure has been made to solve the above-mentioned problems, and its purpose is to obtain a semiconductor element that can form a two-dimensional code even when the element size is small.

[0006] The semiconductor element according to the present disclosure comprises a plurality of stacked layers and a plurality of patterns formed on different levels of the plurality of layers, and the plurality of patterns are characterized by being divided two-dimensional codes of ID information.

[0007] In this disclosure, multiple patterns obtained by dividing a two-dimensional code are formed not only on the surface of the element but also between layers inside the element. By dividing and arranging the two-dimensional code three-dimensionally in the excess space inside the element, including not only the planar direction but also the vertical direction, it is possible to form a two-dimensional code even if the element size is small.

[0008] FIG. 1 is a plan view showing a semiconductor element according to a first embodiment. FIG. 2 is a cross-sectional view showing excess space in the semiconductor element according to the first embodiment. FIG. 3 is a diagram showing an apparatus for reading a two-dimensional code in a semiconductor element according to the first embodiment. FIG. 4 is a diagram showing an example of a method for reading a two-dimensional code in a semiconductor element according to the first embodiment. FIG. 5 is a diagram showing another example of a method for reading a two-dimensional code in a semiconductor element according to the first embodiment. FIG. 6 is a cross-sectional view showing excess space in a semiconductor element according to a second embodiment. FIG. 7 is a cross-sectional view showing excess space in a semiconductor element according to a third embodiment. FIG. 8 is a diagram showing an apparatus for reading a two-dimensional code in a semiconductor element according to the third embodiment.

[0009] A semiconductor device according to an embodiment will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repeated description may be omitted.

[0010] First Embodiment. Figure 1 is a plan view showing a semiconductor device according to a first embodiment. This semiconductor device 1 is, for example, a chip for optical communications, and has an active region such as a waveguide 2 through which current flows during operation. Metal electrodes 3, 4, and 5 are formed on the top surface of the semiconductor device 1. The metal electrodes 3, 4, and 5 are connected to the active region. The semiconductor device 1 has a surplus space 6 where the active region and the metal electrodes 3, 4, and 5 are not formed.

[0011] 2 is a cross-sectional view showing the excess space of the semiconductor element according to the first embodiment. The semiconductor element has multiple stacked layers. Specifically, a semiconductor layer 8 is formed on a semiconductor substrate 7, and an insulating film 9 is formed on the semiconductor layer 8. A pattern 10 is formed between the semiconductor substrate 7 and the semiconductor layer 8. A pattern 11 is formed between the semiconductor layer 8 and the insulating film 9. A pattern 12 is formed on the insulating film 9. That is, multiple patterns 10, 11, and 12 are formed on different levels of multiple layers of the semiconductor element. The multiple patterns 10, 11, and 12 are divided two-dimensional codes of ID information indicating the product type, lot number, wafer number, or chip address.

[0012] Each of the patterns 10, 11, and 12 is made up of, for example, 18×18 dots. The size of the dots is, for example, 3 μm or more. The patterns 10, 11, and 12 may or may not overlap each other in the vertical direction.

[0013] The semiconductor substrate 7 is, for example, an InP substrate, but may also be a Si substrate or a SiC substrate. The semiconductor layer 8 is, for example, an InP layer, but may also be an insulating resin film such as BCB or polyimide. The insulating film 9 is, for example, a SiO ２ Alternatively, it may be made of SiN or an insulating resin film such as BCB or polyimide.

[0014] The patterns 10 and 11 are made of InGaAsP, and are made of a material different from the surrounding semiconductor substrate 7, semiconductor layer 8, and insulating film 9. The pattern 12 is made of SiO ２ Alternatively, the patterns 10 and 11 are left as insulating films such as SiN. ２ Alternatively, it may be changed to an insulating film such as SiN.

[0015] A typical semiconductor device manufacturing process includes a step of growing semiconductor crystals such as InP layers and InGaAsP layers on an InP substrate, a step of processing and patterning the grown crystals, and a step of forming an insulating film after the semiconductor crystals have been grown. Patterns 10 and 11 can be formed simultaneously with the step of patterning the InGaAsP layer of this semiconductor device. Furthermore, pattern 12 can be formed by patterning the insulating film of the semiconductor device.

[0016] 3 is a diagram showing an apparatus for reading a two-dimensional code on a semiconductor element according to the first embodiment. This apparatus has a reflective microscope and a transmission microscope. In the reflective microscope, light emitted from a reflected illumination light source 13 is irradiated onto the semiconductor element 1 via an objective lens 14. The light reflected by the semiconductor element 1 is observed by a camera 16 via an imaging lens 15. On the other hand, in the transmission microscope, light emitted from a transmitted illumination light source 17 is irradiated onto the semiconductor element 1 via a condenser lens 18. The light transmitted through the semiconductor element 1 is observed by the camera 16.

[0017] The light emitted from the reflected illumination light source 13 is, for example, visible light, and the light emitted from the transmitted illumination light source 17 is, for example, infrared light. Since neither visible light nor infrared light passes through metal, a two-dimensional code is formed in the excess space 6 where the metal electrodes 3, 4, and 5 are not formed. For example, by observing the pattern 12 made of an insulating film with a short transmission wavelength with a visible light reflection microscope and observing the patterns 10 and 11, which do not transmit infrared light, with an infrared transmission microscope, a high-contrast two-dimensional code image can be obtained.

[0018] 4 is a diagram showing an example of a method for reading a two-dimensional code on a semiconductor element according to the first embodiment. Even though the patterns 10, 11, and 12 are transparent to infrared rays, the transmittance is not 100%, and therefore, the patterns can be recognized by observing the pattern by focusing on the position of each pattern. Therefore, an infrared transmission microscope or the like is used to read the patterns 10, 11, and 12 of each layer while changing the focal position. The read patterns 10, 11, and 12 are subjected to image processing to restore the original two-dimensional code, and the ID information is read.

[0019] FIG. 5 is a diagram showing another example of a method for reading a two-dimensional code on a semiconductor element according to the first embodiment. The layers of a semiconductor element are made of materials with different transmission wavelength ranges. Each material, such as a semiconductor layer and an insulating film, has its own transmission wavelength range, and transmits light through that range. The light energy E and wavelength λ are related by E = hc / λ (h: Planck's constant, c: speed of light). Therefore, E [eV] = 1240 / λ [nm]. On the other hand, if the band gap energy inherent to a material is Eg, it is considered that light with a wavelength λ satisfying E < Eg passes through the material, and light with a wavelength λ satisfying λ [nm] > 1240 / Eg [eV] passes through the material. For example, in the case of InP, if Eg = 1.35 eV, then λ ≈ 919 nm is the lower limit of the transmission wavelength. However, the lower limit of the transmission wavelength varies depending on the uniformity of the crystal and the presence of impurities. Furthermore, In １－ｘ Ga ｘ As ｙ P １－ｙ In the quaternary mixed crystals such as those mentioned above, the lower limit of the transmission wavelength varies within the range of 1.0 to 1.7 μm depending on the composition ratio of the elements.

[0020] The wavelengths of the emitted light from the infrared transmission microscope are changed to A, B, and C to read the patterns 10, 11, and 12 formed on the multiple layers, respectively. This ensures high contrast during reading, and improves the restoration and reading accuracy of the two-dimensional code. For example, wavelength A is 380 nm to 780 nm in the visible light band when a reflection microscope is used, and 1000 nm or more when an infrared transmission microscope is used, and wavelengths B and C are 1400 nm or more.

[0021] As explained above, in this embodiment, multiple patterns obtained by dividing the two-dimensional code are formed not only on the surface of the element but also between layers inside the element. By dividing and arranging the two-dimensional code three-dimensionally in the excess space inside the element, including not only the planar direction but also the vertical direction, it is possible to form a two-dimensional code even if the element size is small. As a result, traceability can be achieved.

[0022] In this embodiment, the two-dimensional code is divided into three layers, but the invention is not limited to this and the two-dimensional code may be divided into two or more layers. The number of divisions and the shape of the two-dimensional code are arbitrary.

[0023] Furthermore, the patterns 10, 11, and 12 are arranged in positions where they at least partially overlap each other in a plan view. This allows the two-dimensional code to be formed in a minimum amount of excess space. However, it is desirable that the materials of the patterns 10, 11, and 12 arranged in overlapping positions are not opaque materials but materials with equivalent transmission wavelength ranges.

[0024] Second Embodiment. Figure 6 is a cross-sectional view showing the excess space of a semiconductor element according to the second embodiment. Pattern 10 is a concave-convex pattern formed by processing the surface of semiconductor substrate 7. Pattern 11 is a concave-convex pattern formed by processing the surface of semiconductor layer 8. By forming patterns 10 and 11 into concave-convex patterns, it is not necessary to form another material between the layers of the semiconductor element, and the process can be simplified. Note that although pattern 12 is a remaining pattern, it is not limited to this, and may be a concave-convex pattern formed by processing the surface of the layer one layer below while leaving the top layer of insulating film 9 intact. The other configurations and effects are the same as those of the first embodiment.

[0025] Third Embodiment Figure 7 is a cross-sectional view showing the excess space of a semiconductor element according to a third embodiment. The side surfaces of a plurality of patterns 10, 11, and 12 are inclined. The other configurations are the same as those of the second embodiment. Note that the side surfaces of the remaining patterns of the first embodiment may also be inclined.

[0026] 8 is a diagram showing an apparatus for reading a two-dimensional code on a semiconductor element according to embodiment 3. This apparatus is a differential interference microscope. Light emitted from a light source 19 is irradiated onto a semiconductor element 1 via a polarizing plate 20 (polarizer), a DIC prism 21, and a condenser lens 22. The light transmitted through the semiconductor element 1 is observed by a camera 16 via an objective lens 23, a DIC prism 24, and a polarizing plate 25 (analyzer).

[0027] In this way, polarizing plates 20 and 25 are provided on the light source 19 side or the camera 16 side of the differential interference microscope, and patterns 10, 11, and 12 are read using a principle known as differential interference. In differential interference, light from light source 19 is split into two polarized lights by polarizing plate 20 and DIC prism 21. The two polarized lights pass through two slightly different points on semiconductor device 1 and are then combined again by DIC prism 24. If there is an optical path difference between the two polarized lights, interference occurs. At gradient portions such as pattern boundaries, the optical path difference between the two polarized lights becomes large, making interference more likely to occur and resulting in high contrast. Therefore, the side surfaces of the dot patterns of patterns 10, 11, and 12 are made inclined. When such dot patterns are observed with a differential interference microscope, contrast is enhanced, improving the accuracy of reading two-dimensional codes.

[0028] 1 Semiconductor element, 2 Waveguide (active region), 3, 4, 5 Metal electrode, 7 Semiconductor substrate, 8 Semiconductor layer, 9 Insulating film, 10, 11, 12 Pattern

Claims

1. A semiconductor device comprising a plurality of stacked layers and a plurality of patterns formed on different levels of the plurality of layers, the plurality of patterns being divisions of a two-dimensional code of ID information.

2. The semiconductor device according to claim 1, comprising: an active region through which current flows during operation; a metal electrode connected to said active region; and excess space in which said active region and said metal electrode are not formed, said plurality of patterns being formed in said excess space.

3. The semiconductor device according to claim 1 or 2, wherein the ID information indicates a product type, a lot number, a wafer number or a chip address.

4. A semiconductor element according to any one of claims 1 to 3, characterized in that the multiple patterns are arranged in positions where at least a portion of each pattern overlaps with one another in a plan view.

5. A semiconductor device according to any one of claims 1 to 4, characterized in that the plurality of layers are made of materials having different transmission wavelength ranges.

6. A semiconductor device according to any one of claims 1 to 5, wherein the plurality of patterns include a pattern made of a material different from that of the plurality of layers.

7. A semiconductor element according to any one of claims 1 to 5, characterized in that the plurality of patterns have uneven patterns formed by processing the surfaces of the plurality of layers.

8. The semiconductor element according to any one of claims 1 to 7, wherein the side surfaces of the plurality of patterns are inclined surfaces.

Images