Substrate structure and power supply device
The substrate structure for power supply devices incorporates a resist layer and a high-adhesion coating layer to address migration issues between conductor patterns, ensuring effective insulation in high temperature and humidity environments.
Patent Information
- Application Number
- PCT/JP2023/039515
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-11-01
- Publication Date
- 2025-05-08
AI Technical Summary
In power supply devices with DC/DC converter circuits, the resist layer on the electronic substrate can peel off in high temperature and humidity environments, leading to potential migration issues between conductor patterns with large voltage differences.
A substrate structure is implemented where a resist layer covers the main surface of the substrate, and a coating layer with higher adhesion than the resist layer is applied in the region between the conductor patterns, ensuring insulation even if the resist layer peels off.
This configuration effectively suppresses migration between conductor patterns by maintaining insulation and preventing ionized metal movement, even in harsh environmental conditions.
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Figure JP2023039515_08052025_PF_FP_ABST
Abstract
Description
Board structure and power supply unit
[0001] The present disclosure relates to a substrate structure and a power supply device.
[0002] 2. Description of the Related Art A power supply device having an electronic board including a DC / DC converter circuit is known (see, for example, Patent Document 1). A resist layer is formed on the surface of the electronic board of the DC / DC converter circuit.
[0003] Japanese Patent Application Laid-Open No. 2001-24344
[0004] When a power supply device is used in a vehicle engine compartment or the like, the electronic circuit board is exposed to a high-temperature, high-humidity environment. In this case, the resist layer may peel off from the board. Meanwhile, a pair of conductor patterns with a large voltage difference may be formed side by side on the board. If the resist layer peels off between the pair of conductor patterns, ionized metals move along the surface of the board, causing the problem of migration.
[0005] Therefore, an object of the present disclosure is to provide a substrate structure and a power supply device that can suppress migration.
[0006] A substrate structure according to one aspect of the present disclosure comprises a substrate, a pair of conductor patterns formed on a main surface of the substrate and spaced apart from each other, and a resist layer covering the main surface of the substrate, wherein in at least a portion of the region between the pair of conductor patterns, a coating layer having higher adhesiveness than the resist layer covers the substrate while in contact with the substrate.
[0007] A substrate structure according to one aspect of the present disclosure has a pair of conductor patterns formed on a main surface of the substrate and spaced apart from each other. In contrast, a coating layer having higher adhesiveness than a resist layer covers the substrate in contact with the substrate in at least a portion of the region between the pair of conductor patterns. With this structure, even if the resist layer peels off from the main surface of the substrate, the coating layer in contact with the substrate with high adhesiveness can ensure insulation in the region between the pair of conductor patterns. Therefore, migration between the pair of conductor patterns can be suppressed. As a result, migration can be suppressed.
[0008] The resist layer may have openings that are open to at least a portion of the region and the conductor pattern, and the coating layer may be formed in the openings. In this case, the coating layer can protect a wide area including the vicinity of the conductor pattern.
[0009] The resist layer may cover the conductive pattern, and an opening that opens to at least a part of the region may be formed in the resist layer, and the coating layer may be formed in the opening. In this case, the amount of the coating layer can be reduced compared to when the conductive pattern is covered with the coating layer.
[0010] The resist layer may have a first opening at a position on one of the conductive patterns and a second opening at a position on the other of the conductive patterns, the resist layer remaining between the first and second openings, and the coating layer formed in the first and second openings. In this case, leaving the resist layer remaining can prevent solder from adhering to the main surface of the substrate.
[0011] In the region between the pair of conductive patterns, the planar shape of the main surface of the substrate may be continuous from one conductive pattern to the other. Migration can be suppressed by the coating layer without forming a slit in the substrate.
[0012] The resist layer may have an opening that is open to at least a part of the region, and the coating layer may cover the resist layer at the edge of the opening, thereby improving adhesion at the interface between the resist layer and the coating layer.
[0013] The conductor patterns may extend parallel to each other, in which case the distance between the conductor patterns is constant, allowing the same insulating structure to be applied in the direction in which the conductor patterns extend.
[0014] A power supply device according to one aspect of the present disclosure may have the above-described substrate structure.
[0015] This power supply device can provide the same functions and effects as the above-mentioned board structure.
[0016] According to one aspect of the present disclosure, it is possible to provide a substrate structure and a power supply device that can suppress migration.
[0017] FIG. 3( a) shows a power supply device according to an embodiment of the present disclosure. FIG. 3( b) is a circuit diagram showing a DC / DC converter circuit according to an embodiment of the present disclosure. FIG. 3( a) is a plan view of a substrate structure, and FIG. 3( b) is a cross-sectional view taken along line IIIb-IIIb shown in FIG. 3( a). FIG. 3( b) is an enlarged view showing a structure near an end portion in the width direction of a coating layer. FIG. 3( a) is a diagram explaining a method for manufacturing a substrate structure. FIG. 3( b) is a diagram showing a substrate structure according to a comparative example. FIG. 3( c) is a diagram showing a substrate structure according to a comparative example. FIG. 8( a) and (b) show a substrate structure according to a comparative example, and FIG. 8( c) is a diagram showing a substrate structure according to a modified example. FIG. 8( c) is a diagram showing a substrate structure according to a modified example. FIG. 8( a) is a diagram showing a substrate structure according to a modified example. FIG. 8( c) is a diagram showing a substrate structure according to a modified example. FIG. 8( c) is a diagram showing a substrate structure according to a modified example. FIG. 8( c) is a diagram showing a substrate structure according to a modified example. FIG. 8( c) is a diagram showing a substrate structure according to a modified example.
[0018] Hereinafter, several embodiments of the present disclosure will be described in detail, but the present disclosure is not limited to the following embodiments.
[0019] A power supply device 100 including a substrate structure according to an embodiment of the present disclosure will be described with reference to Fig. 1. Fig. 1 shows the power supply device 100 according to an embodiment of the present disclosure.
[0020] As shown in Figure 1, the power supply unit 100 is constructed by assembling a cover 4 to a housing member 2 that houses an electronic board 3. The power supply unit 100 is, for example, a unit such as a DC / DC converter. The electronic board 3 includes a DC / DC converter circuit. The power supply unit 100 is installed, for example, in the engine compartment of an automobile and is used in a high-temperature, high-humidity environment.
[0021] Next, an example of a DC / DC converter circuit having the substrate structure 1 according to this embodiment will be described. Fig. 2 is a circuit diagram showing a DC / DC converter circuit 105 according to an embodiment of the present disclosure. As shown in Fig. 2, the DC / DC converter circuit 105 includes a DC power supply circuit 110, an inverter circuit 120, and a DC voltage supply unit 140.
[0022] The DC power supply circuit 110 includes a smoothing capacitor Ci connected to a power supply ES1. The inverter circuit 120 converts DC voltage into high-frequency AC voltage. The inverter circuit 120 forms a bridge circuit with a first switching element SW1 and a third switching element SW3 connected to the positive output of the DC power supply circuit 110, a fourth switching element SW4 facing the first switching element SW1, and a second switching element SW2 facing the third switching element SW3. A branch point DP1 between the first switching element SW1 and the second switching element SW2 and a branch point DP2 between the third switching element SW3 and the fourth switching element SW4 are connected to a main transformer MT via a reactor Lr and a reactor Lr. A control unit DR1 is provided outside the power circuit system. The control unit DR1 is connected to the switching elements SW1 to SW4 via lines L4 to L7 and controls the switching elements SW1 to SW4. Lines A to D of L4 to L7 drawn from the control unit DR1 are extended to portions A to D of the switching elements SW1 to SW4. The control unit DR1 is connected to secondary-side synchronous rectification switches (portions indicated by E and F) of a rectifier circuit 135 (described later) and controls these switches.
[0023] The DC voltage supply unit 140 includes a rectifier circuit 135 that rectifies the output of the main transformer MT and converts it into a DC voltage, a DC reactor Lch, and a capacitor Co. The DC voltage supply unit 140 supplies a desired DC voltage to the power supply ES2. The main transformer MT is a transformer that converts a high-frequency AC voltage on the primary side into a voltage suitable for output.
[0024] The DC / DC converter circuit 105 includes a high-voltage section 150 to which a high voltage is applied. The line L1 between the power supply HV and the third switching element SW3 constitutes the high-voltage section 150. The voltage at the high-voltage section 150 is not particularly limited, but is, for example, 400 to 800 V. The DC / DC converter circuit 105 also includes a low-voltage section 151 adjacent to the high-voltage section 150 and having a lower voltage. Specifically, the line L2 between the power supply HV and the branch point DP3 (branched to the smoothing capacitor Ci) constitutes the low-voltage section 151, where the voltage is low. The line L3 between the branch point DP1 and the main transformer MT constitutes the low-voltage section 151. The lines L4 to L7 that input signals to the switching elements SW1 to SW4 constitute the low-voltage section 151.
[0025] Next, a substrate structure 1 according to this embodiment will be described with reference to Fig. 3. Fig. 3(a) is a plan view of the substrate structure 1. Fig. 3(b) is a cross-sectional view taken along line IIIb-IIIb in Fig. 3(a). The substrate structure 1 is a structure applied to the vicinity of the high-voltage section 150 and the low-voltage section 151 of the electronic substrate 3 (see Fig. 1). As shown in Fig. 3, the substrate structure 1 includes a substrate 6, a pair of conductor patterns 7A, 7B, a resist layer 8, and a coating layer 9.
[0026] The substrate 6 is a flat base member on which electronic components (not shown) are mounted. The substrate 6 has a main surface 6a on which the electronic components are mounted. In the following description, the direction perpendicular to the main surface 6a is defined as the up-down direction, and the main surface 6a side is defined as the "upper side." However, the up-down direction here is set for convenience and does not limit the position of the power supply device 100 (see FIG. 1) during use. The substrate 6 includes ceramic sheets and conductive layers, and is formed by laminating these. The material of the substrate 6 is not particularly limited, but may be, for example, glass epoxy, ceramic, etc. Multiple conductive layers 11 are formed inside the substrate 6.
[0027] The conductor patterns 7A, 7B are formed on the main surface 6a of the substrate 6. The conductor patterns 7A, 7B extend in a predetermined direction and are spaced apart from each other. The direction in which the conductor patterns 7A, 7B extend is defined as the extension direction D1, and the direction in which the conductor patterns 7A, 7B are spaced apart is defined as the width direction D2. In this embodiment, the conductor patterns 7A, 7B extend linearly in the extension direction D1. One conductor pattern 7A and the other conductor pattern 7B extend parallel to each other. The conductor patterns 7A, 7B may be made of any conductive material, and may be made of any material, such as Cu or tungsten.
[0028] Here, one conductor pattern 7A is a conductor pattern of the high-voltage section 150 to which a high voltage is applied. Conductor pattern 7A is a pattern corresponding to line L1 (see FIG. 2). The other conductor pattern 7B is a conductor pattern of the low-voltage section 151 to which a low voltage is applied. Conductor pattern 7B is a pattern corresponding to any of lines L2, L3, L4 to L7 (see FIG. 2) included in the low-voltage section 151. In this way, the high-voltage section 150 and the low-voltage section 151 are arranged side by side with a large potential difference between them. The separation distance between the conductor patterns 7A and 7B in the width direction D2 is not particularly limited, but may be set in the range of 0.1 to 5 mm from the viewpoint of miniaturization.
[0029] The region between the pair of conductor patterns 7A and 7B is referred to as "region E1." Region E1 indicates the portion where the planar shape of the principal surface 6a of the substrate 6 is continuous from one conductor pattern 7A to the other conductor pattern 7B. For example, if a slit (see FIGS. 5 and 6 ) that is a recess in the substrate 6 is present in region E1, the planar shape of the principal surface 6a is divided at the slit portion. Therefore, the planar shape of the principal surface 6a is continuous in region E1, resulting in a configuration where no slits or the like are present.
[0030] The resist layer 8 is a layer that covers the main surface 6a of the substrate 6. The resist layer 8 can prevent solder or the like from accidentally adhering to the main surface 6a of the substrate 6. The material of the resist layer 8 is not particularly limited, but for example, an epoxy resin or the like may be used. The thickness of the resist layer 8 is also not particularly limited, but may be 0 to 150 μm. The resist layer 8 has lower insulating properties than the coating layer 9 and does not meet a predetermined standard value. For example, the resist layer 8 is less than 10 μm, which is the standard value for insulating properties.
[0031] An opening 12 is formed in the resist layer 8, and the opening 12 faces the region E1 and the conductor patterns 7A and 7B. In this embodiment, the opening 12 extends further outward in the width direction D2 than the conductor patterns 7A and 7B. The opening 12 extends along the extension direction D1. In a plan view, the edge 12a of the opening 12 extends linearly so as to be parallel to the conductor patterns 7A and 7B. In the opening 12, the resist layer 8 is not present in a plan view. Therefore, in the opening 12, the main surface 6a is exposed and not covered by the resist layer 8.
[0032] The coating layer 9 is formed in the opening 12 to cover the principal surface 6a. As a result, the coating layer 9 covers the substrate 6 in contact with the substrate 6 in at least a portion of the region E1 between the pair of conductor patterns 7A and 7B. In this embodiment, the coating layer 9 covers the substrate 6 in the entire region E1 and in the portion outside the conductor patterns 7A and 7B in the width direction D2, corresponding to the opening 12, and is in contact with the principal surface 6a. Furthermore, by covering the conductor patterns 7A and 7B, the coating layer 9 also comes into contact with the top and side surfaces of the conductor patterns 7A and 7B. The top surface of the coating layer 9 is positioned higher than the top surface of the resist layer 8. The coating layer 9 has higher insulating properties than the resist layer 8. The material of the coating layer 9 is not particularly limited as long as it has insulating properties, but examples thereof include silicone and acrylic. The coating layer 9 has a thickness of 10 μm or greater, which is the standard value for insulating properties. Furthermore, the coating layer 9 has higher adhesion to the substrate 6 than the resist layer 8. The coating layer 9 has higher adhesion durability to the substrate 6 after durability testing than the resist layer 8. Note that "after durability testing" refers to after the power supply device 100 has been used for a predetermined period of time in a high-temperature, high-humidity environment such as an engine compartment. For example, the adhesion or cohesion durability of the coating layer 9 to the substrate 6 is 0.1 MPa or more.
[0033] 4 is an enlarged view showing the structure of the coating layer 9 near the end 9a in the width direction D2. As shown in FIG. 4( a), the end 9a of the coating layer 9 may extend to the position of the inner circumferential surface 12b of the opening 12. This results in a structure in which the coating layer 9 does not extend up to the resist layer 8 at the edge 12a of the opening 12. Furthermore, as shown in FIG. 4( b), the end 9a of the coating layer 9 may extend further outward in the width direction D2 than the inner circumferential surface 12b of the opening 12. This results in the coating layer 9 covering the resist layer 8 at the edge 12a of the opening 12.
[0034] A method for manufacturing the substrate structure 1 will be described with reference to Figure 5. The upper parts of Figures 5(a) and (b) show plan views of the substrate structure 1, and the lower parts show cross-sectional views of the substrate structure. As shown in Figure 5(a), conductor patterns 7A and 7B are formed on the main surface 6a of the substrate 6. Next, as shown in Figure 5(b), a resist layer 8 is formed on the main surface 6a of the substrate 6. At this time, openings 12 are formed in the resist layer 8. Next, as shown in Figure 3, the openings 12 are filled with a coating material to form a coating layer 9.
[0035] Next, the functions and effects of the substrate structure 1 and the power supply device 100 according to this embodiment will be described.
[0036] First, a substrate structure 200 according to Comparative Example 1 will be described with reference to FIG. 6 . As shown in FIGS. 6( a) and 6(b), in the substrate structure 200 according to Comparative Example 1, the entire main surface 6a of the substrate 6 is covered with a resist layer 8. When a power supply device is used in a vehicle engine compartment, the electronic substrate is exposed to a high-temperature, high-humidity environment. In this case, the resist layer 8 may peel off from the substrate 6. Meanwhile, a pair of conductor patterns 7A and 7B with a large voltage difference are formed side by side on the substrate 6. Peeling of the resist layer 8 between the pair of conductor patterns 7A and 7B, and because the resist layer 8 is not made of an insulating material, ionized metals may migrate along the surface of the substrate 6, resulting in migration. This problem also occurs when a coating layer is applied to the region E1 above the resist layer 8. Meanwhile, as shown in FIG. 6(c), suppressing migration by increasing the distance between the conductor patterns 7A and 7B results in an increase in the size of the substrate structure 200.
[0037] A substrate structure 300 according to Comparative Example 2 will be described with reference to FIGS. 7 and 8 . As shown in FIGS. 7 and 8 , the substrate structure 300 according to Comparative Example 2 suppresses migration by providing a slit ST penetrating the substrate 6 in region E. As shown in FIG. 7( a), a substrate 6 is prepared with an increased distance between the conductor patterns 7A and 7B. As shown in FIG. 7( b), a slit ST is formed in region E1. Here, the slit ST is formed so that the insulation distance between the end of the conductive layer 11 in the substrate 6 and the inner surface of the slit ST is X. However, since the slit ST is formed by machining, processing costs increase. Furthermore, region E1 must be enlarged to ensure the insulation distance. This increases the substrate size. Furthermore, when high voltage is applied, moisture and other contaminants may easily penetrate through gaps between the layers of the substrate 6 at the slit ST, potentially causing migration. For example, moisture may penetrate through gaps between the prepreg materials between the layers of the substrate 6, potentially causing migration in the conductive layer 11, which is an intralayer pattern.
[0038] To reduce the board size, a board with a short distance between the conductor patterns 7A and 7B is prepared as shown in FIG. 8(a), and a slit ST is formed in region E1 as shown in FIG. 8(b). Here, the conductive layer 11 is exposed on the inner surface of the slit ST. This also requires machining the slit ST, increasing processing costs. Furthermore, the exposed conductive layer 11 on the inner surface of the slit ST can cause corrosion of the conductive layer 11 and poor insulation due to moisture. This can also result in insufficient insulation distance between layers (thickness direction). Alternatively, a board structure 400 can be employed in which a coating layer 9 is formed by filling the slit ST with a resin material. However, compared to the configuration shown in FIG. 3, the resin material must be applied with consideration for viscosity and curing properties to fill the narrow slit ST. In the structure shown in FIG. 7(b), a coating layer may be formed on the slit ST.
[0039] In contrast, the substrate structure 1 according to this embodiment has a pair of conductor patterns 7A, 7B formed on the principal surface 6a of the substrate 6 and spaced apart from each other. In contrast, in at least a portion of the region E1 between the pair of conductor patterns 7A, 7B, a coating layer 9 having higher adhesiveness than the resist layer 8 covers the substrate 6 while in contact with the substrate 6. With this structure, even if the resist layer 8 peels off from the principal surface 6a of the substrate 6, the coating layer 9, which is in contact with the substrate 6 with high adhesiveness, can ensure insulation in the region E1 between the pair of conductor patterns 7A, 7B. Therefore, migration between the pair of conductor patterns 7A, 7B can be suppressed. As a result, migration can be suppressed.
[0040] An opening 12 that is open to at least a part of the region E1 and the conductor patterns 7A and 7B may be formed in the resist layer 8, and the coating layer 9 may be formed in the opening 12. In this case, a wide range including the vicinity of the conductor patterns 7A and 7B can be protected by the coating layer 9.
[0041] In the region E1 between the pair of conductor patterns 7A and 7B, the planar shape of the main surface 6a of the substrate 6 may be continuous from one conductor pattern 7A to the other conductor pattern 7B. Migration can be suppressed by the coating layer 9 without forming a slit ST in the substrate 6. Compared to the substrate structure 400 of FIG. 8(c), migration can be suppressed while reducing processing costs.
[0042] An opening 12 that opens to at least a part of the region E1 is formed in the resist layer 8, and the coating layer 9 may cover the resist layer 8 at an edge 12a of the opening 12. In this case, the adhesion at the boundary between the resist layer 8 and the coating layer 9 can be improved.
[0043] The conductor patterns 7A and 7B may extend parallel to each other, and in this case, the distance between the conductor patterns 7A and 7B is constant, so that the same insulating structure can be applied to the extending direction D1 of the conductor patterns 7A and 7B.
[0044] The power supply device 100 according to this embodiment may have the substrate structure 1 described above.
[0045] According to this power supply device 100, the same functions and effects as those of the substrate structure 1 described above can be obtained.
[0046] The present invention is not limited to the above-described embodiments.
[0047] For example, the structure shown in Fig. 9 may be employed. As shown in Fig. 9(c), the resist layer 8 covers the conductor patterns 7A and 7B, and an opening 12 that opens to at least a part of the region E1 is formed in the resist layer 8, and the coating layer 9 may be formed in the opening 12. In this case, the amount of the coating layer 9 can be reduced compared to when the conductor patterns 7A and 7B are covered with the coating layer 9.
[0048] During manufacturing, as shown in Fig. 9(a), conductor patterns 7A and 7B are formed on the main surface 6a of the substrate 6. Next, as shown in Fig. 9(b), a resist layer 8 is formed on the main surface 6a of the substrate 6 and on the conductor patterns 7A and 7B. At this time, openings 12 are formed in the resist layer 8. Next, as shown in Fig. 9(c), a coating material is filled into the openings 12 to form a coating layer 9.
[0049] 9( d ) and 9 ( e ) are enlarged views showing the structure near the end 9 a of the coating layer 9. As shown in FIG. 9( d ), the end 9 a of the coating layer 9 may extend up to the position of the inner circumferential surface 12 b of the opening 12. This results in a structure in which the coating layer 9 does not extend up to the resist layer 8 at the edge 12 a of the opening 12. Furthermore, as shown in FIG. 9( e ), the end 9 a of the coating layer 9 may extend further toward the conductor pattern 7B than the inner circumferential surface 12 b of the opening 12. This results in the coating layer 9 covering the resist layer 8 at the edge 12 a of the opening 12.
[0050] The structure shown in FIG. 10 may be employed. As shown in FIGS. 10(b) and 10(c), a first opening 12A is formed in the resist layer 8 at a position on the conductor pattern 7A side of the region E1, and a second opening 12B is formed in the resist layer 8 at a position on the conductor pattern 7B side of the region E1. The resist layer 8 remains between the first opening 12A and the second opening 12B. Note that in FIG. 10, the portion of the resist layer 8 remaining between the openings 12A and 12B is shown as a remaining portion 8a. The coating layer 9 may be formed in the first opening 12A and the second opening 12B. As shown in FIG. 10(a), a resist layer 8 having openings 12A and 12B formed therein is formed on the substrate 6. In contrast, in FIG. 10(b), the coating layer 9 is formed so as to cover both the openings 12A and 12B. In FIG. 10(c), the coating layer 9 is formed individually for each of the openings 12A and 12B. In this case, by leaving the resist layer 8 between the conductive patterns 7A and 7B, it is possible to prevent the solder from adhering to the main surface 6a of the substrate 6.
[0051] The structure shown in Fig. 11 may be employed. As shown in Fig. 11(b), the resist layer 8 may cover a portion of the conductor pattern 7A. An opening 12 is provided in the region E1 and the conductor patterns 7A and 7B. A portion of the conductor pattern 7A is covered by a cover portion 13 of the resist layer 8. As shown in Fig. 11(a), the opening 12 is formed in the substrate 6, and a resist layer 8 having the cover portion 13 is formed. In response to this, as shown in Fig. 11(b), a coating layer 9 is formed on the opening 12 and the cover portion 13.
[0052] The structure shown in FIG. 12 may be employed. As shown in FIG. 12(b), one of the conductor patterns 7A is not a linear pattern but a solid pattern that extends in a plane. A resist layer 8 is formed to cover the planar conductor pattern 7A and the linear conductor pattern 7B. Openings 12 are provided in region E1 and near the ends of the conductor pattern 7A in the width direction. As shown in FIG. 12(a), the planar conductor pattern 7A and the linear conductor pattern 7B are formed on the substrate 6, and a resist layer 8 having openings 12 is formed. In response to this, as shown in FIG. 12(b), a coating layer 9 is formed on the openings 12.
[0053] The structure shown in Fig. 13 may be employed. The structure shown in Fig. 13 is similar to the structure shown in Fig. 12 except that the other conductor pattern 7B is not covered with the resist layer 8. As shown in Fig. 13(b), an opening 12 is provided for the other conductor pattern 7B. As a result, the coating layer 9 covers the other conductor pattern 7B and the surrounding main surface 6a.
[0054] The structure shown in Fig. 14 may be employed. The structure shown in Fig. 14 is similar to the structure shown in Fig. 12 except that the end of one conductor pattern 7A is also covered with a resist layer 8. As shown in Fig. 14(b), an opening 12 is provided on the main surface 6a in part of region E1. The resist layer 8 covers the entire planar conductor pattern 7A and the entire linear conductor pattern 7B.
[0055] The structure shown in FIG. 15 may be employed. As shown in FIG. 15(b), both conductor patterns 7A, 7B are not linear patterns but solid patterns extending in a plane. A resist layer 8 is formed to cover the planar conductor patterns 7A, 7B. Openings 12 are provided in region E1 and near the ends of the conductor patterns 7A, 7B in the width direction. As shown in FIG. 15(a), planar conductor patterns 7A, 7B are formed on a substrate 6, and a resist layer 8 having openings 12 is formed. Then, as shown in FIG. 15(b), a coating layer 9 is formed on the openings 12.
[0056] The structure shown in Fig. 16 may be employed. The structure shown in Fig. 16 is similar to the structure shown in Fig. 15 except that the ends of the conductor patterns 7A and 7B on both sides are covered with a resist layer 8. As shown in Fig. 15(b), an opening 12 is provided on the main surface 6a in a part of the region E1. The resist layer 8 covers the entire planar conductor patterns 7A and 7B.
[0057] The structure shown in Fig. 17 may be employed. The structure shown in Fig. 17 is similar to the structure shown in Fig. 12 except that only the end of one conductor pattern 7A is covered with a resist layer 8. As shown in Fig. 17(b), openings 12 are provided on a part of the main surface 6a in region E1 and near the end of the other conductor pattern 7B. The resist layer 8 covers the entire planar conductor pattern 7A and the part of the planar conductor pattern 7B other than the end.
[0058] In the above-described embodiment, the power supply device is described as being arranged in the engine compartment of a vehicle. However, the installation location of the power supply device is not particularly limited, and it may be arranged inside the vehicle cabin, etc. Furthermore, although a power supply device including a DC / DC converter is exemplified as a device for which the board structure is adopted, it is not particularly limited, and the board structure may be adopted in devices such as an inverter device, a charger device, etc.
[0059] [Mode 1] A substrate structure comprising: a substrate; a pair of conductor patterns formed on a main surface of the substrate and arranged at a distance from each other; and a resist layer covering the main surface of the substrate, wherein a coating layer having higher adhesiveness than the resist layer covers the substrate in contact with the substrate in at least a portion of a region between the pair of conductor patterns. [Mode 2] The substrate structure according to Mode 1, wherein the resist layer has openings that open to at least a portion of the region and to the conductor patterns, and the coating layer is formed in the openings. [Mode 3] The substrate structure according to Mode 1, wherein the resist layer covers the conductor patterns, and the resist layer has openings that open to at least a portion of the region, and the coating layer is formed in the openings. [Mode 4] The substrate structure according to Mode 1 or 2, wherein the resist layer is formed with a first opening that opens at a position on one of the conductor patterns within the region, and a second opening that opens at a position on the other of the conductor patterns within the region, the resist layer remaining between the first opening and the second opening, and the coating layer being formed in the first opening and the second opening. [Mode 5] The substrate structure according to any one of Modes 1 to 4, wherein in a region between a pair of the conductor patterns, the planar shape of the main surface of the substrate is continuous from one of the conductor patterns to the other of the conductor patterns. [Mode 6] The substrate structure according to any one of claims 1 to 5, wherein the resist layer is formed with an opening that opens to at least a portion of the region, and the coating layer covers the resist layer at the edge of the opening. [Mode 7] The substrate structure according to any one of claims 1 to 6, wherein one of the conductor patterns and the other of the conductor patterns extend parallel to each other. [Embodiment 8] A power supply device having the substrate structure according to any one of embodiments 1 to 7.
[0060] 1...substrate structure, 6...substrate, 6a...main surface, 7A, 7B...conductor pattern, 8...resist layer, 9...coating layer, 12...opening, 12A...first opening, 12B...second opening, 100...power supply device
Claims
1. A substrate structure comprising: a substrate; a pair of conductive patterns formed on a main surface of the substrate and spaced apart from each other; and a resist layer covering the main surface of the substrate, wherein in at least a portion of the region between the pair of conductive patterns, a coating layer having higher adhesion than the resist layer covers the substrate while in contact with the substrate.
2. The substrate structure according to claim 1, wherein the resist layer has an opening that is open to at least a portion of the region and the conductor pattern, and the coating layer is formed in the opening.
3. The substrate structure according to claim 1, wherein the resist layer covers the conductor pattern, the resist layer has an opening that is open to at least a portion of the region, and the coating layer is formed in the opening.
4. A substrate structure as described in claim 1, wherein the resist layer is formed with a first opening at a position on one of the conductor patterns and a second opening at a position on the other of the conductor patterns, the resist layer remaining between the first opening and the second opening, and the coating layer being formed in the first opening and the second opening.
5. A substrate structure as described in claim 1, wherein in a region between a pair of said conductor patterns, the planar shape of said main surface of said substrate is continuous from one of said conductor patterns to the other of said conductor patterns.
6. The substrate structure according to claim 1, wherein the resist layer has an opening that is open to at least a portion of the region, and the coating layer covers the resist layer at the edge of the opening.
7. The substrate structure according to claim 1, wherein one of the conductor patterns and the other of the conductor patterns extend parallel to each other.
8. A power supply device having a board structure according to any one of claims 1 to 7.
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