Heterogeneously integrated quantum dot photonic integrated circuits

Abstract

A heterogeneous photonic integrated circuit (PIC) comprising at least one hybrid Quantum Dot (QD) optical gain device is described. The PIC includes a silicon device layer and a silicon waveguide defined in the silicon device layer that includes a first tapered structure. The PIC further includes a III-V multilayer stack bonded to the Si device layer that includes a second tapered structure that corresponds to the first tapered structure to form a hybrid optical waveguide centered around an active region of the QD laser. A method of producing the described heterogeneous photonic integrated circuit is also described, which involves bonding a III-V substrate containing QD layers to a host SOI substrate with a top Si device layer.

Description

HETEROGENEOUSLY INTEGRATED QUANTUM DOT PHOTONIC INTEGRATEDCIRCUITSCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. provisional application 63 / 594,600, titled “Heterogeneously Integrated Quantum Dot Photonic Integrated Circuits”, filed October 31, 2023, the entire contents of which are incorporated by reference herein.

[0001] TECHNICAL FIELDEmbodiments of the present disclosure generally relate to the field of optoelectronics and, more particularly, to photonic integrated circuits using quantum dots in heterogeneous integrated semiconductor platforms.BACKGROUND

[0002] Photonic integrated circuits (PICs) involve the integration of various photonic components on a single chip. PICs may serve as a cost-effective solution for the growing demands of optical communication as well as high-end computing. In photonics integration, the Silicon (Si) platform is heavily preferred due to its low cost, high yield, high scaling capability on integration, and great energy efficiency. In addition, the high index contrast provided by the Silicon-on-insulator (SOI) material system may allow for high optical confinement and enables smaller devices.

[0003] Inconveniently, Si is an indirect bandgap material that displays thermal responses rather than photonic responses when electrically stimulated. Integration of compact, electrically driven optical gain elements with Si photonic systems is important to effectively implement PICs. Many options to implement such optical gain elements have been considered, including hybrid integration, heterogeneous integration, and monolithic integration via direct epitaxy.

[0004] Wafer-scale heterogenous integration using direct wafer bonding has the advantage of being able to combine multiple materials together, bonded at one time, and processed at one time (e g., in a single processing step). Direct wafer bonding stands out as a promising and practical solution for low-loss active-passive coupling of III-V materials with Si waveguides.

[0005] Currently, heterogeneous quantum well (QW) lasers have been widely adopted in industry. Transitioning to quantum dot (QD) optical gain structures can further improve the PIC performance. QDs may be formed by surrounding narrow bandgap dot material with a wider bandgap material. Band offsets may give rise to the discretization of available energy levels and delta-function-like density of states. With carriers confined in all three dimensions, QD lasers may exhibit numerous characteristics superior to what can be achieved using QW devices, including low threshold current density, high-temperature tolerance, greatly reduced sensitivity to reflection and defects, etc. Notably, naturally localized carriers in QDs may lead to strongly suppressed carrier diffusions, which lowers non-radiative sidewall recombination on the laser ridge. This may enable the scaling of laser cavities to narrow ridge widths or high surface area to volume ratio cavity designs for high integration density. Inhomogeneously-broadened gain spectrum may enable ultra-fast optical pulse generation, making QDs an ideal material for making mode-locked lasers (MLL).SUMMARY

[0006] In some aspects photonic integrated circuit (PIC) includes a silicon-on-insulator substrate with a silicon device layer, wherein the silicon device layer comprises a first structure formed in the silicon device layer. The PIC further includes a III-V multilayer stack bonded to the Si device layer as one or more active components of a Quantum Dot (QD) laser. The III-V multilayer stack includes a second structure that corresponds to the first structure to form a hybrid optical waveguide centered around an active region of the QD laser.

[0007] In some aspects, a method of manufacturing a photonic integrated circuit includes providing a silicon on insulator substrate with a silicon device layer that includes a first structure. The method further includes forming a III-V multilayer stack bonded to the silicon device layer including one or more active components of a Quantum Dot (QD) laser. The III-V multilayer stack includes a second structure that corresponds to the first structure to form a hybrid optical waveguide centered around an active region of the QD laser.

[0008] In some aspects, a method includes generating adjacent comb lines as an output of a soliton micro-comb emission of a quantum dot laser locked using a silicon nitride micro-ring modulatorMRM. The method further includes using beating caused by the adjacent comb lines to generate radio frequency millimeter waves.BRIEF DESCRIPTION OF THE DRAWINGS

[0009] FIG. la is a top view of a PIC comprising a hybrid QD MLL and Si photonic micro-ring modulators according to some embodiments.

[0010] FIG. lb is a top view of a PIC comprising a hybrid QD MLL, a 1 x2 multimode interferometer, micro-ring modulators (MRM), and a polarization splitter-rotator according to some embodiments.

[0011] FIG. 1c is a top view of a PIC comprising an array of hybrid QD distributed-feedback (DFB) lasers, micro-ring modulators, and lx2 multimode interferometers according to some embodiments.

[0012] FIG. Id is a top down via that depicts a PIC that includes cascade of n MRMs 120 that are tuned such that each MRM is in resonance with one mode of a broad QD laser’s 110 emission according to some embodiments.

[0013] FIG. le is atop down via that depicts a PIC that includes a microring resonator that serves as a self-inj ection-locking mechanism for the sake of narrowing the emission linewidth of a DFB laser according to some embodiments.

[0014] FIG. 1 f is a top down via that depicts a PIC in which four comb lines (out of the soliton comb emission of a DFB laser integrated with an MRM are demultiplexed via an arrayed waveguide grating (AWG) according to some embodiments.

[0015] FIG. 1g is atop down via that depicts a PIC with soliton comb emission generated by an MRM integrated with a DFB laser according to some embodiments.

[0016] FIG. 2a is a top view of an exemplary hybrid QD laser integrated on a Si waveguide layer with tapers in both the IILV and Si materials to transfer the optical mode according to some embodiments.

[0017] FIG. 2b is a top view of another example hybrid device with a different n-mesa design and includes gratings on the Si waveguide according to some embodiments.

[0018] FIG. 3 is a front view of the hybrid QD laser in FIG. 2a according to some embodiments.

[0019] FIG. 4 is a flowchart of device fabrication methods according to some embodiments.

[0020] FIG. 5a is a cross-sectional view of an example III-V material stack epitaxially grown on III-V material substrate before integration according to some embodiments .

[0021] FIG. 5b is a cross-sectional view of an example hybrid material stack after the direct wafer bonding process according to some embodiments.

[0022] These figures are to be perceived as non-limiting schematics unless specifically indicated through context otherwise. In these figures, elements are not drawn to scale as their size may be exaggerated for illustrative purposes. In different figures, the same reference signs or icons generally refer to the same or analogous elements.DETAILED DESCRIPTION

[0023] The embodiment of the present disclosure presents a method to fabricate a PIC on a Silicon (S)i platform comprising a compound-semiconductor-based QD laser structure. The active optical gain materials of the QD laser may be epitaxially grown on a III-V direct bandgap material substrate. These materials may be heterogeneously integrated vertically adjacent to a Silicon-On- Insulator (SOI) substrate, such that the active region of the laser is aligned with a surface waveguide formed in a Silicon (Si) device layer above a buried oxide of the SOI substrate. By virtue of their relative alignment and appropriate waveguide design, light generated by the laser may be efficiently coupled into the waveguide through hybrid optical modes that are laterally confined by the Si waveguide, while a portion of the modes evanescently overlaps the III-V multilayer QD active region. Tapers in both the III-V material and the Si waveguide are used in conjunction to transition the hybrid optical modes into optical modes that are purely confined in the Silicon (Si) waveguide with minimal parasitic reflections and optical loss.

[0024] It may be an advantage of the embodiments of the present disclosure that most of the optical mode falls within the Si material, which may lead to low coupling loss from the hybrid active region to the passive waveguide. Furthermore, structures on the host Si substrate may be fabricated separately in the beginning. This may allow the Si devices and waveguides to benefit from the high-resolution capabilities and low costs of well-developed CMOS processing technologies. Additionally, fabrication using the methods described herein may allow for the direct integration of Si-based high-performance optoelectronics alongside an optical source (e.g., the QD laser structure). This may eliminates losses due to external coupling and may greatly reduce the overallfootprint of the PIC. Notably, the integration of versatile devices, such as microring resonators, can be integrated with the optical source to provide significant functionalities, including external modulation, soliton comb generation, optical generation of RF signals, spectral stabilization, and linewidth narrowing via self-injection-locking.

[0025] The III-V optical gain material may be transferred to the Si host substrate through direct wafer-scale bonding. It is a notable advantage that a large number of hybrid devices may be manufactured employing this architectural design with just a single bonding step. Once the bonding of the materials is completed, the hybrid devices in the PIC can be fabricated through standard lithographic means together as one wafer. This order of procedure may completely avoid the many challenges that would arise in the precise feature alignment between the active region and the Si waveguide.

[0026] By way of illustration, some examples of photonic integrated circuit (PIC) designs that can be realized through the embodiments of the present disclosure are shown in FIG. la to FIG. 1c. A QD MLL 110 coupled to two Si micro-ring modulators 120 is shown in FIG. la. The QD MLL 110 comprises a saturable absorber 111, extended passive Si waveguide sections 112, and two Sagnac loop mirrors 113. The mode-locking operation of the laser is achieved through the implementation of one or more saturable absorbers 111, which may be fabricated by etching through a majority of the III-V material at selected locations for electric isolation of the absorber sections 111. Harmonic mode-locking operations can be achieved by strategically placing the saturable absorbers 111 at frequency nodes of the laser cavity to induce colliding pulse modelocking. For example, an effective cavity length with a fundamental free spectral range of 10 GHz can operate at 20 GHz by placing a saturable absorber 111 at the center of the cavity. One may appreciate the advantage of such an operating scheme, where high-frequency devices can maintain sufficient gain through multiplicatively increased laser cavity length. The laser cavity is formed by the two loop mirrors 113, which can be adjusted by varying coupling parameters such as the directional coupler length and gap to change the effective mirror reflectivity. The ability to directly integrate on-chip light sources with high-speed Si MRMs 110 may allow breakthroughs in the data communication field in terms of bandwidth, footprint, as well as power density using different multiplexing techniques. In the disclosed example implementations, a PIC can serve as a compact, high-capacity, energy-efficient transmitter in different configurations by leveraging the unique features of QD lasers and the versatility of microring resonators. The PIC in FIG. l a can supportpulse amplitude modulation with four levels of signal (PAM4) by driving the two MRMs 110 with two non-return-to-zero (NRZ) signals. Alternatively, a single MRM 110 can be driven with one PAM4 signal for a reduced PIC footprint. Similarly, FIG. lb illustrates a QD MLL 110 connected to four MRMs 120 through a lx2 multimode interferometer (MMI) 130. The outputs of the modulators are connected to a single output waveguide via a polarization splitter-rotator (PSR) 140. To further increase the data throughput of the transmitter PIC, dense wavelength division multiplexing (DWDM) is incorporated in the PIC in FIG. 1c with an array of DFB lasers 150 that are 12.5 — 100-GHz spaced in emission frequency from each other, matching ITU-T Dense Wavelength Division Multiplexing (DWDM) grids. According to some embodiments, the DFB lasers 150 can be fabricated by implementing gratings along the Si waveguide underneath the III- V active region. The output of each DFB laser 150 may be coupled with an individual MRM 120, and the output may be consolidated through a series of MMIs 130. Alternatively, DWDM can be more efficiently implemented at a smaller footprint by utilizing the inhomogeneously broadened emission of QD lasers. This can be achieved, as illustrated in FIG. Id, by integrating a cascade of n MRMs 120 that are tuned such that each MRM is in resonance with one mode of a broad QD laser’s 110 emission to be modulated independently in NRZ or PAM4 modulation schemes, effectively increasing the throughput by a factor of n. This may be taken steps further in the PIC in FIG. le by incorporating a more spectrally-efficient modulation scheme, viz., 16-level quadrature amplitude (16QAM), with DWDM. In this example, a microring resonator 120 serves as a self-injection-locking mechanism for the sake of narrowing the emission linewidth of the DFB laser 150, which is essential in high-order modulation schemes such as 16QAM. The microring resonator 120 can also double as a soliton microcomb generation element by exploiting wave mixing phenomena enabled by optical nonlinearities of some materials, for example SiN. In this scenario, the combined three comb lines may be split into two halves for the I (top) and Q (bottom) signals. Then, each channel may be modulated independently by a set of MRMs 120. Furthermore, besides DWDM, polarization division multiplexing (PDM) can also be implemented, as exemplified in the PIC in FIG. If, in which four comb lines (out of the soliton comb emission of a DFB 150 laser integrated with an MRM 120 are demultiplexed via an arrayed waveguide grating (AWG) 160. Each demultiplexed mode acts as an independent subcarrier and is originally of a TE polarization. Then, each channel is then split into two halves via an MMI 130, where one half is passed through a polarization rotator 170. Then, each orthogonally-polarized signal may bemodulated independently in any modulation scheme and then may be combined with each other via a polarization beam splitter 180. Lastly, each of the dual -polarization carriers (comb lines) may be combined via a series of MMIs 130. Ultimately, by utilizing an n number of carriers, via either bradband QD emission or soliton microcomb generators, in this dual polarization scheme, the net data rate of the transmitter may be enlarged by a factor of 2n, enabled by the unique features of QD sources integrated with MRMs 120. They can also be employed, as illustrated in FIG. 1G, for the optical generation of GHz / THz signals for wireless 5G and 6G communications. This may be compactly achieved via a soliton comb emission generated by an MRM 120 integrated with a DFB laser 150. Then, a tunable RF signal can be generated by beating any two adjacent comb lines over a photodiode 190 by tuning the design and operation of the MRM 120, and hence the free spectral range (FSR), i.e., mode spacing. In this case, by properly selecting the bandwidth of a photodiode, only the RF signal of the frequency corresponding to the beating of two consecutive modes may be generated.

[0027] The presently disclosed examples in operation may fully reap the benefits of silicon devices’ high data rate density and low power consumption while accomplishing high-reliability state-of-the-art III-V QD laser diode performance. Another noted advantage of eliminating external coupling between these PIC components by implementing the various embodiments described herein may be drastically-reduced overall system cost and complexity. Experts in the field will be able to appreciate further variations of the scope of the presently disclosed for a wide variety of applications, including but not limited to optical frequency comb generation, biomedical applications, wireless data communications, and photonic radar signal generation.

[0028] According to the embodiments of the present disclosure, the optical gain element of a PIC is a hybrid device with an QD active region, whereby the coupling between the active region and the passive Si waveguide is provided through tapering in both the III-V material and the vertically adjacent Si waveguide. FIG. 2a depicts a top-down view of the III-V material structure topology and a vertically adjacent top Si layer of an exemplary hybrid QD optical gain device. The top Si device layer includes a silicon waveguide 201 that may extend from a first end of a substrate to a second end of the substrate as shown in FIG. 2a. Silicon waveguide 201 may includes a plurality of tapers 221. Tapers as described herein may refer to symmetrically angled segments that define an angled point. According to the FIG. 2a example, silicon waveguide 201 includes two tapers 221, and a substantially parallel section 222 betwee the two tapers 221. As also shown in FIG.2a, the PIC further includes a III-V multilayer stack including a p-mesa structure 202 integrated with the top Si device layer. The III-V multilayer stack includes a plurality of tapers 231. In the example of FIG. 2a, the p-mesa structure includes two tapers 231, and substantially parallel section 232 between the two tapers 231. The silicon waveguide tapers 221 and the tapered p-mesa structure 202 work in conjunction to couple the hybrid optical mode in the active region to a mode confined solely in the silicon waveguide 201. As shown in FIG. 2a, a position of the angled points defined by tapers 221 of silicon waveguide 201 correspond to a position of angled points defined by tapers 231 of the p-mesa structure 202. On top of the p-mesa structure 202, a tapered metal strip makes a p-contact 204, while two metal strips on each side of the p-mesa 202 above the n- mesa 203 form n-contacts 205. FIG. 2b illustrates an alternative embodiment, where the hybrid device includes additional gratings 207 on the Si waveguide structure. While the p-contact 204 and n-contact 205 metal strips, as well as the taper p-mesa structure 202 remain identical, the n- mesa 206 in this example is designed with tapered sections at the ends of the device as opposed to the angled, triangular structure presented in FIG. 2a.

[0029] FIG. 3 shows a cross-section view of the same hybrid QD device depicted in Figs. 2A and 2B, according to the arrow 210 in FIG. 2. The bottom portion of the device is contributed by the host SOI wafer, including the Si substrate 301 and the buried oxide layer 302 directly above. The III-V structure sits on top of the Si layer, which includes the taper Si waveguide 201, which may be formed by air trenches extending down to the buried oxide layer 302 below. The III-V structure includes a p-mesa 202 above the n-contact layer and the n-mesa 203 below. The p-contact metal strip 204 is located above the p-mesa structure 202, while the n-contact metal strips 205 are located on each side above the n-mesa 203. The QD active region 303 lies within the p-mesa structure 202.

[0030] FIG. 4 is a flowchart that demonstrates the steps of a fabrication method for producing a heterogeneous QD PIC according to but not limited by some embodiments of the present disclosure. As a first step of the example method, an SOI substrate wafer with a Si device layer above the buried oxide is prepared 410. In some embodiments of the present disclosure relating to certain QD laser structures, such as DFB and distributed Bragg reflector (DBR) lasers, gratings may be implemented 411 through E-beam lithography and C4F8 / SF6 / CF4-based plasma reactive ion etching.

[0031] Further on in the preparation 410, rib waveguides and potentially other Si devices discussed in some embodiments of the present disclosure may be processed into the Si device layer 412. Thiscan be achieved through known lithographic means, including but not limited to deep Ultra Violet (UV) lithography in conjunction with C4F8 / SF6 / CF4-based plasma reactive ion etching.

[0032] A final portion of this preparation process 410 may involve etching vertical outgassing channels 413 to the full depth of the Si device layer employing the same lithographic and etching methods as used to define other devices in the Si device layer. The implementation of these channels 413 may advantageously improves the direct wafer bonding yield, which is a critical limiting factor to the entire fabrication process.

[0033] In a following step 420, a III-V material substrate wafer containing QD layers bounded by a graded index separate confinement heterostructure (GRIN-SCH) is integrated with the prepared host SOI substrate wafer. In some embodiments, the Si wafer may be passivated to protect prepared Si devices, which may require an initial etch over the active region to reveal the bonding area. The QD wafer can be joined with the Si wafer through direct wafer bonding 421 using an 02 plasma- assisted process after the deposition of a thin layer (2nm) of A12O3 on the QD wafer. An annealing process can be conducted thereafter to enhance the bonding strength.

[0034] Subsequent to the direct wafer bonding process, the III-V substrate may be removed 422 in chemical solutions such as NH4OH:H2O2. This process can be aided by the implementation of an etch stop layer above the substrate in the III-V epitaxial layer stack using materials such as A10.8Ga0.2As, which can be subsequently removed, for example with dilute hydrofluoric acid.

[0035] After the III-V QD material is bonded to the Si host wafer, the active region of the hybrid QD lasers may be processed 430 to complete the heterogeneous PIC. Initially, the p-metal contact is formed 431 using E-beam evaporation. The III-V material is then processed into a mesa shape down to the n-contact layer in the epitaxial stack to form the laser ridge 432 using inductively- coupled plasma (ICP) etching.

[0036] In certain embodiments, the PIC may include Si devices such as modulators in the top Si layer that are fabricated on the host SOI wafer before wafer bonding. In order to protect these additional structures from the subsequent Inductively Coupled Plasma (ICP) etching process, an additional mesa-filled etch 433 using wet etching techniques is employed to remove the III-V material near these Si devices without damaging their protective passivation layer. Cooperatively, the MESA dry etching area is strictly limited away from the Si devices during the lithography process.

[0037] The remaining process resembles a standard ridge laser fabrication techniques. This may begin with an H3PO4:H2O2:H2O wet etch to form the n-mesa 434, followed by the deposition of the n-metal contacts 435 using E-beam evaporation. The whole wafer may be passivated 436 with a thin layer of A12O3 using atomic layer deposition as well as a thick layer of sputtered SiO2 to isolate the optical modes from the metal contacts. Subsequently, contact VIAs may be opened 437 using ICP dry etch, and the main fabrication procedure is concluded with probe metal contacts deposition 438 using E-beam evaporation.

[0038] FIG. 5a schematically illustrates an example multilayer III-V material epitaxial stack grown on a III-V substrate that can be used to fabricate the active region of the hybrid QD laser described by other embodiments of the present disclosure. The embodiment shown utilizes a GaAs substrate 510, wherein a cladding layer 520, QD layers 530, a bonding superlattice structure 540, and other miscellaneous layers are grown on top of the GaAs substrate 510. In this example, a p- doped A10.8Ga0.2As stopping layer 511 is implemented directly above the GaAs substrate 510 to assist the substrate removal process described in other embodiments. Above the stopping layer 511 and under the cladding layer 520 lies the p-doped GaAs contact layer 551 for low-resistance electrical injection. The cladding layer 520 is made up of a p-doped AlGaAs grading layer 521, a p-doped A10.4Ga0.6As cladding layer 522, a p-doped AlGaAs grading layer 523, a p-doped A10.2Ga0.8As SCH layer 524, and a UID-GaAs waveguide layer 525. The bottom p-doped AlGaAs grading layer 521 gradually increases its aluminum concentration along the lateral direction, beginning at the bottom from 0% to 40%. On the other hand, the top p-doped AlGaAs grading layer 523 decreases its aluminum concentration from 40% to 20% along the same direction. The QD layer 530 structure consists of InAs QDs in an In0.15Ga0.85As quantum well 532 above a GaAs barrier layer 531. The active region is made by repeating the QD layer 530 five times above the cladding layer 520. A UID-GaAs waveguide layer 552 and an n-doped A10.2Ga0.8As SCH layer 553 are deposited above the active region to mirror the top two layers of the cladding layer 520 as to form a partial cladding. An n-doped GaAs contact layer 554 is deposited above the n-doped SCH layer 553 for electrical conduction. Finally, the bonding superlattice structure 540 is placed on top to prevent charge carriers from reaching the bonding interface, comprising two periods of n-doped A10.3Ga0.7As layers 541 vertically adjacent to n- doped GaAs layers 542.

[0039] FIG. 5b shows the hybrid material stack obtained after the integration process step 420, where the III-V material epitaxial stack in FIG. 4a is joined with the host SOI substrate wafer. As illustrated by FIG. 4b, the combined hybrid material stacks contain a Si waveguide and device layer 562 above a buried SiO2 oxide layer 561 on top of the Si substrate 560 in addition to all of the layers present in the III-V material stack. This, however, excludes the p-doped A10.8Ga0.2As stopping layer 511 and the GaAs substrate 510, which are removed after the direct wafer bonding process to reveal the p-doped GaAs contact layer 551 for contact metal deposition. It should be noted that the order of the III-V material layers is inverted due to the flipped orientation of the III- V wafer as part of the bonding process.

[0040] Although the present disclosure describes the invention with reference to exemplary embodiments, it will be apparent to those skilled in the art that a multitude of changes may be made, and equivalent or similar elements may be substituted without departing from the extent of the invention. Therefore, the particular embodiments disclosed are intended to be non-limiting descriptions of the invention, and the invention will include all embodiments falling within the scope of the appended claims.

Claims

CLAIMS1. A photonic integrated circuit (PIC) comprising: a silicon-on-insulator substrate with a silicon device layer, wherein the silicon device layer comprises a first structure formed in the silicon device layer; a III-V multilayer stack bonded to the Si device layer as one or more active components of a Quantum Dot (QD) laser, wherein the III-V multilayer stack includes a second structure that corresponds to the first structure to form a hybrid optical waveguide centered around an active region of the QD laser.

2. The PIC of claim 1, wherein the first structure and the second structure work in conjunction to couple a hybrid optical mode in the active region to a mode confined solely in the Si device layer.

3. The PIC of any of claims 1 and 2, wherein the first structure comprises at least one Si waveguide.

4. The PIC of claim 3, wherein the Si waveguide comprises at least two channels formed in the Si device layer that extend from a first side of the Si device layer to a second side of the Si device layer.

5. The PIC of any of claims 1-4, wherein the second structure comprises at least one P-mesa in the multilayer stack.

6. The PIC of claim 5, wherein the p-mesa comprises: a first section comprising a first taper;a second section comprising a second taper; and a third substantially parallel section between the first section and the second section.

7. The PIC of any of claims 3-6, wherein the Si waveguide includes a first at least two tapers.

8. The PIC of claim 7, wherein the P-mesa includes a second at least two tapers that correspond to the the first at least two tapers of the Si waveguide.

9. The PIC of any of claims 7-8, wherein the first at least two tapers of the Si waveguide comprise symmetrically angled segments that define first angled points, and the second at least two tapers include symmetrically angled segments that define second angled points.

10. The PIC of claim 9, wherein the second angled points are arranged at positions between the first angled points.

11. The PIC of any of claim 9 and 10 , wherein the first angled points are symmetrically arranged across the Si device layer in a first direction, and wherein the second angled points are symmetrically arranged across the p-mesa in a second direction different than the first direction.

12. The PIC of any of claims 3-11, wherein the Si waveguide includes at least three sections, wherein the at least three sections include: a first section comprising a first taper; a second section comprising a second taper; and a third substantially parallel section between the first and second sections.

13. The PIC of claim 12, wherein the third section of the Si waveguide is substantially parallel to the third section of the p-mesa.

14. The PIC of any of claims 8-13, further comprising: an n-mesa, wherein the n-mesa includes a third at least two tapers that correspond to the first at least two tapers and the second at least two tapers.

15. The PIC of any of claims 8-14, wherein the third at least two tapers symmetrically correspond with the first at least two tapers and the second at least two tapers.

16. The PIC of any of claims 8-15, wherein the third at least two tapers asymmetrically correspond with the first at least two tapers and the second at least two tapers.

17. The PIC of any of claims 8-16, wherein the p-mesa further comprises a contact metal strip above the p-mesa.

18. The PIC of any of claims 3-17, wherein the silicon waveguide is formed by air trenches through the silicon device layer.

19. The PIC of any of claims 1-18, wherein the silicon device layer comprises one or optical devices selected from the group consisting of: a modulator; a coupler;a detector; and a comb generator.

20. A method of manufacturing a photonic integrated circuit, comprising: providing a silicon on insulator substrate with a silicon device layer that includes a first structure; forming a III-V multilayer stack bonded to the silicon device layer comprising one or more active components of a Quantum Dot (QD) laser, wherein the III-V multilayer stack includes a second structure that corresponds to the first structure to form a hybrid optical waveguide centered around an active region of the QD laser.

21. The method of claim 20, wherein forming the III-V multilayer stack comprises using direct wafer bonding, and subsequently processing the III-V multilayer stack form the hybrid optical waveguide.

22. The method of any of claims 20 and 21, wherein forming the III-V multilayer stack comprises epitaxially growing the multilayer stack on a III-V substrate.

23. A method, comprising: generating adjacent comb lines as an output of a soliton micro-comb emission of a quantum dot laser locked using a silicon nitride micro-ring modulator MRM; and using beating caused by the adjacent comb lines to generate radio frequency millimeter waves.

24. The method of claim 23, wherein generating the adjacent comb lines comprises:integrating a cascade of MRMs that are tuned such that each MRM is in resonance with one mode of a broad quantum dot lassers emission.

25. The method of any of claims 23 and 24, wherein the MRM serves as a self injection locking mechanism to narrow the emission linewidth of the quantum dot laser.

26. The method of any of claims 23-25, wherein the MRM serves as a soliton microcomb generation element by exploiting wave mixing phenomena enabled by optical nonlinearities of one or more materials.

27. The method of any of claims 23-26, further comprising: demultiplexing the adjacent comb lines via an arrayed waveguide grating (AWG)28. The method of any of claims 23-27, further comprising: combining the adjacent comb lines via a series of multimode interferometer.

29. The method of any of claims 23-28, further comprising: selecting the bandwidth of a photodiode so that only the RF signal of a frequency corresponding to the beating of two consecutive modes is generated.

Images