Sequencing chip and preparation method therefor

Abstract

A sequencing chip and a preparation method therefor, the preparation method comprising: forming on the surface of a substrate (1) an adsorption layer (2) for adsorbing biological samples; forming an isolation layer (3) on the surface of the adsorption layer (2); and forming a plurality of pore structures (4) in the isolation layer (3), such that the adsorption layer (2) is exposed from the pore structures (4), thus obtaining a sequencing chip. By means of depositing an adsorption layer and an isolation layer on a substrate, forming a pore structure array in the isolation layer, and then using the adsorption layer to adsorb biological samples, the sequencing chip involves a simple process and has pore structures with high dimensional precision, thereby improving the sequencing stability and quality of sequencing chips; physical isolation between samples can be realized, thereby solving the problem of inter-sample signal interference in a high-density sequencing chip; moreover, the sequencing chip can be repeatedly used, thereby saving on costs.

Description

Sequencing chip and preparation method thereof Technical Field

[0001] The present application relates to the field of gene sequencing technology, and in particular to a sequencing chip and a method for preparing the same. Background Art

[0002] Currently, sequencing chips typically use chemically modified surfaces (such as those modified with APTMS (3-aminopropyltrimethoxysilane)) to adsorb biological samples (e.g., DNA (deoxyribonucleic acid) nanospheres (DNBs)). A chemically modified pattern array is created on a silicon substrate through photolithography and chemical vapor deposition (CVD). The surface chemical modification (e.g., APTMS) is then used to adsorb the biological sample. Sequencing chips using this structure undergo chemical vapor deposition, spin-gelation, and stripping processes before sequencing.

[0003] However, sequencing chips using the above structure generally have the following defects:

[0004] 1. The sequencing chip requires surface chemical treatment and spin gel protection before cutting. After cutting, wet gel stripping is required. There is a risk of residual gel after gel stripping, which in turn affects the preparation yield of the sequencing chip and leads to unstable sequencing quality of the sequencing chip.

[0005] 2. The procurement cost of sequencing chips is high, and their preparation process is relatively complicated. After the sequencing chips are obtained from the supplier, they need to undergo CVD, gel coating and other treatments, which further increases the cost of the sequencing chips.

[0006] 3. When making high-density sequencing chips, there is a problem of mutual interference between DNBs in the modified surface sites.

[0007] Summary of the Invention

[0008] In order to solve at least one of the above defects, it is necessary to propose a method for preparing a sequencing chip.

[0009] In addition, the present application also provides a sequencing chip prepared by the aforementioned preparation method.

[0010] In a first aspect, the present invention provides a method for preparing a sequencing chip, comprising:

[0011] forming an adsorption layer on the surface of the substrate for adsorbing the biological sample;

[0012] forming an isolation layer on the surface of the adsorption layer;

[0013] A plurality of pore structures are formed in the isolation layer so that the adsorption layer is exposed through the pore structures.

[0014] In some possible embodiments, the step of forming an adsorption layer for adsorbing the biological sample on the surface of the substrate includes:

[0015] An adsorption material for adsorbing biological samples is deposited on the surface of the substrate to form the adsorption layer.

[0016] In some possible embodiments, the adsorption material includes at least one of titanium nitride, titanium oxide, silver, zirconium oxide, and zinc oxide.

[0017] In some possible embodiments, the adsorption layer has a thickness of 20 nm to 500 nm.

[0018] In some possible embodiments, the isolation layer is formed by depositing an isolation material on the surface of the adsorption layer, and the isolation material includes silicon oxide or silicon nitride.

[0019] In some possible embodiments, the step of forming the hole structure in the isolation layer includes:

[0020] forming an anti-reflection layer on the surface of the isolation layer;

[0021] forming a photoresist layer on the surface of the anti-reflective layer;

[0022] forming an etching hole corresponding to the hole structure in the photoresist layer;

[0023] removing the anti-reflection layer and the isolation layer corresponding to the etching hole to expose the adsorption layer; and

[0024] The remaining photoresist layer and the anti-reflective layer are removed.

[0025] In some possible embodiments, the step of forming a photoresist layer on the surface of the anti-reflective layer includes:

[0026] forming an adhesion-promoting coating on a surface of the anti-reflective layer; and

[0027] The photoresist layer is formed on the surface of the adhesion promoting coating layer.

[0028] In some possible embodiments, the anti-reflection layer is formed by depositing an anti-reflection material on the surface of the isolation layer, and the anti-reflection material includes silicon oxynitride or a bottom anti-reflection coating.

[0029] In some possible embodiments, the step of forming the hole structure in the isolation layer includes:

[0030] forming an embossed adhesive layer on the surface of the isolation layer;

[0031] forming an imprint layer having etched holes corresponding to the hole structure on the imprinted adhesive layer;

[0032] removing the isolation layer corresponding to the etching hole to expose the adsorption layer; and

[0033] The embossing layer is removed.

[0034] In some possible embodiments, the step of forming an adsorption layer for adsorbing the biological sample on the surface of the substrate includes:

[0035] forming a buffer layer on the surface of the substrate; and

[0036] The adsorption layer for adsorbing biological samples is formed on the surface of the buffer layer.

[0037] In some possible embodiments, the buffer layer is formed by depositing a buffer material on the surface of the substrate, and the buffer material includes silicon oxide or silicon nitride.

[0038] In some possible embodiments, the pore structure has a pore diameter of 100 nm to 300 nm; and / or,

[0039] The depth of the pore structure is 20 nm to 150 nm; and / or,

[0040] The distance between the centers of two adjacent pore structures is 200 nm to 1000 nm.

[0041] In a second aspect, an embodiment of the present application further provides a sequencing chip, comprising: a substrate, an adsorption layer and an isolation layer, wherein the adsorption layer is located on the surface of the substrate and is used to adsorb biological samples; the isolation layer is located on the surface of the adsorption layer and has multiple pore structures, and the adsorption layer is exposed from the pore structures.

[0042] In some possible embodiments, the adsorption layer includes an adsorption material for adsorbing biological samples, and the adsorption material includes at least one of titanium nitride, titanium oxide, silver, zirconium oxide, and zinc oxide.

[0043] In some possible embodiments, the adsorption layer has a thickness of 20 nm to 500 nm.

[0044] In some possible embodiments, the isolation layer is made of silicon oxide or silicon nitride.

[0045] In some possible embodiments, a buffer layer is further provided between the substrate and the adsorption layer, and a material of the buffer layer includes silicon oxide or silicon nitride.

[0046] In some possible embodiments, the pore structure has a pore diameter of 100 nm to 300 nm; and / or,

[0047] The depth of the pore structure is 20 nm to 150 nm; and / or,

[0048] The distance between the centers of two adjacent pore structures is 200 nm to 1000 nm.

[0049] The sequencing chip and preparation method provided in the embodiments of the present application have been comprehensively optimized in terms of the structure and preparation process of the sequencing chip. By depositing an adsorption layer such as titanium nitride and an isolation layer such as silicon oxide on a substrate, and then forming an array of nanometer-sized pore structures in the isolation layer, the adsorption layer exposed by the pore structure is used to adsorb biological samples. The process is simple and the dimensional accuracy of the pore structure is high, thereby improving the sequencing stability and quality of the sequencing chip. Moreover, the pore structure on the isolation layer can achieve isolation between adjacent pore structures, thereby achieving physical isolation between samples (such as DNA molecular nanospheres), solving the problem of signal interference between samples in high-density sequencing chips, and facilitating improved sequencing quality of high-density sequencing chips. In addition, the sequencing chip is reusable, thereby saving costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0051] FIG1 is a schematic diagram of the structure of a sequencing chip according to an embodiment of the present application.

[0052] FIG2 is a schematic diagram of the process of preparing the sequencing chip of the present application.

[0053] FIG3 is a schematic diagram of a process for preparing a sequencing chip using an etching method according to an embodiment of the present application.

[0054] FIG4 a is a schematic cross-sectional view of the chip structure during the execution of step 101 and step 102 in FIG3 .

[0055] FIG4 b is a schematic cross-sectional view of the chip structure at the stage of executing step 103 in FIG3 .

[0056] FIG. 4 c is a schematic cross-sectional view of the chip structure in the step 104 in FIG. 3 .

[0057] FIG4 d is a schematic cross-sectional view of the chip structure at the stage of executing step 105 in FIG3 .

[0058] FIG. 4 e is a schematic cross-sectional view of the chip structure at the stage of executing step 106 in FIG. 3 .

[0059] FIG. 4 f is a schematic cross-sectional view of the chip structure at the stage of executing step 107 in FIG. 3 .

[0060] FIG. 4 g is a schematic cross-sectional view of the chip structure at the stage of executing step 108 in FIG. 3 .

[0061] FIG5 is a schematic diagram of a process for preparing a sequencing chip using an imprinting method according to an embodiment of the present application.

[0062] FIG. 6 a is a schematic cross-sectional view of the chip structure during step 201 in FIG. 5 .

[0063] FIG6 b is a schematic cross-sectional view of the chip structure in the step 202 of FIG5 .

[0064] FIG6 c is a schematic cross-sectional view of the chip structure in the stage of executing step 203 in FIG5 .

[0065] FIG6 d is a schematic cross-sectional view of the chip structure in the stage of executing step 204 in FIG5 .

[0066] FIG. 6 e is a schematic cross-sectional view of the chip structure at the stage of executing step 205 in FIG. 5 .

[0067] FIG6 f is a schematic cross-sectional view of the chip structure at the stage of executing step 206 in FIG5 .

[0068] FIG6 g is a schematic cross-sectional view of the chip structure at the stage of executing step 207 in FIG5 .

[0069] Description of main component symbols

[0070] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0071] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0072] It should be noted that when a component is referred to as being "fixed to" or "mounted on" another component, it may be directly on the other component or there may be a central component. When a component is referred to as being "disposed on" another component, it may be directly on the other component or there may be a central component. As used herein, the term "and / or" includes all and any combinations of one or more of the relevant listed items.

[0073] Please refer to Figure 1. An embodiment of the present application provides a sequencing chip 100, which includes a substrate 1, an adsorption layer 2 located on the surface of the substrate 1, and an isolation layer 3 located on the surface of the adsorption layer 2. The substrate 1 can be, for example, a silicon substrate (silicon material plate). The adsorption layer 2 is used to adsorb biological samples. For example, the adsorption layer 2 can be formed by an adsorption material that can adsorb biological samples. The isolation layer 3 has a plurality of pore structures 4, and the adsorption layer 2 can be exposed by the pore structure 4, that is, the adsorption layer 2 at the bottom of the pore structure 4 is exposed, and the biological sample can be adsorbed and fixed in the pore structure 4. Each pore structure 4 can serve as a reaction area of ​​the sequencing chip 100.

[0074] In some embodiments, the adsorption material may include at least one of titanium nitride, titanium oxide, silver, zirconium oxide, zinc oxide, etc. For example, the adsorption material may be titanium nitride or titanium oxide.

[0075] In some embodiments, the adsorption layer 2 may have a thickness of 20 nm to 500 nm, further 30 nm to 300 nm, further 50 nm to 100 nm. For example, the adsorption layer 2 may have a thickness of 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, or 500 nm.

[0076] In some embodiments, the isolation layer 3 is made of silicon oxide, silicon nitride, or other oxides or nitrides.

[0077] In some embodiments, the thickness of the isolation layer 3 may be 20 nm to 150 nm, and the thickness of the isolation layer 3 may be designed according to the actual depth of the pore structure 4 .

[0078] The size of the pore structure 4, including the pore depth, pore diameter, and pore shape, can be designed according to the capacity required for each reaction area in the sequencing chip 100. Specifically, a plurality of pore structures 4 can be arranged in an array. In some embodiments, the depth of the pore structure 4 can be 20nm to 150nm, further 30nm to 100nm. Exemplarily, the depth of the pore structure 4 can be 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm or 150nm, etc. In some embodiments, the pore diameter of the pore structure 4 can be 100nm to 300nm, further 120nm to 250nm, further 150nm to 200nm. For example, the pore structure 4 may have a pore diameter of 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, 200 nm, 210 nm, 220 nm, 230 nm, 240 nm, 250 nm, 260 nm, 270 nm, 280 nm, 290 nm or 300 nm, etc.

[0079] In some embodiments, the distance between the centers of the holes of two adjacent pore structures 4 can be 200 nm to 1000 nm, further 250 nm to 800 nm, and further 300 nm to 600 nm. For example, the distance between the centers of the holes of two adjacent pore structures 4 can be 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm, 850 nm, 900 nm, 950 nm, or 1000 nm. By adjusting the pore spacing, high-density sequencing can be achieved and sequencing efficiency can be improved. In addition, by adjusting the pore spacing, samples (e.g., nanospheres) between adjacent pore structures 4 do not interfere with each other, thereby improving sequencing quality.

[0080] In some embodiments, a buffer layer 5 is provided between the substrate 1 and the adsorption layer 2. The buffer layer 5 may be made of silicon oxide, silicon nitride, or other oxides or nitrides. In some embodiments, a 20 nm to 1000 nm thick buffer layer 5, such as a SiO2 layer, may be deposited on the surface of the substrate 1. Adding the buffer layer 5 to the surface of the substrate 1 improves the adhesion of the adsorption layer 2 to the substrate 1, enhances the stability of the adsorption layer 2, and improves the quality of the sequencing chip 100.

[0081] The sequencing chip 100 provided in the embodiment of the present application has been comprehensively optimized in structure. By forming an adsorption layer 2 made of titanium nitride or the like and an isolation layer 3 made of silicon oxide on a substrate 1, and the isolation layer 3 having a large number of nanoscale pore structures 4 arranged in an array, the adsorption layer 2 can be exposed to adsorb the biological sample within the reaction area defined by the pore structure 4, thereby improving the sequencing stability and quality of the sequencing chip 100. Moreover, the pore structure 4 on the isolation layer 3 can achieve isolation between adjacent pore structures 4, thereby achieving physical isolation between samples (such as DNA nanospheres), solving the problem of signal interference between samples in high-density sequencing chips, and facilitating improved sequencing quality of high-density sequencing chips. In addition, the sequencing chip 100 is reusable, thereby saving costs.

[0082] Referring to FIG. 2 , the present embodiment further provides a method for preparing the aforementioned sequencing chip, which specifically includes the following steps:

[0083] In step S1 , an adsorption layer for adsorbing biological samples is formed on a surface of a substrate.

[0084] Step S2: forming an isolation layer on the surface of the adsorption layer.

[0085] Step S3: forming a plurality of pore structures in the isolation layer so that the adsorption layer is exposed from the pore structures, thereby obtaining the sequencing chip.

[0086] In step S1, before forming the adsorption layer, the preparation method further includes:

[0087] A buffer layer is formed on the surface of the substrate, wherein the adsorption layer is located on the surface of the buffer layer.

[0088] In some embodiments, the buffer layer is formed by depositing a buffer material on the surface of the substrate, and the buffer material includes silicon oxide, silicon nitride, or other oxides or other nitrides.

[0089] In step S1, the method for forming the adsorption layer includes:

[0090] An adsorption material for adsorbing biological samples is deposited on the surface of the substrate to form the adsorption layer. The adsorption material includes at least one of titanium nitride, titanium oxide, silver, zirconium oxide, zinc oxide, etc., for example, titanium nitride or titanium oxide.

[0091] In step S2 , the isolation layer is formed by depositing an isolation material on the surface of the adsorption layer. The isolation material includes silicon oxide, silicon nitride, or other oxides or other nitrides.

[0092] A method for patterning the isolation layer (the so-called patterning means that a plurality of holes are arranged in a specific pattern) is an etching method: in step S3, forming the hole structure in the isolation layer specifically includes the following steps:

[0093] Step S31 , forming an anti-reflection layer on the surface of the isolation layer.

[0094] The anti-reflection layer is formed by depositing an anti-reflection material on the surface of the isolation layer. The anti-reflection material includes silicon oxynitride or a bottom anti-reflection coating (BARC).

[0095] Step S32 , forming a photoresist layer on the surface of the anti-reflection layer.

[0096] Before forming the photoresist layer, an adhesion-promoting coating layer needs to be formed on the surface of the anti-reflective layer.

[0097] The photoresist layer is located on a surface of the adhesion promoting coating layer.

[0098] Step S33: forming an etching hole in the photoresist layer.

[0099] Step S34 , removing the adhesion-promoting coating, the anti-reflection layer, and the isolation layer corresponding to the etching hole to expose the adsorption layer.

[0100] Step S35 , removing the remaining photoresist layer, the adhesion-promoting coating layer, and the anti-reflective layer.

[0101] Another method for patterning the isolation layer is an imprinting method: in step S3, forming the hole structure in the isolation layer specifically includes the following steps:

[0102] Step S31 ′: forming an embossed adhesive layer on the surface of the isolation layer.

[0103] Step S32 ′: forming an imprint layer having etched holes corresponding to the hole structure on the imprint adhesive layer.

[0104] Step S33 ′: removing the isolation layer corresponding to the etching hole to expose the adsorption layer.

[0105] Step S34 ′: removing the embossing layer.

[0106] The sequencing chip preparation method provided in the embodiments of this application features a comprehensive optimization of the fabrication process. By depositing an adsorption layer, such as titanium nitride, and an isolation layer, such as silicon oxide, on a substrate, the isolation layer is then patterned to form an array of nanometer-sized pore structures. The adsorption layer exposed by the pore structures is then used to adsorb biological samples. This simple process and high dimensional precision of the pore structures enhance the sequencing stability and quality of the sequencing chip. This effectively reduces the number of steps in sequencing chip preparation, avoids the risk of residual photoresist during photoresist removal, and effectively eliminates the coating, APTMS CVD, and de-resist processes, thereby improving the sequencing chip yield and reducing labor costs.

[0107] Example 1

[0108] As shown in FIG3 , the method for preparing a sequencing chip using an etching method is described in detail below, and specifically includes the following steps:

[0109] Step 101, as shown in FIG4a, provides a substrate 1.

[0110] In this step, an 8-inch or 12-inch silicon substrate 1 (wafer) is provided, for example, a silicon substrate with a thickness of about 725 μm. Of course, this embodiment does not specifically limit the type and size of the substrate, and can be selected and adjusted accordingly according to actual needs.

[0111] Step 102 , as shown in FIG. 4 a , depositing silicon oxide material on the surface of the substrate 1 to form a buffer layer 5 .

[0112] In this step, as an optional embodiment, silicon oxide is deposited on the surface of the silicon substrate 1 by chemical vapor deposition to form a buffer layer 5 having a thickness ranging from 20 nm to 1000 nm. For example, a silicon dioxide layer having a thickness of approximately 35 nm is deposited as the buffer layer 5. The thickness can be selected and adjusted accordingly based on actual needs. It is understood that the buffer layer 5 may not be formed on the substrate 1.

[0113] Step 103 , as shown in FIG4 b , depositing an adsorption material for adsorbing biological samples on the surface of the buffer layer 5 to form an adsorption layer 2 .

[0114] In this step, as an optional embodiment, an adsorption material for adsorbing biological samples is deposited on the surface of the buffer layer 5 to form an adsorption layer 2 for adsorbing biological samples with a thickness ranging from 20 nm to 500 nm. For example, a layer of titanium nitride adsorption material with a thickness of approximately 60 nm is deposited on the buffer layer 5 by physical vapor deposition.

[0115] In this embodiment, the adsorption layer can be embodied in the form of an adsorption film. If the thickness of the adsorption film is too thin, it will be difficult to implement its deposition process, and there will be uniformity problems. If the thickness is too thick, it will affect the sequencing quality. Therefore, the thickness of the adsorption layer 2 can be controlled within the above-mentioned optional thickness range, thereby ensuring process stability while ensuring sequencing quality.

[0116] In this embodiment, the adsorption material may be TiN, and the adsorption layer may be a TiN layer. However, the present invention is not limited thereto. The adsorption material may also be at least one of TiO2, Ag, ZrO2, ZnO, etc., and may be adjusted and selected accordingly based on actual needs or potential needs.

[0117] In this embodiment, the biological sample may be, for example, DNA nanospheres, etc., but is not limited thereto, and may be selected and adjusted accordingly according to actual needs.

[0118] Step 104 , as shown in FIG. 4 c , depositing silicon oxide material on the adsorption layer 2 to form an isolation layer 3 .

[0119] In this step, as an optional embodiment, a silicon oxide material is deposited on the adsorption layer 2 for adsorbing biological samples to form an isolation layer 3 with a thickness ranging from 20 nm to 150 nm. For example, silicon dioxide with a thickness of about 45 nm is deposited as the isolation layer 3 by chemical vapor deposition.

[0120] In this embodiment, if the thickness of the isolation layer 3 is too thin, it will be easily corroded during the subsequent reaction process, affecting the stability of the entire process. If the thickness of the isolation layer 3 is too thick, it will affect the fluorescence brightness, resulting in a weak sequencing signal and affect the replacement of reagents in the well, affecting the sequencing quality. Therefore, the thickness of the isolation layer 3 can be controlled within the above-mentioned optional thickness range, thereby ensuring process stability while ensuring sequencing quality.

[0121] Step 105 , referring to FIG. 4 d , an anti-reflection material is deposited on the isolation layer 3 to form an anti-reflection layer 10 .

[0122] In this step, as an optional embodiment, an anti-reflection material is deposited on the isolation layer 3 to form an anti-reflection material layer 10 with a thickness ranging from 50 nm to 70 nm.

[0123] The anti-reflection material may be a SiON material, and the anti-reflection layer 10 may be a SiON layer. Of course, this embodiment does not specifically limit the type and thickness of the anti-reflection material layer, and both may be selected and adjusted accordingly according to actual needs.

[0124] Step 106 , as shown in FIG. 4 e , a photoresist layer 20 is formed on the surface of the anti-reflection layer 10 , and exposure and development are performed to form etching holes 21 in the photoresist layer 20 .

[0125] Specifically, a layer of HMDS is first spin-coated on the surface of the anti-reflective layer 10 as an adhesion-enhancing coating (not shown), and then photoresist is spin-coated on the surface of the adhesion-enhancing coating to form a photoresist layer 20. Then, a DUV photolithography machine is used to perform exposure and development operations to form a regularly arranged circular hole array pattern (i.e., etching holes 21) on the photoresist layer 20.

[0126] In this step, as an optional implementation, the thickness of the photoresist layer 20 may be in the range of 250 nm to 350 nm.

[0127] Step 107 , referring to FIG. 4 f , dry etching is used to etch through the anti-reflection layer 10 and the isolation layer 3 in the etching holes 21 to form a plurality of hole structures 4 , so that a portion of the surface of the adsorption layer 2 is exposed through the hole structures 4 .

[0128] Specifically, the adhesion promoting coating within the hole is also removed simultaneously.

[0129] In this step, as an optional embodiment, the anti-reflection layer 10 and the isolation layer 3 (mainly used to form the sidewalls of the hole structure 4) are dry-etched to form a plurality of hole structures 4 with a preset aperture d on the anti-reflection layer 10 and the isolation layer 3.

[0130] In this embodiment, the preset aperture d may be in the range of 100 nm to 300 nm, and may be adjusted and set accordingly according to actual needs.

[0131] In this embodiment, the thickness h of the pore wall of each pore structure 4 (ie, the pore depth) may be in the range of 20 nm to 150 nm, and may be selected and adjusted accordingly according to actual needs.

[0132] In this embodiment, if the pore depth is too small, it means that the sidewalls of the pore structure 4 are too thin, which is easily corroded during the subsequent reaction process and cannot fix the DNA molecules well, resulting in poor process stability. If the pore depth is too deep, it is easy to cause a weak sequencing signal and affect the replacement of reagents in the pore, affecting the sequencing quality. Therefore, the depth of the pore structure 4 can be controlled within the above-mentioned optional thickness range, thereby ensuring process stability while ensuring sequencing quality.

[0133] In this embodiment, a pitch (period), that is, the distance s between the centers of two adjacent holes, ranges from 200 nm to 1000 nm, and can be adjusted and set accordingly according to actual needs.

[0134] In step 108, as shown in FIG4g and in conjunction with FIG1, the remaining photoresist layer 20 is removed by dry etching and wet etching, and then the anti-reflective layer 10 is etched away by dry etching to form a pore structure 4 on the surface of the substrate 1, thereby obtaining a sequencing chip 100.

[0135] In this embodiment, the pore structure 4 is arranged in a regular array, the bottom pore size of the pore structure 4 can be about 200 nm, the pore spacing between adjacent pore structures 4 can be about 715 nm, the depth of the pore structure 4 can be about 45 nm, and the bottom surface of the pore structure 4 is an adsorption layer 2, which can adsorb nanospheres.

[0136] Example 2

[0137] As shown in FIG5 , the method for preparing a sequencing chip using the imprinting method is described in detail below, and specifically includes the following steps:

[0138] Step 201, as shown in FIG6a, provides a substrate 1. This step is substantially the same as the aforementioned step 101. Please refer to the aforementioned step 101 for details, and no further details are given here.

[0139] Step 202 , as shown in FIG6 b , deposit an adsorption material for adsorbing biological samples on the surface of the substrate 1 to form an adsorption layer 2 .

[0140] In this embodiment, the adsorption layer 2 can be deposited directly on the surface of the substrate 1 without depositing the buffer layer 5. This step is substantially the same as the aforementioned step 103. For details, please refer to the aforementioned step 103 and will not be described in detail here. It is understood that this step can also form a buffer layer on the substrate 1. For details, please refer to the aforementioned step 102 and will not be described in detail here.

[0141] In step 203 , as shown in FIG6 c , silicon oxide material is deposited on the surface of the adsorption layer 2 to form an isolation layer 3 .

[0142] This step is basically the same as the aforementioned step 104. Please refer to the aforementioned step 104 for details and will not be described in detail here.

[0143] In step 204 , as shown in FIG6 d , a layer of adhesion promoter is spin-coated on the surface of the isolation layer 3 , and then a layer of embossing adhesive layer 40 is spin-coated thereon.

[0144] In step 205 , as shown in FIG6 e , a pre-prepared working mold is used to imprint on the imprinted adhesive layer 40 . After curing and demoulding, the pattern of the working mold is transferred to the imprinted adhesive layer 40 , thereby forming an imprinted layer 50 having etched holes 51 .

[0145] In step 206 , as shown in FIG. 6 f , the residual adhesive and the isolation layer 3 in the etching hole 51 are removed by dry etching to form a hole structure 4 , and the adsorption layer 2 at the bottom of the hole structure 4 is exposed.

[0146] In step 207, as shown in FIG6g, the imprinting layer 50 is completely removed by dry etching and wet etching to obtain a sequencing chip without a buffer layer.

[0147] The bottom pore size of the sequencing chip pore structure 4 can be about 200nm, the distance between adjacent pore structures can be about 715nm, the depth of the pore structure 4 can be about 45nm, and the bottom surface of the pore structure 4 is a titanium nitride adsorption layer that can adsorb nanospheres.

[0148] In this embodiment, the structure and size of the sequencing chip can refer to the structure and size involved in the preparation method of the sequencing chip in the above embodiment, so they are not described in detail.

[0149] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A method for preparing a sequencing chip, It is characterized in that include: forming an adsorption layer for adsorbing biological samples on the surface of the substrate; forming an isolation layer on the surface of the adsorption layer; A plurality of hole structures are formed in the isolation layer so that the adsorption layer is exposed through the hole structures.

2. The method for preparing a sequencing chip according to claim 1, It is characterized in that The step of forming an adsorption layer for adsorbing biological samples on the surface of the substrate comprises: An adsorption material for adsorbing biological samples is deposited on the surface of the substrate to form the adsorption layer.

3. The method for preparing a sequencing chip according to claim 2, It is characterized in that The adsorption material includes at least one of titanium nitride, titanium oxide, silver, zirconium oxide, and zinc oxide.

4. The method for preparing a sequencing chip according to claim 1, It is characterized in that The thickness of the adsorption layer is 20nm to 500nm.

5. The method for preparing a sequencing chip according to claim 1, It is characterized in that The isolation layer is formed by depositing an isolation material on the surface of the adsorption layer, and the isolation material includes silicon oxide or silicon nitride.

6. The method for preparing a sequencing chip according to claim 1, It is characterized in that The step of forming the hole structure in the isolation layer comprises: forming an anti-reflection layer on the surface of the isolation layer; forming a photoresist layer on the surface of the anti-reflection layer; forming an etching hole corresponding to the hole structure in the photoresist layer; removing the anti-reflection layer and the isolation layer corresponding to the etched holes to expose the adsorption layer; and The remaining photoresist layer and the anti-reflective layer are removed.

7. The method for preparing a sequencing chip according to claim 6, It is characterized in that The step of forming a photoresist layer on the surface of the anti-reflective layer comprises: forming an adhesion-promoting coating on a surface of the anti-reflective layer; and The photoresist layer is formed on the surface of the adhesion promoting coating layer.

8. The method for preparing a sequencing chip according to claim 6, It is characterized in that The anti-reflection layer is formed by depositing an anti-reflection material on the surface of the isolation layer. The anti-reflection material includes silicon oxynitride or a bottom anti-reflection coating.

9. The method for preparing a sequencing chip according to claim 1, It is characterized in that The step of forming the hole structure in the isolation layer comprises: forming an embossed adhesive layer on the surface of the isolation layer; forming an imprint layer having etched holes corresponding to the hole structure on the imprint glue layer; removing the isolation layer corresponding to the etched hole to expose the adsorption layer; and The embossing layer is removed.

10. The method for preparing a sequencing chip according to claim 1, It is characterized in that The step of forming an adsorption layer for adsorbing biological samples on the surface of the substrate comprises: forming a buffer layer on the surface of the substrate; and The adsorption layer for adsorbing biological samples is formed on the surface of the buffer layer.

11. The method for preparing a sequencing chip according to claim 10, It is characterized in that The buffer layer is formed by depositing a buffer material on the surface of the substrate, wherein the buffer material comprises silicon oxide or silicon nitride.

12. The method for preparing a sequencing chip according to claim 1, It is characterized in that The pore structure has a pore diameter of 100 nm to 300 nm; and / or, The depth of the pore structure is 20 nm to 150 nm; and / or, The distance between the centers of two adjacent pore structures is 200nm-1000nm.

13. A sequencing chip, It is characterized in that include: substrate; An adsorption layer, located on the surface of the substrate, and used for adsorbing biological samples; The isolation layer is located on the surface of the adsorption layer, and the isolation layer has a plurality of pore structures, and the adsorption layer is exposed from the pore structures.

14. The sequencing chip according to claim 13, It is characterized in that The adsorption layer contains an adsorption material for adsorbing biological samples, and the adsorption material includes at least one of titanium nitride, titanium oxide, silver, zirconium oxide, and zinc oxide.

15. The sequencing chip according to claim 13, It is characterized in that The thickness of the adsorption layer is 20nm to 500nm.

16. The sequencing chip according to claim 13, It is characterized in that The material of the isolation layer includes silicon oxide or silicon nitride.

17. The sequencing chip according to claim 13, It is characterized in that A buffer layer is further provided between the substrate and the adsorption layer, and the material of the buffer layer includes silicon oxide or silicon nitride.

18. The sequencing chip according to claim 13, It is characterized in that The pore structure has a pore diameter of 100 nm to 300 nm; and / or, The depth of the pore structure is 20 nm to 150 nm; and / or, The distance between the centers of two adjacent pore structures is 200nm-1000nm.

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