Transistor structure, driving substrate and display panel

Abstract

Disclosed in the embodiments of the present application are a transistor structure, a driving substrate and a display panel. The transistor structure comprises: a substrate, a buffer layer and a transistor, wherein the buffer layer is disposed on the substrate; the transistor is disposed on the side of the buffer layer away from the substrate; and the buffer layer comprises a first silicon oxide layer and a second silicon oxide layer stacked in sequence on the substrate, the hydrogen content of the second silicon oxide layer being greater than 4%, and the hydrogen content of the first silicon oxide layer being less than that of the second silicon oxide layer.

Description

Transistor structure, driving substrate and display panel Technical Field

[0001] The present application relates to the field of display technology, and in particular to a transistor structure, a driving substrate and a display panel. Background Art

[0002] In traditional low-temperature polysilicon (LTPS) top-gate display device film designs, the buffer layer typically utilizes a stacked structure of silicon nitride and silicon oxide. However, because silicon nitride has a lower light transmittance than silicon oxide, resulting in a refractive index difference, this can lead to quality issues such as bluish blind vias and solid black. Furthermore, silicon nitride is not easily etched, leaving residue and causing yellowing defects at the corners.

[0003] Therefore, the related technology uses a full silicon oxide buffer layer to replace the silicon nitride + silicon oxide stack to solve the above technical problems. However, due to the unstable power of the deposition equipment in the early stage of buffer layer formation, the bottom film quality is poor, which in turn affects the film stability of the entire buffer layer. SUMMARY OF THE INVENTION

[0004] The embodiments of the present application provide a transistor structure, a driving substrate, and a display panel, which can improve the film stability of a buffer layer.

[0005] An embodiment of the present application provides a transistor structure, which includes:

[0006] substrate;

[0007] a buffer layer disposed on the substrate; and

[0008] a transistor, wherein the transistor is arranged on a side of the buffer layer away from the substrate;

[0009] The buffer layer includes a first silicon oxide layer and a second silicon oxide layer sequentially stacked on the substrate, the hydrogen content of the second silicon oxide layer is greater than 4%, and the hydrogen content of the first silicon oxide layer is less than that of the second silicon oxide layer.

[0010] Correspondingly, an embodiment of the present application further provides a driving substrate, which includes the transistor structure as described in any one of the above embodiments.

[0011] Correspondingly, an embodiment of the present application further provides a display panel, which includes the driving substrate described in the above embodiment. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG1 is a schematic structural diagram of a transistor structure provided in an embodiment of the present application;

[0013] FIG2 is a comparison diagram of the electron migration stability of an N-type thin film transistor (TFT);

[0014] FIG3 is a comparison diagram of the electron migration stability of a P-type thin film transistor (TFT);

[0015] FIG4 is a graph showing the SiO content of the sample-buffer layer analyzed using TOF SIMS. Modes for Carrying Out the Invention

[0016] The following will clearly and completely describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; while "inside" and "outside" refer to the outline of the device; the terms "first", "second", "third", etc. are used only as labels and do not impose numerical requirements or establish an order.

[0017] The embodiments of the present application provide a transistor, a driving substrate, and a display panel, which are described in detail below. It should be noted that the order in which the following embodiments are described does not limit the preferred order of the embodiments.

[0018] An embodiment of the present application provides a transistor structure, which includes:

[0019] substrate;

[0020] a buffer layer disposed on the substrate; and

[0021] a transistor, wherein the transistor is arranged on a side of the buffer layer away from the substrate;

[0022] The buffer layer includes a first silicon oxide layer and a second silicon oxide layer sequentially stacked on the substrate, the hydrogen content of the second silicon oxide layer is greater than 4%, and the hydrogen content of the first silicon oxide layer is less than that of the second silicon oxide layer.

[0023] Optionally, in some embodiments of the present application, the hydrogen content of the first silicon oxide layer is less than or equal to 4%.

[0024] Optionally, in some embodiments of the present application, the thickness of the first silicon oxide layer is greater than or equal to 500 angstroms.

[0025] Optionally, in some embodiments of the present application, the refractive index of the second silicon oxide layer is greater than the refractive index of the first silicon oxide layer.

[0026] Optionally, in some embodiments of the present application, the thickness of the second silicon oxide layer is greater than the thickness of the first silicon oxide layer.

[0027] Optionally, in some embodiments of the present application, the hydrogen content of the second silicon oxide layer is between 5% and 9%.

[0028] Optionally, in some embodiments of the present application, the refractive index of the second silicon oxide layer is between 1.50 and 1.58.

[0029] Optionally, in some embodiments of the present application, the buffer layer further includes a third silicon oxide layer stacked on a side of the second silicon oxide layer away from the substrate, and the hydrogen content of the third silicon oxide layer is less than that of the second silicon oxide layer.

[0030] Optionally, in some embodiments of the present application, the hydrogen content of the third silicon oxide layer is greater than or equal to 2% and less than or equal to 4%.

[0031] Optionally, in some embodiments of the present application, the thickness of the first silicon oxide layer is between 500 angstroms and 1000 angstroms, the thickness of the second silicon oxide layer is between 1000 angstroms and 2000 angstroms, the thickness of the third silicon oxide layer is between 500 angstroms and 1000 angstroms, and the refractive index of the second silicon oxide layer is greater than the refractive index of the third silicon oxide layer.

[0032] Optionally, in some embodiments of the present application, the refractive index of the first silicon oxide layer is between 1.45 and 1.49, and the refractive index of the third silicon oxide layer is between 1.45 and 1.49.

[0033] Optionally, in some embodiments of the present application, the hydrogen content of the first silicon oxide layer is greater than or equal to 2%.

[0034] Optionally, in some embodiments of the present application, the transistor includes an active layer, a gate insulating layer, a gate, a source and a drain, the active layer is arranged on a side of the buffer layer away from the substrate, the gate insulating layer covers the active layer, the gate is arranged on a side of the gate insulating layer away from the substrate, the source is connected to one end of the active layer, the drain is connected to the other end of the active layer, and the material of the active layer is single crystal silicon or polycrystalline silicon.

[0035] Accordingly, an embodiment of the present application further provides a driving substrate, which includes the transistor structure as described in any one of the above embodiments. For example, the transistor structure includes:

[0036] substrate;

[0037] a buffer layer disposed on the substrate; and

[0038] a transistor, wherein the transistor is arranged on a side of the buffer layer away from the substrate;

[0039] The buffer layer includes a first silicon oxide layer and a second silicon oxide layer stacked sequentially on the substrate, the hydrogen content of the second silicon oxide layer is greater than 4%, the hydrogen content of the first silicon oxide layer is less than the hydrogen content of the second silicon oxide layer, the hydrogen content of the first silicon oxide layer is less than or equal to 4%, and the refractive index of the second silicon oxide layer is greater than the refractive index of the first silicon oxide layer.

[0040] Optionally, in some embodiments of the present application, the thickness of the first silicon oxide layer is greater than or equal to 500 angstroms.

[0041] Optionally, in some embodiments of the present application, the thickness of the second silicon oxide layer is greater than the thickness of the first silicon oxide layer.

[0042] Optionally, in some embodiments of the present application, the buffer layer further includes a third silicon oxide layer stacked on a side of the second silicon oxide layer away from the substrate, and the hydrogen content of the third silicon oxide layer is less than that of the second silicon oxide layer.

[0043] Accordingly, an embodiment of the present application further provides a display panel, which includes the driving substrate described in the above embodiment. For example, the driving substrate includes a transistor structure, and the transistor structure includes:

[0044] substrate;

[0045] a buffer layer disposed on the substrate; and

[0046] a transistor, wherein the transistor is arranged on a side of the buffer layer away from the substrate;

[0047] The buffer layer includes a first silicon oxide layer and a second silicon oxide layer sequentially stacked on the substrate, the hydrogen content of the second silicon oxide layer is greater than 4%, the hydrogen content of the first silicon oxide layer is less than the hydrogen content of the second silicon oxide layer, and the hydrogen content of the first silicon oxide layer is less than or equal to 4%;

[0048] The buffer layer further includes a third silicon oxide layer stacked on a side of the second silicon oxide layer away from the substrate, and the hydrogen content of the third silicon oxide layer is less than that of the second silicon oxide layer.

[0049] Optionally, in some embodiments of the present application, the hydrogen content of the second silicon oxide layer is between 5% and 9%, and the hydrogen content of the third silicon oxide layer is greater than or equal to 2% and less than or equal to 4%.

[0050] Optionally, in some embodiments of the present application, the thickness of the first silicon oxide layer is greater than or equal to 500 angstroms.

[0051] The buffer layer of the transistor structure of the embodiment of the present application uses a first silicon oxide layer as the bottom layer of the buffer layer, wherein the hydrogen content of the first silicon oxide layer is lower than the hydrogen content of the second silicon oxide layer. That is, compared with the second silicon oxide layer, the first silicon oxide layer located at the bottom layer is an oxygen-rich film layer. Since the hydrogen content of the first silicon oxide layer is low, the silicon-hydrogen bonds in the first silicon oxide layer are also relatively small, thereby improving the stability of the full silicon oxide buffer layer in the initial stage of film formation.

[0052] 1 , an embodiment of the present application provides a transistor structure 100 , which includes a substrate 11 , a buffer layer 12 , and a transistor 13 .

[0053] The buffer layer 12 is disposed on the substrate 11 . The transistor 13 is disposed on a side of the buffer layer 12 away from the substrate 11 .

[0054] The buffer layer 12 includes a first silicon oxide layer 121 and a second silicon oxide layer 122 stacked sequentially on the substrate 11. The hydrogen content of the second silicon oxide layer 122 is greater than 4%. The hydrogen content of the first silicon oxide layer 121 is less than that of the second silicon oxide layer 122.

[0055] The buffer layer 12 of the transistor structure 100 of the embodiment of the present application uses a first silicon oxide layer 121 as the bottom layer of the buffer layer, wherein the hydrogen content of the first silicon oxide layer 121 is less than the hydrogen content of the second silicon oxide layer 122. That is, compared with the second silicon oxide layer, the first silicon oxide layer 121 located at the bottom layer is an oxygen-rich film layer. Since the hydrogen content of the first silicon oxide layer 121 is small, the silicon-hydrogen bonds in the first silicon oxide layer 121 are also small, thereby improving the stability of the full silicon oxide buffer layer 12 in the initial stage of film formation.

[0056] It should be understood that the hydrogen content refers to the percentage of hydrogen atoms in a film layer to the total number of atoms in the film layer. For example, the hydrogen content of the first silicon oxide layer 121 refers to the percentage of hydrogen atoms in the first silicon oxide layer 121 to the total number of atoms in the first silicon oxide layer 121.

[0057] Time of Flight Secondary Ion Mass Spectrometry (TOF SIMS) can be used to analyze the content (quantity) of hydrogen atoms and other atoms in the film layer.

[0058] Secondly, in the process of preparing the silicon oxide layer, a plasma enhanced chemical vapor deposition (PECVD) process is used. In the process, nitrous oxide (N2O) and silane (SiH4) need to be introduced into the chamber of the PECVD equipment to generate plasma and form SiO x :H (hydrogenated silicon oxide mixture) is deposited on substrate 11, so the formed silicon oxide layer contains hydrogen. The lower the hydrogen content, the more positive SiO ions there are, indicating that the silicon oxide layer is richer in oxygen, and vice versa.

[0059] In addition, when the silicon oxide layer is formed, silicon-hydrogen bonds (Si-H) are also generated. Silicon-hydrogen bonds are easily broken at high temperatures, resulting in hydrogen precipitation, which makes the film layer unstable.

[0060] Therefore, the richer the first silicon oxide layer 121 at the bottom layer is in oxygen, the lower the hydrogen content is, the fewer silicon-hydrogen bonds are, and the higher the quality stability of the film layer is. In turn, the film quality stability of the entire buffer layer 12 is higher, thereby improving the stability of the transistor 13.

[0061] Optionally, the hydrogen content of the first silicon oxide layer 121 is less than or equal to 4%, so as to ensure that the first silicon oxide layer 121 has excellent film stability.

[0062] Optionally, the hydrogen content of the first silicon oxide layer 121 is greater than or equal to 2%. Due to limitations of the PECVD process, the current minimum hydrogen content of the silicon oxide layer is 2%. Therefore, the hydrogen content of the first silicon oxide layer 121 is greater than or equal to 2%.

[0063] Therefore, the hydrogen content of the first silicon oxide layer 121 may be 2%, 2.1%, 2.2%, 2.3%, 2.4%, 2.5%, 2.6%, 2.7%, 2.8%, 2.9%, 3.0%, 3.1%, 3.2%, 3.3%, 3.4%, 3.5%, 3.6%, 3.7%, 3.8%, 3.9% or 4%.

[0064] Optionally, transistor 13 includes an active layer 131, a gate insulating layer 132, a gate 133, a source electrode 134, and a drain electrode 135. Active layer 131 is disposed on a surface of buffer layer 12 that is away from substrate 11. Gate insulating layer 132 covers active layer 131. Gate 133 is disposed on a surface of gate insulating layer 132 that is away from substrate 11. Source electrode 134 is connected to one end of active layer 131. Drain electrode 135 is connected to the other end of active layer 131. Active layer 131 is made of single crystal silicon or polycrystalline silicon.

[0065] Optionally, the gate insulating layer 132 further covers the buffer layer 12 , and the gate 133 , the source 134 and the drain 135 are arranged on the gate insulating layer 132 in the same layer.

[0066] In some embodiments, the gate 133 may also be provided in a different layer from the source 134 and the drain 135 and separated by an insulating layer.

[0067] Optionally, the thickness of the first silicon oxide layer 121 is greater than or equal to 500 angstroms.

[0068] The thickness of the first silicon oxide layer 121 is set to be greater than or equal to 500 angstroms to better improve the stability of the first silicon oxide layer 121 and to provide a stable base layer for subsequent silicon oxide layers, thereby improving the stability of the entire buffer layer 12 .

[0069] Optionally, the thickness of the first silicon oxide layer 121 can be 500 angstroms, 550 angstroms, 600 angstroms, 650 angstroms, 700 angstroms, 750 angstroms, 800 angstroms, 850 angstroms, 900 angstroms, 950 angstroms, 1000 angstroms, 1050 angstroms, 1100 angstroms, 1150 angstroms, 1200 angstroms, 1250 angstroms, 1300 angstroms, 1350 angstroms, 1400 angstroms, 1450 angstroms or 1500 angstroms, etc.

[0070] Optionally, the refractive index of the second silicon oxide layer 122 is greater than the refractive index of the first silicon oxide layer 121 .

[0071] It is understood that a higher refractive index indicates a higher density of the film. Therefore, compared to the first silicon oxide layer 121, the second silicon oxide layer 122 has a higher density to block the penetration of alkaline cations, reducing the risk of alkaline cations invading the channel of the transistor 13 and improving the stability of the transistor 13.

[0072] Optionally, the thickness of the second silicon oxide layer 122 is greater than the thickness of the first silicon oxide layer 121 .

[0073] It is understandable that the thicker the second silicon oxide layer 122 is, the better its effect of blocking alkaline cations is. Therefore, the above configuration can improve the performance of the second silicon oxide layer 122 in blocking alkaline cations.

[0074] Optionally, the hydrogen content of the second silicon oxide layer 122 is between 5% and 9%. That is, the second silicon oxide layer 122 is a silicon-rich film layer. The density of a silicon-rich film layer is greater than that of an oxygen-rich film layer. A higher hydrogen content increases the density of the film layer, increases the refractive index, and increases the optical impact. Therefore, setting the hydrogen content of the second silicon oxide layer 122 between 5% and 9% ensures both the ability to block alkaline cations and the optical requirements.

[0075] Optionally, the hydrogen content of the second silicon oxide layer 122 may be 5%, 5.5%, 6%, 6.5%, 7%, 7.5%, 8%, 8.5% or 9%.

[0076] Optionally, the refractive index of the second silicon oxide layer 122 is between 1.50 and 1.58, for example, 1.50, 1.51, 1.52, 1.53, 1.54, 1.55, 1.56, 1.57 or 1.58.

[0077] The refractive index of the second silicon oxide layer 122 is selected to be between 1.50 and 1.58, which can meet the need of blocking alkaline cations while meeting the optical requirements.

[0078] Optionally, the buffer layer 12 further includes a third silicon oxide layer 123 stacked on a side of the second silicon oxide layer 122 away from the substrate 11 , and the hydrogen content of the third silicon oxide layer 123 is less than that of the second silicon oxide layer 122 .

[0079] The third silicon oxide layer 123 having a lower hydrogen content than the second silicon oxide layer 122 is directly in contact with the active layer 131 of the transistor 13 , so that the contact interface between the active layer 131 and the third silicon oxide layer 123 tends to be stable, thereby improving the stability of the transistor 13 .

[0080] Optionally, the hydrogen content of the third silicon oxide layer 123 is greater than or equal to 2% and less than or equal to 4%.

[0081] It should be understood that the material of the active layer 131 of the transistor 13 is a silicon semiconductor, and the active layer 131 contains suspended silicon ions. The suspended silicon ions can combine with the hydrogen ions of the third silicon oxide layer 123 to form silicon-hydrogen bonds, which makes the interface between the third silicon oxide layer 123 and the active layer 131 more stable compared to the uncombined suspended silicon and hydrogen.

[0082] Secondly, in the process of preparing the active layer 131, annealing for dehydrogenation is performed. The third silicon oxide layer 123 itself has silicon-hydrogen bonds. If the hydrogen content of the third silicon oxide layer 123 is too much, it will increase the difficulty of dehydrogenation, and too many silicon-hydrogen bonds will be broken, which will cause the film quality of the third silicon oxide layer 123 to be unstable. Therefore, the hydrogen content of the third silicon oxide layer 123 should not be too much. In this embodiment, the hydrogen content of the third silicon oxide layer 123 is limited to less than or equal to 4%.

[0083] After annealing to remove hydrogen, the active layer 131 and the third silicon oxide layer 123 are further hydrogenated to form silicon-hydrogen bonds at the interface between the active layer 131 and the third silicon oxide layer 123, thereby improving the stability of the interface. The amount of hydrogen removed and the amount of hydrogen replenished are relatively balanced, meaning that the amount of hydrogen replenished is equal to the amount of hydrogen removed. However, due to equipment precision issues, the two cannot be completely balanced, so they are relatively balanced.

[0084] Therefore, the hydrogen content of the third silicon oxide layer 123 is greater than or equal to 2%, which is beneficial to improving the stability of the transistor 13 .

[0085] Optionally, the hydrogen content of the third silicon oxide layer 123 may be 2%, 2.1%, 2.2%, 2.3%, 2.4%, 2.5%, 2.6%, 2.7%, 2.8%, 2.9%, 3.0%, 3.1%, 3.2%, 3.3%, 3.4%, 3.5%, 3.6%, 3.7%, 3.8%, 3.9% or 4%.

[0086] Optionally, the thickness of the first silicon oxide layer 121 is between 500 angstroms and 1000 angstroms, the thickness of the second silicon oxide layer 122 is between 1000 angstroms and 2000 angstroms, the thickness of the third silicon oxide layer 123 is between 500 angstroms and 1000 angstroms, and the refractive index of the second silicon oxide layer 122 is greater than the refractive index of the third silicon oxide layer 123.

[0087] It should be noted that the refractive index of the buffer layer 12 depends on the refractive index and film structure of the first silicon oxide layer 121 , the second silicon oxide layer 122 , and the third silicon oxide layer 123 .

[0088] In order to meet the need of the buffer layer 12 to block alkaline cations and optical requirements, the refractive index differences between the second silicon oxide layer 122 and the first silicon oxide layer 121 and the third silicon oxide layer 123 are kept small.

[0089] Since the refractive index of the second silicon oxide layer 122 is relatively high, providing a thicker second silicon oxide layer 122 facilitates faster adaptation to the refractive index of the buffer layer 12 and the need to block alkaline cations, and prevents the buffer layer 12 from being too thick.

[0090] Optionally, the refractive index of the first silicon oxide layer 121 is between 1.45 and 1.49, and the refractive index of the third silicon oxide layer 123 is between 1.45 and 1.49.

[0091] Since the refractive index of the second silicon oxide layer 122 is between 1.50 and 1.58, the difference between the refractive index of the first silicon oxide layer 121 and the third silicon oxide layer 123 and the refractive index of the second silicon oxide layer 122 is between 0.01 and 0.13, so that the optical quality of the buffer layer 12 is better.

[0092] Furthermore, the refractive index of the first silicon oxide layer 121 is between 1.45 and 1.49. The refractive index of the third silicon oxide layer 123 is between 1.45 and 1.49. The refractive index of the second silicon oxide layer 122 is between 1.50 and 1.58. The thickness of the first silicon oxide layer 121 is between 500 angstroms and 1000 angstroms, the thickness of the second silicon oxide layer 122 is between 1000 angstroms and 2000 angstroms, and the thickness of the third silicon oxide layer 123 is between 500 angstroms and 1000 angstroms.

[0093] By selecting the refractive index and thickness of each film layer, the effects of better blocking alkaline cations, better optical quality and thinning the buffer layer 12 can be achieved.

[0094] Optionally, the refractive index of the first silicon oxide layer 121 and the third silicon oxide layer 123 may be 1.45, 1.46, 1.47, 1.48 or 1.49 respectively.

[0095] The thickness of the first silicon oxide layer 121 and the third silicon oxide layer 123 may each be 500 angstroms, 550 angstroms, 600 angstroms, 650 angstroms, 700 angstroms, 750 angstroms, 800 angstroms, 850 angstroms, 900 angstroms, 950 angstroms, or 1000 angstroms.

[0096] The thickness of the second silicon oxide layer 122 may be 1000 angstroms, 1050 angstroms, 1100 angstroms, 1150 angstroms, 1200 angstroms, 1250 angstroms, 1300 angstroms, 1350 angstroms, 1400 angstroms, 1450 angstroms, 1500 angstroms, 1550 angstroms, 1600 angstroms, 1650 angstroms, 1700 angstroms, 1750 angstroms, 1800 angstroms, 1850 angstroms, 1900 angstroms, 1950 angstroms, or 2000 angstroms.

[0097] It should be noted that different nitrous oxide to silane ratios (N2O / SiH4) can be used to form silicon oxide layers of varying thicknesses during the preparation of the buffer layer 12. A larger nitrous oxide to silane ratio results in a lower hydrogen content in the film, i.e., an oxygen-rich film; conversely, a silicon-rich film.

[0098] As shown in Table 1:

[0099]

[0100] The embodiments of the present application are not limited to the above-mentioned solutions, and the film thickness and gas ratio can be changed and combined according to needs.

[0101] In addition, according to Table 2, Figures 2 and 3, it can be seen that the electron mobility of the transistor 13 using the buffer layer of the stacked structure of the first silicon oxide layer 121 + the second silicon oxide layer 122 + the third silicon oxide layer 123 is more stable, and the thicker the first silicon oxide layer 121, the better the stability.

[0102] Table 2: Buffer layer conditions 1 Condition 2 Condition 3 Condition 4 Number of film layers 1 1 3 (stacked architecture of the present application) 3 (stacked architecture of the present application) Film thickness 3000 Å 3000 Å 500 Å / 2000 Å / 500 Å 1000 Å / 1500 Å / 500 Å N2O / SiH469 15 / 6 / 15 15 / 6 / 15

[0103] Among them, the electron mobility stability of the transistor corresponding to condition 4 is the best.

[0104] Secondly, the buffer layer 12 may be analyzed using a time of flight secondary ion mass spectrometer (TOF SIMS), and different film layers may be distinguished by analyzing the content variation trend of H or SiO.

[0105] For example, the sample buffer layer 12 consists of a first silicon oxide layer (bottom layer), a second silicon oxide layer (middle layer), and a third silicon oxide layer (top layer), with thicknesses of 500 angstroms, 1500 angstroms, and 500 angstroms. By analyzing the SiO content (quantity) of the sample buffer layer 12 using TOF SIMS, the top, middle, and bottom layers can be distinguished, as shown in Figure 4.

[0106] The embodiment of the present application further provides a driving substrate, which includes the transistor structure 100 as described in the above embodiment.

[0107] The transistor structure of the driving substrate of this embodiment is similar to or the same as the transistor structure 100 of the above embodiment, and will not be described again here.

[0108] Optionally, the drive substrate may be an array substrate or a drive backplane. The array substrate may be used in a liquid crystal display panel. The drive backplane may be used in an organic light-emitting diode display panel, an inorganic light-emitting diode display panel, a micro-light-emitting diode display panel, a sub-millimeter light-emitting diode display panel, a quantum dot light-emitting diode display panel, or an electrophoretic display panel.

[0109] The buffer layer 12 of the transistor structure 100 in the driver substrate of the embodiment of the present application uses a first silicon oxide layer 121 as the bottom layer of the buffer layer, wherein the second silicon oxide layer 122 has a hydrogen content greater than 4%. The hydrogen content of the first silicon oxide layer 121 is less than that of the second silicon oxide layer 122. In other words, compared to the second silicon oxide layer 122, the first silicon oxide layer 121 at the bottom layer is an oxygen-rich film layer. Due to the low hydrogen content of the first silicon oxide layer 121, the first silicon oxide layer 121 also has fewer silicon-hydrogen bonds, which can improve the stability of the all-silicon oxide buffer layer 12 during the initial film formation, thereby improving the stability of the electron mobility in the thin film transistor.

[0110] An embodiment of the present application further provides a display panel, which includes the driving substrate described in the above embodiment.

[0111] Optionally, the display panel may be a liquid crystal display panel, an organic light emitting diode display panel, an inorganic light emitting diode display panel, a micro light emitting diode display panel, a sub-millimeter light emitting diode display panel, a quantum dot light emitting diode display panel or an electrophoretic display panel, etc.

[0112] The buffer layer 12 of the transistor structure 100 in the display panel of the embodiment of the present application uses a first silicon oxide layer 121 as the bottom layer of the buffer layer, wherein the second silicon oxide layer 122 has a hydrogen content greater than 4%. The hydrogen content of the first silicon oxide layer 121 is less than that of the second silicon oxide layer 122. In other words, compared to the second silicon oxide layer 122, the first silicon oxide layer 121 at the bottom layer is an oxygen-rich film layer. Due to the low hydrogen content of the first silicon oxide layer 121, the first silicon oxide layer 121 also has fewer silicon-hydrogen bonds, which can improve the stability of the all-silicon oxide buffer layer 12 during the initial film formation, thereby improving the stability of the electron mobility in the thin film transistor.

[0113] The above is a detailed introduction to a transistor, a driving substrate and a display panel provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A transistor structure, include: substrate; a buffer layer, the buffer layer being disposed on the substrate; as well as A transistor, wherein the transistor is arranged on a side of the buffer layer away from the substrate; The buffer layer includes a first silicon oxide layer and a second silicon oxide layer sequentially stacked on the substrate, the second silicon oxide layer has a hydrogen content greater than 4%, and the first silicon oxide layer has a hydrogen content less than that of the second silicon oxide layer.

2. The transistor structure according to claim 1, in, The hydrogen content of the first silicon oxide layer is less than or equal to 4%.

3. The transistor structure according to claim 1, in, The thickness of the first silicon oxide layer is greater than or equal to 500 angstroms.

4. The transistor structure according to claim 1, in, The refractive index of the second silicon oxide layer is greater than the refractive index of the first silicon oxide layer.

5. The transistor structure according to claim 4, in, The thickness of the second silicon oxide layer is greater than the thickness of the first silicon oxide layer.

6. The transistor structure according to claim 5, in, The hydrogen content of the second silicon oxide layer is between 5% and 9%.

7. The transistor structure according to claim 6, in, The refractive index of the second silicon oxide layer is between 1.50 and 1.

58.

8. The transistor structure according to claim 1, in, The buffer layer further includes a third silicon oxide layer stacked on a side of the second silicon oxide layer away from the substrate, and the hydrogen content of the third silicon oxide layer is less than that of the second silicon oxide layer.

9. The transistor structure according to claim 8, in, The hydrogen content of the third silicon oxide layer is greater than or equal to 2% and less than or equal to 4%.

10. The transistor structure according to claim 9, in, The thickness of the first silicon oxide layer is between 500 angstroms and 1000 angstroms, the thickness of the second silicon oxide layer is between 1000 angstroms and 2000 angstroms, the thickness of the third silicon oxide layer is between 500 angstroms and 1000 angstroms, and the refractive index of the second silicon oxide layer is greater than the refractive index of the third silicon oxide layer.

11. The transistor structure according to claim 10, in, The refractive index of the first silicon oxide layer is between 1.45 and 1.49, and the refractive index of the third silicon oxide layer is between 1.45 and 1.

49.

12. The transistor structure according to claim 1, in, The hydrogen content of the first silicon oxide layer is greater than or equal to 2%.

13. The transistor structure according to claim 8, in, The transistor includes an active layer, a gate insulating layer, a gate, a source and a drain. The active layer is arranged on a side of the buffer layer away from the substrate, the gate insulating layer covers the active layer, the gate is arranged on a side of the gate insulating layer away from the substrate, the source is connected to one end of the active layer, and the drain is connected to the other end of the active layer. The material of the active layer is single crystal silicon or polycrystalline silicon.

14. A driving substrate, comprising a transistor structure, wherein the transistor structure include: substrate; a buffer layer, the buffer layer being disposed on the substrate; as well as A transistor, wherein the transistor is arranged on a side of the buffer layer away from the substrate; Among them, the buffer layer includes a first silicon oxide layer and a second silicon oxide layer stacked in sequence on the substrate, the hydrogen content of the second silicon oxide layer is greater than 4%, the hydrogen content of the first silicon oxide layer is less than the hydrogen content of the second silicon oxide layer, the hydrogen content of the first silicon oxide layer is less than or equal to 4%, and the refractive index of the second silicon oxide layer is greater than the refractive index of the first silicon oxide layer.

15. The driving substrate according to claim 14, in, The thickness of the first silicon oxide layer is greater than or equal to 500 angstroms.

16. The driving substrate according to claim 14, in, The thickness of the second silicon oxide layer is greater than the thickness of the first silicon oxide layer.

17. The driving substrate according to claim 14, in, The buffer layer further includes a third silicon oxide layer stacked on a side of the second silicon oxide layer away from the substrate, and the hydrogen content of the third silicon oxide layer is less than that of the second silicon oxide layer.

18. A display panel, comprising a driving substrate, the driving substrate comprising a transistor structure, the transistor structure include: substrate; a buffer layer, the buffer layer being disposed on the substrate; as well as A transistor, wherein the transistor is arranged on a side of the buffer layer away from the substrate; The buffer layer includes a first silicon oxide layer and a second silicon oxide layer sequentially stacked on the substrate, the second silicon oxide layer has a hydrogen content greater than 4%, the first silicon oxide layer has a hydrogen content less than the second silicon oxide layer, and the first silicon oxide layer has a hydrogen content less than or equal to 4%; The buffer layer further includes a third silicon oxide layer stacked on a side of the second silicon oxide layer away from the substrate, and the hydrogen content of the third silicon oxide layer is less than that of the second silicon oxide layer.

19. The display panel according to claim 18, in, The hydrogen content of the second silicon oxide layer is between 5% and 9%, and the hydrogen content of the third silicon oxide layer is greater than or equal to 2% and less than or equal to 4%.

20. The display panel according to claim 18, in, The thickness of the first silicon oxide layer is greater than or equal to 500 angstroms.

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