Thermal correction wafer bearing table, photolithography device, and high-order overlay error correction method

Abstract

The present disclosure provides a thermal correction wafer bearing table, a photolithography device, and a high-order overlay error correction method. The thermal correction wafer bearing table sequentially comprises, from top to bottom: a vacuum chuck comprising an array composed of protrusions, and a sealing side wall and used for suctioning and fixing a wafer; a thermal correction execution assembly comprising a substrate and an array composed of temperature-based execution units, each temperature-based execution unit comprising a heating / cooling element and a first temperature sensor, and the thermal correction execution assembly being used for controlling thermal deformation of the wafer to correct a high-order overlay error; a supporting assembly comprising a mounting flange used for being fixedly connected to the vacuum chuck and an array composed of second through holes; and a piezoelectric ceramic driving assembly comprising an array composed of piezoelectric ceramic units, the piezoelectric ceramic units passing through the second through holes, and first through holes in the thermal correction execution assembly and then being in contact with the lower surface of the vacuum chuck, and the piezoelectric ceramic driving assembly being used for regulating and controlling the surface shape of the wafer, wherein the array composed of protrusions, the array composed of temperature-based execution units, the array composed of second through holes and the array composed of piezoelectric ceramic units correspond to each other.

Description

Thermal correction stage, photolithography equipment and high-order overlay error correction method

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This disclosure claims priority to Chinese patent application number 202311509873.0 filed with the State Intellectual Property Office of China on November 13, 2023, entitled “Thermal Correction Wafer Stage, Photolithography Equipment and High-Order Overlay Error Correction Method,” the entire contents of which are incorporated by reference into this disclosure. Technical Field

[0003] The present disclosure relates to the technical field of semiconductor equipment, and in particular to a thermal correction wafer stage, a photolithography device, and a high-order overlay error correction method. Background Art

[0004] As semiconductor chip linewidths decrease, high-resolution overlay error control is a major challenge in photolithography. Deformation of the mask and wafer, uneven wafer stage movement, and environmental factors can all introduce alignment overlay errors. Currently, linear overlay error correction, such as translation, rotation, and magnification, can be achieved by applying force actuators around the mask.

[0005] When linear overlay error correction is not accurate enough, it is necessary to correct for higher-order overlay errors. Current lithography equipment only supports up to third-order overlay errors, and several higher-order terms cannot be accurately corrected by controlling the lens alone.

[0006] High-order overlay error correction based on thermal actuators has higher precision requirements for the surface shape of the wafer. Therefore, the development of a wafer stage that takes into account both wafer surface shape control and high-order overlay error correction is of great value.

[0007] Summary of the Invention

[0008] (1) Technical issues to be resolved

[0009] In response to the above problems, the present disclosure provides a thermal correction stage, a photolithography device and a high-order overlay error correction method, which are used to solve technical problems such as the difficulty in accurately correcting high-order overlay errors using traditional methods.

[0010] (2) Technical solution

[0011] The first aspect of the present disclosure provides a thermal correction wafer stage, which includes, from top to bottom: a vacuum suction cup, including an array composed of protrusions and a sealing side wall arranged around the periphery of the array, for adsorbing and fixing the wafer; a thermal correction execution assembly, including a substrate and an array composed of temperature execution units, each temperature execution unit including a heating / cooling element and a first temperature sensor, for controlling the thermal deformation of the wafer to correct high-order overlay errors; a support assembly, including a mounting flange for fixed connection to the vacuum suction cup and an array composed of second through holes; a piezoelectric ceramic drive assembly, including an array composed of piezoelectric ceramic units, the piezoelectric ceramic units passing through the second through holes and the first through holes on the thermal correction execution assembly and then contacting the lower surface of the vacuum suction cup, for regulating the surface shape of the wafer; wherein, the array composed of protrusions, the array composed of temperature execution units, the array composed of second through holes and the array composed of piezoelectric ceramic units correspond to each other.

[0012] According to an embodiment of the present disclosure, the thickness of the vacuum suction cup is 1 to 2 mm; the material of the vacuum suction cup is any one of silicon carbide and aluminum nitride; and gaps are provided between adjacent protrusions in the vacuum suction cup to insulate each other from heat.

[0013] According to an embodiment of the present disclosure, the substrate in the thermal correction execution component is a PCB board designed with a circuit; the heating / cooling element is a thermoelectric element, such as a Peltier, which is arranged on the lower surface of the substrate, and the temperature of each heating / cooling element is independently controlled; the first temperature sensor is a thermistor, which is arranged on the upper surface of the substrate.

[0014] According to an embodiment of the present disclosure, a heat transfer hole is further provided in the substrate, and the heat transfer hole is filled with a heat conductive material; the heat transfer hole is in contact with the heating / cooling element and is used to quickly transfer heat to the protrusion.

[0015] According to an embodiment of the present disclosure, the heating / cooling element includes: a resistance heating wire, the material of which is metal or conductive ceramic; a cooling water pipe, the liquid of which is any one of water and ethylene glycol; a heat conductive block, the upper surface of which accommodates the resistance heating wire and the cooling water pipe for heat conduction; and a second temperature sensor, which is arranged on the lower surface of the heat conductive block.

[0016] According to an embodiment of the present disclosure, the support assembly also includes: at least four wire outlets for centrally leading out the circuit connection wires of the heating / cooling element and the first temperature sensor; a third through hole for accommodating the vacuum channel of the vacuum suction cup; and a cooling water pipe channel provided on the lower surface of the support assembly for releasing the heat generated by the heating / cooling element to the outside.

[0017] According to an embodiment of the present disclosure, the potential difference across each piezoelectric ceramic unit in the piezoelectric ceramic drive assembly is independently controlled to apply force to the vacuum suction cup, thereby regulating the surface shape of the wafer; wherein the surface shape PV within an exposure field in the wafer is less than 10nm.

[0018] The second aspect of the present disclosure provides a lithography device, including: the above-mentioned thermal correction stage, which is used to adjust the surface shape of the wafer and control the thermal deformation of the wafer to correct high-order overlay errors; an exposure light source; an alignment system, which is used to measure the overlay error; and a thermal correction control system, which is used to adjust the working state of the thermal correction execution component according to temperature load data to control the thermal deformation of the wafer and thereby correct the high-order overlay error.

[0019] The third aspect of the present disclosure provides a method for correcting high-order overlay errors, including: S1, after using a vacuum suction cup to absorb and fix the wafer, using a piezoelectric ceramic drive component to control the surface shape of the wafer; S2, establishing a grid coordinate system for an exposure field to obtain the thermal deformation matrix of the wafer; S3, using an alignment system to measure the overlay error in the exposure field, and calculating the temperature load control matrix data based on the overlay error; S4, adjusting the working state of the thermal correction execution component according to the temperature load control matrix data to control the thermal deformation of the wafer and thereby correct the high-order overlay error.

[0020] According to an embodiment of the present disclosure, it also includes: S5, using the alignment system to measure the overlay error after correcting the high-order overlay error; if the preset overlay accuracy is not met, the thermal deformation matrix is ​​corrected, and S3 to S5 are repeated until the preset overlay accuracy is met; if the preset overlay accuracy is met, the high-order overlay error correction process is ended. (3) Beneficial effects

[0021] The thermal correction wafer stage, photolithography equipment and high-order overlay error correction method disclosed in the present invention utilize an array of temperature execution units in a thermal correction execution component to control the thermal deformation of the wafer to achieve correction of the wafer's overlay errors in the X and Y directions. It is capable of correcting overlay errors, especially high-order overlay errors, between and within exposure fields with higher precision. At the same time, in order to achieve efficient heat conduction, the vacuum suction cup is designed to be very thin, which will cause deformation of the wafer during adsorption and affect the exposure effect. The piezoelectric ceramic drive component is used to control the surface shape of the wafer to achieve correction of the wafer's Z-direction deformation. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] FIG1 schematically shows an exploded view of a thermal correction wafer stage according to an embodiment of the present disclosure;

[0023] FIG2 schematically shows a cross-sectional view of a thermal correction wafer stage according to an embodiment of the present disclosure;

[0024] FIG3 schematically shows a cross-sectional view of a vacuum chuck and a thermal correction actuator in cooperation with each other according to an embodiment of the present disclosure;

[0025] FIG4 schematically shows a schematic structural diagram of a heating / cooling element according to an embodiment of the present disclosure;

[0026] FIG5 schematically shows a structural diagram of a support assembly according to an embodiment of the present disclosure;

[0027] FIG6 schematically shows a schematic diagram of the control process of the thermal correction control system according to an embodiment of the present disclosure;

[0028] FIG7 schematically shows a flow chart of a method for correcting high-order overlay errors according to an embodiment of the present disclosure;

[0029] FIG8 schematically shows a schematic structural diagram of a grid coordinate system according to an embodiment of the present disclosure;

[0030] FIG9 schematically shows a schematic diagram of the arrangement structure of the temperature execution unit of the thermal correction execution component according to an embodiment of the present disclosure;

[0031] Description of reference numerals:

[0032] 1. Wafer; 2. Vacuum suction cup; 21. Airtight side wall; 22. Protrusion; 23. Vacuum channel; 3. Thermal correction actuator; 31. Substrate; 32. Heating / cooling element; 33. First temperature sensor; 34. Heat transfer hole; 311. Resistance heating wire; 312. Cooling water pipe; 313. Heat conduction block; 314. Second temperature sensor; 4. Support assembly; 41. Mounting flange; 42. Wire outlet; 43. Second through hole; 44. Third through hole; 45. Cooling water pipe channel; 5. Piezoelectric ceramic drive assembly; 51. Piezoelectric ceramic unit. DETAILED DESCRIPTION

[0033] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0034] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The terms "comprise," "include," etc. used herein indicate the presence of the features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0035] It should be noted that if directional indications are involved in the embodiments of the present disclosure, the directional indications are only used to explain the relative positional relationship, movement status, etc. between the components under a certain specific posture. If the specific posture changes, the directional indications will also change accordingly.

[0036] The use of ordinal numbers such as "first," "second," and "third" in the specification and claims to modify corresponding elements does not in itself imply or represent any ordinal number of the elements, nor does it represent the order of one element relative to another or the order in the manufacturing method. The use of such ordinal numbers is only used to clearly distinguish one element with a certain name from another element with the same name.

[0037] The present disclosure provides a thermal correction wafer stage, as shown in Figures 1 and 2. From top to bottom, the stage comprises: a vacuum chuck 2, comprising an array of protrusions 22 and a sealing sidewall 21 surrounding the array, for adsorbing and fixing a wafer 1; a thermal correction actuator 3, comprising a base plate 31 and an array of temperature actuator units, each temperature actuator unit including a heating / cooling element 32 and a first temperature sensor 33, for controlling thermal deformation of the wafer 1 to correct high-order overlay errors; a support assembly 4, comprising a mounting flange 41 for fixedly connecting to the vacuum chuck 2 and an array of second through-holes 43; a piezoelectric ceramic drive assembly 5, comprising an array of piezoelectric ceramic units 51, which pass through the second through-holes 43 and the first through-holes on the thermal correction actuator 3 and then contact the lower surface of the vacuum chuck 2 to control the surface shape of the wafer 1; wherein the array of protrusions 22, the array of temperature actuator units, the array of second through-holes 43, and the array of piezoelectric ceramic units 51 correspond to each other.

[0038] This thermal correction stage features a multi-layer structure, integrating vacuum suction, high-order overlay error correction, and wafer surface shape control. The array of temperature actuators within the thermal correction actuator assembly 3 controls the thermal deformation of wafer 1 to correct overlay errors in both the X and Y directions. This allows for precise correction of overlay errors, especially high-order overlay errors, between and within exposure fields. Furthermore, to achieve efficient heat conduction, the vacuum chuck 2 is designed to be very thin, which can cause deformation of wafer 1 during suction and affect exposure. The piezoelectric ceramic drive assembly 5 controls the surface shape of wafer 1, correcting any Z-direction deformation.

[0039] Based on the above embodiment, the thickness of the vacuum suction cup 2 is 1 to 2 mm; the material of the vacuum suction cup 2 is any one of silicon carbide and aluminum nitride; and gaps are provided between adjacent protrusions 22 in the vacuum suction cup 2 for mutual thermal insulation.

[0040] The vacuum chuck 2 includes a sealing side wall 21 and a plurality of protrusions 22 arranged in the area enclosed by the sealing side wall 21. The protrusions 22 may be cylindrical. The wafer 1 can be attached to the upper surface of the vacuum chuck 2 and contact the surface of the protrusions 22. Under the action of vacuum, the wafer 1 and the vacuum chuck 2 are tightly attached and a closed vacuum chamber is formed between the two, thereby fixing the wafer 1. The vacuum chuck 2 can locally transfer the heat received from the thermal correction actuator 3 to the wafer 1, thereby controlling the thermal deformation of the wafer 1 and correcting high-order overlay errors. There is a certain gap between the protrusions 22 of the vacuum chuck 2, which can achieve the function of thermal insulation from each other, thereby locally controlling the temperature of the wafer 1. In order to achieve efficient heat conduction, the thickness of the wafer support surface formed by the vacuum chuck 2 should be set to be significantly smaller than the thickness of the existing conventional wafer support surface, for example, 1 to 2 mm.

[0041] Based on the above embodiment, as shown in Figure 3, the substrate 31 in the thermal correction execution component 3 is a PCB board designed with a circuit; the heating / cooling element 32 is a thermoelectric element, which is arranged on the lower surface of the substrate 31, and the temperature of each heating / cooling element 32 is independently controlled; the first temperature sensor 33 is a thermistor, which is arranged on the upper surface of the substrate 31.

[0042] The thermal correction actuator 3 includes a base plate 31 and a temperature actuator unit consisting of multiple first temperature sensors 33 and heating / cooling elements 32. The temperature of each heating / cooling element 32 can be independently controlled. The base plate 31 can be a printed circuit board (PCB) with circuitry installed. The heating / cooling elements 32 can be thermoelectric elements soldered to the bottom surface of the base plate 31 to form a conductive circuit, achieving heating and cooling functions by redirecting the flow of current. The first temperature sensors 33 can be thermistors soldered to the top surface of the base plate 31 to measure the temperature of the heating / cooling elements 32.

[0043] The control component provides feedback control over the temperature of each heating / cooling element 32 in the temperature actuator unit, enabling the thermal correction component 3 to achieve thermal deformation correction. During the heating or cooling process, the first temperature sensor 33 monitors the temperature changes of each heating / cooling element 32 in the temperature actuator unit in real time and transmits this data to the control component. The control component adjusts the operating state of the heating / cooling element 32 based on the set temperature range and temperature change rate, among other temperature load data, to achieve stable temperature control.

[0044] The array of temperature actuation units in the thermal correction actuator assembly 3 can be used in various temperature control systems, enabling independent temperature control of multiple zones within a small area. The temperature matrix for correcting high-order overlay errors is calculated based on the thermal deformation matrix. This allows for rapid and efficient correction of high-order overlay errors, and can be applied to high-precision deformation correction systems in other fields.

[0045] Based on the above embodiment, a heat transfer hole 34 is further provided in the substrate 31 , and the heat transfer hole 34 is filled with a heat conductive material; the heat transfer hole 34 is in contact with the heating / cooling element 32 for quickly transferring heat to the protrusion 22 .

[0046] As shown in Figure 3, a heat transfer hole 34 is provided on the substrate 31. A heat conductive material (such as copper) is filled into the heat transfer hole 34 so that the temperature of the heating / cooling element 32 is quickly transferred to the upper surface of the protrusion 22 in the vacuum suction cup 2, thereby achieving the purpose of heating / cooling the wafer 1.

[0047] According to another embodiment of the present disclosure, the heating / cooling element 32 includes: a resistance heating wire 311, the material of which is metal or conductive ceramic; a cooling water pipe 312, the liquid of which is any one of water and ethylene glycol; a heat conductive block 313, the upper surface of which accommodates the resistance heating wire 311 and the cooling water pipe 312 for heat conduction; and a second temperature sensor 314, which is arranged on the lower surface of the heat conductive block 313.

[0048] The heating / cooling element 32 may specifically have the structure shown in FIG4 , with a resistance heating wire 311 and a cooling water pipe 312 embedded in a heat conductive block 313 . A second temperature sensor 314 is attached to the back of the heat conductive block 313 to measure the temperature of the heating / cooling element 32 . The resistance heating wire 311 may comprise a metal such as tungsten, copper, or a nickel-chromium alloy, or a conductive ceramic such as tungsten carbide or titanium nitride. The liquid in the cooling water pipe 312 may comprise water, ethylene glycol, or the like.

[0049] Based on the above embodiment, the support assembly 4 also includes: at least four wire outlets 42 for centrally leading out the circuit connection wires of the heating / cooling element 32 and the first temperature sensor 33; a third through hole 44 for accommodating the vacuum channel 23 of the vacuum suction cup 2; and a cooling water pipe channel 45 provided on the lower surface of the support assembly 4 for releasing the heat generated by the heating / cooling element 32 to the outside.

[0050] The support assembly 4 is mechanically connected to the vacuum chuck 2 via a mounting flange 41, with the thermal correction actuator 3 sandwiched between them. The wires for the thermal correction actuator 3 are centrally led out of the support assembly 4 through wire outlets 42, as shown in Figure 5(a). For example, there are four wire outlets 42, evenly distributed around the periphery of the array of second through-holes 43. The first temperature sensor 33 and heating / cooling element 32 in the temperature actuator unit are soldered to the circuit-mounted substrate 31. The wires are centrally led out at the edge of the support assembly 4, reducing the failure rate of the temperature actuator unit and improving connection efficiency.

[0051] As shown in Figure 5(b), the back of the support assembly 4 can be further designed with a cooling water channel 45 that runs beneath the heating / cooling element 32. This channel releases heat generated by the heating / cooling element 32 to the outside through water cooling. The temperature of the support assembly 4 can be controlled by adjusting the flow rate and temperature of the cooling water using a control unit.

[0052] Based on the above embodiment, the potential difference across each piezoelectric ceramic unit 51 in the piezoelectric ceramic drive assembly 5 is independently controlled to apply force to the vacuum suction cup 2, thereby regulating the surface shape of the wafer 1; wherein, the surface shape within an exposure field in the wafer 1 is preferably controlled to PV<10nm.

[0053] The piezoelectric ceramic drive assembly 5 is used to control the surface shape of the wafer 1, preventing deformation of the wafer 1 due to adsorption caused by the thin thickness of the wafer stage support surface, which could affect the exposure effect. The piezoelectric ceramic drive assembly 5 is installed below the support assembly 4 and can control a single exposure field. After the exposure field is switched, the piezoelectric ceramic drive assembly 5 exits under motor control and moves to the corresponding exposure field before resuming operation. However, the present disclosure is not limited to this embodiment; multiple piezoelectric ceramic drive assemblies 5 can also be provided to control each exposure field separately.

[0054] The surface of the piezoelectric ceramic drive assembly 5 is provided with an array consisting of a plurality of piezoelectric ceramic units 51. The external circuit independently applies a potential difference to the two ends of each piezoelectric ceramic unit 51, causing the piezoelectric ceramic unit 51 to deform independently. The piezoelectric ceramic unit 51 passes through the through holes provided on the support assembly 4 and the thermal correction execution assembly 3, respectively, and directly contacts the lower surface of the vacuum suction cup 2, thereby regulating the surface shape of the wafer 1 placed thereon. Preferably, the surface shape within an exposure field (e.g., 26mm×33mm) needs to be regulated to PV<10nm. The piezoelectric ceramic drive assembly can realize the control of the wafer adsorption surface shape, solving the problems of easy deformation and poor flatness caused by the very small thickness of the support surface of the vacuum suction cup of the wafer stage.

[0055] The thermal correction wafer stage disclosed in the present invention can achieve high-order overlay error correction by controlling the thermal deformation of the wafer, and can also use piezoelectric ceramic drive components to regulate the surface shape of the wafer to ensure exposure and overlay quality.

[0056] The present disclosure also provides a lithography device, including: the above-mentioned thermal correction wafer stage, which is used to adjust the surface shape of the wafer 1 and control the thermal deformation of the wafer 1 to correct high-order overlay errors; an exposure light source; an alignment system, which is used to measure the overlay error; and a thermal correction control system, which is used to adjust the working state of the thermal correction execution component 3 according to temperature load data to control the thermal deformation of the wafer 1 and thereby correct high-order overlay errors.

[0057] The present disclosure also provides a lithography device including the above-mentioned thermal correction wafer stage, which also includes at least basic configurations such as an exposure light source, an alignment system, and a thermal correction control system. As shown in Figure 6, the key to temperature control of the heating / cooling element 32 is to accurately monitor the temperature and perform feedback adjustment. During the heating or cooling process, the first temperature sensor 33 can monitor the temperature change of the target object in real time and transmit the data to the thermal correction control system. The thermal correction control system adjusts the working state of the heating / cooling element 32 according to the set temperature range and temperature change rate, such as the temperature adjustment range is -20℃ to +20℃ and the temperature change rate is 0.1℃, to achieve a stable temperature control effect. Among them, when the temperature load is set (the temperature load is within the adjustment range), the thermal correction control system adjusts the working state of the heating / cooling element 32 according to the temperature change rate to increase or decrease the temperature, so that the temperature measured by the first temperature sensor 33 reaches the specified temperature load.

[0058] The present disclosure also provides a method for correcting high-order overlay errors, as shown in Figure 7, including: S1, after using a vacuum suction cup 2 to absorb and fix the wafer 1, using a piezoelectric ceramic drive component 5 to control the surface shape of the wafer 1; S2, establishing a grid coordinate system for an exposure field to obtain the thermal deformation matrix of the wafer 1; S3, using an alignment system to measure the overlay error in the exposure field, and calculating the temperature load control matrix data based on the overlay error; S4, adjusting the working state of the thermal correction execution component 3 according to the temperature load control matrix data to control the thermal deformation of the wafer 1 and thereby correct the high-order overlay error.

[0059] Step S1: Wafer 1 is placed on the top surface of vacuum chuck 2. The space between airtight sidewalls 21 and wafer 1 is evacuated through central vacuum channel 23, securing wafer 1 on the top surface of protrusion 22. Piezoelectric ceramic drive assembly 5 is moved to the area to be adjusted. The thermal correction control system of the lithography equipment applies a potential difference across each piezoelectric ceramic unit 51, adjusting wafer 1 to the desired surface shape.

[0060] Step S2: Using the alignment system of the lithography equipment to measure the overlay error δ0. The wafer 1 includes a front-layer pattern, and the alignment system measures the deviation in the X and Y directions between the overlay mark of the current mask used for lithography and the overlay mark on the front-layer pattern to obtain the overlay error.

[0061] Establish a grid coordinate system. With the center of the exposure field as the origin, create the coordinate system shown in Figure 8 and number the grid regions and grid nodes. For example, define the grid regions as A1, A2, ..., A48, and the grid nodes as N1, N2, ..., N35. Each grid node can serve as a marker.

[0062] Use the alignment system to measure the overlay error δ in the X and Y directions of the mark points xi , δyi δ xi , δ yi is a high-order overlay error that includes second-order and third-order terms. It can be represented by the following parameter model:

[0063] Among them, k1…k 19 is the overlay error model coefficient, the overlay error δ in the X direction of the measuring point x Denote as the root mean square of the overlay error of all grid nodes in the X direction, and the overlay error in the Y direction δ y It is recorded as the root mean square of the Y-direction overlay error of all grid nodes.

[0064] Step S3: Calculate the temperature load control matrix.

[0065] Before calculating the temperature load control matrix, it is necessary to first obtain the thermal deformation matrix C of the wafer.

[0066] The relationship between the temperature load T applied in the wafer exposure field and the deformation Δ at the measuring point is shown in formula (1): C×T=Δ (1)

[0067] Where C is the wafer thermal deformation matrix. The thermal deformation matrix C can be calculated using finite element software by i Apply unit temperature load to the region and calculate the thermal deformation in the X and Y directions of all measuring points in the entire field to obtain the column matrix C ix and C iy , the column matrix combination obtains the thermal deformation matrix C x and C y In addition, the thermal deformation matrix C of the wafer can also be obtained through experimental testing methods.

[0068] The overlay error δ is the deformation Δ at the measuring point of the pre-corrected wafer.

[0069] According to the overlay error δ and the previously obtained wafer thermal deformation matrix C, the optimal solution T of the equation group (3) is obtained by solving the minimum residual w between the overlay error and the deformation at the measuring point position. The optimal solution T is the temperature load control matrix. Among them, the overlay error δ0 measured in step S2 above is used as the overlay error δ for calculation in the first calculation. W≥δ-C×TW≥C×T-δ (3) T1≤T≤T2

[0070] Wherein, T1 and T2 are the lower limit and upper limit of temperature control respectively. The solution for the temperature load control matrix when the residual is minimum in step S2 includes the least square method.

[0071] Step S4: The temperature load control matrix T obtained in step S3 is input to the thermal correction control system. The thermal correction control system adjusts the deformation of the wafer 1 surface by independently controlling the temperature of each heating / cooling element 32 to compensate for high-order overlay errors.

[0072] On the basis of the above embodiment, it also includes: S5, using the alignment system to measure the overlay error after correcting the high-order overlay error; if the preset overlay accuracy is not met, the thermal deformation matrix is ​​corrected, and S3 to S5 are repeated until the preset overlay accuracy is met; if the preset overlay accuracy is met, the high-order overlay error correction process is ended.

[0073] Step S5: Use the alignment system to measure the corrected overlay error δ1 again to verify whether it meets the required overlay accuracy, for example, the accuracy requirement of high-order overlay error correction is less than 5nm. If the required overlay accuracy is met, the high-order overlay error correction process is terminated; if not, the wafer thermal deformation matrix C is corrected by adding a small correction amount to the unit temperature deformation, that is, the element in the wafer thermal deformation matrix C, and correcting it in the direction of reducing the overlay error to converge the calculation, and obtaining C j Then it is used as the new wafer thermal deformation matrix C, and the corrected overlay error δ1 is substituted into formula (3) as the new overlay error δ to repeat steps S3 to S5 to obtain the overlay error δ2 of this iteration. Repeat the iteration multiple times until the required overlay accuracy is met.

[0074] The high-order overlay error correction method disclosed in the present invention calculates a temperature load control matrix for correcting the high-order overlay error based on a thermal deformation matrix, and can provide timely feedback and correct the high-order overlay error quickly and efficiently.

[0075] The present disclosure is further described below through specific implementations. The following examples specifically illustrate the thermal correction stage, lithography apparatus, and high-order overlay error correction method. However, the following examples are intended only to illustrate the present disclosure and are not intended to limit the scope of the present disclosure.

[0076] This embodiment provides a thermal correction wafer stage, referring to FIG. 1 and FIG. 2 , comprising: a vacuum suction cup 2 , a thermal correction actuator component 3 , a support component 4 and a piezoelectric ceramic drive component 5 .

[0077] The vacuum chuck 2 is disc-shaped, and the wafer 1 can be attached to its upper surface. The vacuum chuck 2 is provided with a sealing sidewall 21 and a cylindrical protrusion 22. The sealing sidewall 21 is arranged around the cylindrical protrusion 22 to form a vacuum chamber. The area enclosed by the wafer 1 and the vacuum chuck 2 is pressurized through a vacuum channel 23, forming a vacuum chamber.

[0078] The vacuum chuck 2 transfers heat received from the thermal correction actuator 3 to a local area of ​​the wafer 1, thereby heating or cooling the wafer 1 and controlling its thermal deformation. The cylindrical protrusions 22 of the vacuum chuck 2 support the wafer 1 and ensure its flatness. The gaps between the cylindrical protrusions 22 provide insulation, thereby controlling the local temperature of the upper surface of the vacuum chuck 2. The cylindrical protrusions 22 and the base of the vacuum chuck 2 have a relatively small thickness to ensure rapid thermal conduction to the wafer 1 and achieve a steady state. The vacuum chuck 2 can be made of materials with good thermal conductivity and minimal thermal deformation, such as silicon carbide or aluminum nitride.

[0079] Figure 3 shows a cross-sectional view of the vacuum chuck 2 and thermal correction actuator 3 in mating configuration. Thermal correction actuator 3 comprises a base plate 31 and multiple temperature actuator units, each of which includes a heating / cooling element 32 and a first temperature sensor 33. The multiple heating / cooling elements 32 can independently control the localized heat distribution within the vacuum chuck 2. A recess is provided in the vacuum chuck 2 to accommodate the first temperature sensor 33.

[0080] The substrate 31 includes a PCB board or other materials. The circuit of the temperature sensor 33 is arranged on the upper surface of the substrate 31, and the circuit of the heating / cooling element 32 is arranged on the lower surface.

[0081] Figure 9 shows the arrangement of the temperature actuator units of thermal correction actuator 3. Nine exposure fields are designed on wafer 1, each measuring 26 mm x 33 mm. The area enclosed by the thick solid line in Figure 9 represents the exposure field. To achieve overlay error correction across the entire field, a 39 mm x 44 mm area surrounding the exposure field is selected for temperature load application using the temperature actuator array. Each area is divided into 6 x 8 sub-areas. The corresponding lower surface of vacuum chuck 2 and substrate 31 are also divided into the same number and size of sub-areas. The temperature actuator units of thermal correction actuator 3 are distributed within each sub-area of ​​substrate 31.

[0082] The heating / cooling element 32 comprises a thermoelectric element, which absorbs and releases heat using the Peltier effect. Specifically, the thermoelectric element has positive and negative electrodes and is soldered to the substrate 31. It switches between absorbing and releasing heat depending on the direction of the current flow, and the amount of heat absorbed or released is controlled by the current flow. The first temperature sensor 33 comprises a thermistor soldered to the substrate 31 to measure the temperature of the thermoelectric element.

[0083] Figure 5(a) shows the front view of the support assembly 4, and Figure 5(b) shows the back view of the support assembly 4. The support assembly 4 is mechanically connected to the vacuum chuck 2 via a mounting flange 41, with the thermal correction actuator 3 sandwiched between the two.

[0084] The support assembly 4 is equipped with four wire outlets 42 for centrally routing the wiring connecting the first temperature sensor 33 to the heating / cooling element 32. A third through-hole 44 is located in the center of the support assembly, through which the vacuum channel 23 of the vacuum chuck 2 passes. The support assembly 4 is also equipped with a cooling water channel 45, which runs between the heating / cooling elements 32 and dissipates heat generated by the heating / cooling elements 32 to the outside through water cooling. The temperature of the support assembly 4 can be controlled by adjusting the flow rate and temperature of the cooling water using a thermal correction control system.

[0085] As shown in Figure 2, the piezoelectric ceramic drive assembly 5 is composed of multiple piezoelectric ceramic units 51. The support assembly 4 is provided with a second through-hole 43, and the substrate 31 of the thermal correction actuator 3 is also provided with a first through-hole. The piezoelectric ceramic units 51 pass through the second through-hole 43 and the first through-hole to contact the bottom of the vacuum chuck 2. Each piezoelectric ceramic unit 51 is independently connected to an external circuit via an electrode wire. The external circuit applies a potential difference between the two ends of each piezoelectric ceramic unit 51, causing the piezoelectric ceramic unit 51 to independently deform, applying force to the vacuum chuck 2, and thus controlling the surface shape of the wafer 1.

[0086] The piezoelectric ceramic drive assembly 5 controls only one exposure field. After the exposure field switches, the piezoelectric ceramic drive assembly 5 moves to the corresponding exposure field under the control of the thermal correction control system and motor to resume operation. The piezoelectric ceramic drive assembly 5 has 6×8 piezoelectric drive units, which correspond to the regional divisions of the exposure field.

[0087] This embodiment also provides a high-order overlay error correction method, including steps S01 to S05:

[0088] Step S01: Wafer 1 is placed on the top surface of vacuum chuck 2. The space enclosed by airtight sidewalls 21 and wafer 1 is evacuated through central vacuum channel 23, securing wafer 1 on cylindrical protrusion 22. Piezoelectric ceramic drive assembly 5 is moved to the area to be adjusted. The thermal correction control system of the lithography equipment applies a potential difference across each piezoelectric ceramic unit 51, adjusting the surface profile of wafer 1 within a single exposure field (e.g., 26mm x 33mm) to a PV < 10nm. This is equivalent to step S1 described above.

[0089] Step S02: using an alignment system of a lithography device to measure an overlay error δ0.

[0090] Establish a grid coordinate system. With the center of the exposure field as the origin, create the grid coordinate system shown in Figure 8 and number the grid regions and grid nodes. Define the grid regions as A1, A2, ..., A48, and the grid nodes as N1, N2, ..., N35. Each grid node can be used as a marker.

[0091] Use the alignment system to measure the overlay error δ in the X and Y directions of the mark points xi , δ yi The more marking points there are, the more evenly they are distributed in the exposure field, and the more accurate the final calculation result.

[0092] δ xi , δ yi The high-order overlay error includes second-order and third-order terms and can be represented by the following parameter model:

[0093] A high-order overlay error model is selected as an example for illustration. The lens can compensate for the second order (k7, k 12 ) or third order (k 13 ) Overlay error, k8,k 10 ,k 11 ,k 14 ,k 16 ,k 19 This can be achieved by adjusting the scanning direction of the wafer stage in the Y direction, but k9,k 15 ,k 17 ,k 18 ,k 20 It is not possible to achieve this at present. Therefore, this embodiment selects k 17 =1×10 -8 , k 18 =1×10 -8 , and all other parameters are equal to 0 for illustration. Before correction, the root mean square of the overlay error in the X direction at the grid nodes is 14 nm, and the root mean square of the overlay error in the Y direction is 12 nm. This is equivalent to the above step S2.

[0094] Step S03: Calculate the temperature load control matrix C.

[0095] By being alone in A i The unit temperature load is applied to the region to calculate the thermal deformation in the X and Y directions of all grid node positions in the entire field, and the column matrix C is obtained. ix and C iy , the column matrix combination obtains the thermal deformation matrix C x and C y . x and C y The combination results in a matrix:

[0096] According to the overlay error δ measured in step S02 and the wafer thermal deformation matrix C obtained in advance, the optimal solution T of equation group (2) is obtained by solving the minimum residual w. The minimum residual is the overlay error, and the optimal solution T is the temperature load control matrix.

[0097] For example, the solution algorithm may include the least square method, and the obtained temperature load control matrix is ​​T=[10.9, 4.9, 6.8, 4.9, 7.3...]° C. This is equivalent to the above step S3.

[0098] Step S04: The temperature load control matrix T obtained in step S03 is input to the thermal correction control system. The thermal correction control system independently controls the temperature of each heating / cooling element 32 to adjust the deformation of the wafer 1 surface to compensate for high-order overlay errors. This is equivalent to step S4 above.

[0099] Step S05: Use the alignment system to measure the corrected overlay error again, the X-direction overlay error w 1x =0.07nm, Y direction overlay error w 1y =0.09nm, which meets the accuracy requirement of high-order overlay error correction of less than 5nm. This is equivalent to the above step S5.

[0100] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present disclosure. It should be understood that the above is only a specific embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the protection of the present disclosure. Industrial Applicability

[0101] The present disclosure provides a thermal correction stage, a photolithography device and a method for correcting high-order overlay errors. The thermal correction stage comprises, from top to bottom, a vacuum suction cup, comprising an array of protrusions and a sealing side wall, for adsorbing and fixing a wafer; a thermal correction execution assembly, comprising a substrate and an array of temperature execution units, each temperature execution unit comprising a heating / cooling element and a first temperature sensor, for controlling the thermal deformation of the wafer to correct high-order overlay errors; a support assembly, comprising a mounting flange for fixed connection to the vacuum suction cup and an array consisting of second through holes; a piezoelectric ceramic drive assembly, comprising an array consisting of piezoelectric ceramic units, the piezoelectric ceramic units passing through the second through holes and the first through holes on the thermal correction execution assembly and then contacting the lower surface of the vacuum suction cup, for regulating the surface shape of the wafer; wherein the array consisting of the protrusions, the temperature execution units, the second through holes and the piezoelectric ceramic units corresponds to each other.

[0102] Furthermore, it will be appreciated that the thermally corrected wafer stage, lithography apparatus, and high-order overlay error correction method disclosed herein are reproducible and can be used in a variety of applications. For example, the thermally corrected wafer stage, lithography apparatus, and high-order overlay error correction method disclosed herein can be used in the field of semiconductor device technology.

Claims

1. A thermal correction plate holder, It is characterized in that From top to bottom, they include: A vacuum suction cup (2), comprising an array of protrusions (22) and a sealing side wall (21) arranged around the periphery of the array, for sucking and fixing the wafer (1); A thermal correction execution component (3) comprises a substrate (31) and an array of temperature execution units, each of the temperature execution units comprising a heating / cooling element (32) and a first temperature sensor (33), for controlling thermal deformation of the wafer (1) to correct high-order overlay errors; A support assembly (4) comprising a mounting flange (41) for fixedly connecting to the vacuum suction cup (2) and an array of second through holes (43); A piezoelectric ceramic drive assembly (5), comprising an array of piezoelectric ceramic units (51), wherein the piezoelectric ceramic units (51) pass through the second through hole (43) and the first through hole on the thermal correction actuator (3) and then contact the lower surface of the vacuum suction cup (2), so as to adjust the surface shape of the wafer (1); The array composed of protrusions (22), the array composed of temperature execution units, the array composed of second through holes (43) and the array composed of piezoelectric ceramic units (51) correspond to each other.

2. The thermal correction substrate holder according to claim 1, It is characterized in that The thickness of the vacuum suction cup (2) is 1 to 2 mm; the material of the vacuum suction cup (2) is any one of silicon carbide and aluminum nitride; Gaps are provided between adjacent protrusions (22) in the vacuum suction cup (2) to provide mutual thermal insulation.

3. The thermal correction substrate holder according to claim 1, It is characterized in that The substrate (31) in the thermal correction actuator (3) is a PCB board designed with circuits; The heating / cooling element (32) is a thermoelectric element, which is arranged on the lower surface of the substrate (31), and the temperature of each heating / cooling element (32) is independently controlled; The first temperature sensor (33) is a thermistor and is disposed on the upper surface of the substrate (31).

4. The thermal correction substrate holder according to claim 3, It is characterized in that The substrate (31) is also provided with a heat transfer hole (34), and the heat transfer hole (34) is filled with a heat conductive material; The heat transfer holes (34) are in contact with the heating / cooling element (32) for quickly transferring heat to the protrusions (22).

5. The thermal correction substrate holder according to claim 1, It is characterized in that The heating / cooling element (32) comprises: The resistance heating wire (311) is made of metal or conductive ceramic; A cooling water pipe (312), wherein the liquid is any one of water and ethylene glycol; A heat conducting block (313), the upper surface of which contains the resistance heating wire (311) and the cooling water pipe (312) for heat conduction; The second temperature sensor (314) is arranged on the lower surface of the heat conducting block (313).

6. The thermal correction substrate holder according to claim 1, It is characterized in that The support assembly (4) further comprises: At least four wire outlets (42) for centrally leading out the circuit connection wires of the heating / cooling element (32) and the first temperature sensor (33); A third through hole (44) for accommodating a vacuum channel (23) of the vacuum suction cup (2); A cooling water pipe channel (45) is provided on the lower surface of the support assembly (4) and is used to release the heat generated by the heating / cooling element (32) to the outside.

7. The thermal correction substrate holder according to claim 1, It is characterized in that The potential difference between the two ends of each piezoelectric ceramic unit (51) in the piezoelectric ceramic drive assembly (5) is independently controlled to apply a force to the vacuum suction cup (2), thereby regulating the surface shape of the wafer (1); Wherein, the surface shape PV in an exposure field of the wafer (1) is less than 10 nm.

8. A lithographic apparatus, It is characterized in that include: The thermal correction wafer stage according to any one of claims 1 to 7 is used to adjust the surface shape of the wafer (1) and control the thermal deformation of the wafer (1) to correct high-order overlay errors; Exposure light source; Alignment system for measuring overlay error; A thermal correction control system is used to adjust the working state of a thermal correction execution component (3) according to temperature load data to control the thermal deformation of the wafer (1) and thereby correct high-order overlay errors.

9. A high-order overlay error correction method, It is characterized in that include: S1, after using a vacuum suction cup (2) to absorb and fix a wafer (1), using a piezoelectric ceramic driving component (5) to adjust the surface shape of the wafer (1); S2, establishing a grid coordinate system for an exposure field to obtain a thermal deformation matrix of the wafer (1); S3, measuring the overlay error in the exposure field by using an alignment system, and calculating temperature load control matrix data according to the overlay error; S4, adjusting the working state of the thermal correction execution component (3) according to the temperature load control matrix data to control the thermal deformation of the wafer (1) and thereby correct the high-order overlay error.

10. The high-order overlay error correction method according to claim 9, It is characterized in that Also includes: S5, using the alignment system to measure the overlay error after correcting the high-order overlay error; if the preset overlay accuracy is not met, the thermal deformation matrix is ​​corrected, and S3 to S5 are repeated until the preset overlay accuracy is met; if the preset overlay accuracy is met, the high-order overlay error correction process is terminated.

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