Communication method, storage medium, and electronic device

Abstract

The present application provides a communication method, a storage medium, and an electronic device. The communication method comprises: generating a control pulse on the basis of a user instruction, and sending the control pulse to a quantum computer; sending a read pulse to the quantum computer, so that the quantum computer generates a reflected pulse; receiving the reflected pulse sent by the quantum computer; and obtaining the state of qubits on the basis of the phase difference between the control pulse and the reflected pulse. According to the communication method, the state of qubits can be determined in real time, thereby providing a foundation for quantum error correction and other algorithms.

Description

Communication method, storage medium and electronic device Technical Field

[0001] The present application belongs to the field of quantum computing technology and relates to a communication method, and in particular to a communication method, a storage medium, and an electronic device. Background Art

[0002] Quantum computers perform computations based on the fundamental principles of quantum mechanics. Unlike the binary logic of traditional computers, quantum computers use quantum bits (qubits) to store and process information. These qubits can represent not only the states of 0 and 1, but also a linear combination of multiple states simultaneously. Another key feature of quantum computers is quantum entanglement, which allows different qubits to be correlated with each other. This entanglement enables more efficient and secure methods for information transmission and processing.

[0003] Summary of the Invention

[0004] The purpose of this application is to provide a communication method, storage medium and electronic device for obtaining the state of quantum bits in real time.

[0005] In a first aspect, the present application provides a communication method applied to an FPGA device, the communication method comprising: generating a control pulse according to a user instruction, and sending the control pulse to a quantum computer; sending a read pulse to the quantum computer so that the quantum computer generates a reflected pulse; receiving the reflected pulse sent by the quantum computer; and obtaining the state of the quantum bit based on the phase difference between the control pulse and the reflected pulse.

[0006] In an implementation of the first aspect, the communication method further includes: determining whether to send a next control pulse to the quantum computer according to the state of the quantum bit.

[0007] In an implementation of the first aspect, the communication method further includes: determining parameters of a next control pulse according to the state of the quantum bit.

[0008] In an implementation of the first aspect, the FPGA device is communicatively connected to the quantum computer via an analog-to-digital converter, a digital-to-analog converter, and a mixer, and the FPGA device and the analog-to-digital converter, the digital-to-analog converter, and / or the mixer use the same master clock.

[0009] In an implementation of the first aspect, the user instruction is used to specify the waveform, frequency, starting phase, amplitude, emission time and / or reception time of the control pulse.

[0010] In an implementation manner of the first aspect, the communication method further includes: demodulating the reflected pulse to obtain phase information of the reflected pulse.

[0011] In a second aspect, an embodiment of the present application provides another communication method, which is applied to a quantum computer. The communication method includes: receiving a control pulse sent by an FPGA device; controlling the state of a quantum bit according to the control pulse; receiving a read pulse sent by the FPGA device; generating a reflected pulse in response to the read pulse; and sending the reflected pulse to the FPGA device so that the FPGA device obtains the state of the quantum bit according to the phase difference between the control pulse and the reflected pulse.

[0012] In a third aspect, an embodiment of the present application provides another communication method, which is applied to a communication system, wherein the communication system includes an FPGA device and a quantum computer that are communicatively connected. The communication method includes: the FPGA device generates a control pulse according to a user instruction, and sends the control pulse to the quantum computer; the quantum computer controls the state of the quantum bit according to the control pulse; the FPGA device sends a read pulse to the quantum computer; the quantum computer generates a reflected pulse in response to the read pulse, and sends the reflected pulse to the FPGA device; the FPGA device obtains the state of the quantum bit according to the phase difference between the control pulse and the reflected pulse.

[0013] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the communication method provided in the embodiment of the present application is implemented.

[0014] In a fifth aspect, an embodiment of the present application provides an electronic device, comprising: a memory storing a computer program; and a processor communicatively connected to the memory, for executing the communication method provided in the embodiment of the present application when the computer program is called.

[0015] In the communication method provided in the embodiments of this application, an FPGA (Field-Programmable Gate Array) device directly processes the received reflected pulse to determine the state of the qubit. This approach reduces time delay, ensuring that the qubit state is determined before the qubit collapses.

[0016] In addition, the communication method provided in the embodiment of the present application allows the user to specify the parameters of the control pulse through user instructions, thereby meeting the different needs of the user.

[0017] Furthermore, in an embodiment of the present application, FPGA devices, analog-to-digital converters, digital-to-analog converters and / or mixers can be configured to use the same master clock signal to ensure clock synchronization between these devices, making it possible to upgrade the number of quantum bits. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] FIG1 is a schematic diagram showing an application scenario of an embodiment of the present application.

[0019] FIG2A shows a flow chart of a communication method provided in an embodiment of the present application.

[0020] FIG. 2B is a schematic diagram showing the generation of a reflected pulse according to an embodiment of the present application.

[0021] FIG3 shows a flow chart of another communication method provided by an embodiment of the present application.

[0022] FIG4 shows a flow chart of another communication method provided by an embodiment of the present application.

[0023] FIG5 is a schematic diagram showing the structure of an electronic device provided in an embodiment of the present application.

[0024] Component Reference Numbers 500 Electronic device 510 Memory 520 Processor 530 Display S21-S25 Steps S31-S34 Steps S41-S45 Steps DETAILED DESCRIPTION

[0025] The following describes the embodiments of the present application through specific examples. Those skilled in the art can easily understand the other advantages and effects of the present application from the content disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments. The details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other unless they conflict.

[0026] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. Therefore, the illustrations only show components related to the present application and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0027] Figure 1 shows an architecture diagram of a communication system used in an embodiment of the present application. As shown in Figure 1, the communication system includes a personal computer (PC), an FPGA device, a DAC (digital-to-analog converter), an ADC (analog-to-digital converter), an uplink mixer, a downlink mixer, an oscillator, and a quantum computer.

[0028] The PC can be used to provide a graphical user interface (GUI) for users. Through the GUI, users can enter user commands, which are used to configure the signal parameters during the communication process. In addition, the PC also provides a programming interface, allowing users to develop customized communication applications using programming languages ​​such as C or Python.

[0029] FPGAs can serve as intermediaries between PCs and quantum computers, facilitating the transmission of control commands, data, and results. Furthermore, FPGAs possess parallel computing capabilities and programmability, enabling them to be used for data preprocessing, format conversion, data processing, and modulation and demodulation to meet specific application requirements.

[0030] In some implementations, the FPGA device can communicate with the PC via a UDP (User Datagram Protocol) interface and a UART (Universal Asynchronous Receiver-Transmitter) interface. UDP is a connectionless protocol used to provide high-speed, high-throughput, and low-latency data transmission between the FPGA device and the PC. UART is a serial communication protocol used to implement reliable serial communication between the FPGA device and the PC. Exemplarily, the UART interface can be used for maintenance and debugging of the device. For example, a user can send an instruction through the PC, which reaches the FPGA device from the PC through the UART interface, and then reaches the ADC and / or DAC via the SPI (Serial Peripheral Interface) protocol to configure the ADC and / or DAC.

[0031] In some implementations, the FPGA device can communicate with data converters (including ADCs and DACs) via a downstream interface. This downstream interface enables high-speed serial communication between the FPGA device and the data converters with deterministic latency across a wide range of environmental and power-cycling conditions.

[0032] In some implementations, an FPGA device may include a DSP (Digital Signal Processor) and a BSP (Board Support Package). The DSP performs digital signal processing tasks. The BSP is a software package that supports embedded systems at the hardware board level and includes a set of software components and drivers.

[0033] The DAC is used to convert the digital signal sent by the FPGA device into an analog signal and send it to the upstream mixer. The ADC is used to convert the received downstream signal into a digital signal and send it to the FPGA device.

[0034] The uplink mixer mixes the received uplink signal with the signal provided by the oscillator, thereby increasing the signal frequency for transmission within the channel. The downlink mixer mixes the received downlink signal with the signal provided by the oscillator, thereby reducing the signal frequency for signal processing by the ADC and FPGA devices.

[0035] Quantum computers use qubits (qubits) to store and process information. These qubits can represent not only the states of 0 and 1, but also a linear combination of multiple states simultaneously. Another key feature of quantum computers is quantum entanglement, which allows different qubits to be correlated with each other. This entanglement enables more efficient and secure methods for information transmission and processing.

[0036] In some technical solutions, signals received by the FPGA device are sent to a PC via a high-speed communication protocol. A C or Python-based program on the PC then processes and analyzes the signals to determine the state of the qubit. However, this approach has a significant time delay, typically far exceeding 1ms. The lifetime of a qubit is relatively short, typically less than 1ms. Therefore, these technical solutions cannot determine the state of a qubit before it collapses. Furthermore, since operating systems like Windows and Linux are not real-time operating systems, the time delay in these solutions is uncertain. Many subsequent processing steps, such as quantum error correction, rely on accurate and timely information about the qubit state. Therefore, these technical solutions cannot serve as the basis for such subsequent processing.

[0037] To address at least the above-mentioned issues, an embodiment of the present application provides a communication method. FIG2A shows a flow chart of the communication method provided by an embodiment of the present application. As shown in FIG2A , the communication method provided by an embodiment of the present application includes the following steps S21 to S25.

[0038] At step S21, the FPGA generates a control pulse based on the user's instructions and sends the control pulse to the quantum computer. The control pulse is used to control the state of the quantum bit, for example, changing the state of the quantum bit from 0 to 1, or from 0 to a superposition state between 0 and 1.

[0039] S22, the quantum computer controls the state of the quantum bit according to the control pulse.

[0040] S23, the FPGA device sends a read pulse to the quantum computer.

[0041] S24, the quantum computer generates a reflected pulse in response to the read pulse, and sends the reflected pulse to the FPGA device.

[0042] S25, the FPGA device obtains the state of the quantum bit according to the phase difference between the control pulse and the reflected pulse.

[0043] In some implementations, please refer to Figure 2B. In order to obtain the state of the quantum bit, the FPGA device sends a read pulse to the quantum computer. However, if the read pulse interacts directly with the quantum bit, the quantum state will be destroyed, resulting in a read error. To address this problem, in these implementations, the FPGA device sends a read pulse to a resonator coupled to the quantum bit. When the read pulse interacts with the quantum bit in the resonator, its amplitude and phase will change, and the magnitude of the change depends on the state of the quantum bit. The resonator sends the output signal, that is, the reflected pulse, to the FPGA device. After receiving the reflected pulse, the FPGA device can determine the state of the quantum bit based on the information of the reflected pulse.

[0044] According to the above description, in the communication method provided in the embodiment of the present application, the FPGA device will directly process the reflected pulse after receiving it to determine the state of the quantum bit. In some other technical solutions, the FPGA device needs to send the received signal to the PC, which processes and analyzes it through a program in C language or Python language to determine the state of the quantum bit. In comparison, the communication method provided in the embodiment of the present application can reduce the time delay, thereby ensuring that the state judgment of the quantum bit is completed before the quantum bit collapses. For example, in some instances, the communication method provided in the embodiment of the present application can complete the state judgment of the quantum bit within 100ns. Therefore, the communication method provided in the embodiment of the present application can provide a basis for many subsequent processing, such as quantum error correction.

[0045] In some implementations, the FPGA device sends a control pulse at time t and a read pulse after time t + Δt. Δt can be configured based on actual needs, and the qubit completes the relevant evolution and calculation within the time period [t, t + Δt].

[0046] In some implementations, after the FPGA device obtains the state of the qubit, the communication method may further include: determining whether to send a next control pulse to the quantum computer based on the state of the qubit. If it is determined to send the next control pulse to the quantum computer, parameters of the next control pulse are determined based on the state of the qubit.

[0047] In some implementations, the communication system may include multiple FPGA devices. The FPGA devices are connected to the quantum computer through ADCs, DACs, and mixers. Each FPGA device and the ADCs, DACs, and / or mixers use the same master clock signal. For example, the master clock signal can be generated by a crystal oscillator connected to the mixer. In this way, perfect synchronization can be achieved between multiple FPGA devices, ADCs, DACs, and / or mixers, making it possible to increase the number of qubits.

[0048] Taking a read pulse as an example, after the FPGA device sends a read pulse, it passes through the DAC and up-converter before reaching the quantum computer. The quantum computer then sends a reflected pulse back, which passes through the down-converter and ADC before reaching the FPGA device. The up-converter and down-converter can be configured to different frequency ranges to meet different user needs.

[0049] In some implementations, the raw data received by the ADC is stored in an FPGA device. Users can access and process this data by reading from the FPGA device. For example, a user can access the raw data from the FPGA device using a PC and perform some less real-time processing on the raw data. The user can also view the raw data on a PC to obtain the original data information.

[0050] In some implementations, a user can send user commands through a PC GUI. These user commands are used to specify parameters such as the waveform, frequency, starting phase, amplitude, emission time, and / or reception time of the control pulse and / or read pulse. Furthermore, user commands can also be used to stretch the waveform of the control pulse and / or read pulse along the time axis. By properly configuring user commands, embodiments of the present application can achieve the generation of arbitrary waveforms.

[0051] In some implementations, the FPGA device may transmit control pulses and / or read pulses in a continuous mode, a single-shot mode, or an N-shot mode under the control of a user instruction, where N is a positive integer greater than 1.

[0052] In some implementations, the FPGA device can perform modulation according to user instructions to generate a control pulse. In addition, the FPGA device can demodulate the received reflected pulse to obtain phase information of the reflected pulse.

[0053] For example, the FPGA device may employ an IQ mixing modulation and demodulation scheme for single sideband generation, which can generate a signal of a desired frequency and conveniently demodulate its phase information from a reflected pulse.

[0054] For example, the FPGA device can demodulate the reflected pulse using a demodulation method with noise suppression. For example, a filter can be used to filter the reflected pulse to remove noise, and the filtered signal can be demodulated to obtain its phase information. The filter can be, but is not limited to, a filter in the DSP of the FPGA device.

[0055] In some implementations, the FPGA device can use a threshold method or a GMM (Gaussian Mixer Model) method to classify the states of qubits with delays less than 100ns, thereby obtaining the states of the qubits. The threshold value in the threshold method or the mean and standard deviation of the phases corresponding to the two qubit states in the GMM method can be configured based on actual needs or experience. In these implementations, FPGA devices are used instead of PCs to classify the states of qubits. This method enables real-time classification of the states of qubits, and on this basis, real-time feedback and feedforward control can be achieved.

[0056] Figure 3 shows a flow chart of another communication method provided by an embodiment of the present application. As shown in Figure 3, the communication method includes the following steps S31 to S34.

[0057] S31: Generate a control pulse according to a user instruction and send the control pulse to the quantum computer.

[0058] S32, sending a read pulse to the quantum computer, so that the quantum computer generates a reflected pulse.

[0059] S33, receiving the reflected pulse sent by the quantum computer.

[0060] S34, obtaining the state of the quantum bit according to the phase difference between the control pulse and the reflected pulse.

[0061] It should be noted that the above steps S31 to S34 are similar to steps S21, S23 and S25 in the communication method shown in FIG. 2A and are not described in detail here.

[0062] Figure 4 shows a flow chart of another communication method provided by an embodiment of the present application, which is applied to a quantum computer. As shown in Figure 4, the communication method includes the following steps S41 to S45.

[0063] S41, receiving a control pulse sent by the FPGA device.

[0064] S42, controlling the state of the quantum bit according to the control pulse.

[0065] S43, receiving a read pulse sent by the FPGA device.

[0066] S44 , generating a reflection pulse in response to the read pulse.

[0067] S45, sending the reflected pulse to the FPGA device, so that the FPGA device obtains the state of the quantum bit according to the phase difference between the control pulse and the reflected pulse.

[0068] It should be noted that the above steps S41 to S45 are similar to steps S22 and S24 in the communication method shown in FIG. 2A , and are not described in detail here.

[0069] The protection scope of the communication method described in the embodiment of the present application is not limited to the execution order of the steps listed in this embodiment. All solutions implemented by adding, reducing, or replacing steps in the existing technology based on the principles of the present application are included in the protection scope of the present application.

[0070] Those skilled in the art should further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the composition and steps of each example according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0071] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by the processor, the communication method provided by the present application is implemented. A person of ordinary skill in the art will appreciate that all or part of the steps in the method for implementing the above embodiment can be completed by instructing the processor through a program, and the program can be stored in a computer-readable storage medium, wherein the storage medium is a non-transitory medium, such as a random access memory, a read-only memory, a flash memory, a hard disk, a solid-state drive, a magnetic tape, a floppy disk, an optical disc, and any combination thereof. The above storage medium can be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrated therein. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a digital video disc (DVD)), or a semiconductor medium (e.g., a solid-state drive (SSD)).

[0072] The present application also provides an electronic device. FIG5 shows a schematic diagram of the structure of an electronic device 500 in an embodiment of the present application. As shown in FIG5 , the electronic device 500 in this embodiment includes a memory 510 and a processor 520.

[0073] The memory 510 is used to store computer programs. In some possible implementations, the memory 510 may include various media capable of storing program codes, such as ROM, RAM, a magnetic disk, a USB flash drive, a memory card, or an optical disk.

[0074] In the embodiments of the present application, the memory 510 may include a computer system readable medium in the form of a volatile memory, such as RAM and / or cache memory. The electronic device 500 may further include other removable / non-removable, volatile / non-volatile computer system storage media. The memory 510 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the various embodiments of the present application.

[0075] The processor 520 is connected to the memory 510 and is used to execute the computer program stored in the memory 510 so that the electronic device 500 executes the communication method provided in the embodiment of the present application.

[0076] In some embodiments, the processor 520 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc. In other embodiments, the processor 520 may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0077] In some possible implementations, the electronic device 500 provided in the embodiment of the present application may further include a display 530. The display 530 is communicatively connected to the memory 510 and the processor 520, and is configured to display a graphical user interface (GUI) related to the communication method.

[0078] In an embodiment of the present application, the display 530 may include a display screen (display panel). In some implementations, the display panel may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like. In addition, the display 530 may also be a touch panel (touch screen, touch screen), which may include a display screen and a touch-sensitive surface. When the touch-sensitive surface detects a touch operation on or near it, it is transmitted to the processor 520 to determine the type of touch event, and then the processor 520 provides a corresponding visual output on the display device according to the type of touch event.

[0079] The embodiment of the present application may also provide a computer program product, the computer program product including one or more computer instructions. When the computer instructions are loaded and executed on a computing device, the process or function described in the embodiment of the present application is generated in whole or in part. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer or data center to another website, computer or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method.

[0080] When the computer program product is executed by a computer, the computer executes the communication method described in the aforementioned method embodiment. The computer program product can be a software installation package. When the aforementioned communication method is needed, the computer program product can be downloaded and executed on the computer.

[0081] In summary, embodiments of the present application provide communication methods, storage media, and electronic devices. In the communication method provided in embodiments of the present application, after receiving the reflected pulse, the device directly processes it to determine the state of the quantum bit. This approach can reduce time delays, thereby ensuring that the state judgment of the quantum bit is completed before the quantum bit collapses. In addition, the communication method provided in embodiments of the present application allows the user to specify the parameters of the control pulse through user instructions, thereby meeting the different needs of the user. Furthermore, in embodiments of the present application, the FPGA device, analog-to-digital converter, digital-to-analog converter, and / or mixer can be configured to use the same master clock signal to ensure clock synchronization between these devices.

[0082] Therefore, the embodiments of the present application overcome various defects in the prior art and have high industrial value.

[0083] The descriptions of the processes or structures corresponding to the above figures have different emphases. For parts that are not described in detail in a certain process or structure, please refer to the relevant descriptions of other processes or structures.

[0084] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical concepts disclosed in this application shall be covered by the claims of this application.

Claims

1. A communication method, characterized in that: Applied to FPGA equipment, the communication method includes: Generate a control pulse according to a user instruction, and send the control pulse to a quantum computer; sending a read pulse to the quantum computer so that the quantum computer generates a reflected pulse; receiving a reflected pulse sent by the quantum computer; The state of the quantum bit is obtained according to the phase difference between the control pulse and the reflected pulse.

2. The communication method according to claim 1, characterized in that: The communication method further includes: determining whether to send a next control pulse to the quantum computer according to the state of the quantum bit.

3. The communication method according to claim 2, characterized in that: The communication method further includes: determining a parameter of a next control pulse according to the state of the quantum bit.

4. The communication method according to claim 1, characterized in that: The FPGA device is communicatively connected to the quantum computer via an analog-to-digital converter, a digital-to-analog converter and a mixer, and the FPGA device and the analog-to-digital converter, the digital-to-analog converter and / or the mixer use the same master clock.

5. The communication method according to claim 1, characterized in that: The user instruction is used to specify the waveform, frequency, starting phase, amplitude, sending time and / or receiving time of the control pulse.

6. The communication method according to claim 1, characterized in that: Also includes: The reflected pulse is demodulated to obtain phase information of the reflected pulse.

7. A communication method, characterized in that: Applied to a quantum computer, the communication method comprises: Receive control pulses sent by FPGA devices; controlling the state of the quantum bit according to the control pulse; Receiving a read pulse sent by the FPGA device; generating a reflected pulse in response to the read pulse; The reflected pulse is sent to the FPGA device so that the FPGA device obtains the state of the quantum bit according to the phase difference between the control pulse and the reflected pulse.

8. A communication method, characterized in that: Applied to a communication system, the communication system includes a FPGA device and a quantum computer connected in communication, and the communication method includes: The FPGA device generates a control pulse according to a user instruction, and sends the control pulse to the quantum computer; The quantum computer controls the state of the quantum bit according to the control pulse; The FPGA device sends a read pulse to the quantum computer; The quantum computer generates a reflected pulse in response to the read pulse, and sends the reflected pulse to the FPGA device; The FPGA device obtains the state of the quantum bit according to the phase difference between the control pulse and the reflected pulse.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the communication method according to any one of claims 1 to 8 is implemented.

10. An electronic device, characterized in that: The electronic device comprises: A memory storing a computer program; A processor is communicatively connected to the memory, and executes the communication method according to any one of claims 1 to 8 when calling the computer program.

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