Module and manufacturing method therefor

Abstract

A module manufacturing method comprising: a step (S1) for mounting a component provided with an Si layer onto a first substrate surface of a substrate having the first substrate surface, the first substrate surface having a conductive connection structure installed thereon; a step (S2) for forming a sealing resin layer so as to cover the first substrate surface, the conductive connection structure, and the component; a step (S3) for forming a first exposed surface by collectively grinding away an upper surface of the conductive connection structure, an upper surface of the component, and an upper surface of the sealing resin layer through grinding processing, the first exposed surface including a portion where the conductive connection structure and the component are exposed from the sealing resin layer; a step (S4) for performing finishing processing on the first exposed surface to reduce the surface roughness Ra of the component; and a step (S5) for performing plating on the surface of the conductive connection structure at the first exposed surface.

Description

Module and manufacturing method thereof

[0001] The present invention relates to a module and a method for manufacturing the same.

[0002] Modules are known in which electronic components such as ICs are mounted on a substrate and sealed with a sealing resin. The electronic components have a thick silicon layer on the side opposite the side facing the substrate. In such modules, a configuration in which the surface of the silicon layer of the electronic components is exposed from the sealing resin is sometimes employed. An example of a module with such a structure is described in Japanese Patent No. 6981537 (Patent Document 1). When manufacturing such a module, the sealing resin and the silicon layer of the electronic components are simultaneously ground so that the top surfaces of the sealing resin and the electronic components are flush with each other.

[0003] Patent No. 6981537

[0004] The surface of the Si layer of an electronic component exposed by grinding is hereinafter referred to as the "Si surface." Grinding may leave scratches on the Si surface. If grinding scratches remain, it becomes difficult to identify cracks during an inspection to check for the presence or absence of cracks in the Si layer, increasing the possibility that cracks will not be detected even though they actually exist.

[0005] Grinding scratches on the Si surface reduce the flexural strength of the Si layer of the electronic component. In addition to the Si surface of the electronic component, the end faces of the connection terminals are also exposed through the encapsulating resin. A plating process is performed to form a metal film covering the end faces of the connection terminals. If the Si surface is exposed with grinding scratches during the plating process, a metal film will be formed not only on the end faces of the connection terminals but also on the Si surface. The metal film covering the Si surface is essentially unnecessary. Conventionally, to prevent the formation of an undesired metal film on the Si surface during the plating process, the Si surface has been covered before the plating process. Specifically, a process of forming a resist film covering the Si surface has been performed before the plating process, and this resist film has been removed after the plating process. This has resulted in an increased number of processes.

[0006] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a module that can reduce the number of manufacturing steps and a method for manufacturing the same.

[0007] In order to achieve the above object, a method for manufacturing a module based on the present invention includes the steps of mounting a component having a Si layer on a first substrate surface of a substrate having a first substrate surface on which a conductive connection structure is provided; forming an encapsulating resin layer to cover the first substrate surface, the conductive connection structure, and the component; forming a first exposed surface including portions of the conductive connection structure and the component exposed from the encapsulating resin layer by simultaneously grinding off the upper surface of the conductive connection structure, the upper surface of the component, and the upper surface of the encapsulating resin layer; performing a finishing process on the first exposed surface to reduce the surface roughness Ra of the component; and plating the surface of the first exposed surface of the conductive connection structure.

[0008] According to the present invention, the finishing process removes grinding scratches, so that an undesired plating film does not grow on the upper surface of the component. Therefore, there is no need to form a resist film to cover the upper surface of the component. The steps of forming and removing the resist film are no longer necessary. This reduces the number of processes.

[0009] FIG. 1 is a flowchart of a method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 2 is an explanatory diagram of a first step of the method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 3 is an explanatory diagram of a second step of the method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 4 is an explanatory diagram of a cross-sectional view of a component mounted on a first substrate surface in the method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 5 is an explanatory diagram of a third step of the method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 6 is an explanatory diagram of a fourth step of the method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 7 is an explanatory diagram of an eighth step of the method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 9 is an explanatory diagram of a ninth step of the method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 10 is an explanatory diagram of a tenth step of the method for manufacturing a module in accordance with the first embodiment of the present invention. FIG. 11 is a cross-sectional view of a module in accordance with a second embodiment of the present invention.

[0010] 1 to 13, a method for manufacturing a module in a first embodiment according to the present invention will be described. A flowchart of the method for manufacturing a module in this embodiment is shown in FIG.

[0011] The manufacturing method of the module in this embodiment includes the steps of: step S1 mounting a component having a Si layer on a first substrate surface of a substrate having a first substrate surface on which a conductive connection structure is provided; step S2 forming a sealing resin layer to cover the first substrate surface, the conductive connection structure, and the component; step S3 forming a first exposed surface including portions of the conductive connection structure and the component exposed from the sealing resin layer by simultaneously grinding off the upper surface of the conductive connection structure, the upper surface of the component, and the upper surface of the sealing resin layer; step S4 performing a finishing process on the first exposed surface to reduce the surface roughness Ra of the component; and step S5 plating the surface of the first exposed surface of the conductive connection structure.

[0012] Each step will be described in detail below. In reality, each step up to singulation is performed on a large substrate corresponding to an arrangement of multiple modules, but for ease of explanation, the following will focus on a portion corresponding to one module and illustrate it in the following description.

[0013] First, as shown in FIG. 2 , a substrate 1 is prepared. The substrate 1 is, for example, a low-temperature co-fired ceramic (LTCC) substrate. The substrate 1 may be formed from a material that can be used as a circuit board material, such as glass or resin. Alternatively, the substrate 1 may be formed from a composite material such as glass epoxy. The substrate 1 has a first substrate surface 1a and a second substrate surface 1b, which are opposite surfaces. In FIG. 2 , the upper surface is the first substrate surface 1a, and the lower surface is the second substrate surface 1b. For convenience of explanation, the first substrate surface 1a is assumed to be the upper surface, but this orientation is not essential. A columnar electrode 7, which serves as a conductive connection structure, is provided on the first substrate surface 1a. While columnar electrodes are used as an example of a conductive connection structure, the conductive connection structure is not limited to a columnar shape. The conductive connection structure may be, for example, a solder bump. The conductive connection structure may be, for example, a hemispherical shape. The conductive connection structure can be formed using known techniques. For example, if the substrate 1 is an LTCC substrate, the conductive connection structure may be formed as a sintered metal co-fired with the LTCC substrate. The conductive connection structure may be formed by plating growth on the substrate electrode. The conductive connection structure may be formed by mounting a metal structure such as a pin on the substrate electrode and soldering it. The conductive connection structure may be formed as a metal bump by melting a low-melting-point material such as solder on the substrate electrode. Any known material that can be used for electrical connection can be used as the material for the conductive connection structure. The material for the conductive connection structure may be, for example, a conductive metal material such as Cu, or an alloy material such as solder. If the conductive connection structure is, for example, a columnar electrode 7, it may be in a bulk form made of a single material, or may be in a form in which a coating layer is formed on the outer surface of the core body.

[0014] In step S1, as shown in FIG. 3, a component 3 is mounted on the first substrate surface 1a. The component 3 is an electronic component. The component 3 is, for example, an IC (Integrated Circuit). As shown in FIG. 4, the component 3 has a wiring layer 3b on its underside and an electrode 3c connected to the wiring layer 3b. If the component 3 is a SiIC, the component 3 has a Si layer 3a on its upper side. The Si layer 3a is sufficiently thicker than the wiring layer 3b. The component 3 may have a structure in which a component function unit is formed in a portion corresponding to the wiring layer 3b in FIG. 4. More specifically, the component 3 may be any of a surface acoustic wave device, a bulk acoustic wave device, a passive integrated device, etc.

[0015] In step S2, a sealing resin layer 6a is formed as shown in Fig. 5. The sealing resin layer 6a can be formed by known techniques such as liquid resin application, sheet resin molding, injection molding, transfer molding, compression molding, etc. The first substrate surface 1a, the components 3, and the columnar electrodes 7 are covered with the sealing resin layer 6a.

[0016] In step S3, the top surface shown in FIG. 5 is ground. Known techniques such as plunge grinding, traverse grinding, infeed grinding, and creep feed grinding can be used for the grinding. As shown in FIG. 6, the top surfaces of the columnar electrodes 7, the component 3, and the encapsulating resin layer 6a are all ground away at once by this grinding process. After the grinding process is completed, the top surfaces of the columnar electrodes 7, the component 3, and the encapsulating resin layer 6a are all flush with each other. The entire surface formed by the grinding process becomes the first exposed surface. That is, the entire top surface shown in FIG. 6 is the first exposed surface. The first exposed surface includes the top surfaces of the columnar electrodes 7, the component 3, and the encapsulating resin layer 6a. Within the first exposed surface, a cross section of the Si layer 3a is exposed as the top surface of the component 3. This exposed surface is the Si surface 3u. At this point, grinding scratches caused by the grinding process are present on the Si surface 3u.

[0017] In step S4, the first exposed surface is subjected to a finishing process to reduce the surface roughness Ra of the component 3. Hereinafter, the term "surface roughness" simply refers to the surface roughness Ra, i.e., the arithmetic mean roughness. Specifically, the finishing process is performed by chemical mechanical polishing (CMP). As a result, the surface roughness of the component 3, i.e., the surface roughness of the Si surface 3u, is reduced as shown in FIG. 7 . This finishing process may also reduce the surface roughness of surfaces other than the component 3. For example, the Si surface 3u is finished to a surface roughness of 0.001 μm or more and 0.1 μm or less. Meanwhile, the surface roughness of the upper surface of the encapsulating resin layer 6a is, for example, 0.05 μm or more and 0.1 μm or less as a result of the finishing process. Grinding scratches on the Si surface 3u caused by the grinding process in step S3 are removed by the finishing process in step S4.

[0018] In step S5, plating is performed on the surface of the first exposed surface of the columnar electrode 7. The plating can be performed using a known technique. The Si surface 3u may remain exposed during plating. There is no need to cover the Si surface 3u with a resist film. As a result of the plating, a plating film 12 is formed to cover the end surface of the columnar electrode 7, as shown in FIG. 8. The plating film 12 may have a structure in which multiple layers are stacked. For example, the plating film 12 may have a two-layer structure.

[0019] Furthermore, as shown in FIG. 9, the board is turned upside down and components 31, 32, and 33 are mounted on the second board surface 1b.

[0020] 10, a sealing resin layer 6b is formed. The second substrate surface 1b and the components 31, 32, and 33 are covered with the sealing resin layer 6b.

[0021] 11, the bumps 14 are formed. The end faces of the columnar electrodes 7 are already covered with the plating film 12, and the bumps 14 are formed so as to further cover the plating film 12.

[0022] As shown in Figure 12, printing is performed. This printing can be performed by a known technique such as laser processing. In the case of laser processing, recesses 15 are formed on the upper surface of the sealing resin layer 6b by printing. Then, individualization is performed. If the steps up to this point have been performed on a large substrate corresponding to multiple modules, after printing, the substrate is divided into pieces the size of individual modules.

[0023] As shown in Figure 13, a shielding film 8 is formed. The shielding film 8 can be formed by known techniques such as conductive resin coating, plating, vapor deposition, sputtering, etc. The shielding film 8 is formed so as to cover the upper and side surfaces of the sealing resin layer 6b, the side surfaces of the substrate 1, and the side surfaces of the sealing resin layer 6a. In the recesses 15 that were formed by printing, the shielding film 8 is formed so as to cover the inner surfaces of the recesses 15. In this way, the module 101 is obtained.

[0024] 13 , a module 101 according to the present embodiment includes a substrate 1 having a first substrate surface 1a, a columnar electrode 7 as a conductive connection structure provided on the first substrate surface 1a, a component 3 mounted on the first substrate surface 1a, and a sealing resin layer 6a disposed so as to cover the first substrate surface 1a, the side surfaces of the columnar electrode 7, and the side surfaces of the component 3. The end face of the columnar electrode 7 on the side remote from the substrate 1 and the surface of the component 3 on the side remote from the substrate 1 are exposed from the sealing resin layer 6a, and the surface of the component 3 on the side remote from the substrate 1 has a surface roughness Ra of 0.1 μm or less.

[0025] If there are grinding scratches on the Si surface 3u, Cu ions, plating solution, etc. are likely to remain in the gaps between the grinding scratches, causing plating deposition to occur from the grinding scratches. In the manufacturing method of this embodiment, a finishing process is performed in step S4 to reduce the surface roughness of the surface of the component 3, i.e., the Si surface 3u, and any grinding scratches that may have occurred on the Si surface 3u are removed. Therefore, even if a plating process is performed in step S5, a plating film does not grow on the Si surface 3u. Therefore, there is no need to form a resist film to cover the Si surface 3u during the plating process. The steps of forming a resist film and removing the resist film are no longer necessary. This reduces the number of processes.

[0026] It is preferable that the surface roughness of the Si surface 3u after step S4 is 0.005 μm or less, that is, 5 nm or less.

[0027] As shown in this embodiment, the finishing step S4 preferably includes a CMP process, which can reduce the surface roughness of the Si surface 3u.

[0028] After the finishing step S4, the surface of the component 3 exposed from the sealing resin layer 6a preferably has a surface roughness Ra of 0.1 μm or less, which more reliably prevents deposition of a plating film on the Si surface 3u.

[0029] After the finishing step S4, the surface roughness Ra of the upper surface of the sealing resin layer 6a is preferably 0.1 μm or less, which can improve the appearance.

[0030] Second Embodiment A module manufacturing method according to a second embodiment of the present invention is basically the same as the manufacturing method described in the first embodiment, except for the conditions for the CMP process performed in step S4. When the CMP process is performed, a slurry containing H2O2 is used.

[0031] In the module manufacturing method of this embodiment, the finishing process S4 is performed under processing conditions such that the removal rate of the material from the surface of the component 3 at the first exposed surface is faster than the removal rate of the material from the encapsulating resin layer 6a. More specifically, the CMP processing conditions are selected so that the removal rate of Si is the fastest among the three types of materials, Cu, Si, and encapsulating resin. One parameter manipulated as a parameter for the CMP processing conditions is, for example, the concentration of HO in the slurry. By appropriately setting the concentration of HO in the slurry, the removal rate of Si becomes the fastest, and the Si surface 3u becomes recessed compared to the surface of the encapsulating resin layer.

[0032] A module obtained by the module manufacturing method of this embodiment is shown in FIG.

[0033] A module according to this embodiment will be described with reference to Fig. 14. A module 102 according to this embodiment includes a substrate 1 having a first substrate surface 1a, a columnar electrode 7 as a conductive connection structure provided on the first substrate surface 1a, a component 3 mounted on the first substrate surface 1a, and a sealing resin layer 6a arranged to cover the first substrate surface 1a, the side surfaces of the columnar electrode 7, and the side surfaces of the component 3. The end face of the columnar electrode 7 farther from the substrate 1 and the surface of the component 3 farther from the substrate 1 are exposed from the sealing resin layer 6a. An Si surface 3u, which is the surface of the component 3 farther from the substrate 1, is recessed compared to the surface of the sealing resin layer 6a farther from the substrate 1.

[0034] 14 includes components 34, 35, 36, and 37 mounted on the second substrate surface 1b. The components shown here are merely an example, and the components are not limited to these.

[0035] In the module 102, the columnar electrode 7 serving as a conductive connection structure includes a main body made of a first material and a covering made of a second material that covers the side and end surfaces of the main body. The main body and covering may be made of different materials. The covering is not limited to a single layer, but may be made of multiple layers. The covering may have, for example, an Au / Ni laminate structure. In this case, Ni plating is first applied to the side and end surfaces of the main body, and then Au plating is applied to cover the Ni plating. This configuration of the columnar electrode 7 is merely an example and is not limited to this specific example.

[0036] According to the manufacturing method of this embodiment, a module can be easily obtained in which the Si surface 3u, which is the surface of the component 3 farther from the substrate 1, is recessed compared to the surface of the sealing resin layer 6a farther from the substrate 1.

[0037] It is assumed that the module of this embodiment will be incorporated into some kind of set for use. This module can be subjected to multiple flow processes, such as a process for incorporating the module into the set. According to the module of this embodiment, the Si surface 3u is recessed relative to the surface of the encapsulating resin layer 6a, so that the Si surface 3u is less likely to be scratched during these multiple flow processes. Furthermore, because the Si surface 3u of the component 3 is recessed relative to the surface of the encapsulating resin layer 6a, the component 3 is less likely to be damaged during each flow process.

[0038] The configuration described in this embodiment may be adopted in the module 101 described in embodiment 1. That is, also in the module 101 described in embodiment 1, it is preferable that the surface of the component 3 farther from the substrate 1 is recessed compared to the surface of the sealing resin layer 6a farther from the substrate 1. By adopting this configuration, the effects described in this embodiment can also be obtained.

[0039] It should be noted that a plurality of the above-described embodiments may be appropriately combined and employed. The above-described embodiments disclosed herein are illustrative in all respects and are not limiting. The scope of the present invention is defined by the claims, and includes all modifications within the meaning and scope of the claims.

[0040] (Supplementary Note 1) A method for manufacturing a module, comprising: a step of mounting a component having a Si layer on a first substrate surface of a substrate having a first substrate surface on which a conductive connection structure is provided; a step of forming an encapsulating resin layer so as to cover the first substrate surface, the conductive connection structure, and the component; a step of forming a first exposed surface including portions of the conductive connection structure and the component exposed from the encapsulating resin layer by simultaneously removing an upper surface of the conductive connection structure, an upper surface of the component, and an upper surface of the encapsulating resin layer by grinding; a step of finishing the first exposed surface to reduce a surface roughness Ra of the component; and a step of plating a surface of the conductive connection structure at the first exposed surface.

[0041] (Supplementary Note 2) The method for manufacturing a module according to Supplementary Note 1, wherein the step of performing the finishing process includes a step of performing a CMP process.

[0042] (Supplementary Note 3) The method for manufacturing a module according to Supplementary Note 1 or 2, wherein the surface of the component exposed from the sealing resin layer after the finishing step has a surface roughness Ra of 0.1 μm or less.

[0043] (Supplementary Note 4) The method for manufacturing a module according to any one of Supplementary Notes 1 to 3, wherein the surface roughness Ra of the upper surface of the sealing resin layer after the finishing step is completed is 0.1 μm or less.

[0044] (Appendix 5) A method for manufacturing a module described in any one of Appendices 1 to 4, wherein the finishing process is performed under processing conditions such that the removal rate of material from the surface of the component at the first exposed surface is faster than the removal rate of material from the sealing resin layer.

[0045] (Appendix 6) A module comprising: a substrate having a first substrate surface; a conductive connection structure provided on the first substrate surface; a component mounted on the first substrate surface; and a sealing resin layer arranged to cover the first substrate surface, a side surface of the conductive connection structure, and a side surface of the component, wherein an end face of the conductive connection structure on the side remote from the substrate and a surface of the component on the side remote from the substrate are exposed from the sealing resin layer, and the surface of the component on the side remote from the substrate is recessed compared to the surface of the sealing resin layer on the side remote from the substrate.

[0046] (Appendix 7) A module comprising: a substrate having a first substrate surface; a conductive connection structure provided on the first substrate surface; a component mounted on the first substrate surface; and a sealing resin layer arranged to cover the first substrate surface, a side surface of the conductive connection structure, and a side surface of the component, wherein an end face of the conductive connection structure on the side remote from the substrate and a surface of the component on the side remote from the substrate are exposed from the sealing resin layer, and the surface roughness Ra of the surface of the component on the side remote from the substrate is 0.1 μm or less.

[0047] (Supplementary Note 8) The module according to Supplementary Note 7, wherein a surface of the component on a side remote from the substrate is recessed compared to a surface of the sealing resin layer on a side remote from the substrate.

[0048] 1 substrate, 1a first substrate surface, 1b second substrate surface, 3 component, 3a Si layer, 3u Si surface, 6a, 6b sealing resin layer, 7 columnar electrode, 8 shielding film, 12 plating film, 14 bump, 15 recess, 31, 32, 33, 34, 35, 36, 37 component, 41 first exposed surface, 101, 102 module.

Claims

1. A method for manufacturing a module, comprising the steps of: mounting a component having a Si layer on a first substrate surface of a substrate having a conductive connection structure provided thereon; forming an encapsulating resin layer to cover the first substrate surface, the conductive connection structure, and the component; forming a first exposed surface including portions of the conductive connection structure and the component exposed from the encapsulating resin layer by simultaneously removing an upper surface of the conductive connection structure, an upper surface of the component, and an upper surface of the encapsulating resin layer by a grinding process; performing a finishing process on the first exposed surface to reduce a surface roughness Ra of the component; and plating a surface of the conductive connection structure at the first exposed surface.

2. The method for manufacturing a module according to claim 1, wherein the step of performing a finishing process includes a step of performing a CMP process.

3. The method for manufacturing a module according to claim 1 or 2, wherein the surface roughness Ra of the surface of the component exposed from the sealing resin layer after the finishing process is completed is 0.1 μm or less.

4. The method for manufacturing a module according to any one of claims 1 to 3, wherein the surface roughness Ra of the upper surface of the sealing resin layer after the finishing process is completed is 0.1 µm or less.

5. A method for manufacturing a module described in any one of claims 1 to 4, wherein the finishing process is performed under processing conditions such that the removal rate of material from the surface of the component at the first exposed surface is faster than the removal rate of material from the sealing resin layer.

6. A module comprising: a substrate having a first substrate surface; a conductive connection structure provided on the first substrate surface; a component mounted on the first substrate surface; and a sealing resin layer arranged to cover the first substrate surface, a side surface of the conductive connection structure and a side surface of the component, wherein an end face of the conductive connection structure facing away from the substrate and a surface of the component facing away from the substrate are exposed from the sealing resin layer, and the surface of the component facing away from the substrate is recessed compared to the surface of the sealing resin layer facing away from the substrate.

7. A module comprising: a substrate having a first substrate surface; a conductive connection structure provided on said first substrate surface; a component mounted on said first substrate surface; and a sealing resin layer arranged to cover said first substrate surface, a side surface of said conductive connection structure and a side surface of said component, wherein an end face of said conductive connection structure facing away from said substrate and a surface of said component facing away from said substrate are exposed from said sealing resin layer, and the surface roughness Ra of said surface of said component facing away from said substrate is 0.1 μm or less.

8. The module according to claim 7, wherein a surface of the component on a side remote from the substrate is recessed compared to a surface of the sealing resin layer on a side remote from the substrate.

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