Circuit board and electronic device comprising same

Abstract

The present disclosure relates to a circuit board. The circuit board according to an embodiment of the present disclosure may comprise: a substrate layer positioned on a first portion of the circuit board and a second portion of the circuit board, the second portion being different from the first portion; a power line positioned on the first portion of the circuit board; a signal line positioned on the second portion of the circuit board; a shielding layer spaced apart from the power line and the signal line; and a cover layer positioned between the substrate layer and the shielding layer, wherein the cover layer includes: a cover substrate layer positioned on the first portion and the second portion of the circuit board; a conductive layer positioned on the first portion of the circuit board to correspond to the power line and positioned between the cover substrate layer and the shielding layer; and an insulating layer positioned on the second portion of the circuit board to correspond to the signal line and disposed between the cover substrate layer and the shielding layer.

Description

Circuit boards and electronic devices including circuit boards

[0001] Various embodiments disclosed in this document relate to electronic devices, for example, electronic devices including circuit boards. More specifically, electronic devices including flexible printed circuit boards (PCBs) are disclosed.

[0002] Thanks to remarkable advancements in information and communication technology and semiconductor technology, the proliferation and use of various electronic devices is rapidly increasing. In particular, recent electronic devices are being developed to allow users to carry them around and communicate.

[0003] Electronic devices can refer to devices that perform specific functions based on the programs installed on them, such as home appliances, electronic notebooks, portable multimedia players, mobile communication terminals, tablet PCs, audio / video devices, desktop / laptop computers, and car navigation systems. For example, these electronic devices can output stored information as audio or video. As electronic device integration increases and ultra-high-speed, high-capacity wireless communications become more widespread, a single electronic device, such as a mobile communication terminal, can now be equipped with a variety of functions. For example, in addition to communication functions, entertainment functions such as games, multimedia functions such as music / video playback, communication and security functions such as mobile banking, and functions such as schedule management and electronic wallets are being integrated into a single electronic device. These electronic devices are becoming smaller and more portable for users.

[0004] An electronic device includes a housing and a circuit board disposed within the housing. The electronic device includes a port insertion hole into which an external device (e.g., a USB or charging device) can be inserted. The electronic device can be connected to the external device (e.g., a charging device) to charge a battery. The electronic device may include a flexible circuit board that connects the circuit board to an external device, such as a PCB. The flexible circuit board includes a power line (VBUS) and a signal line (USB3+). The power line (VBUS) of the flexible circuit board has a direct current (DC) resistance, and the signal line (USB3+) requires impedance matching.

[0005] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above is applicable as prior art in connection with the present disclosure.

[0006] A circuit board according to one embodiment of the present disclosure may include a substrate layer positioned at a first portion of the circuit board and a second portion different from the first portion; a power line positioned at the first portion of the circuit board; a signal line positioned at the second portion of the circuit board; a shielding layer spaced apart from the power line and the signal line; and a cover layer positioned between the substrate layer and the shielding layer, wherein the cover layer may include a cover substrate layer positioned at the first portion and the second portion of the circuit board; a conductive layer positioned corresponding to the power line at the first portion of the circuit board and positioned between the cover substrate layer and the shielding layer; and an insulating layer positioned corresponding to the signal line at the second portion of the circuit board and positioned between the cover substrate layer and the shielding layer.

[0007] A circuit board according to one embodiment of the present disclosure includes a power line positioned on a first portion of the circuit board; a signal line positioned on a second portion of the circuit board different from the first portion; and a cover layer spaced apart from the power line and the signal line, wherein the cover layer may include a conductive layer positioned corresponding to the power line on the first portion of the circuit board; and an insulating layer positioned corresponding to the signal line on the second portion of the circuit board.

[0008] An electronic device according to one embodiment of the present disclosure includes a housing; and a circuit board disposed inside the housing, wherein the circuit board includes a substrate layer positioned at a first portion of the circuit board and a second portion different from the first portion; a power line positioned at the first portion of the circuit board; a signal line positioned at the second portion of the circuit board; a shielding layer spaced apart from the power line and the signal line; and a cover layer disposed between the substrate layer and the shielding layer, wherein the cover layer may include a cover substrate layer positioned at the first portion and the second portion of the circuit board; a conductive layer positioned at the first portion of the circuit board to correspond to the power line and disposed between the cover substrate layer and the shielding layer; and an insulating layer positioned at the second portion of the circuit board to correspond to the signal line and disposed between the cover substrate layer and the shielding layer.

[0009] The above-described aspects or other aspects, configurations and / or advantages of one embodiment of the present disclosure may be further clarified by the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a block diagram of an electronic device within a network environment according to various embodiments.

[0011] FIG. 2 is a perspective view of an electronic device according to one embodiment of the present disclosure.

[0012] FIG. 3 is a perspective view of an electronic device according to one embodiment of the present disclosure.

[0013] FIG. 4 is an exploded perspective view of an electronic device according to one embodiment of the present disclosure.

[0014] FIG. 5A is an exploded perspective view of an electronic device according to one embodiment of the present disclosure.

[0015] FIG. 5b is an exploded view of a portion of an electronic device according to one embodiment of the present disclosure.

[0016] FIG. 6 is a part of an electronic device according to one embodiment of the present disclosure.

[0017] FIG. 7 is a cross-sectional view of an electronic device according to one embodiment of the present disclosure.

[0018] Figure 8 is an enlarged view of the M area shown in Figure 7.

[0019] FIG. 9 is a cross-sectional view of an electronic device according to one embodiment of the present disclosure.

[0020] FIG. 10 is a part of an electronic device according to one embodiment of the present disclosure.

[0021] FIG. 11A is a cross-sectional view of a portion of an electronic device according to one embodiment of the present disclosure.

[0022] FIG. 11b is a cross-sectional view of an electronic device according to one embodiment of the present disclosure.

[0023] FIG. 12 is a block diagram of a method for manufacturing an electronic device according to one embodiment of the present disclosure.

[0024] FIG. 13 is a cross-sectional view of a portion of an electronic device according to one embodiment of the present disclosure.

[0025] Throughout the attached drawings, similar reference numbers may be assigned to similar parts, components and / or structures.

[0026] The following description of the accompanying drawings may provide an understanding of various exemplary implementations of the present disclosure, including the claims and their equivalents. While the exemplary embodiments disclosed in the following description include numerous specific details to aid understanding, they are to be considered as one example of various exemplary embodiments. Accordingly, those skilled in the art will appreciate that various modifications and variations of the various implementations described herein may be made without departing from the scope and spirit of the disclosure. Furthermore, descriptions of well-known functions and configurations may be omitted for clarity and conciseness.

[0027] The terms and words used in the following description and claims are not limited to their reference meanings and can be used to clearly and consistently describe one embodiment of the present disclosure. Therefore, it will be apparent to those skilled in the art that the following description of various implementations of the disclosure is provided for illustrative purposes, not for the purpose of limiting the scope of the disclosure and its equivalents.

[0028] Unless the context clearly dictates otherwise, the singular forms of "a," "an," and "the" should be understood to include plural meanings. Thus, for example, "a component surface" could be understood to include one or more of the surfaces of the component.

[0029] FIG. 1 is a block diagram of an electronic device (101) within a network environment (100) according to various embodiments.

[0030] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) via a first network (198) (e.g., a short-range wireless communication network), or may communicate with at least one of an electronic device (104) or a server (108) via a second network (199) (e.g., a long-range wireless communication network). In one embodiment, the electronic device (101) may communicate with the electronic device (104) via the server (108). According to one embodiment, the electronic device (101) may include a processor (120), a memory (130), an input module (150), an audio output module (155), a display module (160), an audio module (170), a sensor module (176), an interface (177), a connection terminal (178), a haptic module (179), a camera module (180), a power management module (188), a battery (189), a communication module (190), a subscriber identification module (196), or an antenna module (197). In some embodiments, the electronic device (101) may omit at least one of these components (e.g., the connection terminal (178)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (176), the camera module (180), or the antenna module (197)) may be integrated into one component (e.g., the display module (160)).

[0031] The processor (120) may, for example, execute software (e.g., a program (140)) to control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) and perform various data processing or operations. According to one embodiment, as at least a part of the data processing or operations, the processor (120) may store commands or data received from other components (e.g., a sensor module (176) or a communication module (190)) in a volatile memory (132), process the commands or data stored in the volatile memory (132), and store result data in a non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or an auxiliary processor (123) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together with the main processor (121). For example, when the electronic device (101) includes the main processor (121) and the auxiliary processor (123), the auxiliary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a given function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as a part thereof.

[0032] The auxiliary processor (123) may control at least a portion of functions or states associated with at least one component (e.g., a display module (160), a sensor module (176), or a communication module (190)) of the electronic device (101), for example, on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (123) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (180) or a communication module (190)). In one embodiment, the auxiliary processor (123) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (108)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0033] The memory (130) can store various data used by at least one component (e.g., processor (120) or sensor module (176)) of the electronic device (101). The data can include, for example, software (e.g., program (140)) and input data or output data for commands related thereto. The memory (130) can include volatile memory (132) or non-volatile memory (134).

[0034] The program (140) may be stored as software in the memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0035] The input module (150) can receive commands or data to be used in a component of the electronic device (101) (e.g., a processor (120)) from an external source (e.g., a user) of the electronic device (101). The input module (150) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0036] The audio output module (155) can output audio signals to the outside of the electronic device (101). The audio output module (155) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0037] The display module (160) can visually provide information to an external party (e.g., a user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0038] The audio module (170) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150), output sound through the sound output module (155), or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (101).

[0039] The sensor module (176) can detect the operating status (e.g., power or temperature) of the electronic device (101) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (176) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0040] The interface (177) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (101) with an external electronic device (e.g., the electronic device (102)). In one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0041] The connection terminal (178) may include a connector through which the electronic device (101) may be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0042] The haptic module (179) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. According to one embodiment, the haptic module (179) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0043] The camera module (180) can capture still images and videos. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0044] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

[0045] A battery (189) may power at least one component of the electronic device (101). In one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0046] The communication module (190) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may operate independently from the processor (120) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (194) (e.g., a local area network (LAN) communication module, or a power line communication module). Among these communication modules, the corresponding communication module can communicate with an external electronic device (104) via a first network (198) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (199) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules can be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can verify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) by using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (196).

[0047] The wireless communication module (192) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). The NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and connection of multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (192) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (192) can support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), an external electronic device (e.g., the electronic device (104)), or a network system (e.g., the second network (199)). According to one embodiment, the wireless communication module (192) can support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.

[0048] The antenna module (197) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (197) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). In one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (198) or the second network (199), may be selected from the plurality of antennas, for example, by the communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device via the selected at least one antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (197).

[0049] According to various embodiments, the antenna module (197) may form a mmWave antenna module. In one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high-frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high-frequency band.

[0050] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0051] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) via a server (108) connected to a second network (199). Each of the external electronic devices (102 or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations executed in the electronic device (101) may be executed in one or more of the external electronic devices (102, 104, or 108). For example, when the electronic device (101) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (101) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (101) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In one embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server utilizing machine learning and / or a neural network. According to one embodiment, the external electronic device (104) or the server (108) may be included in the second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0052] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.

[0053] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0054] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0055] Various embodiments of the present document may be implemented as software (e.g., a program (140)) including one or more instructions stored in a storage medium (e.g., an internal memory (136) or an external memory (138)) readable by a machine (e.g., an electronic device (101)). For example, a processor (e.g., a processor (120)) of the machine (e.g., an electronic device (101)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0056] According to one embodiment, the method according to various embodiments disclosed in this document may be provided as included in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0057] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0058] FIG. 2 is a perspective view showing the front of an electronic device according to one embodiment of the present disclosure.

[0059] FIG. 3 is a perspective view showing the rear side of an electronic device according to one embodiment of the present disclosure.

[0060] The embodiments of FIGS. 2 to 3 may be combined with the embodiments of FIG. 1 or the embodiments of FIGS. 4 to 13.

[0061] Referring to FIGS. 2 and 3, an electronic device (101) according to one embodiment (e.g., the electronic device (101) of FIG. 1) may include a housing (210) that includes a first side (or front side) (210A), a second side (or back side) (210B), and a side surface (210C) that surrounds a space between the first side (210A) and the second side (210B). In one embodiment (not shown), the housing (210) may also refer to a structure that forms a portion of the first side (210A) of FIG. 2, the second side (210B) of FIG. 3, and the side surface (210C). According to one embodiment, the first side (210A) may be formed by a front plate (202) that is at least partially substantially transparent (e.g., a glass plate or a polymer plate including various coating layers). The second side (210B) may be formed by a substantially opaque back plate (211). The back plate (211) may be formed of, for example, coated or colored glass, ceramic, polymer, metal (e.g., aluminum, stainless steel (STS), or magnesium), or a combination of at least two of the foregoing materials. The back plate (211) may form the second side (210B). The side surface (210C) may be formed by a side structure (or “side bezel structure”) (218) that is joined to the front plate (202) and the back plate (211) and comprises a metal and / or a polymer. In one embodiment, the back plate (211) and the side structure (218) may be formed integrally and comprise the same material (e.g., a metal material such as aluminum).

[0062] Although not shown, the front plate (202) may include a seamlessly extending region(s) that curves toward the rear plate (211) at least along a portion of an edge. In one embodiment, the front plate (202) (or the rear plate (211)) may include only one of the curved extending regions toward the rear plate (211) (or the front plate (202)) at one edge of the first surface (210A). In some embodiments, the front plate (202) or the rear plate (211) may be substantially flat. For example, the curved extending region may not be included. When the curved extending region is included, the thickness of the electronic device (101) in the portion that includes the curved extending region may be smaller than that of other portions.

[0063] According to one embodiment, the electronic device (101) may include at least one of a display (220), an audio module (203, 207, 214), a sensor module (204, 219), a camera module (205, 212, 213), a key input device (217), a light emitting element (206), and a connector hole (208, 209). In one embodiment, the electronic device (101) may omit at least one of the components (e.g., the key input device (217) or the light emitting element (206)) or may additionally include other components.

[0064] The display (220) may be visually exposed, for example, through a significant portion of the front plate (202). In one embodiment, at least a portion of the display (220) may be visually exposed through the front plate (202) forming the first surface (210A) or through a portion of a side surface (210C). In one embodiment, the edge of the display (220) may be formed to be substantially the same as the adjacent outer shape of the front plate (202). In one embodiment (not shown), the gap between the outer edge of the display (220) and the outer edge of the front plate (202) may be formed to be substantially the same in order to expand the area over which the display (220) is visually exposed.

[0065] In one embodiment (not shown), a recess or opening may be formed in a portion of a screen display area of ​​the display (220), and at least one of an audio module (214), a sensor module (204), a camera module (205), and a light-emitting element (206) may be included that are aligned with the recess or opening. In one embodiment (not shown), at least one of an audio module (214), a sensor module (204), a camera module (205), a fingerprint sensor (not shown), and a light-emitting element (206) may be included on a back surface of the screen display area of ​​the display (220). In one embodiment (not shown), the display (220) may be coupled to or disposed adjacent to a touch detection circuit, a pressure sensor capable of measuring the intensity (pressure) of a touch, and / or a digitizer that detects a magnetic field-type stylus pen.

[0066] The audio module (203, 207, 214) may include a microphone hole (203) and a speaker hole (207, 214). The microphone hole (203) may have a microphone disposed therein for acquiring external sound, and in one embodiment, multiple microphones may be disposed so as to detect the direction of the sound. The speaker hole (207, 214) may include an external speaker hole (207) and a receiver hole (214) for calls. In one embodiment, the speaker hole (207, 214) and the microphone hole (203) may be implemented as a single hole, or a speaker may be included without the speaker hole (207, 214) (e.g., a piezo speaker).

[0067] The sensor module (204, 219) can generate an electrical signal or data value corresponding to an internal operating state of the electronic device (101) or an external environmental state. The sensor module (204, 219) may include, for example, a first sensor module (204) (e.g., a proximity sensor) and / or a second sensor module (not shown) (e.g., a fingerprint sensor) disposed on a first surface (210A) of the housing (210), and / or a third sensor module (219) and / or a fourth sensor module (e.g., a fingerprint sensor) disposed on a second surface (210B) of the housing (210). The fingerprint sensor may be disposed on not only the first surface (210A) (e.g., the display (220)) of the housing (210), but also the second surface (210B) or the side surface (210C). The electronic device (101) may further include, for example, at least one of a gesture sensor, a gyro sensor, a pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0068] The camera modules (205, 212, 213) may include a first camera device (205) disposed on a first surface (210A) of the electronic device (101), a second camera device (212) disposed on a second surface (210B), and / or a flash (213). The camera devices (205, 212) may include one or more lenses, an image sensor, and / or an image signal processor. The flash (213) may include, for example, a light-emitting diode or a xenon lamp. In one embodiment, two or more lenses (infrared camera, wide-angle and telephoto lenses) and image sensors may be disposed on one surface of the electronic device (101). In one embodiment, the flash (213) may emit infrared light, and infrared light emitted by the flash (213) and reflected by a subject may be received via the third sensor module (219). The electronic device (101) or the processor of the electronic device (101) can detect depth information of the subject based on the point in time when infrared rays are received from the third sensor module (219).

[0069] The key input device (217) may be disposed on a side surface (210C) of the housing (210). In one embodiment, the electronic device (101) may not include some or all of the above-mentioned key input devices (217), and the key input devices (217) that are not included may be implemented in other forms, such as soft keys, on the display (220). In one embodiment, the key input device may include a sensor module disposed on a second surface (210B) of the housing (210).

[0070] The light-emitting element (206) may be disposed, for example, on the first surface (210A) of the housing (210). The light-emitting element (206) may provide, for example, status information of the electronic device (101) in the form of light. In one embodiment, the light-emitting element (206) may provide a light source that is linked to the operation of, for example, the camera module (205). The light-emitting element (206) may include, for example, an LED, an IR LED, and a xenon lamp.

[0071] The connector holes (208, 209) may include a first connector hole (208) that can accommodate a connector (e.g., a USB connector) for transmitting and receiving power and / or data with an external electronic device, and / or a second connector hole (e.g., an earphone jack) (209) that can accommodate a connector for transmitting and receiving audio signals with an external electronic device.

[0072] FIG. 4 is an exploded perspective view showing the front of an electronic device according to one embodiment of the present disclosure.

[0073] FIG. 5 is an exploded perspective view showing the rear side of an electronic device according to one embodiment of the present disclosure.

[0074] The embodiments of FIGS. 4 to 5 may be combined with the embodiments of FIGS. 1 to 3, or the embodiments of FIGS. 6 to 13.

[0075] Referring to FIGS. 3 and 4, the electronic device (101) (e.g., the electronic device (101) of FIG. 1 or 2) may include a side structure (310), a first support member (311) (e.g., a bracket), a front plate (320) (e.g., the front plate (202) of FIG. 1), a display (330) (e.g., the display (220) of FIG. 1), at least one printed circuit board (or board assembly) (340a, 340b), a battery (350), a second support member (360) (e.g., a rear case), an antenna, a camera assembly (307), and a rear plate (380) (e.g., the rear plate (211) of FIG. 2). When including a plurality of printed circuit boards (340a, 340b), the electronic device (101) can electrically connect different printed circuit boards by including at least one flexible printed circuit board (340c). For example, the printed circuit boards (340a, 340b) can include a first circuit board (340a) positioned above (e.g., in the +Y-axis direction) the battery (350) and a second circuit board (340b) positioned below (e.g., in the -Y-axis direction), and the flexible printed circuit board (340c) can electrically connect the first circuit board (340a) and the second circuit board (340b).

[0076] According to one embodiment, the electronic device (101) may omit at least one of the components (e.g., the first support member (311) or the second support member (360)) or may additionally include other components. At least one of the components of the electronic device (101) may be identical or similar to at least one of the components of the electronic device (101) of FIG. 1 or FIG. 2, and any redundant description will be omitted below.

[0077] The first support member (311) may be provided in a flat shape at least in part. In one embodiment, the first support member (311) may be disposed inside the electronic device (101) and connected to the side structure (310), or may be formed integrally with the side structure (310). The first support member (311) may be formed of, for example, a metallic material and / or a non-metallic (e.g., polymer) material. When the first support member (311) is formed at least partially of a metallic material, the side structure (310) or a portion of the first support member (311) may function as an antenna. The first support member (311) may have a display (330) coupled to one surface and a printed circuit board (340a, 340b) coupled to the other surface. A processor, a memory, and / or an interface may be mounted on the printed circuit board (340a, 340b). The processor may include, for example, one or more of a central processing unit, an application processor, a graphics processing unit, an image signal processor, a sensor hub processor, or a communication processor.

[0078] In one embodiment, the housing (301) may include a first support member (311) and a side structure (310). In one embodiment, the housing (301) may be understood as a structure for accommodating, protecting, or arranging a printed circuit board (340a, 340b) or a battery (350). In one embodiment, the housing (301) may be understood as including structures that can be visually or tactilely recognized by a user in the appearance of the electronic device (101), for example, the side structure (310), the front plate (320), and / or the rear plate (380). For example, the housing (301) may include structures forming the appearance of the electronic device (101), for example, the side structure (310), the front plate (320), and the rear plate (380). The housing (301) may be the same as the housing (210) described with reference to FIGS. 2 and 3 . In one embodiment, the 'front or rear side of the housing (301)' may refer to the first side (210A) of FIG. 1 or the second side (210B) of FIG. 2. In one embodiment, the first support member (311) is disposed between the front plate (320) (e.g., the first side (210A) of FIG. 2) and the rear plate (380) (e.g., the second side (210B) of FIG. 3), and may function as a structure for arranging electrical / electronic components such as printed circuit boards (340a, 340b) or camera assemblies (307).

[0079] The memory may include, for example, volatile memory or non-volatile memory.

[0080] The interface may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, and / or an audio interface. The interface may electrically or physically connect the electronic device (101) to an external electronic device, for example, and may include a USB connector, an SD card / MMC connector, or an audio connector.

[0081] The second support member (360) may include, for example, an upper support member (360a) or a lower support member (360b). In one embodiment, the upper support member (360a) may be arranged to surround a printed circuit board (340a, 340b) (e.g., the first circuit board (340a)) together with a portion of the first support member (311). For example, the upper support member (360a) of the second support member (360) may be arranged to face the first support member (311) with the first circuit board (340a) interposed therebetween. In one embodiment, the lower support member (360b) of the second support member (360) may be arranged to face the first support member (311) with the second circuit board (340b) interposed therebetween. Circuit devices implemented in the form of integrated circuit chips (e.g., processors, communication modules, or memories) or various electrical / electronic components may be placed on printed circuit boards (340a, 340b), and according to an embodiment, the printed circuit boards (340a, 340b) may be provided with an electromagnetic shielding environment from the second support member (360). In one embodiment, the lower support member (360b) may be utilized as a structure on which electrical / electronic components such as a speaker module or an interface (e.g., a USB connector, an SD card / MMC connector, or an audio connector) may be placed. In one embodiment, electrical / electronic components such as a speaker module or an interface (e.g., a USB connector, an SD card / MMC connector, or an audio connector) may be placed on an additional printed circuit board (not shown). For example, the lower support member (360b) may be arranged to surround an additional printed circuit board (e.g., a second printed circuit board (340b)) together with another portion of the first support member (311). An additional printed circuit board not shown or a speaker module or interface arranged on the lower support member (360b) may be arranged corresponding to the audio module (207) or connector holes (208, 309) of FIG. 2.

[0082] The battery (350) is a device for supplying power to at least one component of the electronic device (101), and may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. At least a portion of the battery (350) may be disposed substantially on the same plane as, for example, the printed circuit boards (340a, 340b). The battery (350) may be disposed integrally within the electronic device (101), or may be disposed detachably from the electronic device (101).

[0083] Although not shown, the antenna may include a conductive pattern implemented on the surface of the second support member (360), for example, through a laser direct structuring process. In one embodiment, the antenna may include a printed circuit pattern formed on the surface of a thin film, and the thin film-type antenna may be disposed between the back plate (380) and the battery (350). The antenna may include, for example, a near field communication (NFC) antenna, a wireless charging antenna, and / or a magnetic secure transmission (MST) antenna. The antenna may, for example, perform short-range communication with an external device or wirelessly transmit and receive power required for charging. In one embodiment, another antenna structure may be formed by the side structure (310) and / or a portion or combination of the first support member (311).

[0084] In one embodiment, the camera assembly (307) may include at least one camera module. Within the electronic device (101), the camera assembly (307) (or at least one camera module) may receive at least a portion of light incident through an optical hole or camera window. In one embodiment, the camera assembly (307) may be disposed on the first support member (311) at a position adjacent to the printed circuit board (340a, 340b). In one embodiment, the camera module(s) of the camera assembly (307) may be generally aligned with one of the camera windows and may be at least partially wrapped around the second support member (360) (e.g., the upper support member (360a)).

[0085] According to one embodiment, the electronic device (101) may include camera holes (312, 313, 319). A plurality of camera holes (312, 313, 319) may be arranged spaced apart from each other. The camera assembly (307) may receive light passing through the camera holes (312, 313, 319).

[0086] In one embodiment, the first support member (311) may include a receiving portion (3111). A battery (350) may be disposed within the receiving portion (3111). The battery (350) may include a terrace (353). The terrace (353) may protrude toward the printed circuit board (340). The battery (350) may include a battery connection member (3501) connecting the terrace (353) and the printed circuit board (340).

[0087] According to one embodiment, the electronic device (101) may include a port insertion opening (308). The port insertion opening (308) may be opened in a portion of the housing (301). The port insertion opening (308) may be in communication with an external space of the housing (301). The electronic device (101) may be connected to an external device (e.g., a USB port, a charging cable, etc.), and the external device may be inserted into the port insertion opening (308).

[0088] According to one embodiment, the electronic device (101) may include an antenna (309). The antenna (309) may be positioned adjacent to the port insertion opening (308).

[0089] FIG. 5b is a drawing of an electronic device (101) with the rear cover (e.g., the rear plate (380) of FIG. 5a) removed. The components described with reference to FIG. 5b may be partially or entirely identical to the components described with reference to FIGS. 1 to 5a. The components described with reference to FIG. 5b may be partially or entirely identical to the components described with reference to FIGS. 6 to 13.

[0090] According to one embodiment, the electronic device (101) may include a first printed circuit board (340a), a second printed circuit board (340b), and a flexible printed circuit board (340c). The description of the printed circuit boards (e.g., the first printed circuit board (340a), the second printed circuit board (340b), and the flexible printed circuit board (340c)) may be equally applied to the printed circuit boards (340a, 340b, 340c) described with reference to FIGS. 1 to 5A.

[0091] According to one embodiment, a first printed circuit board (340a) and a second printed circuit board (340b) may be arranged inside a housing (301). The first printed circuit board (340a) and the second printed circuit board (340b) may be spaced apart from each other. A flexible printed circuit board (340c) may connect the first printed circuit board (340a) and the second printed circuit board (340b).

[0092] According to one embodiment, the electronic device (101) may include a circuit board (400). The circuit board (400) may be a flexible printed circuit board. The circuit board (400) may be disposed inside the housing (301). The flexible circuit board (340c) described with reference to FIGS. 1 to 5A may be the same as the circuit board (400) described with reference to FIGS. 5B to 13. The circuit board (400) may connect a first printed circuit board (340a) and a second printed circuit board (340b).

[0093] According to one embodiment, a circuit board (400) may be disposed inside a housing (301). The circuit board (400) may be connected to a second printed circuit board (340b). The circuit board (400) may connect the first printed circuit board (340a) and the second printed circuit board (340b). The circuit board (400) may transmit a signal regarding power transmitted from an external device (e.g., a charging device) inserted through the port insertion port (308). The circuit board (400) may transmit power of the external device (e.g., a charging device) inserted through the port insertion port (308). The circuit board (400) may transmit a signal transmitted from an external device (e.g., a USB) inserted through the port insertion port (308) to the first printed circuit board (340a). The circuit board (400) can transmit a signal transmitted from the antenna (309) to the first printed circuit board (340a).

[0094] According to one embodiment, the electronic device (101) may include a device connector (308a). The device connector (308a) may face the port insertion port (308). The device connector (308a) may be coupled to a second printed circuit board (340b). An external device (e.g., a charging device or USB) inserted into the port insertion port (308) may be connected to the device connector (308a). The device connector (308a) may connect the external device to the second printed circuit board (340b).

[0095] According to one embodiment, the electronic device (101) may include a circuit board connector (340d). The circuit board connector (340d) may be coupled to a second printed circuit board (340b). The circuit board connector (340d) may connect the second printed circuit board (340b) and the circuit board (400). At least a portion of the circuit board (400) may be inserted into the circuit board connector (340d).

[0096] Fig. 6 is a drawing showing a portion of a circuit board (400). The components described with reference to Fig. 6 may be partially or entirely the same as the components described with reference to Figs. 1 to 5b. The components described with reference to Fig. 6 may be partially or entirely the same as the components described with reference to Figs. 7 to 13. Fig. 6 may be a drawing showing a state in which the shielding layer (440) and film layer (450) illustrated in Fig. 7 have been removed.

[0097] According to one embodiment, the circuit board (400) may include power lines (410, 420). The power lines (410, 420) may supply power to a battery (e.g., battery (350) of FIGS. 1 to 5A). The power lines (410, 420) may include a plurality of power lines (410, 420). The power lines (410, 420) may include a first power line (410) and a second power line (420). The first power line (410) and the second power line (420) may be spaced apart from each other. The power lines (410, 420) may be referred to as “first lines.” The power lines (410, 420) may be referred to as “first signal lines.” The power lines (410, 420) may be referred to as “charging lines.” The power lines (410, 420) may be named “VBUS lines”.

[0098] According to one embodiment, the circuit board (400) may include a signal line (430). The signal line (430) may transmit a signal to a first printed circuit board (e.g., the first printed circuit board (340a) of FIG. 5B). The signal line (430) may receive a signal from an external device (e.g., a USB port) inserted into a port insertion port (e.g., the port insertion port (308) of FIG. 5B). The signal line (430) may be arranged between a first power line (410) and a second power line (420). The signal line (430) may be referred to as a “second line.” The signal line (430) may be referred to as a “second signal line.” The signal line (430) may be referred to as a “USB line.” The signal line (430) may be referred to as a “communication line.” The signal line (430) may be named a “data line”.

[0099] According to one embodiment, the electronic device (101) may include a connecting pin (408). The connecting pin (408) may be coupled to a circuit board (400). The connecting pin (408) may be coupled to a board connector (e.g., board connector (340d) of FIG. 5b). The connecting pin (408) may connect a second printed circuit board (e.g., second printed circuit board (340b) of FIG. 5b) and the circuit board (400). A signal generated from the external device (e.g., a signal regarding information transmitted via USB or power transmitted via a charging device) may be transmitted to the circuit board (400) via the connecting pin (408).

[0100] Fig. 7 is a part of a cross-sectional view of a circuit board (400) taken along the A-A' reference line illustrated in Fig. 6. Fig. 8 is an enlarged view of the M region illustrated in Fig. 7. The components described with reference to Figs. 7 and 8 may be partly or entirely identical to the components described with reference to Figs. 1 to 6. The components described with reference to Figs. 7 and 8 may be partly or entirely identical to the components described with reference to Figs. 9 to 13.

[0101] According to one embodiment, the circuit board (400) may include a first portion (401, 402). The first portion (401, 402) may be a portion of the circuit board (400). The first portion (401, 402) may be a portion of the circuit board (400) on which a power line (410) is arranged. The first portion (401, 402) may include a plurality of first portions (401, 402). For example, the first portion (401, 402) may include a first-first portion (401) and a first-second portion (402) that are spaced apart from each other.

[0102] According to one embodiment, the circuit board (400) may include a second portion (403). The second portion (403) may be a portion of the circuit board (400). The second portion (403) may be a portion of the circuit board (400) on which a signal line (430) is arranged. The second portion (403) may be located between the first-first portion (401) and the first-second portion (402).

[0103] According to one embodiment, the circuit board (400) may include power lines (410, 420) and signal lines (430). The power lines (410, 420) may include a first power line (410) and a second power line (420). The power lines (410, 420) may be arranged in the first portion (401, 402). The first power line (410) may be arranged in the first-first portion (401). The second power line (420) may be arranged in the first-second portion (402). The signal line (430) may be arranged in the second portion (403).

[0104] According to one embodiment, the signal line (430) may include a signal wire (431) and a ground wire (432). The signal wire (431) and the ground wire (432) may be indirectly connected to each other. The circuit board (400) may include a connecting wire (not shown) connecting the signal wire (431) and the ground wire (432). The signal wire (431) and the ground wire (432) may be connected to each other through the connecting wire.

[0105] According to one embodiment, the circuit board (400) may include a substrate layer (470). The substrate layer (470) may be located inside the circuit board (400). Power lines (410, 420) and signal lines (430) may be coupled to the substrate layer (470). The power lines (410, 420) may be disposed between the substrate layer (470) and the cover layer (460). The signal line (430) may be disposed between the substrate layer (470) and the cover layer (460).

[0106] According to one embodiment, the circuit board (400) may include an adhesive layer (480). The adhesive layer (480) may be adhered to the substrate layer (470). The adhesive layer (480) may surround at least a portion of the power lines (410, 420) and the signal lines (430). The adhesive layer (480) may be disposed between the substrate layer (470) and the cover layer (460). The adhesive layer (480) may connect the substrate layer (470) and the cover layer (460).

[0107] According to one embodiment, the circuit board (400) may include a shielding layer (440). The shielding layer (440) may block signals outside the circuit board (400). The shielding layer (440) may block electromagnetic interference (EMI). The shielding layer (440) may be disposed between the film layer (450) and the cover layer (460). The shielding layer (440) may be referred to as a “barrier layer.” The shielding layer (440) may be referred to as a “shielding layer” or a “protective layer.”

[0108] In one embodiment, the circuit board (400) may include a film layer (450). The film layer (450) may form a surface of the circuit board (400). The film layer (450) may be bonded to the shielding layer (440). The film layer (450) may be referred to as a “surface layer.” The film layer (450) may be referred to as a “protective layer.” The film layer (450) may be referred to as an “outer layer.”

[0109] According to one embodiment, the circuit board (400) may include a cover layer (460). The cover layer (460) may be spaced apart from the substrate layer (470). The cover layer (460) may be disposed between the substrate layer (470) and the shielding layer (440). The cover layer (460) may be disposed between the adhesive layer (480) and the shielding layer (440).

[0110] According to one embodiment, the shielding layer (440), the film layer (450), and the cover layer (460) may be arranged symmetrically with respect to the substrate layer (470). For example, the shielding layer (440) may include a plurality of shielding layers (440) spaced apart from each other with the substrate layer (470) therebetween. For example, the film layer (450) may include a plurality of film layers (450) spaced apart from each other with the substrate layer (470) therebetween. For example, the cover layer (460) may include a plurality of cover layers (460) spaced apart from each other with the substrate layer (470) therebetween.

[0111] In one embodiment, the cover layer (460) may include a cover substrate layer (461). The cover substrate layer (461) may be disposed between the substrate layer (470) and the shielding layer (440). The cover substrate layer (461) may be disposed between the adhesive layer (480) and the shielding layer (440). The adhesive layer (480) may be adhered to the cover substrate layer (461). The cover substrate layer (461) may be positioned to correspond to both the first portion (401, 402) and the second portion (403) of the circuit board (400). For example, a portion of the cover substrate layer (461) may be positioned in the first portion (401, 402), and another portion of the cover substrate layer (461) may be positioned in the second portion (403).

[0112] According to one embodiment, the cover layer (460) may include a conductive layer (462, 463). The conductive layer (462, 463) may include a conductive material. The conductive layer (462, 463) may include a copper (Cu) material. The conductive layer (462, 463) may be disposed between the substrate layer (470) and the shielding layer (440). The conductive layer (462, 463) may be disposed between the cover substrate layer (461) and the shielding layer (440). The conductive layer (462, 463) may be disposed between the power line (410, 420) and the shielding layer (440). The conductive layer (462, 463) may be located on the first portion (401, 402) of the circuit board (400). The conductive layers (462, 463) may include a first conductive layer (462) located in the 1-1 portion (401) and a second conductive layer (463) located in the 1-2 portion (402). The first conductive layer (462) may be disposed between the first power line (410) and the shielding layer (440). The second conductive layer (463) may be disposed between the second power line (420) and the shielding layer (440).

[0113] In one embodiment, the cover layer (460) may include an insulating layer (464). The insulating layer (464) may include a dielectric. The insulating layer (464) may include a non-conductive material. The insulating layer (464) may include a material having a permittivity. The insulating layer (464) may be disposed between the substrate layer (470) and the shielding layer (440). The insulating layer (464) may be disposed between the cover substrate layer (461) and the shielding layer (440). The insulating layer (464) may be disposed between the signal line (430) and the shielding layer (440). The insulating layer (464) may be located in the second portion (403) of the circuit board (400). The insulating layer (464) may be referred to as a “non-conductive layer.” The insulating layer (464) may be referred to as a “dielectric layer.” The insulating layer (464) may be referred to as an “insertion layer”.

[0114] According to one embodiment, the conductive layers (462, 463) and the insulating layer (464) may be positioned on the same plane. For example, the conductive layers (462, 463) and the insulating layer (464) may be positioned between the cover layer (461) and the shielding layer (440). The insulating layer (464) may be positioned between the first conductive layer (462) and the second conductive layer (463).

[0115] According to one embodiment, the cover layer (460) may include a first cover layer (461) and second cover layers (462, 463, 464). The cover substrate layer (461) may be referred to as a “first cover layer.” Each of the conductive layers (462, 463) and the insulating layer (464) may be referred to as a “second cover layer.” The second cover layers (462, 463, 464) may include the conductive layers (462, 463) and the insulating layer (464). The conductive layers (462, 463) may be referred to as “conductive portions.” The insulating layer (464) may be referred to as an “insulating portion.” The conductive portions (462, 463) may include the first conductive portion (462) and the second conductive portion (463).

[0116] According to one embodiment, a boundary surface (P1, P2) may be formed between the first portion (401, 402) and the second portion (403) of the circuit board (400). For example, a first boundary surface (P1) may be formed between the 1-1 portion (401) and the second portion (403). For example, a second boundary surface (P2) may be formed between the 1-2 portion (402) and the second portion (403). The first and second boundary surfaces (P1, P2) may be virtual planes that divide the respective portions (401, 402, 403) of the circuit board (400). The first power line (410) may be positioned in a first direction with respect to the first boundary surface (P1), and the signal line (430) may be positioned in a second direction opposite to the first direction with respect to the boundary surface (P1). The second power line (420) can be positioned in the second direction based on the second boundary surface (P2), and the signal line (430) can be positioned in the first direction based on the second boundary surface (P2).

[0117] According to one embodiment, the width (w1) of the first-first portion (401) may be smaller than the width (w3) of the second portion (403). The width (w2) of the first-second portion (402) may be smaller than the width (w3) of the second portion (403).

[0118] According to one embodiment, the cover substrate layer (461) may include a first cover portion (4611) and a second cover portion (4612). The first cover portion (4611) and the second cover portion (4612) may be integral. The first cover portion (4611) may be a portion of the cover substrate layer (461) located in the first portion (401). The second cover portion (4612) may be a portion of the cover substrate layer (461) located in the second portion (403). The first cover portion (4611) and the second cover portion (4612) may be bounded by a boundary surface (P1). The first cover portion (4611) may be disposed between the power line (410) and the conductive layer (462). The first cover portion (4611) may be positioned corresponding to the power line (410). The first cover portion (4611) may be positioned corresponding to the conductive layer (462). The second cover portion (4612) may be positioned between the signal line (430) and the insulating layer (464). The second cover portion (4612) may be positioned corresponding to the signal line (430). The second cover portion (4612) may be positioned corresponding to the insulating layer (464).

[0119] According to one embodiment, the shielding layer (440) may include a first shielding portion (441) and a second shielding portion (442). The first shielding portion (441) and the second shielding portion (442) may be integral. The first shielding portion (441) may be a portion of the shielding layer (440) located in the first portion (401). The second shielding portion (442) may be a portion of the shielding layer (440) located in the second portion (403). The first shielding portion (441) and the second shielding portion (442) may be bounded by a boundary surface (P1). The first shielding portion (441) may be disposed between the power line (410) and the film layer (450). The first shielding portion (441) may be disposed between the conductive layer (462) and the film layer (450). The first shielding portion (441) may be positioned corresponding to the power line (410). The first shielding portion (441) may be positioned corresponding to the conductive layer (462). The second shielding portion (442) may be positioned between the signal line (430) and the film layer (450). The second shielding portion (442) may be positioned corresponding to the signal line (430). The second shielding portion (442) may be positioned corresponding to the insulating layer (464).

[0120] According to one embodiment, the film layer (450) may include a first film portion (451) and a second film portion (452). The first film portion (451) and the second film portion (452) may be integral. The first film portion (451) may be a portion of the film layer (450) located in the first portion (401). The second film portion (452) may be a portion of the film layer (450) located in the second portion (403). The first film portion (451) and the second film portion (452) may be bounded by a boundary surface (P1). The first film portion (451) may be positioned to correspond to the power line (410). The first film portion (451) may be positioned to correspond to the conductive layer (462). The second film portion (452) may be positioned to correspond to the signal line (430). The second film portion (452) can be positioned corresponding to the insulating layer (464).

[0121] According to one embodiment, the power line (410) may be disposed between the substrate layer (470) and the first cover portion (4611). The power line (410) may be disposed between the substrate layer (470) and the conductive layer (462). The power line (410) may be disposed between the substrate layer (470) and the first shield portion (441). The power line (410) may be disposed between the substrate layer (470) and the first film portion (451).

[0122] According to one embodiment, the signal line (430) may be disposed between the substrate layer (470) and the second cover portion (4612). The signal line (430) may be disposed between the substrate layer (470) and the insulating layer (464). The signal line (430) may be disposed between the substrate layer (470) and the second shielding portion (442). The signal line (430) may be disposed between the substrate layer (470) and the second film portion (452).

[0123] According to one embodiment, the conductive layer (462) may be disposed between the first cover portion (4611) and the first shield portion (441). The conductive layer (462) may be disposed between the power line (410) and the first shield portion (441). The conductive layer (462) may be disposed between the power line (410) and the first film portion (451). The conductive layer (462) may be disposed between the first cover portion (4611) and the first film portion (451).

[0124] According to one embodiment, the insulating layer (464) may be disposed between the second cover portion (4612) and the second shield portion (442). The insulating layer (464) may be disposed between the signal line (430) and the second shield portion (442). The insulating layer (464) may be disposed between the signal line (430) and the second film portion (452). The insulating layer (464) may be disposed between the second cover portion (4612) and the second film portion (452).

[0125] According to one embodiment, the cover layer (460) may include a first cover layer (461) and a second cover layer (462, 463, 464). The second cover layer (462, 463, 464) may include a boundary portion (465). The boundary portion (465) may form a boundary between the conductive layer (462) and the insulating layer (464). The boundary surface (P1) may be formed to pass through the boundary portion (465).

[0126] According to one embodiment, the conductive layer (462) may be positioned corresponding to the power line (410). The insulating layer (464) may be formed at a position corresponding to the signal line (430). The first spacing (h1, h2) between the power lines (410, 420) and the conductive layers (462, 463) may be smaller than the second spacing (h3) between the signal line (430) and the shielding layer (440).

[0127] Fig. 9 is a diagram conceptually illustrating the relationship between each layer of the circuit board (400) illustrated in Figs. 7 and 8. The components described with reference to Fig. 9 may be partially or entirely identical to the components described with reference to Figs. 1 to 8. The components described with reference to Fig. 9 may be partially or entirely identical to the components described with reference to Figs. 10 to 13.

[0128] According to one embodiment, the circuit board (400) may include a first portion (401) and a second portion (403). The description of the first portion (401) and the second portion (403) may be identical to the description of the first and second portions (401, 402, 403) described with reference to FIGS. 7 and 8.

[0129] In one embodiment, the circuit board (400) may include a conductive via (490). The conductive via (490) may penetrate at least a portion of the circuit board (400). The conductive via (490) may provide grounding to the power line (410). The conductive via (490) may penetrate the power line (410). The conductive via (490) may be connected to the adhesive layer (480). The conductive via (490) may be referred to as a “grounding wire.”

[0130] According to one embodiment, each of the layers (410, 440, 450, 461, 462, 464, 470, 480) constituting the circuit board (400) may have a thickness (t1 to t15). The thickness (t7, t9) of the power line (410) may be smaller than the thickness (t8) of the substrate layer (470). The thickness (t4, t12) of the cover substrate layer (461) may be greater than the thickness (t7, t9) of the power line (410). The thickness (t4, t12) of the cover substrate layer (461) may be greater than the thickness (t3, t13) of the conductive layer (462). The thickness (t4, t12) of the cover substrate layer (461) may be greater than the thickness (t3, t13) of the insulating layer (464). The thickness (t3, t13) of the conductive layer (462) may be substantially the same as the thickness (t3, t13) of the insulating layer (464). The thickness (t8) of the substrate layer (470) may be in a range of 10 um to 14 um. The thickness (t8) of the substrate layer (470) may be 12 um. The thickness (t7, t9) of the power line (410) may be in a range of 5 um to 7 um. The thickness (t7, t9) of the power line (410) may be 6 um. The thickness (t4, t12) of the cover substrate layer (461) may be in a range of 6 um to 9 um. The thickness (t4, t12) of the cover substrate layer (461) may be 7.5 um. The thickness (t3, t13) of the conductive layer (462) may be in the range of 4 um to 6 um. The thickness (t3, t13) of the conductive layer (462) may be 5 um. The thickness (t3, t13) of the insulating layer (464) may be in the range of 4 um to 6 um. The thickness (t3, t13) of the insulating layer (464) may be 5 um.

[0131] The circuit board (400) according to an embodiment of the present disclosure can generate a desired DC resistance of the power lines (410, 420) due to the above-described structure. The circuit board (400) according to an embodiment of the present disclosure can improve the charging efficiency of a battery (e.g., battery (350) of FIG. 5A) through the power lines (410, 420) due to the above-described structure. The circuit board (400) according to an embodiment of the present disclosure can generate a desired amount of heat generated in the power lines (410, 420) due to the above-described structure. The circuit board (400) according to an embodiment of the present disclosure can maintain a separation distance between the signal line (430) and the shielding layer (440) due to the above-described structure. The circuit board (400) according to an embodiment of the present disclosure can secure sufficient impedance for the signal line (430) due to the above-described structure. The circuit board (400) according to the embodiment of the present disclosure can have an improved shielding effect for EMI for the power line (410) and the signal line (430) due to the above-described structure. For example, the circuit board (400) according to the embodiment of the present disclosure can additionally arrange a second power line (420) by arranging a first conductive layer (462) on the 1-1 portion (401) where the first power line (410) is arranged, thereby forming a charging wiring structure between the first conductive layer (462) and the first power line (410). For example, the circuit board (400) according to the embodiment of the present disclosure can increase the length of the entire power lines (410, 420) (e.g., the sum (W1+W2) of the first width (W1) and the second width (W2) of FIG. 7) by arranging the second power line (420) in addition to the first power line (410). For example, the circuit board (400) according to an embodiment of the present disclosure can reduce the DC resistance generated in the power lines (410, 420) by increasing the length (W1+W2) of the entire power lines (410, 420). Accordingly, the length (W1+W2) can be configured to generate a desired DC resistance in the entire power lines (410, 420).As a result, due to the length (W1+W2) and the desired DC resistance, the circuit board (400) can maintain signal integrity. For example, the circuit board (400) according to the embodiment of the present disclosure can secure a sufficient distance (e.g., the distance (h3) in FIG. 7) between the signal line (430) and the shielding layer (440) by arranging an insulating layer (464) having a dielectric constant in the second portion (403) where the signal line (430) is arranged. For example, the circuit board (400) according to the embodiment of the present disclosure can provide sufficient impedance to the signal line (430) by securing a sufficient distance (h3) between the signal line (430) and the shielding layer (440).

[0132] Fig. 10 is an enlarged view of a portion of a circuit board (400). The components described with reference to Fig. 10 may be partially or entirely identical to the components described with reference to Figs. 1 to 9. The components described with reference to Fig. 10 may be partially or entirely identical to the components described with reference to Figs. 11a to 13.

[0133] According to one embodiment, the circuit board (400) may include a power line (410), a signal line (430), and a shielding layer (440). The description of the above-described components (e.g., the power line (410), the signal line (430), the shielding layer (440)) may be equally applied to the description of the components (e.g., the power line (410), the signal line (430), the shielding layer (440)) described with reference to FIGS. 7 to 9.

[0134] According to one embodiment, the circuit board (400) may include a ground portion (405). The ground portion (405) may be formed at a location corresponding to a power line (410). The ground portion (405) may include a portion of a shielding layer (440).

[0135] Fig. 11a is a cross-sectional view of a circuit board (400) taken along the B-B' reference line illustrated in Fig. 6. Fig. 11b is a part of a cross-sectional view of a circuit board (400) taken along the A-A' reference line illustrated in Fig. 6. The components described with reference to Figs. 11a and 11b may be partly or entirely the same as the components described with reference to Figs. 1 to 9. The components described with reference to Figs. 11a and 11b may be partly or entirely the same as the components described with reference to Figs. 12 and 13.

[0136] According to one embodiment, the circuit board (400) may include layers (410, 440, 450, 461, 462, 470, 480) that are stacked on each other. The description of the layers (410, 440, 450, 461, 462, 470, 480) may be identical to the description of the layers (e.g., power line (410), shielding layer (440), film layer (450), cover substrate layer (461), conductive layer (462), substrate layer (470), adhesive layer (480)) described with reference to FIGS. 7 to 9.

[0137] According to one embodiment, the circuit board (400) may include a ground wire (490). The ground wire (490) may penetrate at least a portion of the circuit board (400). The ground wire (490) may connect the power line (410) and the shielding layer (440). The ground wire (490) may penetrate the cover material layer (461) and the adhesive layer (480).

[0138] According to one embodiment, the first portion (401) may include a power portion (401a) and a ground wiring portion (401b). The power portion (401a) and the ground wiring portion (401b) may be integrated. The ground wiring (490) may be arranged in the ground wiring portion (401b).

[0139] According to one embodiment, the circuit board (400) may include a first portion (401) and a ground portion (405). The first portion (401) and the ground portion (405) may be bounded by a boundary surface (P10). The boundary surface (P10) may be an imaginary plane that borders the first portion (401) and the ground portion (405).

[0140] According to one embodiment, the circuit board (400) may include a conductive adhesive layer (495, 496). At least a portion of the conductive adhesive layer (495, 496) may be disposed between the conductive layer (462) and the shielding layer (440). The conductive adhesive layer (495, 496) may include a first conductive adhesive layer (495) and a second conductive adhesive layer (496) which are respectively disposed at opposite positions with respect to the substrate layer (470).

[0141] According to one embodiment, the conductive adhesive layer (496) may include a first conductive adhesive portion (497) positioned at the first portion (401). The conductive adhesive layer (496) may include a second conductive adhesive portion (498) positioned at the ground portion (405). The first conductive adhesive portion (497) and the second conductive adhesive portion (498) may be integral. A boundary surface (P10) may define a boundary between the first conductive adhesive portion (497) and the second conductive adhesive portion (498). A thickness (t20) of the first conductive adhesive portion (497) may be smaller than a thickness (t21) of the second conductive adhesive portion (498). The second conductive adhesive portion (498) may be disposed in a space formed by cutting off at least a portion of the cover layer (460).

[0142] According to one embodiment, the circuit board (400) may include a circuit component (415). The circuit component (415) may be located in the first portion (401). The circuit component (415) may be connected to a power line (410). The circuit board (400) may include a ground layer (416). The ground layer (416) may be connected to the power line (410) and the circuit component (415). The ground layer (416) may be bonded to a substrate layer (470). The ground layer (416) may be disposed between the conductive adhesive layer (496) and the substrate layer (470). The power line (410), the circuit component (415), and the ground layer (416) may be located on substantially the same plane.

[0143] In one embodiment, the conductive adhesive layer (496) can provide a grounding wire to the power line (410). The second conductive adhesive portion (498) can be positioned between the shielding layer (440) and the grounding layer (416). The second conductive adhesive portion (498) can connect the shielding layer (440) and the grounding layer (416).

[0144] FIG. 12 is a block diagram illustrating a method for manufacturing a circuit board (400) according to one embodiment of the present disclosure. The components described with reference to FIG. 12 may be partially or entirely identical to the components described with reference to FIGS. 1 to 11b. The components described with reference to FIG. 12 may be partially or entirely identical to the components described with reference to FIG. 13.

[0145] According to one embodiment, a method for manufacturing a circuit board (400) may include an operation (P100) of forming a conductive layer. The operation (P100) of forming a conductive layer may include an operation of manufacturing an integral conductive plate including the conductive layers (462, 463) illustrated in FIGS. 7 to 11b.

[0146] According to one embodiment, a method for manufacturing a circuit board (400) may include an operation (P200) of processing the thickness of a cover layer. The operation (P200) of processing the thickness of the cover layer may include an operation of adjusting the thickness of the conductive plate. The conductive plate may be processed to a thickness required for impedance matching of a signal line (430). The conductive plate may be processed by an etching processing method.

[0147] According to one embodiment, a method for manufacturing a circuit board (400) may include an operation (P300) of processing a pattern of a cover layer. The operation (P300) of processing a pattern of the cover layer may include an operation of cutting off a portion of the conductive plate. The conductive plate may be processed by an etching processing method. The operation (P300) of processing a pattern of the cover layer may include an operation of cutting off a portion corresponding to the signal line (430) illustrated in FIGS. 7 and 8. After the cutting operation, a first conductive layer (462) and a second conductive layer (463) spaced apart from each other may be formed.

[0148] According to one embodiment, a method for manufacturing a circuit board (400) may include an operation (P400) of forming a dielectric layer. The operation (P400) of forming a dielectric layer may include an operation of applying an insulating layer (464) as shown in FIGS. 7 and 8 to a cut-off portion of the conductive plate. The operation (P400) of forming a dielectric layer may include an operation of applying an insulating material between a first conductive layer (462) and a second conductive layer (463).

[0149] According to one embodiment, a method for manufacturing a circuit board (400) may include an operation (P500) of forming a ground wire. The operation (P500) of forming a ground wire may include an operation of grounding-connecting a power line (410, 420) and a conductive layer (462, 463). The operation (P500) of forming a ground wire may include an operation of arranging ground wires (490, 495, 496) as illustrated in FIGS. 11A and 11B.

[0150] Fig. 13 is a cross-sectional view of a circuit board (500) according to one embodiment of the present disclosure. The components described with reference to Fig. 13 may be partially or entirely identical to the components described with reference to Figs. 1 to 12.

[0151] According to one embodiment, the circuit board (500) may include a substrate layer (570), a signal line (530), a shielding layer (540), a film layer (550), a cover substrate layer (561), and an adhesive layer (580). The description of the above-described components (e.g., the substrate layer (570), the signal line (530), the shielding layer (540), the film layer (550), the cover substrate layer (561), the adhesive layer (580)) may be equally applied to the description of the components (e.g., the substrate layer (470), the signal line (430), the shielding layer (440), the film layer (450), the cover substrate layer (461), the adhesive layer (480)) described with reference to FIGS. 1 to 12.

[0152] According to one embodiment, the circuit board (500) may include a first portion (501) and a second portion (503). The description of the first and second portions (501, 503) may be identical to the description of the first and second portions (401, 403) described with reference to FIGS. 1 to 12 . The power line (510) may be located in the first portion (501). The signal line (530) may be located in the second portion (503). The cover substrate layer (561) may be located to correspond to both the first portion (501) and the second portion (503).

[0153] According to one embodiment, the circuit board (500) may include an insulating layer (564) located in the second portion (503). The description of the insulating layer (564) may be the same as the description of the insulating layer (464) described with reference to FIGS. 1 to 12. The insulating layer (564) may be positioned between the signal line (530) and the shielding layer (540).

[0154] According to one embodiment, the circuit board (500) may include a conductive layer (562, 563) located in the first portion (501). The description of the conductive layer (562, 563) may be identical to the description of the conductive layer (462, 463) described with reference to FIGS. 1 to 12. The conductive layer (562, 563) may be positioned between the power line (510) and the shielding layer (540).

[0155] The circuit board (500) of FIG. 13 may have a difference, compared to the circuit board (400) of FIG. 7, in that the first conductive layer (562) and the second conductive layer (563) are formed in an integrally long form. For example, the circuit board (500) may include integrally formed conductive layers (562, 563). The length (W6) of the first portion (501) of the circuit board (500) of FIG. 13 may be greater than the length (w1) of the first-first portion (401) or the length (w2) of the first-second portion (402) of the circuit board (400) of FIG. 7. The conductive layers (562, 563) may be formed in an integrally long form and may be greater than the length of the first conductive layer (462) or the second conductive layer (463) illustrated in FIG. 7.

[0156] According to one embodiment, the first part (501) and the second part (503) may be bordered by a boundary surface (P4). The first part (501) may be divided into a 1-1 part (501a) and a 1-2 part (501b) based on the boundary surface (P5) located inside the first part (501). The 1-1 part (501a) and the 1-2 part (501b) are arbitrarily divided for convenience of explanation, and the 1-1 part (501a) and the 1-2 part (501b) may form an integral first part (501). The conductive layers (562, 563) may be divided into a first conductive layer (562) located in the 1-1 part (501a) and a second conductive layer (563) located in the 1-2 part (501b). The sum (w6) of the length (w4) of the 1-1 part (501a) and the length (w5) of the 1-2 part (501b) may be substantially equal to the sum of the length (w1) of the 1-1 part (401) and the length (w2) of the 1-2 part (402) illustrated in FIG. 7.

[0157] An electronic device includes a housing and a circuit board disposed within the housing. The electronic device includes a port insertion hole into which an external device (e.g., a USB or charging device) can be inserted. The electronic device can be connected to the external device (e.g., a charging device) to charge a battery. The electronic device may include a flexible circuit board connecting the external device and the circuit board. The flexible circuit board includes a power line (VBUS) and a signal line (USB3+). The power line (VBUS) of the flexible circuit board has a direct current (DC) resistance, and the signal line (USB3+) requires impedance matching.

[0158] The problem to be solved in the present disclosure may be to generate a desired DC resistance of a power line.

[0159] The problem to be solved in the present disclosure may be matching the impedance of a signal line.

[0160] The problem to be solved in this disclosure is not limited to the problem mentioned above, and may be determined in various ways without departing from the spirit and scope of this disclosure.

[0161] An electronic device according to various embodiments of the present disclosure can generate a desired DC resistance of a power line by arranging a conductive layer at a position corresponding to a power line.

[0162] An electronic device according to various embodiments of the present disclosure can match the impedance of a signal line by arranging an insulating layer at a position corresponding to the signal line.

[0163] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly understood by a person having ordinary skill in the art to which the present disclosure belongs from the description below.

[0164] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a substrate layer (e.g., 470 of FIGS. 1 to 13) positioned on a first portion (e.g., 401 and 402 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13) and a second portion (e.g., 403 of FIGS. 1 to 13) different from the first portion (e.g., 401 and 402 of FIGS. 1 to 13).

[0165] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a power line (e.g., 410, 420 of FIGS. 1 to 13) located in the first portion (e.g., 401, 402 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13).

[0166] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a signal line (e.g., 430 of FIGS. 1 to 13) located in the second portion (e.g., 403 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13).

[0167] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a shielding layer (e.g., 440 of FIGS. 1 to 13) spaced apart from the power line (e.g., 410, 420 of FIGS. 1 to 13) and the signal line (e.g., 430 of FIGS. 1 to 13).

[0168] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a cover layer (e.g., 460 of FIGS. 1 to 13) disposed between the substrate layer (e.g., 470 of FIGS. 1 to 13) and the shielding layer (e.g., 440 of FIGS. 1 to 13).

[0169] The cover layer (e.g., 460 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a cover substrate layer (e.g., 461 of FIGS. 1 to 13) positioned on the first portion (e.g., 401, 402 of FIGS. 1 to 13) and the second portion (e.g., 403 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13).

[0170] The cover layer (e.g., 460 of FIGS. 1 to 13) according to one embodiment of the present disclosure may be positioned corresponding to the power line (e.g., 410, 420 of FIGS. 1 to 13) on the first portion (e.g., 401, 402 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13), and may include a conductive layer (e.g., 462, 463 of FIGS. 1 to 13) disposed between the cover substrate layer (e.g., 461 of FIGS. 1 to 13) and the shielding layer (e.g., 440 of FIGS. 1 to 13).

[0171] The cover layer (e.g., 460 of FIGS. 1 to 13) according to one embodiment of the present disclosure may be positioned corresponding to the signal line (e.g., 430 of FIGS. 1 to 13) on the second portion (e.g., 403 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13), and may include an insulating layer (e.g., 464 of FIGS. 1 to 13) disposed between the cover substrate layer (e.g., 461 of FIGS. 1 to 13) and the shielding layer (e.g., 440 of FIGS. 1 to 13).

[0172] According to one embodiment of the present disclosure, the conductive layer (e.g., 462, 463 of FIGS. 1 to 13) may be positioned between the power line (e.g., 410, 420 of FIGS. 1 to 13) and the shielding layer (e.g., 440 of FIGS. 1 to 13).

[0173] According to one embodiment of the present disclosure, the insulating layer (e.g., 464 of FIGS. 1 to 13) may be positioned between the signal line (e.g., 410 and 420 of FIGS. 1 to 13) and the shielding layer (e.g., 440 of FIGS. 1 to 13).

[0174] The power line (e.g., 410, 420 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a first power line (e.g., 410 of FIGS. 1 to 13).

[0175] The power line (e.g., 410, 420 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a second power line (e.g., 420 of FIGS. 1 to 13) spaced apart from the first power line (e.g., 410 of FIGS. 1 to 13).

[0176] The conductive layer (e.g., 462, 463 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a first conductive layer (e.g., 462 of FIGS. 1 to 13) corresponding to the first power line (e.g., 410 of FIGS. 1 to 13).

[0177] The conductive layer (e.g., 462, 463 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a second conductive layer (e.g., 463 of FIGS. 1 to 13) corresponding to the second power line (e.g., 420 of FIGS. 1 to 13).

[0178] The conductive layer (e.g., 462, 463 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a first conductive layer (e.g., 462 of FIGS. 1 to 13) and a second conductive layer (e.g., 463 of FIGS. 1 to 13) that are spaced apart from each other.

[0179] According to one embodiment of the present disclosure, the insulating layer (e.g., 464 of FIGS. 1 to 13) may be disposed between the first conductive layer (e.g., 462 of FIGS. 1 to 13) and the second conductive layer (e.g., 463 of FIGS. 1 to 13).

[0180] The cover layer (e.g., 460 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a boundary portion (e.g., 465 of FIGS. 1 to 13) where the conductive layer (e.g., 462, 463 of FIGS. 1 to 13) and the insulating layer (e.g., 464 of FIGS. 1 to 13) are connected.

[0181] According to one embodiment of the present disclosure, the conductive layer (e.g., 462 and 463 of FIGS. 1 to 13) and the insulating layer (e.g., 464 of FIGS. 1 to 13) may have substantially the same thickness.

[0182] According to one embodiment of the present disclosure, the cover substrate layer (e.g., 461 of FIGS. 1 to 13) may include a first cover portion (e.g., 4611 of FIGS. 1 to 13) corresponding to the conductive layer (e.g., 462, 463 of FIGS. 1 to 13).

[0183] According to one embodiment of the present disclosure, the cover substrate layer (e.g., 461 of FIGS. 1 to 13) may include a second cover portion (e.g., 4612 of FIGS. 1 to 13) corresponding to the insulating layer (e.g., 464 of FIGS. 1 to 13).

[0184] The shielding layer (e.g., 440 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a first shielding portion (e.g., 441 of FIGS. 1 to 13) corresponding to the conductive layer (e.g., 462, 463 of FIGS. 1 to 13).

[0185] The shielding layer (e.g., 440 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a second shielding portion (e.g., 442 of FIGS. 1 to 13) corresponding to the insulating layer (e.g., 464 of FIGS. 1 to 13).

[0186] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a ground wire (e.g., 490 of FIGS. 1 to 13) connecting the shielding layer (e.g., 440 of FIGS. 1 to 13) and the power line (e.g., 410, 420 of FIGS. 1 to 13).

[0187] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a conductive adhesive layer (e.g., 496 of FIGS. 1 to 13) at least partly disposed between the cover layer (e.g., 460 of FIGS. 1 to 13) and the shielding layer (e.g., 440 of FIGS. 1 to 13) and connected to the power line (e.g., 410, 420 of FIGS. 1 to 13).

[0188] The conductive adhesive layer (e.g., 496 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a first conductive adhesive portion (e.g., 497 of FIGS. 1 to 13) disposed between the cover layer (e.g., 460 of FIGS. 1 to 13) and the shielding layer (e.g., 440 of FIGS. 1 to 13).

[0189] According to one embodiment of the present disclosure, the conductive adhesive layer (e.g., 496 of FIGS. 1 to 13) may include a second conductive adhesive portion (e.g., 498 of FIGS. 1 to 13) extending from the first conductive adhesive portion (e.g., 497 of FIGS. 1 to 13) and connecting the shielding layer (e.g., 440 of FIGS. 1 to 13) and the power line (e.g., 410, 420 of FIGS. 1 to 13).

[0190] The conductive layer (e.g., 462, 463 of FIGS. 1 to 13) according to one embodiment of the present disclosure may be configured to be electrically connected to the power line (e.g., 410, 420 of FIGS. 1 to 13) and to provide grounding to the power line (e.g., 410, 420 of FIGS. 1 to 13).

[0191] According to one embodiment of the present disclosure, a first interval (e.g., h1, h2 of FIGS. 1 to 13) between the power line (e.g., 410, 420 of FIGS. 1 to 13) and the conductive layer (e.g., 462, 463 of FIGS. 1 to 13) may be smaller than a second interval (e.g., h3 of FIGS. 1 to 13) between the signal line (e.g., 430 of FIGS. 1 to 13) and the shielding layer (e.g., 440 of FIGS. 1 to 13).

[0192] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include an adhesive layer (e.g., 480 of FIGS. 1 to 13) disposed between the power line (e.g., 410, 420 of FIGS. 1 to 13) and the cover layer (e.g., 460 of FIGS. 1 to 13) and surrounding the power line (e.g., 410, 420 of FIGS. 1 to 13).

[0193] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a power line (e.g., 410, 420 of FIGS. 1 to 13) located in a first portion (e.g., 401, 402 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13).

[0194] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a signal line (e.g., 430 of FIGS. 1 to 13) located in a second portion (e.g., 403 of FIGS. 1 to 13) different from the first portion (e.g., 401, 402 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13).

[0195] A circuit board (e.g., 400 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a cover layer (e.g., 460 of FIGS. 1 to 13) spaced apart from the power line (e.g., 410, 420 of FIGS. 1 to 13) and the signal line (e.g., 430 of FIGS. 1 to 13).

[0196] The cover layer (e.g., 460 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a conductive layer (e.g., 462, 463 of FIGS. 1 to 13) positioned corresponding to the power line (e.g., 410, 420 of FIGS. 1 to 13) on the first portion (e.g., 401, 402 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13).

[0197] The cover layer (e.g., 460 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include an insulating layer (e.g., 464 of FIGS. 1 to 13) positioned corresponding to the signal line (e.g., 410, 420 of FIGS. 1 to 13) on the second portion (e.g., 403 of FIGS. 1 to 13) of the circuit board (e.g., 400 of FIGS. 1 to 13).

[0198] An electronic device (e.g., 101 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a housing (e.g., 301 of FIGS. 1 to 13).

[0199] An electronic device (e.g., 101 of FIGS. 1 to 13) according to one embodiment of the present disclosure may include a circuit board (e.g., 400 of FIGS. 1 to 13) disposed inside the housing (e.g., 301 of FIGS. 1 to 13).

[0200] Although the detailed description of this document has described specific embodiments, it will be apparent to those skilled in the art that various modifications are possible without departing from the scope of this document.

[0201] While this disclosure has been described by way of example and example, it should be understood that the example is intended to be illustrative and not limiting. It will be apparent to those skilled in the art that various changes in form and detail may be made without departing from the overall scope of this disclosure, including the appended claims and their equivalents.

Claims

1. In the circuit board (400), A substrate layer (470) positioned on a first portion (401, 402) of the circuit board (400) and a second portion (403) different from the first portion (401, 402); Power lines (410, 420) located on the first portion (401, 402) of the circuit board (400); A signal line (430) located on the second portion (403) of the circuit board (400); A shielding layer (440) separated from the power line (410, 420) and the signal line (430); and Including a cover layer (460) arranged between the above-mentioned substrate layer (470) and the above-mentioned shielding layer (440), The above cover layer (460) is A cover material layer (461) positioned on the first portion (401, 402) and the second portion (403) of the circuit board (400); A conductive layer (462, 463) positioned corresponding to the power line (410, 420) on the first portion (401, 402) of the circuit board (400) and arranged between the cover material layer (461) and the shielding layer (440); and A circuit board (400) including an insulating layer (464) positioned corresponding to the signal line (430) on the second portion (403) of the circuit board (400) and arranged between the cover material layer (461) and the shielding layer (440).

2. In paragraph 1, The above challenge layer (462, 463) is A circuit board located between the power line (410, 420) and the shielding layer (440).

3. In either of paragraphs 1 and 2, The above insulating layer (464) is A circuit board located between the signal line (430) and the shielding layer (440).

4. In any one of paragraphs 1 to 3, The above power lines (410, 420) are First power line (410); and Including a second power line (420) spaced apart from the first power line (410), The above challenge layer (462, 463) is A first conductive layer (462) corresponding to the first power line (410); and A circuit board including a second conductive layer (463) corresponding to the second power line (420).

5. In any one of paragraphs 1 to 4, The above challenge layer (462, 463) is It includes a first challenge layer (462) and a second challenge layer (463) which are spaced apart from each other, A circuit board in which the above insulating layer (464) is placed between the first conductive layer (462) and the second conductive layer (463).

6. In any one of paragraphs 1 to 5, The above cover layer (460) is A circuit board including a boundary portion (465) where the above-mentioned challenging layer (462, 463) and the above-mentioned insulating layer (464) are connected.

7. In any one of paragraphs 1 to 6, The above-mentioned challenge layer (462, 463) and the above-mentioned insulating layer (464) are Circuit boards having substantially the same thickness.

8. In any one of paragraphs 1 to 7, The above cover material layer (461) is A first cover portion (4611) corresponding to the above challenge layer (462, 463); and A circuit board including a second cover portion (4612) corresponding to the above insulating layer (464).

9. In any one of paragraphs 1 to 8, The above shielding layer (440) is A first shielding portion (441) corresponding to the above challenge layer (462, 463); and A circuit board including a second shielding portion (442) corresponding to the above insulating layer (464).

10. In any one of paragraphs 1 to 9, A circuit board further including a ground wire (490) connecting the shielding layer (440) and the power line (410, 420).

11. In any one of paragraphs 1 to 10, A circuit board further comprising a conductive adhesive layer (496) disposed between at least a portion of the cover layer (460) and the shielding layer (440) and connected to the power line (410, 420).

12. In paragraph 11, The above-mentioned challenging adhesive layer (496) is A first conductive adhesive portion (497) arranged between the cover layer (460) and the shielding layer (440); and A circuit board including a second conductive adhesive portion (498) extending from the first conductive adhesive portion (497) and connecting the shielding layer (440) and the power line (410, 420).

13. In any one of paragraphs 1 to 12, The above challenge layer (462, 463) is A circuit board electrically connected to the above power line (410, 420) and configured to provide grounding to the above power line (410, 420).

14. In any one of paragraphs 1 to 13, A circuit board in which the first gap (h1, h2) between the power line (410, 420) and the conductive layer (462, 463) is smaller than the second gap (h3) between the signal line (430) and the shielding layer (440).

15. In any one of paragraphs 1 to 14, A circuit board further comprising an adhesive layer (480) disposed between the power line (410, 420) and the cover layer (460) and surrounding the power line (410, 420).

Images