Mask and mask manufacturing method

Abstract

This mask may include: a base material including a base material first surface, a base material second surface positioned on the opposite side to the base material first surface, and at least one first opening penetrating from the base material first surface to the base material second surface; and a mask layer including a first surface facing the base material second surface and a second surface positioned on the opposite side to the first surface. The mask layer may include a plurality of first regions overlapping the first opening in a plan view, and a second region positioned between the plurality of first regions, and outside the plurality of first regions in the plan view. Each of the plurality of first regions may include a plurality of second openings penetrating from the first surface to the second surface. The second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness, and a first arithmetic mean roughness (Sa1) and a first maximum height (Sz1) related to surface roughness. The first arithmetic mean roughness (Ra1) may be 50 nm or less. The first maximum height (Sz1) may be 1000 nm or less. The ratio Sa1 / Ra1 of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1) may be 1.82 or less.

Description

Mask and mask manufacturing method

[0001] FIELD Embodiments of the present disclosure relate to a mask and a method for manufacturing the mask.

[0002] Vapor deposition is a known method for forming precise patterns. In vapor deposition, a mask with openings is first combined with a display substrate. Then, a vapor deposition material is applied to the display substrate through the openings in the mask. As a result, a vapor deposition layer containing the vapor deposition material is formed on the display substrate in a pattern corresponding to the pattern of the openings in the mask. Vapor deposition is used, for example, as a method for forming pixels of an organic electroluminescence (EL) display device.

[0003] For example, Patent Document 1 discloses a mask including a mask substrate having a plurality of openings formed therein and an outer frame substrate supporting the mask substrate. Patent Document 1 proposes the use of a thin mask substrate. The thinness of the mask substrate allows for high-definition deposition.

[0004] JP 2013-163864 A

[0005] When the mask surface facing the display substrate has minute undulations, gaps form between the display substrate and the mask in accordance with the undulations. When the deposition material enters the gaps, the shape of the deposition layer deviates from the ideal shape. For example, the contour line of the deposition layer deviates partially from the ideal line. For example, the thickness of the deposition layer at the contour portion of the deposition layer deviates partially from the ideal thickness.

[0006] A mask according to an embodiment of the present disclosure may include a substrate including a substrate first surface, a substrate second surface opposite the substrate first surface, and at least one first opening penetrating from the substrate first surface to the substrate second surface; and a mask layer including a first surface facing the substrate second surface and a second surface opposite the first surface. The mask layer may include a plurality of first regions overlapping the first openings in a planar view and a second region positioned between the plurality of first regions and outside the plurality of first regions in a planar view. Each of the plurality of first regions may include a plurality of second openings penetrating from the first surface to the second surface. The second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness, and a first arithmetic mean roughness (Sa1) and a first maximum height (Sz1) related to surface roughness. The first arithmetic mean roughness (Ra1) may be 50 nm or less. The first maximum height (Sz1) may be 1000 nm or less. Sa1 / Ra1, which is a ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), may be 1.82 or less.

[0007] According to the embodiment of the present disclosure, deviation of the shape of the deposition layer from the ideal shape can be suppressed.

[0008] 1. A plan view showing an example of an organic device. A diagram showing an example of a vapor deposition apparatus equipped with a mask. A plan view showing an example of an incident surface of a mask. A plan view showing an example of an incident surface of a mask. A plan view showing an example of an exit surface of a mask. A cross-sectional view taken along line V-V of the mask of FIG. 3A. A cross-sectional view showing an example of a first region. A cross-sectional view showing an example of a 21st region. A plan view showing an example of a deposited layer having an ideal shape. A cross-sectional view taken along line IX-IX of the deposited layer of FIG. 8. A plan view showing an example of a deposited layer having a shape deviated from the ideal shape. A cross-sectional view taken along line XI-XI of the deposited layer of FIG. 10. A plan view showing a measurement region of a mask layer. A plan view showing specific measurement positions in measuring line roughness. A plan view showing specific measurement positions in measuring surface roughness. A cross-sectional view showing an example of a process for forming an intermediate layer. A cross-sectional view showing an example of a process for forming an insulating layer. A cross-sectional view showing an example of a process for processing an insulating layer. A cross-sectional view showing an example of a process for forming a metal layer. A cross-sectional view showing an example of a process for polishing a second metal surface of a metal layer. A cross-sectional view showing an example of a process for removing an insulating layer. 1 is a cross-sectional view showing an example of a step of forming a protective layer and a resist layer; FIG. 1 is a cross-sectional view showing an example of a step of processing a substrate; FIG. 1 is a cross-sectional view showing an example of a step of removing a protective layer; FIG. 1 is a cross-sectional view showing an example of a vapor deposition step; FIG. 2 is a diagram showing a method for evaluating a shadow; FIG. 2 is a cross-sectional view showing an example of a separation step; FIG. 3 is a cross-sectional view showing an example of a separation step in a comparative embodiment; FIG. 4 is a cross-sectional view showing an example of a mask in the first modified example; FIG. 5 is a cross-sectional view showing an example of a 21st region in the first modified example; FIG. 6 is a plan view showing an example of a step of processing an insulating layer in the first modified example; FIG. 7 is a cross-sectional view showing an example of a step of forming a metal layer in the first modified example; FIG. 8 is a cross-sectional view showing an example of a step of polishing a second metal surface of a metal layer in the first modified example; FIG. 9 is a cross-sectional view showing an example of a step of forming a protective layer in the first modified example; FIG. 10 is a cross-sectional view showing an example of a mask in the second modified example; FIG. 11 is a cross-sectional view showing an example of a mask in the third modified example; FIG. 12 is a diagram showing an example of an apparatus including an organic device.1 is a table showing the measurement results of surface roughness in a first region in Example 1. FIG. 2 is a table showing the measurement results of surface roughness in a second region in Example 1. FIG. 3 is a table showing evaluation results in Examples 1 to 11. FIG. 4 is a diagram showing an example of an image of a vapor deposition layer. FIG. 5 is a diagram showing an example of an image of a vapor deposition layer.

[0009] In this specification and drawings, unless otherwise specified, terms meaning the materials underlying a certain structure, such as "substrate," "sheet," and "film," are not to be distinguished from one another solely on the basis of differences in name.

[0010] In this specification and drawings, unless otherwise specified, terms that specify shapes, geometric conditions, and their degrees, such as "parallel" and "orthogonal," and values ​​of lengths and angles, are not bound by strict meanings, but are interpreted to include a range within which similar functions can be expected.

[0011] In this specification and drawings, unless otherwise specified, when a certain component, such as a certain region, is referred to as "above" or "below," "upper" or "lower," or "upward" or "below" another component, such as another region, this includes cases where the component is in direct contact with the other component. It also includes cases where another component is contained between the component and the other component, i.e., cases where the components are in indirect contact. Furthermore, unless otherwise specified, the terms "above," "upper side," or "upper," or "under," "lower side," or "lower" may be used in the up-down direction.

[0012] In this specification, when multiple upper limit value candidates and multiple lower limit value candidates are listed for a certain parameter, the numerical range of the parameter may be constructed by combining any one upper limit value candidate with any one lower limit value candidate. For example, consider a description that reads, "Parameter B is, for example, A1 or more, or may be A2 or more, or may be A3 or more. Parameter B is, for example, A4 or less, or may be A5 or less, or may be A6 or less." In this case, the numerical range of parameter B may be A1 or more and A4 or less, A1 or more and A5 or less, A1 or more and A6 or less, A2 or more and A4 or less, A2 or more and A5 or less, A2 or more and A6 or less, A3 or more and A4 or less, A3 or more and A5 or less, or A3 or more and A6 or less.

[0013] In this specification and drawings, unless otherwise specified, the state in which the surface of element A is "opposed to" the surface of element B includes not only the case in which the surface of element A is in contact with the surface of element B, but also the case in which element C is located between the surfaces of element A and element B. In other words, the term "opposed to" is a term that indicates the orientation of two surfaces.

[0014] In this specification and drawings, unless otherwise specified, the same or similar symbols are used to designate the same parts or parts having similar functions, and repeated explanations may be omitted. Furthermore, for the sake of convenience, the dimensional ratios of the drawings may differ from the actual ratios, and some components may be omitted from the drawings.

[0015] In this specification and drawings, unless otherwise specified, one embodiment of this specification may be combined with other examples to the extent that no contradiction occurs. In addition, other examples may also be combined with each other to the extent that no contradiction occurs.

[0016] Unless otherwise specified, in the present specification and drawings, when two or more steps or processes are disclosed in a method such as a manufacturing method, other steps or processes that are not disclosed may be performed between the disclosed steps or processes. In addition, the order of the disclosed steps or processes is arbitrary within the range that does not cause a contradiction.

[0017] In one embodiment of the present specification, an example will be described in which a mask is used to form an organic layer or an electrode on a substrate when manufacturing an organic electroluminescence (EL) display device. However, the use of the mask is not particularly limited, and this embodiment can be applied to masks used for various purposes. For example, the mask of this embodiment may be used to form electrodes of a device for displaying or projecting images or videos to express virtual reality (VR) or augmented reality (AR). The mask of this embodiment may also be used to form electrodes of a display device other than an organic electroluminescence (EL) display device, such as an electrode of a liquid crystal display device. The mask of this embodiment may also be used to form components of a device other than a display device, such as an electrode of a pressure sensor.

[0018] A first aspect of the present disclosure is a mask comprising: a substrate including a substrate first surface, a substrate second surface located opposite to the substrate first surface, and at least one first opening penetrating from the substrate first surface to the substrate second surface; and a mask layer including a first surface facing the substrate second surface and a second surface located opposite to the first surface, wherein the mask layer includes a plurality of first regions overlapping the first openings in a plan view, and a second region located between the plurality of first regions and outside the plurality of first regions in a plan view, wherein the plurality of first regions each include a plurality of second openings penetrating from the first surface to the second surface, and the second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness, and a first arithmetic mean roughness (Sa1) and a first maximum height (Sz1) related to surface roughness, wherein the first arithmetic mean roughness (Ra1) is 50 nm or less, The mask has a first maximum height (Sz1) of 1000 nm or less, and a ratio Sa1 / Ra1 of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1) of 1.82 or less.

[0019] A second aspect of the present disclosure may include the following aspect in the mask according to the first aspect described above: The second surface of the second region may have a second arithmetic mean roughness (Ra2) related to line roughness, and the first arithmetic mean roughness (Ra1) may be different from the second arithmetic mean roughness (Ra2).

[0020] A third aspect of the present disclosure may include the following aspect in the mask according to the second aspect described above: The first arithmetic mean roughness (Ra1) may be greater than the second arithmetic mean roughness (Ra2).

[0021] A fourth aspect of the present disclosure may be the mask according to any one of the first to third aspects described above, further comprising the following aspect: The second surface of the second region may have a second arithmetic mean roughness (Sa2) related to surface roughness, and the first arithmetic mean roughness (Sa1) may be different from the second arithmetic mean roughness (Sa2).

[0022] A fifth aspect of the present disclosure may include the following aspect in the mask according to the fourth aspect: The first arithmetic mean roughness (Sa1) may be greater than the second arithmetic mean roughness (Sa2).

[0023] A sixth aspect of the present disclosure may be the mask according to any one of the first to fifth aspects described above, further comprising the following aspect: The second surface of the second region may have a second maximum height (Sz2) related to surface roughness, and the first maximum height (Sz1) may be different from the second maximum height (Sz2).

[0024] A seventh aspect of the present disclosure may include the following aspect in the mask according to the sixth aspect described above: The first maximum height (Sz1) may be smaller than the second maximum height (Sz2).

[0025] An eighth aspect of the present disclosure may include the following aspect in the mask according to any one of the first to seventh aspects described above: The in-plane directions of the second surface may include an x ​​direction and a y direction orthogonal to the x direction, the first arithmetic mean roughness (Ra1) may be an average of the arithmetic mean roughness of the second surface of the first region in the x direction and the arithmetic mean roughness of the second surface of the first region in the y direction, and a ratio of a difference between the arithmetic mean roughness of the second surface of the first region in the x direction and the arithmetic mean roughness of the second surface of the first region in the y direction to the first arithmetic mean roughness (Ra1) may be 0.50 or less.

[0026] A ninth aspect of the present disclosure may include the following aspect in the mask according to any one of the first to eighth aspects: The first region may include a metal layer.

[0027] A tenth aspect of the present disclosure may include the following aspect in the mask according to the ninth aspect: The second region may include a metal layer.

[0028] An eleventh aspect of the present disclosure may include the following aspect in the mask according to the ninth aspect: The second region may include an insulating layer.

[0029] A twelfth aspect of the present disclosure may include the following aspect in the mask according to the eleventh aspect: The insulating layer may include silicon oxide.

[0030] A thirteenth aspect of the present disclosure may include the following aspect in the mask according to any one of the first to twelfth aspects described above: The mask may include an intermediate layer located between the mask layer and the substrate and containing a metal.

[0031] A fourteenth aspect of the present disclosure may include the following aspect in the mask according to any one of the first to thirteenth aspects: The substrate may include silicon or a silicon compound.

[0032] a substrate processing step of forming a first opening in the substrate that overlaps the metal layer in a plan view, wherein the mask comprises a mask layer including a plurality of first regions including the metal layer that overlaps the first opening in a plan view, and a second region including the metal layer or the insulating layer that is located between the plurality of first regions and outside the plurality of first regions in a plan view, The method for manufacturing a mask includes: the mask layer includes a first surface facing the second surface of the substrate; and a second surface located on the opposite side of the first surface; the second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness, and a first arithmetic mean roughness (Sa1) and a first maximum height (Sz1) related to surface roughness; the first arithmetic mean roughness (Ra1) is 50 nm or less; the first maximum height (Sz1) is 1000 nm or less; and Sa1 / Ra1, which is the ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), is 1.82 or less.

[0033] A sixteenth aspect of the present disclosure may include the following aspect in the method for manufacturing a mask according to the fifteenth aspect: The polishing step may include a step of contacting the insulating second surface and the metal second surface with a slurry containing a processing liquid and abrasive grains.

[0034] A seventeenth aspect of the present disclosure may include the following aspect in the method for manufacturing a mask according to the fifteenth or sixteenth aspect described above: The second surface of the second region may have a second arithmetic mean roughness (Ra2) related to line roughness, and the first arithmetic mean roughness (Ra1) may be different from the second arithmetic mean roughness (Ra2).

[0035] An eighteenth aspect of the present disclosure may include the following aspect in the method for manufacturing a mask according to the seventeenth aspect: The first arithmetic mean roughness (Ra1) may be greater than the second arithmetic mean roughness (Ra2).

[0036] A nineteenth aspect of the present disclosure may include the following aspect in the method for manufacturing a mask according to any one of the fifteenth to eighteenth aspects described above: In the metal layer forming step, the metal layer may also be formed outside the plurality of island portions, and the second region may include the metal layer located outside the plurality of first regions.

[0037] A twentieth aspect of the present disclosure may include the following aspect in the method for manufacturing a mask according to any one of the fifteenth to nineteenth aspects described above: the insulating layer forming step may form the insulating layer including a frame portion defining the outlines of a plurality of insulating openings and the plurality of island portions located in the plurality of insulating openings, and the metal layer forming step may form the metal layer in the plurality of insulating openings.

[0038] An embodiment of the present disclosure will be described in detail with reference to the drawings. The following embodiment is an example of an embodiment of the present disclosure, and the present disclosure should not be interpreted as being limited to only these embodiments.

[0039] An organic device 100 including an organic layer formed by using a mask will be described. The organic device 100 includes an organic layer or an electrode formed by using a mask. Figure 1 is a cross-sectional view showing an example of the organic device 100.

[0040] The organic device 100 includes a substrate 110 and a plurality of elements 115 arranged along an in-plane direction of the substrate 110. The substrate 110 includes a first surface 111 and a second surface 112 located on the opposite side of the first surface 111. The elements 115 are located on the first surface 111. The elements 115 are, for example, pixels. The substrate 110 may include two or more types of elements 115. For example, the substrate 110 may include a first element 115A and a second element 115B. Although not shown, the substrate 110 may also include a third element. The first element 115A, the second element 115B, and the third element are, for example, a red pixel, a blue pixel, and a green pixel.

[0041] The element 115 may include a first electrode 120 , an organic layer 130 located on the first electrode 120 , and a second electrode 140 located on the organic layer 130 .

[0042] The organic device 100 may include an insulating layer 160 located between two adjacent first electrodes 120 in a planar view. The insulating layer 160 includes, for example, polyimide. The insulating layer 160 may overlap an edge of the first electrode 120. "Planar view" means viewing an object along the normal direction to the surface of a plate-like member such as the substrate 110.

[0043] The substrate 110 may be an insulating member. Examples of materials that can be used for the substrate 110 include rigid materials such as silicon, quartz glass, Pyrex (registered trademark) glass, and synthetic quartz plates, as well as flexible materials such as resin films, optical resin plates, and thin glass. The substrate 110 may have a planar shape similar to that of silicon wafers used in semiconductor manufacturing. For example, the substrate 110 may be circular in plan view. In this case, the substrate 110 can be processed using equipment used in semiconductor manufacturing processes. For example, the first electrode 120, the insulating layer 160, and the like can be formed on the substrate 110 using equipment used in semiconductor manufacturing processes.

[0044] The element 115 is configured to realize some function by applying a voltage between the first electrode 120 and the second electrode 140 or by causing a current to flow between the first electrode 120 and the second electrode 140. For example, if the element 115 is a pixel of an organic EL display device, the element 115 can emit light that forms an image.

[0045] The first electrode 120 includes a conductive material. For example, the first electrode 120 includes a metal, a conductive metal oxide, or another conductive inorganic material. The first electrode 120 may include a transparent and conductive metal oxide such as indium tin oxide.

[0046] The organic layer 130 includes an organic material. When the organic layer 130 is energized, the organic layer 130 can perform some function. "Electrification" means that a voltage is applied to the organic layer 130 or that a current flows through the organic layer 130. The organic layer 130 may be a light-emitting layer that emits light when energized, or a layer whose light transmittance or refractive index changes when energized. The organic layer 130 may include an organic semiconductor material.

[0047] 1 , the organic layer 130 may include a first organic layer 130A and a second organic layer 130B. The first organic layer 130A is included in the first element 115A. The second organic layer 130B is included in the second element 115B. Although not shown, the organic layer 130 may include a third organic layer included in a third element. The first organic layer 130A, the second organic layer 130B, and the third organic layer are, for example, a red light-emitting layer, a blue light-emitting layer, and a green light-emitting layer.

[0048] When a voltage is applied between the first electrode 120 and the second electrode 140, the organic layer 130 located therebetween is driven. If the organic layer 130 is an emitting layer, light is emitted from the organic layer 130 and extracted to the outside from the second electrode 140 side or the first electrode 120 side.

[0049] The organic layer 130 may further include a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, and the like.

[0050] The second electrode 140 may include a conductive material such as a metal. Examples of materials that can be used for the second electrode 140 include platinum, gold, silver, copper, iron, tin, chromium, aluminum, indium, lithium, sodium, potassium, calcium, magnesium, chromium, carbon, and alloys thereof. As shown in FIG. 1 , the second electrode 140 may extend across two adjacent organic layers 130 in a plan view.

[0051] Next, a method for forming the organic layer 130 on the substrate 110 by vapor deposition will be described. Fig. 2 is a diagram showing a vapor deposition apparatus 10. The vapor deposition apparatus 10 performs a vapor deposition process for depositing a vapor deposition material on an object.

[0052] 2 , the vapor deposition apparatus 10 may include therein a vapor deposition source 6, a heater 8, and a mask 20. The vapor deposition apparatus 10 may further include an exhaust unit for creating a vacuum atmosphere inside the vapor deposition apparatus 10. The vapor deposition source 6 is, for example, a crucible. The vapor deposition source 6 contains a vapor deposition material 7 such as an organic material or a metal material. The heater 8 heats the vapor deposition source 6 to evaporate the vapor deposition material 7 under a vacuum atmosphere.

[0053] The mask 20 includes an incident surface 201, an exit surface 202, and a second opening 43. The incident surface 201 faces the deposition source 6. The exit surface 202 is located on the opposite side of the incident surface 201. The exit surface 202 faces the first surface 111 of the substrate 110. A portion of the deposition material 7 that enters the mask 20 from the exit surface 202 passes through the second opening 43 and exits from the exit surface 202. The deposition material 7 that exits from the exit surface 202 adheres to the first surface 111 of the substrate 110. The exit surface 202 of the mask 20 may be in contact with the first surface 111 of the substrate 110.

[0054] As shown in FIG. 2 , the deposition apparatus 10 may include a magnet 5 disposed on the second surface 112 side of the substrate 110. When the mask 20 includes a magnetic material, the magnet 5 can attract the mask 20 toward the substrate 110 by magnetic force. As a result, the gap between the mask 20 and the substrate 110 can be reduced or eliminated. Therefore, the occurrence of a shadow during the deposition process can be suppressed. In this application, a shadow refers to a phenomenon in which the thickness of the organic layer 130 formed near the wall surface of the second opening 43 is smaller than the thickness of the organic layer 130 formed at the center of the second opening 43. The shadow occurs due to the deposition material 7 adhering to the wall surface of the mask 20, the deposition material 7 entering the gap between the mask 20 and the substrate 110, or the like.

[0055] Next, the mask 20 will be described in detail. Fig. 3A is a plan view showing an example of the incident surface 201 of the mask 20. Fig. 4 is a plan view showing an example of the exit surface 202 of the mask 20. Fig. 5 is a cross-sectional view taken along line V-V of the mask 20 in Fig. 3A.

[0056] 5, the mask 20 includes a substrate 30 and a mask layer 40. The mask 20 may also include an intermediate layer 60.

[0057] The substrate 30 includes a substrate first surface 301, a substrate second surface 302, a first opening 31, and a first wall surface 32. The substrate first surface 301 may constitute the incident surface 201. The substrate second surface 302 is located on the opposite side of the substrate first surface 301. The first wall surface 32 is located between the substrate first surface 301 and the substrate second surface 302.

[0058] The first opening 31 penetrates from the substrate first surface 301 to the substrate second surface 302. As shown in Fig. 3 , the substrate 30 may include a plurality of first openings 31. The plurality of first openings 31 may be aligned in a first direction D1 and a second direction D2. The second direction D2 may be perpendicular to the first direction D1. The first direction D1 and the second direction D2 are directions parallel to the substrate first surface 301.

[0059] One first opening 31 may correspond to one screen of the organic EL display device. Mask 20 including multiple first openings 31 can simultaneously form organic layer patterns corresponding to multiple screens on substrate 110. As shown in Fig. 3A, first opening 31 may have a rectangular outline in a plan view.

[0060] The first wall surface 32 faces the first opening 31. In the example shown in Figure 3A, the first wall surface 32 extends along the normal direction of the first surface 301 of the substrate.

[0061] 3A , the region of the substrate 30 where the first openings 31 are not formed may be divided into an outer region 35 and an inner region 36. The inner region 36 is a region located between two adjacent first openings 31 in a plan view. The outer region 35 is a region located between an outer edge 303 of the substrate 30 and the first openings 31 in a plan view. As shown in FIG. 3A , the inner region 36 may extend in a first direction D1 and a second direction D2.

[0062] 3A and 4 , the substrate 30 may include an alignment mark 39. The alignment mark 39 is formed, for example, on the second surface 302 of the substrate. The alignment mark 39 may also be formed on the first surface 301 of the substrate. The alignment mark 39 is used, for example, to adjust the relative position of the substrate 110 with respect to the mask 20. If the substrate 110 has a property of transmitting visible light, the alignment mark 39 can be seen through the substrate 110.

[0063] The alignment mark 39 may be formed on a layer other than the base material 30 .

[0064] The substrate 30 includes silicon or a silicon compound. The substrate 30 is fabricated, for example, by processing a silicon wafer. As shown in FIG. 3A , the outer edge 303 of the substrate 30 may include a linear portion. The linear portion is also referred to as an orientation flat 30 f.

[0065] 3B is a plan view showing another example of the incident surface 201 of the mask 20. A cutout 30c may be formed in the outer edge 303 of the substrate 30. The cutout 30c is also referred to as a notch. The cutout 30c may include two straight sides 30a and 30b. The sides 30a and 30b may extend from the outer edge 303 toward the center point of the mask 20 in a plan view.

[0066] The orientation flat 30 f and the notch 30 c represent the crystal orientation of the silicon wafer that constitutes the substrate 30 .

[0067] The mask 20 may have an x-direction Dx and a y-direction Dy. The x-direction Dx and the y-direction Dy are in-plane directions of the incident surface 201 and the exit surface 202 of the mask 20. The x-direction Dx and the y-direction Dy are used as measurement directions for surface roughness, which will be described later.

[0068] When the substrate 30 includes an orientation flat 30f or a notch 30c, the x-direction Dx is determined by the orientation flat 30f or the notch 30c. When the substrate 30 includes an orientation flat 30f, the x-direction Dx is the direction in which the straight portion of the orientation flat 30f extends. When the substrate 30 includes a notch 30c, the x-direction Dx is the direction perpendicular to the bisector that bisects the angle between the side 30a and the side 30b. The y-direction Dy is the direction perpendicular to the x-direction Dx. The x-direction Dx may be parallel to the first direction D1. The y-direction Dy may be parallel to the second direction D2.

[0069] When the substrate 30 does not include the orientation flat 30f and the notch 30c, the x-direction Dx and the y-direction Dy are defined as directions parallel to the first direction D1 and the second direction D2.

[0070] The maximum dimension S1 of the substrate 30 in a plan view is, for example, 100 mm or more, or may be 150 mm or more, or may be 200 mm or more. The dimension S1 is, for example, 500 mm or less, or may be 400 mm or less, or may be 300 mm or less.

[0071] The dimension S2 of the first openings 31 in the direction in which the first openings 31 are arranged is, for example, 5 mm or more, or may be 10 mm or more, or may be 20 mm or more. The dimension S2 is, for example, 100 mm or less, or may be 50 mm or less, or may be 30 mm or less.

[0072] The distance S3 between two first openings 31 in the direction in which the first openings 31 are arranged is, for example, 0.1 mm or more, or may be 0.5 mm or more, or 1.0 mm or more. The distance S3 is, for example, 20 mm or less, or may be 15 mm or less, or may be 10 mm or less.

[0073] The thickness of the substrate 30 is defined as the maximum thickness T11 of the outer region 35. The thickness T11 is, for example, 50 μm or more, may be 100 μm or more, or may be 200 μm or more. The thickness T11 is, for example, 1000 μm or less, may be 800 μm or less, or may be 600 μm or less.

[0074] Next, the mask layer 40 will be described. The mask layer 40 includes a first surface 401, a second surface 402, and a plurality of second openings 43. The first surface 401 faces the substrate second surface 302. The second surface 402 is located on the opposite side of the first surface 401. The second surface 402 may constitute the exit surface 202 of the mask 20.

[0075] The second openings 43 penetrate from the first surface 401 to the second surface 402. One second opening 43 corresponds to one vapor deposition layer. The vapor deposition layer is, for example, the organic layer 130. A group of the regularly arranged second openings 43 corresponds to one screen of the organic EL display device. As shown in FIGS. 3A and 4 , a group of the regularly arranged second openings 43 may overlap one first opening 31 in plan view. The groups of the second openings 43 are supported by the substrate 30.

[0076] The mask layer 40 may be partitioned into first regions 41 and second regions 42. The mask layer 40 includes a plurality of first regions 41. Each of the plurality of first regions 41 includes a plurality of second openings 43. One first region 41 corresponds to one screen of the organic EL display device. One first region 41 may include a group of a plurality of second openings 43 that are regularly arranged. Each of the plurality of first regions 41 overlaps a first opening 31 of the base material 30 in a plan view.

[0077] The multiple first regions 41 may be classified into inner first regions 411 and outer first regions 412. The inner first region 411 is a first region 41 that is located between two first regions 41 in the first direction D1 and between two first regions 41 in the second direction D2. The outer first region 412 is a first region 41 that is located outside the inner first region 411. The outer first region 412 is adjacent to only one first region 41 in either the first direction D1 or the second direction D2. The "outside" is the side that is away from the center point C1 of the mask 20 in a planar view. The "inside" is the side that is closer to the center point C1 of the mask 20 in a planar view.

[0078] The second region 42 is a region located between the plurality of first regions 41 and outside the plurality of first regions 41 in a plan view. As shown in FIGS. 4 and 5 , the second region 42 may include a 21st region 421, a 22nd region 422, a 23rd region 423, and a 24th region 424. The 21st region 421 is a region of the mask layer 40 located between two adjacent first regions 41 in the first direction D1. The 22nd region 422 is a region of the mask layer 40 located between two adjacent first regions 41 in the second direction D2. The 23rd region 423 is a region of the mask layer 40 surrounded by the 21st region 421 and the 22nd region 422. The 24th region 424 is a region of the mask layer 40 located between the outer first region 412 and the outer edge 403 of the mask layer 40.

[0079] 6 is a cross-sectional view showing an example of the first region 41. The first region 41 includes a second wall surface 44 facing the second opening 43. The first region 41 may include a metal layer 50. The first region 41 may also be constituted by only the metal layer 50.

[0080] Symbol R1 represents the dimension of the second opening 43 in the first surface 401. Symbol R2 represents the dimension of the second opening 43 in the second surface 402. Dimension R1 is also referred to as the first dimension. Dimension R2 is also referred to as the second dimension. The dimension of the deposition layer formed on the substrate 110 by the deposition process using the mask 20 is determined by the second dimension R2.

[0081] The first dimension R1 may be greater than the second dimension R2. In other words, the second dimension R2 may be smaller than the first dimension R1. As a result, it is possible to suppress the occurrence of a shadow near the second wall surface 44. The first dimension R1 and the second dimension R2 are specified in the direction in which the second openings 43 are aligned.

[0082] 6, the second wall surface 44 may include a tapered surface 44a that widens away from the center of the second opening 43 as it moves from the second surface 402 toward the first surface 401. When the second wall surface 44 includes the tapered surface 44a, the dimension R1 can be made larger than the dimension R2.

[0083] 6, the symbol S8 indicates the width of the tapered surface 44a in the direction in which the second openings 43 are arranged. The width S8 is, for example, 0.2 μm or more, or may be 0.5 μm or more, or 1.0 μm or more. The width S8 is, for example, 25 μm or less, or may be 20 μm or less, or may be 10 μm or less.

[0084] 6, the symbol θ1 represents the angle formed between the second wall surface 44 and the second surface 402. The angle θ1 is, for example, 50° or more, or may be 55° or more, or 60° or more. The angle θ1 is, for example, less than 90°, or may be 85° or less, or may be 80° or less.

[0085] The thickness T2 of the mask layer 40 in the first region 41 is smaller than the thickness T11 of the base material 30. The thickness T2 is, for example, 25.0 μm or less, and may be 10.0 μm or less, or 5.0 μm or less. As a result, the occurrence of shadows can be suppressed. The thickness T2 is, for example, 0.5 μm or more, and may be 1.0 μm or more, or 2.0 μm or more. As a result, the occurrence of defects such as pinholes or deformations in the first region 41 can be suppressed.

[0086] The distance S5 between the two second wall surfaces 44 in the direction in which the second openings 43 are aligned is, for example, 1.0 μm or more, or may be 2.0 μm or more, or 3.0 μm or more. The distance S5 is, for example, 25.0 μm or less, or may be 10.0 μm or less, or may be 5.0 μm or less.

[0087] The metal layer 50 includes a metal. The metal may be a magnetic material or a non-magnetic material. Examples of magnetic materials include nickel, iron, cobalt, and alloys thereof. Examples of non-magnetic materials include copper, aluminum, titanium, chromium, and alloys thereof.

[0088] The first region 41 may include a layer other than the metal layer 50. The first region 41 may be configured of a layer other than the metal layer 50. For example, the first region 41 may include polycrystalline silicon or the like.

[0089] 7 is a cross-sectional view showing an example of a portion of the mask 20 corresponding to the 21st region 421 of the mask layer 40. The mask 20 includes a substrate 30 that forms the inner region 36, and a mask layer 40 that forms the 21st region 421. The mask 20 may include an intermediate layer 60 located between the substrate 30 and the mask layer 40.

[0090] The twenty-first region 421 may include the metal layer 50. The second regions 42, such as the twenty-second region 422, the twenty-third region 423, and the twenty-fourth region 424, may also include the metal layer 50.

[0091] The intermediate layer 60 will now be described. The intermediate layer 60 includes a layer that performs some function for the substrate 30 or the mask layer 40. For example, the intermediate layer 60 includes a stopper layer 61. The stopper layer 61 is located between the second substrate surface 302 of the substrate 30 and the first surface 401 of the mask layer 40. The stopper layer 61 may be in contact with the second substrate surface 302 of the substrate 30.

[0092] The stopper layer 61 may have a function of stopping etching in the process of processing the substrate 30 by etching. Specifically, the stopper layer 61 is resistant to an etchant that etches the substrate 30. The stopper layer 61 may contain a metal such as aluminum, an aluminum alloy, titanium, or a titanium alloy. The aluminum alloy contains, for example, aluminum and neodymium. The stopper layer 61 may also contain an inorganic compound such as silicon oxide.

[0093] The thickness of the stopper layer 61 is not particularly limited as long as it can prevent the mask layer 40 from being etched in the process of processing the substrate 30. For example, the thickness of the stopper layer 61 may be smaller than the thickness of the mask layer 40 or may be greater than or equal to the thickness of the mask layer 40. The thickness of the stopper layer 61 may be, for example, 5 nm or greater, 50 nm or greater, or 75 nm or greater. The thickness of the stopper layer 61 may be, for example, 100 μm or less, 50 μm or less, 10.0 μm or less, 5.0 μm or less, 1.0 μm or less, or 150 nm or less. The higher the resistance of the stopper layer 61 to the etchant for the substrate 30, the smaller the thickness of the stopper layer 61 can be. It is particularly preferable that the thickness of the stopper layer 61 be 1.0 μm or less.

[0094] The intermediate layer 60 may include a seed layer 62. The seed layer 62 may be in contact with the first surface 401 of the mask layer 40. The seed layer 62 may be located between the stopper layer 61 and the first surface 401.

[0095] The seed layer 62 carries charges to the plating solution when the metal layer 50 of the mask layer 40 is formed by electrolytic plating. The seed layer 62 may contain a metal. Examples of the metal include nickel, copper, titanium, aluminum, and alloys thereof. The seed layer 62 may be composed of a single layer or multiple layers. For example, the seed layer 62 may include a first layer containing titanium located on the stopper layer 61 and a second layer containing copper located on the first layer.

[0096] The thickness of the seed layer 62 is, for example, 2.0 nm or more, optionally 10.0 nm or more, or 30.0 nm or more. The thickness of the seed layer 62 is, for example, 5.0 μm or less, optionally 1.0 μm or less, or 150 nm or less.

[0097] The thickness of each layer, the dimensions of each component, the spacing, etc. are measured by observing an image of the cross section of the mask 20 using a scanning electron microscope.

[0098] Next, the second surface 402 of the mask layer 40 will be described. The second surface 402 faces the first surface 111 of the substrate 110 during the deposition process. The second surface 402 may be in contact with the first surface 111 of the substrate 110 during the deposition process.

[0099] If a gap exists between the second surface 402 of the mask layer 40 and the first surface 111 of the substrate 110, the deposition material 7 will enter the gap between the mask 20 and the substrate 110. When the deposition material enters the gap, the shape of the deposition layer will deviate from the ideal shape. For example, the contour line of the deposition layer will partially deviate from the ideal line. For example, the thickness of the deposition layer at the contour portion of the deposition layer will partially deviate from the ideal thickness.

[0100] FIG. 8 is a plan view showing an example of a deposited layer 125 having an ideal shape. The contour of the deposited layer 125 includes, for example, straight edges. FIG. 9 is a cross-sectional view of the deposited layer 125 taken along line IX-IX of FIG. 8. Line IX-IX extends parallel to and close to the edges of the contour of the deposited layer 125 of FIG. 8. The deposited layer 125 has a uniform thickness regardless of position.

[0101] FIG. 10 is a plan view showing an example of a deposited layer 125 having a shape that deviates from the ideal shape. The contour of the deposited layer 125 includes jagged edges, for example, like sawtooth edges. FIG. 11 is a cross-sectional view of the deposited layer 125 of FIG. 10 taken along line XI-XI. Line XI-XI extends approximately parallel to and close to the edges of the contour of the deposited layer 125 of FIG. 10. The deposited layer 125 has a thickness that varies depending on the position.

[0102] In order to prevent the deposition material from entering the gaps and to suppress shadows, it is preferable that the second surface 402 of the mask layer 40 have high adhesion to the first surface 111 of the substrate 110. In this embodiment, it is proposed to control the surface roughness of the second surface 402 of the mask layer 40. It is expected that the adhesion of the mask layer 40 to the substrate 110 will decrease as the surface roughness of the second surface 402 increases. By reducing the surface roughness of the second surface 402, the adhesion of the mask layer 40 to the substrate 110 can be improved.

[0103] The arithmetic mean roughness and the maximum height are known as indexes of surface roughness. Both the arithmetic mean roughness and the maximum height are calculated based on data indicating the change in the surface height of the second surface 402. The data indicating the change in the surface height is obtained by a laser microscope.

[0104] The arithmetic mean roughness is the average value of the absolute values ​​of the differences between the average height and the height at each position on the second surface. Known arithmetic mean roughnesses include the arithmetic mean roughness Ra related to line roughness and the arithmetic mean roughness Sa related to surface roughness. The arithmetic mean roughness Ra is calculated based on data on the surface height of the second surface 402 measured at each position on a straight line having a predetermined measurement length. The arithmetic mean roughness Sa is calculated based on data on the surface height of the second surface 402 measured at each position in an area having a predetermined measurement area.

[0105] The maximum height is the difference between the maximum and minimum heights at each position on the second surface 402. Known maximum heights include the maximum height Rz related to line roughness and the maximum height Sz related to surface roughness. The maximum height Rz is calculated based on data on the surface height of the second surface 402 measured at each position on a straight line having a predetermined measurement length. The maximum height Sz is calculated based on data on the surface height of the second surface 402 measured at each position in an area having a predetermined measurement area.

[0106] The second surface 402 of the first region 41 of the mask layer 40 has a first arithmetic mean roughness Ra1, a first maximum height Rz1, a first arithmetic mean roughness Sa1, and a first maximum height Sz1. The first arithmetic mean roughness Ra1 is calculated by averaging the measurement results of the arithmetic mean roughness Ra at 25 locations on the second surface 402 of the first region 41. The first maximum height Rz1 is calculated by averaging the measurement results of the maximum height Rz at 25 locations on the second surface 402 of the first region 41. The first arithmetic mean roughness Sa1 is calculated by averaging the measurement results of the arithmetic mean roughness Sa at 25 locations on the second surface 402 of the first region 41. The first maximum height Sz1 is calculated by averaging the measurement results of the maximum height Sz at 25 locations on the second surface 402 of the first region 41.

[0107] The second surface 402 of the second region 42 of the mask layer 40 has a second arithmetic mean roughness Ra2, a second maximum height Rz2, a second arithmetic mean roughness Sa2, and a second maximum height Sz2. The second arithmetic mean roughness Ra2 is calculated by averaging the measurement results of the arithmetic mean roughness Ra at 25 locations on the second surface 402 of the second region 42. The second maximum height Rz2 is calculated by averaging the measurement results of the maximum height Rz at 25 locations on the second surface 402 of the second region 42. The second arithmetic mean roughness Sa2 is calculated by averaging the measurement results of the arithmetic mean roughness Sa at 25 locations on the second surface 402 of the second region 42. The second maximum height Sz2 is calculated by averaging the measurement results of the maximum height Sz at 25 locations on the second surface 402 of the second region 42.

[0108] 12 is a plan view showing measurement areas of the mask layer 40. The arithmetic mean roughness Ra and maximum height Rz related to line roughness, and the arithmetic mean roughness Sa and maximum height Sz related to surface roughness are measured in the five first regions 41 and the five second regions 42. The five second regions 42 are five 21 regions 421.

[0109] The five first regions 41 include first region 41A to first region 41E. The first region 41A overlaps with the center point C1 of the mask 20 or is the first region 41 closest to the center point C1. The first region 41B is one of the outer first regions 412. The first region 41B is adjacent to the inner first region 411 in the first direction D1. The first region 41C is the outer first region 412 that is positioned symmetrically with the first region 41B with respect to a line that extends in the first direction D1 and passes through the center point C1, or is the outer first region 412 that is closest to the line-symmetric position. The first region 41D is the outer first region 412 that is positioned symmetrically with the first region 41B with respect to a line that extends in the second direction D2 and passes through the center point C1, or is the outer first region 412 that is closest to the line-symmetric position. The first region 41E is an outer first region 412 that is positioned point-symmetrically to the first region 41B with respect to the center point C1, or is the outer first region 412 that is closest to the point-symmetrical position.

[0110] The five second regions 42 include second region 42A to second region 42E. The second region 42A is a 21st region 421 adjacent to the first region 41A. The distance from the second region 42A to the first region 41B is shorter than the distance from the second region 42A to the first region 41D. The second region 42B is a 21st region 421 adjacent to the first region 41B and the inner first region 411. The second region 42C is a 21st region 421 adjacent to the first region 41C and the inner first region 411. The second region 42D is a 21st region 421 adjacent to the first region 41D and the inner first region 411. The second region 42E is a 21st region 421 adjacent to the first region 41E and the inner first region 411.

[0111] The arithmetic mean roughness Ra, maximum height Rz, arithmetic mean roughness Sa, and maximum height Sz are measured at five locations in each of the first regions 41A to 41E. The arithmetic mean roughness Ra, maximum height Rz, arithmetic mean roughness Sa, and maximum height Sz are measured at five locations in each of the second regions 42A to 42E.

[0112] FIG. 13 is a diagram showing measurement positions of the arithmetic mean roughness Ra and the maximum height Rz in the first region 41A and the second region 42A.

[0113] The straight line extending in the x-direction Dx and marked with the symbol Mx represents the measurement length of the arithmetic mean roughness Ra and the maximum height Rz in the x-direction Dx. The measurement length of the straight line Mx is 85 μm. Based on the data on the surface height of the second surface 402 along the straight line Mx, the arithmetic mean roughness Ra and the maximum height Rz in the x-direction Dx are calculated.

[0114] The straight line extending in the y direction Dy and labeled My represents the measurement length of the arithmetic mean roughness Ra and maximum height Rz in the y direction Dy. The measurement length of the straight line My is 85 μm. Based on the data on the surface height of the second surface 402 along the straight line My, the arithmetic mean roughness Ra and maximum height Rz in the y direction Dy are calculated.

[0115] 13 , the arithmetic mean roughness Ra and the maximum height Rz are measured at five locations within the first region 41A. At each of the five locations, data on the surface height of the second surface 402 is acquired along the line Mx and the line My. The five locations within the first region 41A are aligned in the y direction Dy with respect to the center point C2 of the first region 41A in a plan view.

[0116] 13 , the arithmetic mean roughness Ra and the maximum height Rz are measured at five locations within the second region 42A. At each of the five locations, data on the surface height of the second surface 402 is obtained along the line Mx and the line My. The five locations within the second region 42A are aligned in the y direction Dy with respect to the center point C3 of the second region 42A in a plan view.

[0117] The measurement positions of the arithmetic mean roughness Ra and the maximum height Rz in the first regions 41B to 41E are the same as the measurement positions of the arithmetic mean roughness Ra and the maximum height Rz in the first region 41A. The measurement positions of the arithmetic mean roughness Ra and the maximum height Rz in the second regions 42B to 42E are the same as the measurement positions of the arithmetic mean roughness Ra and the maximum height Rz in the second region 42A.

[0118] The first arithmetic mean roughness Ra1 is calculated by averaging the arithmetic mean roughness Ra in the x direction Dx at 25 locations on the second surface 402 of the first region 41 and the arithmetic mean roughness Ra in the y direction Dy at 25 locations on the second surface 402 of the first region 41. The first maximum height Rz1 is calculated by averaging the maximum height Rz in the x direction Dx at 25 locations on the second surface 402 of the first region 41 and the maximum height Rz in the y direction Dy at 25 locations on the second surface 402 of the first region 41.

[0119] Preferably, the deviation between the arithmetic mean roughness Ra in the x direction Dx and the arithmetic mean roughness Ra in the y direction Dy is 0.50 or less. The deviation is the ratio of the difference between the average of the arithmetic mean roughness Ra in the x direction Dx at 25 locations and the average of the arithmetic mean roughness Ra in the y direction Dy at 25 locations to the first arithmetic mean roughness Ra1. The deviation may be 0.40 or less, 0.30 or less, 0.20 or less, or 0.10 or less.

[0120] The second arithmetic mean roughness Ra2 is calculated by averaging the arithmetic mean roughness Ra in the x direction Dx at 25 locations on the second surface 402 of the second region 42 and the arithmetic mean roughness Ra in the y direction Dy at 25 locations on the second surface 402 of the second region 42. The second maximum height Rz2 is calculated by averaging the maximum height Rz in the x direction Dx at 25 locations on the second surface 402 of the second region 42 and the maximum height Rz in the y direction Dy at 25 locations on the second surface 402 of the second region 42.

[0121] Preferably, the first arithmetic mean roughness Ra1 is greater than the second arithmetic mean roughness Ra2. As a result, the adhesion of the first region 41 to the substrate 110 is lower than the adhesion of the second region 42 to the substrate 110. In the separation process, the first region 41 can be separated from the substrate 110 before the second region 42. Since the stress applied to the first region 41 is reduced, damage to the first region 41 can be suppressed.

[0122] The difference between the first arithmetic mean roughness Ra1 and the second arithmetic mean roughness Ra2, (Ra1-Ra2), is, for example, 0.5 nm or more, or may be 1.0 nm or more, 2.0 nm or more, or 3.0 nm or more. (Ra1-Ra2) is, for example, 10.0 nm or less, or may be 8.0 nm or less, 6.0 nm or less, or 5.0 nm or less.

[0123] The first arithmetic mean roughness Ra1 is, for example, 50 nm or less, and may be 40 nm or less, 30 nm or less, or 25 nm or less. When the first arithmetic mean roughness Ra1 is 50 nm or less, atomic forces are more likely to act between the first region 41 and the substrate 110. As a result, the adhesion of the first region 41 to the substrate 110 is improved, and gaps between the first region 41 and the substrate 110 can be reduced. The first arithmetic mean roughness Ra1 is, for example, 1.0 nm or more, and may be 3.0 nm or more, 5.0 nm or more, or 10 nm or more.

[0124] FIG. 14 is a diagram showing measurement positions of the arithmetic mean roughness Sa and the maximum height Sz in the first region 41A and the second region 42A.

[0125] The rectangle marked with the symbol Ms represents the measurement area of ​​the arithmetic mean roughness Sa and the maximum height Sz. The measurement area of ​​the rectangle Ms is 6617.838 μm ２ (70.44 μm×93.95 μm). Based on the data on the surface height of the second surface 402 measured at a plurality of positions within the rectangle Ms, the arithmetic mean roughness Sa and the maximum height Sz are calculated.

[0126] 14, the arithmetic mean roughness Sa and the maximum height Sz are measured at five locations in the first region 41A. The five locations in the first region 41A are aligned in the y direction Dy with respect to a center point C2 of the first region 41A in a plan view.

[0127] 14, the arithmetic mean roughness Sa and the maximum height Sz are measured at five locations within the second region 42A. The five locations within the second region 42A are aligned in the y direction Dy with respect to a center point C3 of the second region 42A in a plan view.

[0128] The measurement positions of the arithmetic mean roughness Sa and the maximum height Sz in the first regions 41B to 41E are the same as the measurement positions of the arithmetic mean roughness Sa and the maximum height Sz in the first region 41A. The measurement positions of the arithmetic mean roughness Sa and the maximum height Sz in the second regions 42B to 42E are the same as the measurement positions of the arithmetic mean roughness Sa and the maximum height Sz in the second region 42A.

[0129] The first arithmetic mean roughness Sa1 is calculated by averaging the arithmetic mean roughness Sa at 25 locations on the second surface 402 of the first region 41. The first maximum height Sz1 is calculated by averaging the maximum height Sz at 25 locations on the second surface 402 of the first region 41.

[0130] The second arithmetic mean roughness Sa2 is calculated by averaging the arithmetic mean roughness Sa at 25 locations on the second surface 402 of the second region 42. The second maximum height Sz2 is calculated by averaging the maximum height Sz at 25 locations on the second surface 402 of the second region 42.

[0131] The first arithmetic mean roughness Sa1 is, for example, 70 nm or less, and may be 60 nm or less, 50 nm or less, or 40 nm or less. When the first arithmetic mean roughness Sa1 is 70 nm or less, it is possible to suppress a gap between the first region 41 and the substrate 110. The first arithmetic mean roughness Sa1 is, for example, 2.0 nm or more, and may be 4.0 nm or more, 6.0 nm or more, or 12 nm or more.

[0132] It is preferable to appropriately control Sa1 / Ra1, which is the ratio of the first arithmetic mean roughness Sa1 to the first arithmetic mean roughness Ra1. As will be shown in the examples described later, even when the first arithmetic mean roughness Ra1 and the first arithmetic mean roughness Sa1 are small, if Sa1 / Ra1 is large, the shape of the deposited layer may deviate from the ideal shape. For example, the contour of the deposited layer may appear blurred. By appropriately controlling Sa1 / Ra1, the shape of the deposited layer can be appropriately controlled.

[0133] A large Sa1 / Ra1 means that there is a large variation in the surface roughness of the second surface 402 in the in-plane direction of the second surface 402 of the first region 41. By appropriately controlling Sa1 / Ra1, it is possible to suppress the variation in the surface roughness of the second surface 402 in the in-plane direction of the second surface 402 of the first region 41. Therefore, it is possible to make the shape of the deposition layer closer to the ideal shape.

[0134] The ratio Sa1 / Ra1 of the first arithmetic mean roughness Sa1 to the first arithmetic mean roughness Ra1 is, for example, 1.82 or less, or may be 1.70 or less, 1.60 or less, 1.50 or less, or 1.40 or less. Sa1 / Ra1 is, for example, 1.05 or more, or 1.10 or more, or 1.20 or more, or 1.30 or more.

[0135] Preferably, the first arithmetic mean roughness Sa1 is greater than the second arithmetic mean roughness Sa2, so that the adhesion of the first region 41 to the substrate 110 is lower than the adhesion of the second region 42 to the substrate 110.

[0136] The difference between the first arithmetic mean roughness Sa1 and the second arithmetic mean roughness Sa2, (Sa1-Sa2), is, for example, 0.5 nm or more, or may be 1.0 nm or more, 2.0 nm or more, or 3.0 nm or more. (Sa1-Sa2) is, for example, 10.0 nm or less, or may be 8.0 nm or less, 6.0 nm or less, or may be 5.0 nm or less.

[0137] The first maximum height Sz1 is, for example, 1000 nm or less, and may be 700 nm or less, 500 nm or less, 300 nm or less, or 200 nm or less. When the first maximum height Sz1 is 1000 nm or less, atomic forces are more likely to act between the first region 41 and the substrate 110. As a result, the adhesion of the first region 41 to the substrate 110 is improved, and the gap between the first region 41 and the substrate 110 can be reduced. The first maximum height Sz1 is, for example, 10 nm or more, and may be 30 nm or more, 50 nm or more, or 100 nm or more.

[0138] The first maximum height Sz1 may be smaller than the second maximum height Sz2. The difference between the first maximum height Sz1 and the second maximum height Sz2, (Sz2-Sz1), is, for example, 100 nm or more, or may be 200 nm or more, or may be 250 nm or more. (Sz2-Sz1) is, for example, 500 nm or less, or may be 450 nm or less, or may be 400 nm or less.

[0139] Next, a method for manufacturing the mask 20 will be described. First, a substrate preparation step is performed to prepare a substrate 30. A silicon wafer may be used as the substrate 30. The first substrate surface 301 and the second substrate surface 302 of the substrate 30 may be polished to a mirror finish. The arithmetic mean roughness Ra of the first substrate surface 301 and the second substrate surface 302 may be 1.5 nm or less, or 1.0 nm or less. The surface orientation of the first substrate surface 301 and the second substrate surface 302 may be (100), (110), or the like.

[0140] Subsequently, an intermediate layer forming step is performed. In the intermediate layer forming step, as shown in Fig. 15 , an intermediate layer 60 is formed on the second substrate surface 302 of the substrate 30. The intermediate layer 60 includes, for example, a stopper layer 61. The intermediate layer 60 may include the stopper layer 61 and a seed layer 62. The intermediate layer 60 may be formed on the entire second substrate surface 302. The intermediate layer 60 may be formed by a physical film formation method such as a sputtering method, a vapor deposition method, or an ion plating method.

[0141] 16 , an insulating layer forming step is performed to form an insulating layer 55 on the intermediate layer 60. The insulating layer 55 may be formed on the entire second surface 302 of the substrate.

[0142] The insulating layer 55 is, for example, a resist layer. The insulating layer forming step may include a step of attaching a dry film resist to the intermediate layer 60. The insulating layer forming step may include a step of applying a solution containing a resist material onto the intermediate layer 60. The resist layer may include a positive resist material or a negative resist material.

[0143] The insulating layer 55 may include a silicon compound. The silicon compound may be formed by chemical vapor deposition. For example, the insulating layer 55 may include tetraethyl silicate Si(OC ２ H ５ ) ４ The silicon dioxide may be formed by chemical vapor deposition using Tetraethyl Silicate (TEOS).

[0144] The insulating layer forming step may include an insulating layer processing step of processing the insulating layer 55. Figures 17A and 17B are a cross-sectional view and a plan view showing the processed insulating layer 55. The insulating layer 55 includes an insulating first surface 551 facing the base material second surface 302 of the base material 30, and an insulating second surface 552 located on the opposite side of the insulating first surface 551.

[0145] The insulating layer 55 includes a plurality of island portions 573. The above-mentioned second openings 43 of the mask 20 are formed at the positions of the island portions 573.

[0146] The symbol R3 represents the dimension of the island portion 573 on the insulating first surface 551. The symbol R4 represents the dimension of the island portion 573 on the insulating second surface 552. The dimension R3 is also referred to as the third dimension. The dimension R4 is also referred to as the fourth dimension. The fourth dimension R4 may be smaller than the third dimension R3. As a result, the second dimension R2 of the second opening 43 can be smaller than the first dimension R1. The third dimension R3 and the fourth dimension R4 are specified in the direction in which the island portions 573 are arranged.

[0147] The method for processing the insulating layer 55 is not particularly limited. For example, if the insulating layer 55 is a resist layer, the insulating layer 55 may be processed by exposing and developing the insulating layer 55. For example, if the insulating layer 55 contains a silicon compound, the insulating layer 55 may be processed by dry etching using an etching gas. The dry etching may be reactive ion etching.

[0148] Subsequently, a metal layer forming step is performed to form the metal layer 50. In the present embodiment, the metal layer 50 is formed between the plurality of island portions 573 shown in Figures 17A and 17B, i.e., in the gaps 574. The metal layer 50 is also formed outside the plurality of island portions 573.

[0149] 18 is a cross-sectional view showing the metal layer 50 formed by the metal layer forming step. The metal layer forming step may include a plating step. That is, the metal layer 50 may be formed by the plating step. In the plating step, a plating solution containing ions of the metal that constitutes the metal layer 50 is supplied onto the intermediate layer 60. The plating step may be an electrolytic plating step or an electroless plating step. When the electrolytic plating step is performed, the intermediate layer 60 includes a seed layer 62.

[0150] When the plating process is an electrolytic plating process, Sa1 / Ra1 on the second surface 402 of the first region 41 can be controlled by controlling the current density of the intermediate layer 60. For example, there is a tendency that Sa1 / Ra1 on the second surface 402 of the first region 41 decreases as the current density decreases.

[0151] The metal layer 50 includes a first metal surface 501 facing the second substrate surface 302 of the substrate 30, and a second metal surface 502 located on the opposite side of the first metal surface 501. The metal layer 50 is in contact with the wall surface of the island portion 573 in the planar direction of the first substrate surface 301 of the substrate 30. The metal layer 50 is in contact with the intermediate layer 60 in the thickness direction of the substrate 30. As shown in FIG. 18 , the metal layer 50 may protrude above the insulating layer 55 in the thickness direction of the substrate 30. That is, the second metal surface 502 of the metal layer 50 may be located above the second insulating surface 552 of the insulating layer 55. The metal layer 50 does not have to be formed on the second insulating surface 552 of the insulating layer 55.

[0152] The metal layer forming step may include a sputtering step, i.e., the metal layer 50 may be formed by a sputtering step. In this case, the metal layer 50 may be formed between the plurality of island portions 573 and on the insulating second surface 552 of the insulating layer 55.

[0153] The metal layer formation process may include an annealing process in which the metal layer 50 is heated. The annealing process can reduce strain that has occurred inside the metal layer 50. In the annealing process, the substrate 30, the metal layer 50, and the insulating layer 55 are maintained in an environment at a temperature higher than room temperature. The temperature in the annealing process is, for example, 120°C or higher, or may be 140°C or higher, or 150°C or higher. The temperature in the annealing process is, for example, 250°C or lower, or may be 220°C or lower, or may be 200°C or lower. When the metal layer 50 is a layer containing an alloy such as an iron-nickel alloy formed by plating, the annealing process may be performed at a higher temperature. When recrystallization progresses by performing an annealing process on an alloy layer formed by plating, properties equivalent to those of a melt-cast alloy can be achieved. Examples of the properties include the coefficient of thermal expansion, Young's modulus, and hardness. The temperature in the annealing process performed on an alloy layer formed by plating is, for example, 400°C or higher, or may be 500°C or higher, or may be 600°C or higher.

[0154] Subsequently, a polishing step may be performed, which polishes the portion of the metal layer 50 located above the insulating second surface 552 of the insulating layer 55. Figure 19 is a cross-sectional view showing the polished metal layer 50.

[0155] The polishing step may polish the metal layer 50 by chemical mechanical polishing. For example, the polishing step may include a step of contacting a slurry containing a working liquid and abrasive grains with the object. The object is the insulating second surface 552 and the metal second surface 502. With the slurry positioned between the polishing pad of the polishing tool and the object, the object is polished by rotating the object relative to the polishing pad.

[0156] The working fluid may be an acidic solution or an alkaline solution. The abrasive grains may include inorganic oxides such as alumina, silica, zirconia, etc. The polishing pad may include polyurethane.

[0157] The polishing process may be adjusted so that the surface roughness of the second metal surface 502 of the metal layer 50 constituting the first region 41 is greater than the surface roughness of the second metal surface 502 of the metal layer 50 constituting the second region 42. The metal layer 50 formed in the gaps 574 between the plurality of island portions 573 constitutes the first region 41. The metal layer 50 formed outside the plurality of island portions 573 constitutes the second region 42.

[0158] When polishing the metal layer 50 constituting the first region 41, the polishing pad comes into contact with the metal layer 50 located in the multiple island portions 573 and the gaps 574 between them. On the other hand, when polishing the metal layer 50 constituting the second region 42, most of the polishing pad comes into contact with the continuously extending metal layer 50. Therefore, the fluidity of the slurry when polishing the metal layer 50 constituting the first region 41 differs from the fluidity of the slurry when polishing the metal layer 50 constituting the second region 42. Due to the difference in the fluidity of the slurries, a difference occurs between the surface roughness of the metal layer 50 constituting the first region 41 and the surface roughness of the metal layer 50 constituting the second region 42.

[0159] The difference in surface roughness is controlled by adjusting the material of the polishing pad, the components of the slurry, the flow rate of the slurry, the polishing pressure, the rotation speed of the polishing pad, the rotation speed of the object, etc. For example, as shown in the examples described below, when the abrasive grains contain alumina, the surface roughness of the first region 41 tends to be greater than the surface roughness of the second region 42. For example, the smaller the size of the abrasive grains, the greater the surface roughness of the first region 41 tends to be greater than the surface roughness of the second region 42.

[0160] The polishing step may be performed until the polishing pad of the polishing tool reaches the second insulating surface 552 of the insulating layer 55 in the thickness direction. As a result, the second metal surface 502 of the metal layer 50 is positioned on the same plane as the second insulating surface 552 of the insulating layer 55. "Flush" means that the step between the two surfaces is 1.0 μm or less. The step between the second metal surface 502 and the second insulating surface 552 may be 0.5 μm or less, 0.3 μm or less, 0.2 μm or less, or 0.1 μm or less.

[0161] 20, an insulating layer removal step is performed to remove the insulating layer 55. In the insulating layer removal step, an etching solution such as a buffered hydrofluoric acid solution is supplied toward the insulating layer 55. As a result, a plurality of island portions 573 are removed.

[0162] Subsequently, a substrate processing step is performed to form first openings 31 in the substrate 30. In the substrate processing step, a resist layer 38 may be formed partially on the substrate first surface 301, as shown in Fig. 21 . A resist opening 381 facing the first opening 31 is formed in the resist layer 38. As shown in Fig. 21 , a protective layer 72 may be formed to cover the metal layer 50.

[0163] The resist layer 38 may be a photoresist. In this case, the resist layer 38 is formed on the first substrate surface 301 by first coating the first substrate surface 301 with a liquid resist material. After coating, a step of heating the resist layer 38 may be performed. Subsequently, a photolithography process is performed in which the resist layer 38 is exposed and developed. As a result, a resist opening 381 is formed in the resist layer 38.

[0164] Although not shown, the resist layer 38 may be a silicon oxide film partially formed on the first surface 301 of the substrate. The silicon oxide film is formed, for example, by partially performing a thermal oxidation treatment on the first surface 301 of the substrate. The silicon oxide film may be formed on the substrate 30 before the intermediate layer 60 is laminated on the substrate 30.

[0165] In the substrate processing step, as shown in FIG. 22 , the substrate 30 is etched from the substrate first surface 301 side to form a first opening 31 in the substrate 30. The etching may be dry etching using an etching gas. Since the intermediate layer 60 has resistance to the etchant, as shown in FIG. 22 , the etching is prevented from progressing to the metal layer 50. The etching gas may be, for example, SF ６ It's gas.

[0166] Subsequently, a resist removal step of removing the resist layer 38, a protective layer removal step of removing the protective layer 72, and an intermediate layer removal step of removing the intermediate layer 60 are performed. The order of the resist removal step, the protective layer removal step, and the intermediate layer removal step is not particularly limited. Fig. 23 is a cross-sectional view showing a state after the resist removal step and the protective layer removal step have been performed. Two or three of the resist removal step, the protective layer removal step, and the intermediate layer removal step may be performed simultaneously.

[0167] When the resist layer 38 is a photoresist, a resist processing solution containing N-methyl-2-pyrrolidone may be supplied toward the resist layer 38. The resist layer 38 may be removed by irradiating the resist layer 38 with oxygen plasma. When the resist layer 38 is a silicon oxide film, a resist processing solution containing hydrofluoric acid may be supplied toward the resist layer 38. CF ４ The resist layer 38 may be removed by dry etching using gas or the like.

[0168] The intermediate layer 60 is removed by supplying an etchant for the intermediate layer 60 to the first opening 31. As a result, the intermediate layer 60 that overlaps the first opening 31 in a plan view is removed. The intermediate layer 60 may be removed by dry etching using a fluorine-based gas or the like. The intermediate layer 60 may be removed by wet etching using an acidic etching solution.

[0169] The resist layer 38, the protective layer 72, and the intermediate layer 60 that overlaps the first opening 31 are removed, thereby obtaining the mask 20 shown in FIGS. 3A to 5.

[0170] Next, a method for manufacturing a device using the mask 20 will be described. The manufacturing method includes a vapor deposition process for forming a vapor deposition layer on the first surface 111 of the substrate 110 using the mask 20. FIG. 24 is a cross-sectional view showing an example of the vapor deposition process. The vapor deposition material that has passed through the second openings 43 of the mask layer 40 is attached to the first surface 111, thereby forming a vapor deposition layer 125. The vapor deposition layer 125 is, for example, an organic layer 130. The vapor deposition layer 125 may also be a second electrode 140.

[0171] 25 is a cross-sectional view showing the deposition layer 125. The deposition layer 125 has a dimension R5 in the first direction D1. The dimension R5 is measured along a cross section that extends in the first direction D1 and passes through a midpoint of the outer edge of the second opening 43, which extends in a second direction D2 perpendicular to the first direction D1.

[0172] The deposition layer 125 includes a portion formed by the deposition material that has entered the gap between the second surface 402 of the mask layer 40 and the first surface 111 of the substrate 110. Therefore, the dimension R5 of the deposition layer 125 is larger than the dimension R2 of the second opening 43 in the second surface 402. The shadow is quantitatively evaluated based on the difference between the dimension R5 and the dimension R2. In this application, the value obtained by dividing the difference between the dimension R5 and the dimension R2 by 2, i.e., (R5-R2) / 2, is referred to as the shadow amount.

[0173] The second surface 402 of the first region 41 of the mask layer 40 has a first arithmetic mean roughness Ra1 of 50 nm or less and a first maximum height Sz1 of 1000 nm or less. The gap between the second surface 402 and the first surface 111 is reduced, thereby reducing the amount of shadow. The amount of shadow is, for example, 0.10 μm or less, or may be 0.08 μm or less, 0.06 μm or less, or 0.04 μm or less.

[0174] Dimensions of the mask 20, such as dimensions R1 to R4, are measured by observing a cross section of the mask 20 using a scanning electron microscope. The dimensions are calculated by averaging the measurement results at positions corresponding to ten second openings 43. The ten second openings 43 are extracted from the first region 41 that is closest to the center point C1 of the mask 20. The ten second openings 43 include the second opening 43 that is closest to the center point C2 of the first region 41 in a plan view.

[0175] The dimension R5 of the deposited layer 125 is measured by observing the deposited layer 125 using an atomic force microscope.

[0176] On the second surface 402 of the first region 41 of the mask layer 40, the ratio Sa1 / Ra1 of the first arithmetic mean roughness Sa1 to the first arithmetic mean roughness Ra1 is 1.82 or less. By reducing Sa1 / Ra1, the variation in the surface roughness of the second surface 402 in the in-plane direction of the second surface 402 of the first region 41 is suppressed. Therefore, the shape of the deposition layer 125 can be made closer to an ideal shape.

[0177] After the deposition process, a separation process is performed to separate the substrate 110 from the mask 20. Fig. 26 is a cross-sectional view showing an example of the separation process. In the separation process, the substrate 110 is separated from the mask 20 by moving the substrate 110 relative to the mask 20. The separation process may include a step of moving the magnet 5 shown in Fig. 2 away from the mask 20. The reduction in magnetic force makes it easier to separate the mask 20 from the substrate 110.

[0178] The first arithmetic mean roughness Ra1 of the second surface 402 of the first region 41 is larger than the second arithmetic mean roughness Ra2 of the second surface 402 of the second region 42. Therefore, as shown in Fig. 26, in the separation step, the first region 41 is separated from the substrate 110 before the second region 42. Since the stress applied to the first region 41 is reduced, damage to the first region 41 is suppressed.

[0179] FIG. 27 is a cross-sectional view showing a separation process in a comparative example. In the comparative example, the surface roughness of the first region 41 of the mask 20 is smaller than that of the second region 42. As a result, the adhesion of the first region 41 to the substrate 110 is greater than that of the second region 42. In this case, as shown in FIG. 27, the second region 42 may be separated from the substrate 110 before the first region 41 during the separation process. A large stress is applied to the portion of the first region 41 that remains in contact with the substrate 110 until the end of the separation process. Therefore, damage to the first region 41 is likely to occur. Damage may also occur in the deposition layer 125 that is in contact with or near the first region 41.

[0180] On the other hand, in this embodiment, the first region 41 is separated from the substrate 110 before the second region 42, so damage to the first region 41 and the deposition layer 125 is suppressed.

[0181] The above-described embodiment can be modified in various ways. Below, modified examples will be described with reference to the drawings as necessary. In the following description and the drawings used in the following description, parts that can be configured similarly to the above-described embodiment will be designated by the same reference numerals as those used for corresponding parts in the above-described embodiment. Duplicate descriptions will be omitted. Furthermore, if it is clear that the effects obtained in the above-described embodiment can also be obtained in modified examples, the description of those effects may be omitted.

[0182] 28 is a cross-sectional view showing an example of a mask 20 in a first modified example. The second regions 42, such as the 21st region 421 and the 24th region 424, may include an insulating layer 55. Although not shown, the 22nd region 422 and the 23rd region 423 may also include an insulating layer 55. The insulating layer 55 located in the second region 42 is also referred to as a frame portion 571.

[0183] 29 is a cross-sectional view showing an example of a portion of the mask 20 corresponding to the 21st region 421 of the mask layer 40. The 21st region 421 may include a frame portion 571 of the insulating layer 55 and a metal layer 50 that overlaps the inner region 36 in a plan view. An intermediate layer 60 may be located between the substrate 30 and a portion of the metal layer 50 and the frame portion 571.

[0184] 29 , the second metal surface 502 of the metal layer 50 and the second insulating surface 552 of the frame portion 571 may be located on the same plane. For example, at the boundary between the metal layer 50 and the frame portion 571, the step between the second metal surface 502 and the second insulating surface 552 may be 1.0 μm or less.

[0185] The thickness T3 of the insulating layer 55 is, for example, 25.0 μm or less, may be 10.0 μm or less, or may be 5.0 μm or less. The thickness T3 of the insulating layer 55 is, for example, 0.5 μm or more, may be 1.0 μm or more, or may be 2.0 μm or more. The thickness T3 of the insulating layer 55 may be the same as the thickness T4 of the metal layer 50. For example, the difference between the thicknesses T3 and T4 may be 1.0 μm or less.

[0186] As shown in FIG. 29 , the insulating wall surface 572 of the frame portion 571 may be in contact with the metal outer wall surface 52 of the metal layer 50. In this case, the insulating wall surface 572 has a shape corresponding to the metal outer wall surface 52. For example, the sum of the angles θ2 and θ3 may be 180°. The angle θ2 is the angle between the metal outer wall surface 52 and the metal second surface 502. The angle θ3 is the angle between the insulating wall surface 572 and the insulating second surface 552. The metal outer wall surface 52 may overlap the substrate 30 in a plan view. In other words, the metal outer wall surface 52 does not have to overlap the first opening 31 in a plan view.

[0187] The angle θ2 is, for example, 50° or more, may be 55° or more, or may be 60° or more. The angle θ2 is, for example, less than 90°, may be 85° or less, or may be 80° or less.

[0188] The angle θ3 is, for example, greater than 90°, and may be 95° or greater, or 100° or greater. The angle θ3 is, for example, 130° or less, or 125° or less, or 120° or less.

[0189] The insulating layer 55 is made of an insulating material, such as a silicon compound, which is an insulating material such as silicon oxide.

[0190] A method for manufacturing the mask 20 in the first modified example will be described. As in the above-described embodiment, a substrate preparation step, an intermediate layer formation step, and an insulating layer formation step are performed. In the insulating layer formation step, the insulating layer 55 may be formed by chemical vapor deposition. The insulating layer formation step may include an insulating layer processing step in which the insulating layer 55 is processed.

[0191] 30A and 30B are cross-sectional and plan views showing a processed insulating layer 55. The insulating layer processing step may form multiple insulating openings 56 in the insulating layer 55. The multiple insulating openings 56 may be aligned in the first direction D1 and the second direction D2. In a plan view, the multiple insulating openings 56 have outlines corresponding to the metal layer 50 located in the first region 41. As shown in FIG. 30B , the outline of the insulating openings 56 may be rectangular. Although not shown, the corners of the outline of the insulating openings 56 may be rounded. The outline of the insulating openings 56 may have other shapes, such as a circle. The insulating openings 56 are configured so that the outline of the insulating openings 56 surrounds the outline of the first opening 31, which will be formed in a later step. The shape of the outline of the insulating openings 56 may be similar to the shape of the outline of the first opening 31.

[0192] The insulating layer 55 includes a frame portion 571 that defines the outline of the insulating opening 56. The frame portion 571 includes an insulating wall surface 572 that faces the insulating opening 56. The insulating layer 55 also includes a plurality of island portions 573 that are surrounded by the insulating opening 56 in a plan view. The above-mentioned second openings 43 of the mask 20 are formed at the positions of the island portions 573.

[0193] There are no particular limitations on the method for processing the insulating layer 55. For example, the insulating layer 55 may be processed by dry etching using an etching gas. The dry etching may be reactive ion etching.

[0194] 31 , a metal layer forming step is performed to form a metal layer 50. In this modification, the metal layer 50 is formed in the gaps 574 between the island portions 573 in the insulating opening 56. If the metal layer forming step includes an electrolytic plating step, holes, notches, etc. for supplying current to the seed layer 62 may be formed in the frame portion 571 of the insulating layer 55.

[0195] Subsequently, a polishing step may be performed, which polishes the portion of the metal layer 50 located above the insulating second surface 552 of the insulating layer 55. Figure 32 is a cross-sectional view showing the polished metal layer 50.

[0196] The polishing process may be adjusted so that the surface roughness of the second metal surface 502 of the metal layer 50 constituting the first region 41 is greater than the surface roughness of the second insulating surface 552 of the insulating layer 55 constituting the second region 42. The metal layer 50 formed in the gaps 574 between the plurality of island portions 573 constitutes the first region 41. The frame portion 571 of the insulating layer 55 constitutes the 21st region 421, the 22nd region 422, the 23rd region 423, and the 24th region 424 of the second region 42.

[0197] Subsequently, an insulating layer removing step is performed to remove a portion of the insulating layer 55. In the insulating layer removing step, a protective layer 71 may be formed to cover a frame portion 571 of the insulating layer 55, as shown in Fig. 33 . The protective layer 71 may not cover the plurality of island portions 573. The protective layer 71 may not cover the metal layer 50 surrounding the plurality of island portions 573.

[0198] In the insulating layer removing step, an etching solution such as a buffered hydrofluoric acid solution is supplied toward the insulating layer 55. As a result, a plurality of island portions 573 that are not covered by the protective layer 71 are removed. After the island portions 573 are removed, a step of removing the protective layer 71 may be performed.

[0199] Subsequently, the substrate processing step, resist removal step, protective layer removal step, and intermediate layer removal step are carried out in the same manner as in the above-described embodiment, resulting in the mask 20 shown in FIG.

[0200] In this modification, the second surface 402 of the first region 41 of the mask layer 40 also has a first arithmetic mean roughness Ra1 of 50 nm or less and a first maximum height Sz1 of 1000 nm or less. Since the gap between the second surface 402 and the first surface 111 is reduced, the amount of shadow is reduced.

[0201] In this modification, the ratio Sa1 / Ra1 of the first arithmetic mean roughness Sa1 to the first arithmetic mean roughness Ra1 on the second surface 402 of the first region 41 of the mask layer 40 is also 1.82 or less. By reducing Sa1 / Ra1, the variation in the surface roughness of the second surface 402 in the in-plane direction of the second surface 402 of the first region 41 is suppressed. Therefore, the shape of the deposition layer 125 can be made closer to the ideal shape.

[0202] 34 is a cross-sectional view showing an example of a mask 20 according to a second modification. The thickness T12 of the inner region 36 of the substrate 30 may be smaller than the thickness T11 of the outer region 35.

[0203] The thickness T12 is, for example, 10 μm or more, may be 30 μm or more, or may be 50 μm or more. The thickness T12 is, for example, 300 μm or less, may be 200 μm or less, or may be 100 μm or less.

[0204] The ratio T12 / T11 of the thickness T12 to the thickness T11 is, for example, 0.01 or more, or may be 0.10 or more, or may be 0.20 or more. The ratio T12 / T11 is, for example, 0.90 or less, or may be 0.70 or less, or may be 0.50 or less.

[0205] 35 is a cross-sectional view showing an example of a mask 20 in a third modified example. The base material 30 may not include a portion located between two adjacent first regions 41 in a plan view. In other words, the 21st region 421, the 22nd region 422, and the 23rd region 423 of the second region 42 may not be supported by the base material 30. The 24th region 424 of the second region 42 may be supported by the outer region 35 of the base material 30.

[0206] (Fourth Modification) Fig. 36 is a diagram showing an example of an apparatus 200 including the device 100. The apparatus 200 includes a substrate 110 and a vapor deposition layer such as an organic layer 130. The vapor deposition layer is a layer formed by a vapor deposition method using a mask 20. The apparatus 200 is, for example, a smartphone. The apparatus 200 may also be a tablet terminal, a wearable terminal, or the like. The wearable terminal may be smart glasses, a head-mounted display, or the like.

[0207] It is also possible to combine the multiple components disclosed in the above-described embodiments and modifications as needed, or to delete some of the components disclosed in the above-described embodiments and modifications.

[0208] Next, the present disclosure will be described in more detail with reference to examples. However, the present disclosure is not limited to the following examples as long as it does not depart from the gist of the disclosure.

[0209] Example 1 A silicon wafer was prepared as the substrate 30. The dimension S1 of the substrate 30 in a plan view was 150 mm. The thickness T11 of the substrate 30 was 625 μm.

[0210] The mask 20 was fabricated based on the method shown in Figures 15 to 23. The first region 41 and the second region 42 of the mask layer 40 included a metal layer 50 containing nickel. The metal layer 50 was formed by an electrolytic plating process. The thickness of the metal layer 50 was 4.0 µm. The dimensions R1 and R2 of the second opening 43 of the mask layer 40 were 5.5 µm and 3.3 µm.

[0211] In the polishing step, a slurry containing abrasive grains containing alumina was used. The material of the polishing pad was polyurethane. The conditions of the polishing step in Example 1 were adjusted so that both the first arithmetic mean roughness Ra1 and the second arithmetic mean roughness Ra2 were 10 nm or less.

[0212] The first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, and the first maximum height Sz1 of the first region 41 of the mask layer 40, and the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, and the second maximum height Sz2 of the second region 42 were calculated. Specifically, the arithmetic mean roughness Ra, the arithmetic mean roughness Sa, and the maximum height Sz were measured using a laser microscope at 25 locations on the second surface 402 of the first region 41 and at 25 locations in the 21st region 421 of the second region 42.

[0213] The laser microscopes used were VK-X250 and VK-X260 manufactured by Keyence Corporation. The conditions and settings of the laser microscope were as follows: Laser light: blue (wavelength 408 nm) Objective lens when measuring the first region 41: 150x Objective lens when measuring the second region 42: 50x Optical zoom: 1.0x Measurement mode: single screen Resolution: 1024 x 768 Measurement quality: high precision Double scan: enabled Waviness removal: enabled Height level cut: enabled

[0214] In measuring the arithmetic mean roughness Sa and the maximum height Sz, data on the surface height of the second surface 402 is acquired at each position within the rectangle Ms shown in Fig. 14. Since the resolution is 1024 x 768, the number of data items is 786,432.

[0215] FIG. 37 is a table showing the measurement results of the arithmetic mean roughness Ra, arithmetic mean roughness Sa, and maximum height Sz at 25 locations in the first region 41. At each of the 25 locations, the arithmetic mean roughness Ra in the x direction Dx, the arithmetic mean roughness Ra in the y direction Dy, the arithmetic mean roughness Sa, and the maximum height Sz were measured. The first arithmetic mean roughness Ra1 is the average of 50 measured arithmetic mean roughness Ra values. The first arithmetic mean roughness Ra1 was 6.16 nm. The deviation between the arithmetic mean roughness Ra in the x direction Dx and the arithmetic mean roughness Ra in the y direction Dy was 0.06. The first arithmetic mean roughness Sa1 was 8.06 nm. The first maximum height Sz1 was 149.0 nm.

[0216] 38 is a table showing the measurement results of the arithmetic mean roughness Ra, arithmetic mean roughness Sa, and maximum height Sz at 25 locations in the second region 42. At each of the 25 locations, the arithmetic mean roughness Ra in the x direction Dx, the arithmetic mean roughness Ra in the y direction Dy, the arithmetic mean roughness Sa, and the maximum height Sz were measured. The second arithmetic mean roughness Ra2 is the average of 50 measured arithmetic mean roughness Ra values. The second arithmetic mean roughness Ra2 was 3.99 nm. The deviation between the arithmetic mean roughness Ra in the x direction Dx and the arithmetic mean roughness Ra in the y direction Dy was 0.25. The second arithmetic mean roughness Sa2 was 4.48 nm. The second maximum height Sz2 was 490.5 nm.

[0217] The first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, the first maximum height Sz1, Sa1 / Ra1, the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, the second maximum height Sz2, and Sa2 / Ra2 in Example 1 are summarized in the table of FIG. 39.

[0218] Evaluation 1 regarding the performance of the mask 20 was carried out.

[0219] [Rating 1]

[0220] A deposition process was carried out to form a deposition layer on the substrate 110 using the mask 20. The deposition material was tris(8-quinolinolato)aluminum. The target thickness of the deposition layer was 50 nm. In the deposition process, the mask 20 was attracted to the substrate 110 using a magnet 5.

[0221] Images of the substrate on which multiple deposition layers were formed were obtained using an optical microscope. Three observers visually checked whether the contours of the deposition layers appeared blurred. An Olympus MX63 optical microscope was used. The optical microscope conditions and settings were as follows: Eyepiece: 10x magnification; Objective: 50x magnification.

[0222] If all three observers judged that the outline of the deposited layer was not blurred, the result of Evaluation 1 was judged as "OK." If at least one of the three observers judged that the outline of the deposited layer was blurred, the result of Evaluation 1 was judged as "NG."

[0223] Fig. 40 shows an example of images of a plurality of deposition layers for which the result of Evaluation 1 was determined to be "OK". Fig. 41 shows an example of images of a plurality of deposition layers for which the result of Evaluation 1 was determined to be "NG".

[0224] 15 to 23. In the polishing step, a slurry containing abrasive grains containing alumina and a polishing pad made of polyurethane were used, as in Example 1. In Examples 1 to 7, the rotation speed and pressure of the polishing step, as well as the polishing time, were different from one another.

[0225] As in Example 1, the first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, and the first maximum height Sz1 of the first region 41, and the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, and the second maximum height Sz2 of the second region 42 were calculated. As in Example 1, Evaluation 1 was performed. The results of Examples 2 to 7 are shown in the table of FIG.

[0226] (Examples 8 to 10) As in Example 1, masks 20 were fabricated based on the method shown in Figures 15 to 23. Metal layer 50 was formed by an electrolytic plating process. A higher current density was used in the electrolytic plating process than in Example 1. In Examples 8 to 10, the current densities in the electrolytic plating process were different from each other.

[0227] A slurry containing abrasive grains containing alumina and a polishing pad made of polyurethane were used in the polishing process of Examples 8 to 10. The rotation speed, pressure, and polishing time of the polishing process were the same as those of Example 1.

[0228] As in Example 1, the first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, and the first maximum height Sz1 of the first region 41, and the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, and the second maximum height Sz2 of the second region 42 were calculated. As in Example 1, Evaluation 1 was performed. The results of Examples 8 to 10 are shown in the table of FIG.

[0229] Example 11 As in Example 1, a mask 20 was fabricated based on the method shown in Figures 15 to 23. The metal layer 50 was formed by an electrolytic plating process. A current density higher than that in Example 1 was employed in the electrolytic plating process.

[0230] A slurry containing abrasive grains containing alumina and a polishing pad made of polyurethane were used in the polishing process of Example 11. The size of the alumina abrasive grains in the slurry used in Example 11 was larger than that in Example 1.

[0231] As in Example 1, the first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, and the first maximum height Sz1 of the first region 41, and the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, and the second maximum height Sz2 of the second region 42 were calculated. As in Example 1, Evaluation 1 was performed. The results of Example 11 are shown in the table of FIG.

[0232] As shown in Figure 39, in Examples 1 to 6 and 8 to 9, the first arithmetic mean roughness Ra1 was 50 nm or less, the first maximum height Sz1 was 1000 nm or less, and Sa1 / Ra1 was 1.82 or less. In Examples 1 to 6 and 8 to 9, the result of Evaluation 1 was "OK". In Example 7, the first arithmetic mean roughness Ra1 was greater than 50 nm. In Example 10, Sa1 / Ra1 was greater than 1.82. In Example 11, the first maximum height Sz1 was greater than 1000 nm. In Examples 7 and 10 to 11, the result of Evaluation 1 was "NG".

Claims

1. A mask comprising: a substrate including a substrate first surface, a substrate second surface located opposite to the substrate first surface, and at least one first opening penetrating from the substrate first surface to the substrate second surface; and a mask layer including a first surface facing the substrate second surface and a second surface located opposite to the first surface, wherein the mask layer includes a plurality of first regions overlapping the first openings in a plan view, and a second region located between the plurality of first regions and outside the plurality of first regions in a plan view, each of the plurality of first regions including a plurality of second openings penetrating from the first surface to the second surface, wherein the second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness, and a first arithmetic mean roughness (Sa1) and a first maximum height (Sz1) related to surface roughness, wherein the first arithmetic mean roughness (Ra1) is 50 nm or less, the first maximum height (Sz1) is 1000 nm or less; and a ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), Sa1 / Ra1, is 1.82 or less.

2. The mask of claim 1, wherein the second surface of the second region has a second arithmetic mean roughness (Ra2) for line roughness, and the first arithmetic mean roughness (Ra1) is different from the second arithmetic mean roughness (Ra2).

3. The mask of claim 2, wherein the first arithmetic mean roughness (Ra1) is greater than the second arithmetic mean roughness (Ra2).

4. The mask of claim 1, wherein the second surface of the second region has a second arithmetic mean roughness (Sa2) related to surface roughness, and the first arithmetic mean roughness (Sa1) is different from the second arithmetic mean roughness (Sa2).

5. The mask according to claim 4, wherein the first arithmetic mean roughness (Sa1) is greater than the second arithmetic mean roughness (Sa2).

6. The mask of claim 1, wherein the second surface of the second region has a second maximum height (Sz2) related to surface roughness, and the first maximum height (Sz1) is different from the second maximum height (Sz2).

7. The mask of claim 6, wherein the first maximum height (Sz1) is smaller than the second maximum height (Sz2).

8. The mask described in any one of claims 1 to 7, wherein an in-plane direction of the second surface includes an x ​​direction and a y direction perpendicular to the x direction, the first arithmetic mean roughness (Ra1) is an average of an arithmetic mean roughness of the second surface of the first region in the x direction and an arithmetic mean roughness of the second surface of the first region in the y direction, and a ratio of a difference between the arithmetic mean roughness of the second surface of the first region in the x direction and the arithmetic mean roughness of the second surface of the first region in the y direction to the first arithmetic mean roughness (Ra1) is 0.50 or less.

9. The mask of any one of claims 1 to 7, wherein the first region comprises a metal layer.

10. The mask of claim 9, wherein the second region comprises a metal layer.

11. The mask of claim 9, wherein the second region comprises an insulating layer.

12. The mask of claim 11, wherein the insulating layer comprises silicon oxide.

13. The mask of any one of claims 1 to 7, further comprising an intermediate layer located between the mask layer and the substrate, the intermediate layer comprising a metal.

14. The mask of any one of claims 1 to 4, wherein the substrate comprises silicon or a silicon compound.

15. A method for manufacturing a mask, comprising: a substrate preparation step of preparing a substrate including a substrate first surface and a substrate second surface located opposite to the substrate first surface; an insulating layer formation step of forming an insulating layer including an insulating first surface facing the substrate second surface and an insulating second surface located opposite to the insulating first surface, the insulating layer including at least a plurality of island portions; a metal layer formation step of forming a metal layer between the plurality of island portions, the metal layer including a metal first surface facing the substrate second surface and a metal second surface located opposite to the metal first surface; a polishing step of polishing the metal second surface; an insulating layer removal step of removing the plurality of island portions; and a substrate processing step of forming a first opening in the substrate that overlaps with the metal layer in a planar view, the mask comprising a mask layer including a plurality of first regions including the metal layer that overlap with the first openings in a planar view, and second regions including the metal layer or the insulating layer located between the plurality of first regions and outside the plurality of first regions in a planar view, a first surface facing the second surface of the substrate and a second surface located opposite the first surface, the second surface of the first region having a first arithmetic mean roughness (Ra1) related to line roughness, and a first arithmetic mean roughness (Sa1) and a first maximum height (Sz1) related to surface roughness, the first arithmetic mean roughness (Ra1) being 50 nm or less, the first maximum height (Sz1) being 1000 nm or less, and a ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), Sa1 / Ra1, being 1.82 or less.

16. The method of claim 15, wherein the polishing step includes a step of contacting the insulating second surface and the metallic second surface with a slurry containing a processing liquid and an abrasive grain.

17. The method for manufacturing a mask described in claim 16, wherein the second surface of the second region has a second arithmetic mean roughness (Ra2) related to line roughness, and the first arithmetic mean roughness (Ra1) is different from the second arithmetic mean roughness (Ra2).

18. The method for manufacturing a mask according to claim 17, wherein the first arithmetic mean roughness (Ra1) is greater than the second arithmetic mean roughness (Ra2).

19. A method for manufacturing a mask as described in any one of claims 15 to 18, wherein in the metal layer forming process, the metal layer is also formed outside the plurality of island portions, and the second region includes the metal layer located outside the plurality of first regions.

20. A method for manufacturing a mask as described in any one of claims 15 to 18, wherein the insulating layer forming step forms the insulating layer including a frame portion defining the outlines of a plurality of insulating openings and a plurality of island portions located in each of the plurality of insulating openings, and the metal layer forming step forms the metal layer in the plurality of insulating openings.

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