Control method, inverter, photovoltaic system, and computer-readable storage medium

Abstract

The present disclosure provides a control method. The method comprises: (01) acquiring first phase shift angle information determined previously and second phase shift angle information determined currently, so as to, on the basis of the first phase shift angle information and the second phase shift angle information, determine an output state of a transformer; and, (02) when it is determined that the output state of the transformer is a preset state, controlling on the basis of the first phase shift angle information and the second phase shift angle information to determine the output of the transformer.

Description

Control method, inverter, photovoltaic system and computer-readable storage medium

[0001] Priority information

[0002] This disclosure claims priority to and benefits of patent application No. 202311693699X filed with the State Intellectual Property Office of China on December 6, 2023, and incorporates the entire text of the patent application herein by reference. Technical Field

[0003] Embodiments of the present disclosure relate to a control method, an inverter, a photovoltaic system, and a computer-readable storage medium. Background Art

[0004] Phase Shift Modulation (PSM) refers to a method that adjusts the waveform of an output signal by varying the phase difference between two signals. However, during PSM, output signal loss may occur. For example, if only a high-level signal or a low-level signal is present within a signal cycle, this can cause the output signal-driven current to increase abnormally, potentially damaging electronic components at the output.

[0005] Summary of the Invention

[0006] The present disclosure aims to solve at least one of the commonly encountered technical problems. To this end, the present disclosure provides a control method, an inverter, a photovoltaic system, and a computer-readable storage medium.

[0007] An embodiment of the present disclosure provides a control method for an inverter, wherein the inverter includes a transformer, wherein an input end of the transformer is connected to a primary photovoltaic module, and an output end of the transformer is connected to a secondary power grid. The input end and the output end each include multiple bridge arms. The inverter is capable of determining phase shift angle information corresponding to the multiple bridge arms to control the output of the transformer. The method includes:

[0008] Acquire the first phase shift angle information determined previously and the second phase shift angle information determined currently, so as to determine the output state of the transformer according to the first phase shift angle information and the second phase shift angle information;

[0009] When the output state of the transformer is a preset state, the output of the transformer is controlled according to the first phase shift angle information and the second phase shift angle information.

[0010] In the control method provided by the embodiments of the present disclosure, the inverter can obtain the first phase shift angle information determined previously and the second phase shift angle information determined currently, determine the transformer output state based on the first phase shift angle information and the second phase shift angle information, and when the transformer output state is determined to be a preset state, control the transformer output based on the first phase shift angle information and the second phase shift angle information. In this way, when controlling the transformer output, the inverter of the embodiments of the present disclosure can take into account the transformer output state affected by the change in the phase shift angle during the phase shift modulation process, thereby avoiding signal loss caused by the change in the phase shift angle to a certain extent. As a result, the inverter output or transformer output can be maintained stable to a certain extent, the inverter output quality is guaranteed, and the electronic devices at the inverter output end or transformer output end can operate stably and safely.

[0011] In certain embodiments of the present disclosure, the method further comprises:

[0012] When the analog output signal corresponding to the second phase shift angle information meets the preset conditions, the transformer output state is determined to be the preset state, wherein, when the analog output signal meets the preset conditions, the first duration of the first type of signal in the analog output signal exceeds the first preset target duration corresponding to the first type of signal, or the second duration of the second type of signal exceeds the second preset target duration corresponding to the second type of signal.

[0013] In this way, the embodiment of the present disclosure enables the inverter to confirm that the transformer output state is the preset state when the simulated output signal corresponding to the second phase shift angle information meets the preset conditions, that is, when it is simulated that in the output signal generated without considering the first phase shift angle information, the first duration of the first type of signal exceeds the corresponding first preset target duration, or the second duration of the second type of signal exceeds the corresponding second preset target duration, or in other words, there is a signal loss in the output signal generated without considering the first phase shift angle information. The inverter can control the output of the inverter according to the first phase shift angle information and the second phase shift angle information, thereby ensuring the rationality and reliability of its own output.

[0014] In certain embodiments of the present disclosure, obtaining the previously determined first phase shift angle information and the currently determined second phase shift angle information, so as to determine the transformer output state according to the first phase shift angle information and the second phase shift angle information, includes:

[0015] The transformer output state is determined according to the first phase shift angle information and the second phase shift angle information, and predetermined counting comparison information and signal period information.

[0016] In this way, the embodiment of the present disclosure enables the inverter to determine the transformer output state based on the first phase shift angle information determined last time, the second phase shift angle information determined currently, and the counting comparison information and signal period information that can be used to determine the high and low level signals, thereby controlling the output of the inverter, so that the output of the transformer can take into account the phase shift angle change and the signal generation caused by the phase shift angle change, and thus, to a certain extent, the signal loss caused by the phase shift angle change can be reliably avoided.

[0017] In certain embodiments of the present disclosure, the signal period information includes preset time base count information, and when the output state of the transformer is a preset state, controlling the output of the transformer according to the first phase shift angle information and the second phase shift angle information includes:

[0018] When the counting comparison information or the preset time base counting information is within a preset range, the transformer output state is confirmed to be a preset state, and the output of the transformer is controlled according to the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information, wherein the preset range is determined according to the first phase shift angle information and the second phase shift angle information.

[0019] In this way, the inverter of the embodiment of the present disclosure can determine that the transformer output state is a damaged state when the counting comparison information or the preset time base counting information is within a preset range, thereby determining that a signal loss situation may occur, and then executing the output control of the transformer, which can reliably avoid or improve the negative impact of the signal loss situation to a certain extent, and the inverter and transformer can stably output signals or currents.

[0020] In certain embodiments of the present disclosure, confirming that the transformer output state is a preset state when the count comparison information or the preset time base count information is within a preset range, and controlling the output of the transformer according to the first phase shift angle information, the second phase shift angle information, the count comparison information, and the signal period information, includes:

[0021] confirming that the transformer output state is a preset state when the count comparison information or the preset time base count information is within a preset range, and determining lost signal type information based on the first phase shift angle information, the second phase shift angle information, the count comparison information, and the signal period information;

[0022] The output of the transformer is controlled according to the lost signal type information.

[0023] In this way, the inverter of the embodiment of the present disclosure can confirm that the transformer output state is a preset state when the counting comparison information or the preset time base counting information is within a preset range, and then determine the lost signal type information according to the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information, and control the transformer output according to the lost signal type information. For example, when it is determined that the lost signal type information is a high level, the transformer is controlled to output a high-level signal, thereby avoiding signal loss.

[0024] In certain embodiments of the present disclosure, the transformer includes a preset first signal setting device, and controlling the output of the transformer according to the lost signal type information includes:

[0025] In response to the triggering of the synchronization signal, the first signal setting device generates a signal of a type corresponding to the lost signal type information to determine the output of the transformer.

[0026] In this way, the inverter of the embodiment of the present disclosure can generate a corresponding type of signal when the synchronization signal is triggered according to the first signal setting device and the determined lost signal type information during the signal generation process of the transformer, thereby avoiding the occurrence of signal loss and enabling the signal output of the inverter and transformer to be controlled in a timely manner.

[0027] In certain embodiments of the present disclosure, the inverter includes a pre-set second signal setting device, the transformer is connected to the secondary power grid through the second signal setting device, and controlling the output of the transformer according to the lost signal type information includes:

[0028] The original output signal of the transformer is adjusted according to the second signal setting device, so that the adjusted original output signal includes a signal of a type corresponding to the lost signal type information.

[0029] In this way, the inverter of the embodiment of the present disclosure can generate a signal of a type corresponding to the lost signal type information in the original output signal according to the second signal setting device, the original output signal and the lost signal type information when generating the original output signal, so that the high-level signal or low-level signal lost in the original output signal can be compensated, thereby avoiding the signal loss in the output signal of the transformer and ensuring the output quality of the inverter.

[0030] In certain embodiments of the present disclosure, when the preset time base count information is within the preset range and the preset time base count information satisfies the first phase shift angle information, the lost signal type information is the first signal type.

[0031] In certain embodiments of the present disclosure, when the count comparison information is within the preset range and the count comparison information satisfies the first phase shift angle information, the lost signal type information is the second signal type.

[0032] In certain embodiments of the present disclosure, when the count comparison information is within the preset range and the count comparison information satisfies the second phase shift angle information, the lost signal type information is the first signal type.

[0033] An embodiment of the present disclosure provides an inverter, including a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the above-mentioned control method is implemented.

[0034] An embodiment of the present disclosure provides a photovoltaic system including the inverter described above.

[0035] An embodiment of the present disclosure provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program. When the computer program is executed by one or more processors, the above-mentioned control method is implemented.

[0036] The inverter, photovoltaic system and computer-readable storage medium provided in the embodiments of the present disclosure can obtain the first phase shift angle information determined last and the second phase shift angle information determined currently to determine the output state of the transformer during the phase shift modulation process, and control the transformer output based on the output state, such as controlling the transformer output signal or output current, so that the output of the inverter can take into account the transformer output state affected by the change in the phase shift angle during the phase shift modulation process, thereby avoiding signal loss caused by the change in the phase shift angle to a certain extent. Therefore, the inverter output or the transformer output can be maintained stable to a certain extent, the output quality of the inverter is guaranteed, and the electronic devices at the inverter output end or the transformer output end can operate stably and safely.

[0037] Additional aspects and advantages of the present disclosure will be given in part in the description that follows and, in part, will be obvious from the description that follows, or will be learned through practice of the present disclosure.

[0038] BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The above and / or additional aspects and advantages of the present disclosure will become apparent and readily understood from the description of the embodiments with reference to the following drawings, in which:

[0040] FIG1 is a schematic diagram of a phase shift modulation circuit;

[0041] FIG2 is a schematic diagram of signal waveforms of a phase-shift modulation circuit;

[0042] FIG3 is a waveform diagram corresponding to the phase shift modulation circuit;

[0043] FIG4 is a flow chart of a control method in certain embodiments of the present disclosure;

[0044] FIG5 is a flow chart of a control method in certain embodiments of the present disclosure;

[0045] FIG6 is a flow chart of a control method in certain embodiments of the present disclosure;

[0046] FIG7 is a schematic diagram of an application scenario in certain embodiments of the present disclosure;

[0047] FIG8 is a flow chart of a control method in certain embodiments of the present disclosure;

[0048] FIG9 is a schematic diagram of the circuit structure of a second signal setting device in certain embodiments of the present disclosure;

[0049] FIG10 is a schematic diagram of an application scenario in certain embodiments of the present disclosure. DETAILED DESCRIPTION

[0050] The following describes in detail embodiments of the present disclosure, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present disclosure, and should not be construed as limiting the present disclosure.

[0051] Phase Shift Modulation (PSM) refers to a method of adjusting the waveform of an output signal by changing the phase difference between two signals. For example, please refer to Figure 1, which is a schematic diagram of a phase shift modulation circuit. Specifically, Figure 1 shows the topology of a one-to-N micro-inverter, that is, a circuit structure in which N micro-inverters are connected to the same power grid. Among them, the primary side of the micro-inverter adopts an H-bridge circuit, the secondary side of the micro-inverter adopts a bidirectional switching circuit, and the transformer of the micro-inverter realizes boosting and isolation between the primary and secondary sides.

[0052] Furthermore, taking any micro-inverter in FIG1 as an example, the micro-inverter includes three bridge arms, namely, a primary leading bridge arm (corresponding to S1 and S2), a primary lagging bridge arm (corresponding to S3 and S4), and a secondary bridge arm (corresponding to S5, S6, S7 and S8).

[0053] Assume that the drive signal for transistor S1 is S_lead+, and that for transistor S2 is S_lead-. S4 is S_lag+, S2 is S_lag-, S5 and 6 are S_sec+, and S7 and 8 are S_sec-. Where S_lead+, S_lag+, and S_sec+ are all square waves with a 50% duty cycle, then the inner phase shift angle D1 is determined by the degree by which S_lag+ lags S_lean+, and the outer phase shift angle D2 is determined by the degree by which S_sec+ lags S_lead+.

[0054] To more clearly illustrate the inner phase shift angle D1 and the outer phase shift angle D2, please refer to Figure 2, which is a schematic diagram of signal waveforms of the phase shift modulation circuit. The three waveform signals from top to bottom in Figure 2 are S_lead+, S_lag+, and S_sec+, respectively.

[0055] In this way, the driving signal of one bridge arm can be used as a reference, and the phase shift value (or phase shift angle) of the driving signal of the other bridge arm can be set, thereby completing the setting of the inner phase shift angle D1 and the outer phase shift angle D2 to achieve phase shift control, such as assigning the inverter's time base counter CTR to the phase shift angle.

[0056] It is understood that the signal generation logic of the inverter is typically an output matching mechanism. That is, the time-base counter CTR continuously counts until the time-base counter CTR matches or is identical to a preset count comparison value CMP, generating a first type signal. The second type signal is generated when the time-base counter CTR matches or is identical to a preset period value PRD. The second type signal can be a low level signal when the first type signal is a high level signal, and can be a high level signal when the first type signal is a low level signal.

[0057] For example, please refer to FIG3. To more clearly illustrate the embodiment of the present disclosure, please refer to FIG3, which is a waveform diagram corresponding to the phase-shift modulation circuit. Specifically, the time base counter CTR1 corresponding to the reference waveform and the time base counter CTR2 corresponding to the phase-shift waveform are both based on sawtooth wave counting. When CTR1 and CTR2 count to CMP, they generate a high-level signal, and when CTR1 and CTR2 count to PRD, they generate a low-level signal. In addition, when CTR1 counts to the period value PRD, a synchronization signal is triggered. When the synchronization signal is triggered, the phase shift angle is assigned to CTR2. As a result, the phase-shift waveform (corresponding to the third column of the waveform in FIG6) differs from the reference waveform (corresponding to the second column of the waveform in FIG6) by the phase shift angle, thereby achieving a phase shift of the phase-shift waveform relative to the reference waveform.

[0058] It can be understood that in the waveform shown in Figure 3, the phase shift angle and the count comparison value CMP can be the same, and thus, the phase shift waveform is half a signal cycle later than the reference waveform. Furthermore, in the waveform corresponding to the counter, the sawtooth wave curve 102 corresponding to the phase shift waveform is half a signal cycle later than the sawtooth wave curve 101 corresponding to the reference waveform.

[0059] It's also understandable that because the primary output voltage may not be fixed, and due to the specific control strategy logic, the phase shift angle may need to change in real time. Therefore, each signal cycle includes a synchronization signal triggering moment. At this synchronization signal triggering moment, the inverter assigns the current phase shift angle to CTR2.

[0060] Furthermore, if the phase shift angle assigned to CTR2 is the same at the triggering moments of the two preceding and following synchronization signals, the signals in the two preceding and following signal cycles of the drive signal or the transformer output signal are the same, for example, the two preceding and following signal cycles both include half a cycle of high-level signals and half a cycle of low-level signals.

[0061] Conversely, if the phase shift angles assigned to CTR2 differ at the moment the two synchronization signals are triggered, this may result in a high-level signal or a low-level signal being present throughout a certain signal cycle, or in other words, a high-level signal or a low-level signal being missing or lost within a certain signal cycle. Furthermore, when the inverter generates the secondary inductor current based on the output signal or drive signal, the excitation time corresponding to one side of the secondary inductor current is too long, causing the secondary inductor current to increase abnormally. This, in turn, causes the inverter's secondary input current to increase abnormally, potentially triggering the overcurrent protection function of the inverter's protective tube, or even damaging the protective tube due to overcurrent, causing the inverter to malfunction.

[0062] Based on the above-mentioned problems that may be encountered, please refer to FIG4 . An embodiment of the present disclosure provides a control method for an inverter. The inverter includes a transformer. The input end of the transformer is connected to the primary photovoltaic module, and the output end of the transformer is connected to the secondary power grid. The input end and the output end each include multiple bridge arms. The inverter can determine the phase shift angle information corresponding to the multiple bridge arms to control the output of the transformer. Based on this, the control method provided by the embodiment of the present disclosure specifically includes:

[0063] 01: Acquire the first phase shift angle information determined previously and the second phase shift angle information determined currently, so as to determine the output state of the transformer according to the first phase shift angle information and the second phase shift angle information;

[0064] 02: When the transformer output state is a preset state, the output of the transformer is controlled according to the first phase shift angle information and the second phase shift angle information.

[0065] The embodiment of the present disclosure also provides a control device for an inverter, wherein the inverter includes a transformer, the input end of the transformer is connected to the primary photovoltaic module, the output end of the transformer is connected to the secondary power grid, the input end and the output end both include multiple bridge arms, and the inverter can determine the phase shift angle information corresponding to the multiple bridge arms to control the output of the transformer. The control method of the embodiment of the present disclosure can be implemented by the control device of the embodiment of the present disclosure. Specifically, the control device includes an acquisition module and a control module. The acquisition module is used to acquire the first phase shift angle information determined last time and the second phase shift angle information determined currently, so as to determine the output state of the transformer according to the first phase shift angle information and the second phase shift angle information. The control module is used to control the output of the transformer according to the first phase shift angle information and the second phase shift angle information when the output state of the transformer is a preset state.

[0066] The present disclosure also provides an inverter, comprising a memory and a processor. The control method of the present disclosure can be implemented by the inverter. Specifically, the memory stores a computer program, and the processor is configured to obtain previously determined first phase-shift angle information and currently determined second phase-shift angle information, thereby determining a transformer output state based on the first and second phase-shift angle information. When the transformer output state is a preset state, the processor controls the transformer output based on the first and second phase-shift angle information.

[0067] Specifically, during the phase shift modulation process, the inverter of the embodiment of the present disclosure can obtain the phase shift angles determined twice respectively, that is, the first phase shift angle information determined last time and the second phase shift angle information determined currently, and then determine the output state of the internal transformer according to the first phase shift angle information and the second phase shift angle information, and when the output state of the transformer is a preset state, control its own output according to the first phase shift angle information and the second phase shift angle information, such as controlling its own output signal or output current.

[0068] It is understood that the inverter in the embodiments of the present disclosure may refer to the aforementioned micro-inverter, or may refer to a centralized inverter, a string inverter, a distributed inverter, etc. In addition, the functions of the inverter in the embodiments of the present disclosure may also be set according to actual conditions. For example, in some embodiments, the inverter may convert DC power into AC power, or convert AC power into DC power, or convert one type of DC power into another type of DC power, or convert one type of AC power into another type of AC power through phase shift modulation. It is clear that the type and functions of the inverter in the embodiments of the present disclosure may be set according to actual conditions.

[0069] It is also understood that the inverter of the disclosed embodiments can also be understood as an inverter used in a photovoltaic system. The photovoltaic system can be a standalone photovoltaic power generation system, where the power generated by power generation components, such as photovoltaic panels, is converted by an inverter and then provided to a load. The photovoltaic system can also be a grid-connected photovoltaic power generation system, where the direct current (DC) generated by the power generation components is converted by an inverter into alternating current (AC), which is then fed into the power grid.

[0070] Further, referring again to Figure 1, the inverter according to the disclosed embodiment includes a transformer for changing voltage or current, with the transformer's input connected to the primary photovoltaic module and its output connected to the secondary power grid. Furthermore, both the transformer's input and output include multiple bridge arms. Consequently, the inverter according to the disclosed embodiment can control the voltage or current transmitted from the primary photovoltaic module to the secondary power grid via the transformer by determining or setting the inner and outer phase shift angles of the multiple bridge arms included in the transformer's input and output.

[0071] It is understandable that either the first phase shift angle information or the second phase shift angle information in the embodiment of the present disclosure may include a specific numerical value of the phase shift angle, and either the first phase shift angle information or the second phase shift angle information may be stored in a register of the inverter.

[0072] For example, in some embodiments, the inverter includes a DSP (digital signal processor), the DSP includes an EPWM (Enhanced Pulse Width Modulator), and a TBPHS register for storing a phase shift angle may be provided in the EPWM. Therefore, the first phase shift angle information and the second phase shift angle information may be stored in the TBPHS register.

[0073] It can also be understood that when the inverter of the embodiment of the present disclosure determines the second phase shift angle information, the inverter can subsequently complete the corresponding signal output based on the second phase shift angle information, or in other words, the inverter can complete the corresponding signal output based on the latest determined phase shift angle information.

[0074] For example, assuming that the phase shift angle information determined by the inverter in the first signal period is the first phase shift angle information, the phase shift angle information determined in the second signal period is the second phase shift angle information, and the phase shift angle information determined in the third signal period is the third phase shift angle information, then the signal within the first signal period can be controlled according to the first phase shift angle information, the aforementioned time base counter CTR, the count comparison value CMP and the period value PRD, the signal within the second signal period can be controlled according to the second phase shift angle information, the time base counter CTR, the count comparison value CMP and the period value PRD, and the signal within the third signal period can be controlled according to the third phase shift angle information, the time base counter CTR, the count comparison value CMP and the period value PRD.

[0075] Therefore, in certain embodiments, when the data stored in the aforementioned TBPHS register is the first phase shift angle information, if the inverter currently determines the second phase shift angle information, the second phase shift angle information can be assigned to the TBPHS register so that the data stored in the TBPHS register is updated to the second phase shift angle information. Furthermore, the inverter can obtain the latest determined phase shift angle information by reading the TBPHS register, and can complete the corresponding signal output based on the latest determined phase shift angle information.

[0076] It is also understood that, in the process of controlling its own output based on the first and second phase-shift angle information, the inverter according to the embodiments of the present disclosure may, based on the first and second phase-shift angle information, predict that its own transformer output may be abnormal, and then, based on a pre-set correction strategy or compensation strategy, change or adjust the transformer output to ensure that the transformer can produce a reasonable output. In other words, the inverter according to the embodiments of the present disclosure may determine the transformer output state based on the first and second phase-shift angle information, thereby determining whether the transformer may output an abnormal signal.

[0077] For example, in some embodiments, the inverter can determine, based on a pre-burned program, that when an output signal is generated by the first phase shift angle information in the previous signal cycle and an output signal is generated by the second phase shift angle information in the current signal cycle, and determine that the current signal cycle may always be a low-level signal, and thus determine that the transformer output state is a preset state. As a result, the inverter can generate a high-level signal of half a signal cycle in the current signal cycle through hardware and / or software, thereby completing the control or adjustment of the transformer output.

[0078] In summary, the inverter of the embodiment of the present disclosure can obtain the first phase shift angle information determined last and the second phase shift angle information determined currently to determine the output state of the transformer during the phase shift modulation process, and control the transformer output according to the output state, such as controlling the transformer output signal or output current, so that the output of the inverter can take into account the transformer output state affected by the change of the phase shift angle during the phase shift modulation process, thereby avoiding signal loss caused by the change of the phase shift angle to a certain extent. Therefore, the inverter output or the transformer output can maintain stability to a certain extent, the output quality of the inverter can be guaranteed, and the electronic devices at the inverter output end or the transformer output end can operate stably and safely.

[0079] Please refer to FIG5 . In certain embodiments of the present disclosure, step 01 includes:

[0080] 010: Determine the transformer output state according to the first phase shift angle information and the second phase shift angle information, and predetermined count comparison information and signal period information.

[0081] The acquisition module of the embodiment of the present disclosure is further configured to determine the output state of the transformer according to the first phase shift angle information and the second phase shift angle information, and predetermined counting comparison information and signal period information.

[0082] The processor of the embodiment of the present disclosure is further configured to determine a transformer output state based on the first phase shift angle information and the second phase shift angle information, and predetermined count comparison information and signal period information.

[0083] It is understandable that the count comparison information may include the aforementioned count comparison value CMP, and the signal period information may include the aforementioned period value PRD, and the value that the time-base counter CTR changes to when counting to the period value PRD, ie, 0.

[0084] Furthermore, it is understood that when the inverter generates an output signal, the time-base counter CTR may generate a corresponding high-level signal or a low-level signal when counting to the period value PRD or the count comparison value CMP. After the time-base counter CTR counts to the period value PRD to generate the corresponding level signal, the time-base counter CTR may restart counting from 0.

[0085] Therefore, the inverter can determine whether there is an abnormality in the output signal of the current signal cycle, based on the first phase shift angle information determined last time, the second phase shift angle information determined currently, and the counting comparison information and signal cycle information that can be used to generate high and low level signals. When the output signal and output current are generated in the previous signal cycle through the first phase shift angle information, counting comparison information and signal cycle information, and the output signal and output current are generated in the current signal cycle through the second phase shift angle information, counting comparison information and signal cycle information, such as whether there will be output signal loss in the current signal cycle, thereby determining whether the output state of the transformer is the preset state.

[0086] Exemplarily, since the signal generation logic of the inverter is usually an output matching mechanism, there is: in the previous signal cycle, the output signal generated by the first phase shift angle information, signal cycle information and count comparison information includes a high-level signal in the first half cycle and a low-level signal in the second half cycle, and in the current signal cycle, a high-level signal in the first half cycle has been generated. However, according to the second phase shift angle information, signal cycle information and count comparison information, it is determined that the signal generated at the current moment and / or the next moment is a high-level signal, or in other words, it is determined that the time base counter CTR does not match the period value PRD or the count comparison value CMP at the next moment, and thus the signal cannot be switched from a high-level signal to a low-level signal, so it is confirmed that the output state of the transformer is the preset state.

[0087] Furthermore, the inverter of the embodiment of the present disclosure can control the signal at the next moment to switch from a high-level signal to a low-level signal based on software and / or hardware, thereby avoiding the output signal loss phenomenon and improving or adjusting the output of the transformer.

[0088] In this way, the disclosed embodiment enables the inverter to determine the transformer output state based on the first phase shift angle information determined previously, the second phase shift angle information determined currently, and the counting comparison information and signal period information that can be used to determine the high and low level signals, thereby controlling the output of the inverter, so that the output of the transformer can take into account the phase shift angle change and the signal generation caused by the phase shift angle change, and further, to a certain extent, the signal loss caused by the phase shift angle change can be reliably avoided, and the electronic devices at the output end of the inverter can operate stably and safely.

[0089] In certain embodiments of the present disclosure, the control method further includes:

[0090] When the analog output signal corresponding to the second phase shift angle information meets the preset conditions, the transformer output state is determined to be the preset state, wherein, when the analog output signal meets the preset conditions, the first duration of the first type of signal in the analog output signal exceeds the first preset target duration corresponding to the first type of signal, or the second duration of the second type of signal exceeds the second preset target duration corresponding to the second type of signal.

[0091] The control device of the disclosed embodiment further includes a state determination module, wherein the state determination module is configured to determine that the transformer output state is a preset state when an analog output signal corresponding to the second phase shift angle information satisfies a preset condition, wherein, when the analog output signal satisfies the preset condition, a first duration of a first type of signal within the analog output signal exceeds a first preset target duration corresponding to the first type of signal, or a second duration of a second type of signal exceeds a second preset target duration corresponding to the second type of signal.

[0092] The processor of the embodiment of the present disclosure is also used to determine that the transformer output state is a preset state when the analog output signal corresponding to the second phase shift angle information meets the preset conditions, wherein, when the analog output signal meets the preset conditions, the first duration of the first type of signal in the analog output signal exceeds the first preset target duration corresponding to the first type of signal, or the second duration of the second type of signal exceeds the second preset target duration corresponding to the second type of signal.

[0093] Specifically, the inverter of the embodiment of the present disclosure can determine, based on prior knowledge, the situation where the corresponding signal is output only according to the second phase shift angle information without considering the first phase shift angle information. That is, based on the analog output signal generated by considering only the second phase shift angle information, determine whether the analog output signal meets the preset conditions, thereby determining that the transformer output state is the preset state.

[0094] It is understood that when the phase shift angle does not change, the duration of different types of signals within a signal cycle is usually fixed. For example, when the duty cycle is 50%, the duration of the high-level signal is half of a complete signal cycle, and the duration of the low-level signal is half of a complete signal cycle.

[0095] Therefore, if the duration of the high-level signal in the analog output signal is higher or lower than half of a complete signal cycle, or if the duration of the low-level signal is higher or lower than half of a complete signal cycle, it indicates that the output of the transformer is abnormal, and thus the transformer output state is confirmed to be the preset state.

[0096] It is understood that the analog output signal in the embodiments of the present disclosure may be a priori knowledge, and may not even be generated during the actual generation process of the inverter, but may simply be data or information pre-stored by the inverter. In certain embodiments, the inverter stores analog output signals corresponding to different phase shift angle information. The inverter can then read the corresponding analog output signal based on the second phase shift angle information to determine whether the analog output signal corresponding to the second phase shift angle information meets a preset condition, thereby determining whether the transformer output state is the preset state.

[0097] Specifically, the inverter of the embodiment of the present disclosure can be based on prior knowledge, that is, when the inverter generates a signal of the current signal cycle, it does not consider the first phase shift angle information determined last time, and only generates the output signal based on the second phase shift angle information currently determined. The output signal satisfies the preset conditions, or the analog output signal corresponding to the second phase shift angle information satisfies the preset conditions, thereby determining whether the transformer output state is a preset state, and then determining whether its own output can be controlled according to the first phase shift angle information and the second phase shift angle information.

[0098] It can be understood that the simulated output signal can be understood as a signal not output by the inverter, or a signal simulated by the inverter according to the second phase shift angle information before outputting the signal.

[0099] Alternatively, in some embodiments, the inverter can generate an output signal based on the phase shift angle in the TBPHS register, and can also update the TBPHS register with the new phase shift angle after determining the new phase shift angle. Therefore, the process of generating the analog output signal may include: in the previous signal cycle, the inverter generates the signal of the previous signal cycle based on the phase shift angle TBPHSpre stored in the TBPHS register, that is, the first phase shift angle information determined last time; in the current signal cycle, after determining the new phase shift angle TBPHSnow to obtain the second phase shift angle information, use TBPHSnow to overwrite the TBPHSpre stored in the TBPHS register, that is, use the second phase shift angle information to cover the first phase shift angle information in the TBPHS register, and the signal of the current signal cycle generated according to the overwritten TBPHS register; based on the signal of the previous signal cycle and the signal of the current signal cycle, obtain the analog output signal.

[0100] Furthermore, it is understood that during actual operation, the inverter according to the embodiments of the present disclosure may not generate an analog output signal. The analog output signal can be understood as predetermined a priori knowledge, and there may be multiple analog output signals, each of which can represent the output signal generated by the inverter with different phase shift angle information.

[0101] It is also understood that the first type signal and the second type signal can be understood as two signals with opposite levels. For example, in some embodiments, the first type signal refers to one of a high level signal and a low level signal, and the second type signal refers to the other of the high level signal and the low level signal.

[0102] It is also understood that within a signal cycle, the expected duration of the first type of signal can be understood as the first preset target duration, and the actual duration of the first type of signal can be understood as the first duration. For the second type of signal, within a signal cycle, the expected duration of the second type of signal can be understood as the second preset target duration, and the actual duration of the second type of signal can be understood as the second duration.

[0103] It is clear that both the first preset target duration and the second preset target duration can be set according to actual circumstances. For example, in some embodiments, if a user wishes to have the inverter control the transformer to generate a square wave with a 50% duty cycle, the first preset target duration and the second preset target duration are both half a signal period.

[0104] Furthermore, when the analog output signal meets the preset conditions, that is, when the first duration exceeds the first preset target duration, or the second duration is much higher than the second preset target duration, it indicates that after the inverter generates the signal of the current signal cycle without considering the second phase shift angle information, a first type signal or a second type signal is lost in the signal of the previous signal cycle and the signal of the current signal cycle, resulting in the duration of the second type signal or the first type signal exceeding the corresponding preset target duration.

[0105] Furthermore, when the analog output signal drives the corresponding current or voltage, the transformer's output current or voltage will abnormally increase, potentially damaging electronic components within the inverter or connected to the transformer's output terminals. Therefore, in the disclosed embodiments, when the analog output signal meets a preset condition, the transformer output state can be confirmed to be a preset state, and the inverter can be controlled based on the first and second phase shift angle information to avoid the aforementioned signal loss.

[0106] It can also be understood that the specific circumstances under which the analog output signal meets the preset conditions can be set according to actual conditions.

[0107] For example, in some embodiments of the present disclosure, the inverter satisfies the first scenario, and the first phase shift angle information in the first scenario includes the phase shift angle TBPHSpre determined by the inverter in the previous signal cycle, and the second phase shift angle information includes the phase shift angle TBPHSnow determined by the inverter in the current signal cycle. The time base counter CTR1 corresponding to the reference time base and the time base counter CTR2 corresponding to the phase shift time base in the inverter are both based on sawtooth wave counting. When CTR1 and CTR2 count the comparison value CMP, the inverter generates a high level. When CTR1 and CTR2 count to the period value PRD, CTR1 and CTR2 return to zero. When CTR1 and CTR2 count to P When RD is equal to or equal to 0, a low-level signal is generated, CMP is half of PRD, PRD is greater than 0, CTR1 triggers the synchronization signal when counting to 0, and CTR2 is assigned to TBPHSnow when the synchronization signal is triggered. Then: after the inverter determines TBPHSnow, in the analog output signal composed of the "previous signal cycle signal generated by TBPHSpre" and the "current signal cycle signal simulated by TBPHSnow", the duration of one of the low-level signal or the high-level signal is not less than at least one signal cycle, then the analog output signal meets the preset conditions, and it is confirmed that the transformer output state is the preset state.

[0108] In certain embodiments of the present disclosure, the inverter satisfies the second scenario, and the first phase shift angle information in the second scenario includes the phase shift angle TBPHSpre determined by the inverter in the previous signal cycle, and the second phase shift angle information includes the phase shift angle TBPHSnow determined by the inverter in the current signal cycle, CMP is half of PRD, PRD is greater than 0, the time base counter CTR1 corresponding to the reference time base and the time base counter CTR2 corresponding to the phase shift time base are both based on sawtooth wave counting, and the inverter generates a high level when CTR1 and CTR2 count to a "first value CMPup higher than CMP", and generates a low level when CTR1 and CTR2 count to a "second value CMPdown lower than CMP", and CTR1 And CTR2 returns to zero when counting to PRD, CTR1 triggers the synchronization signal when counting to 0, and CTR2 is assigned to TBPHSnow when the synchronization signal is triggered. Then: after the inverter determines TBPHSnow, in the analog output signal composed of the "current signal cycle signal simulated by TBPHSnow", the signal is a low-level signal when CTR2 is greater than CMPup, or the signal is a high-level signal when CTR2 is less than CMPdowm, that is, when the situation contradicts "a high level is generated when CTR2 is greater than CMPup, and a low level is generated when CTR2 is less than CMPup", the analog output signal meets the preset conditions, confirming that the transformer output state is the preset state.

[0109] In this way, the embodiment of the present disclosure enables the inverter to confirm that the transformer output state is the preset state when the simulated output signal corresponding to the second phase shift angle information meets the preset conditions, that is, when it is simulated that in the output signal generated without considering the first phase shift angle information, the first duration of the first type of signal exceeds the corresponding first preset target duration, or the second duration of the second type of signal exceeds the corresponding second preset target duration, or in other words, there is a signal loss in the output signal generated without considering the first phase shift angle information. The inverter can control the output of the inverter according to the first phase shift angle information and the second phase shift angle information, thereby ensuring the rationality and reliability of its own output.

[0110] Not only that, the inverter of the embodiment of the present disclosure can also determine that a wave compensation operation can be performed when the analog output signal meets the preset conditions, that is, when it is determined that "there is signal loss in the output signal generated without considering the first phase shift angle information", thereby laying the foundation for the subsequent wave compensation operation.

[0111] Please refer to FIG6 . In certain embodiments of the present disclosure, the signal period information includes preset time base counting information. Then, step 02 includes:

[0112] 020: Confirm that the transformer output state is a preset state when the counting comparison information or the preset time base counting information is within a preset range, and control the output of the transformer according to the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information, wherein the preset range is determined according to the first phase shift angle information and the second phase shift angle information.

[0113] The control module of the embodiment of the present disclosure is also used to confirm that the output state of the transformer is a preset state when the counting comparison information or the preset time base counting information is within a preset range, and to control the output of the transformer according to the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information, wherein the preset range is determined based on the first phase shift angle information and the second phase shift angle information.

[0114] The processor of the embodiment of the present disclosure is also used to confirm that the output state of the transformer is a preset state when the counting comparison information or the preset time base counting information is within a preset range, and to control the output of the transformer according to the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information, wherein the preset range is determined based on the first phase shift angle information and the second phase shift angle information.

[0115] It can be understood that the preset time base counting information in the embodiments of the present disclosure can be understood as the value to which the aforementioned time base counters CTR2 and CTR1 change when counting to the period value PRD. In some embodiments, the time base counters CTR2 and CTR1 return to zero when counting to the period value PRD, so the preset time base counting information is 0.

[0116] It is also understood that the inverter according to the embodiment of the present disclosure may change the time base counter CTR2 corresponding to the phase shift signal (or output signal) according to the second phase shift angle information when the second phase shift angle information is determined.

[0117] To more clearly illustrate the embodiments of the present disclosure, please refer to FIG7 , which is a schematic diagram of an application scenario in certain embodiments of the present disclosure.

[0118] Specifically, in the scenario shown in Figure 7, the time base counter CTR1 corresponding to the reference time base and the time base counter CTR2 corresponding to the phase-shifted time base are both based on sawtooth wave counting. When CTR1 is 0, the synchronization signal is triggered, and the count comparison value CMP is half of the period value PRD, so that each signal period includes a square wave with a 50% duty cycle.

[0119] It is understood that when CTR1 and CTR2 count to CMP, they generate a high-level signal. For example, in the waveform diagram in the first column of FIG7 , when the first counter curve 201 intersects the horizontal dashed line, it indicates that CTR1 and CTR2 have counted to CMP, and thus the reference waveform (corresponding to the waveform diagram in the second column of FIG7 ) and the phase-shifted waveform (corresponding to the waveform diagram in the third column of FIG7 ) are characterized by a high level or rising edge.

[0120] It is also understood that a low-level signal is generated when CTR1 and CTR2 count to PRD and thus return to zero. For example, in the waveform diagram in the first column of FIG7 , when the first counter curve 201 reaches the highest point on the vertical axis, it indicates that CTR1 and CTR2 count to PRD, and thus CTR1 and CTR2 return to zero, causing both the reference waveform and the phase-shifted waveform to exhibit a low level or falling edge.

[0121] Also, when CTR1 counts until PRD returns to zero and triggers the synchronization signal, the phase shift angle is assigned to CTR2 when the synchronization signal is triggered. Then, the phase shift waveform differs from the reference waveform by the phase shift angle, thereby achieving phase shift of the phase shift waveform relative to the reference waveform.

[0122] More specifically, in the time period between the two vertical dotted lines in Figure 7, that is, after 1800 seconds (corresponding to the last synchronization signal triggering moment) and before 2400 seconds (corresponding to the next synchronization signal triggering moment), the inverter determines a new, non-zero phase shift angle, and then, at 2400 seconds, CTR1 counts to PRD and returns to zero, thereby triggering the synchronization signal, and CTR2 is assigned a new, CMP-greater-than-0 phase shift angle, resulting in the assigned CTR failing to match PRD, and then, in the phase shift waveform at 2400 seconds, the high-level signal does not change to a low-level signal, and the maintenance time of the high-level signal is not less than one signal cycle.

[0123] In addition, it can be understood that before 2400 seconds, the first counter curve 201 and the second counter curve 202 overlap.

[0124] It can be understood that, based on the numerical range or numerical interval formed by the phase shift angle determined last time by the inverter and the phase shift angle determined currently, if the counting comparison information or signal period information can fall within the preset range, such as PRD or CMP is greater than or equal to one of the two phase shift angles determined before and after, and less than or equal to the other of the two phase shift angles determined before and after, then it can be determined that the counting comparison information or signal period information is within the preset range.

[0125] It can also be understood that when the count comparison information or the preset time base count information is within the preset range, the aforementioned signal loss may occur, and the transformer output state can be determined to be the preset state.

[0126] For example, assuming that the phase shift angle determined and used in the previous signal cycle is TBPHSpre, and the phase shift angle determined and used in the current signal cycle is TBPHSnow, the inverter generates a low-level signal when the aforementioned CTR1 and CTR2 count to PRD, and CTR1 returns to 0 when it counts to PRD, causing the inverter to trigger the synchronization signal. When CTR1 and CTR2 count to the count comparison value CMP, the inverter generates a high-level signal, and the count comparison value CMP is half of PRD, then:

[0127] If TBPHSpre and TBPHSnow are both equal to 0, then in the previous signal cycle and the current signal cycle, the high level duration and low level duration of the two signal cycles are the same, both including the low level of the first half signal cycle and the high level of the second half signal cycle.

[0128] If the preset timebase count information is within the preset range—that is, TBPHSpre is 0 and TBPHSnow is greater than 0—then, when the current signal cycle arrives, that is, when CTR1 reaches PRD and reaches zero, triggering the synchronization signal, CTR2 is assigned TBPHSnow. Consequently, because CTR2 is assigned TBPHSnow, it does not match PRD or 0, and the inverter fails to generate a low-level signal.

[0129] Furthermore, when CTR starts counting from TBPHSnow and reaches CMP, the inverter maintains a high level. When CTR starts counting from CMP and reaches PRD or 0, the inverter controls the transformer to generate a low level signal. Therefore, from the start of CTR counting from TBPHSnow until it reaches PRD or 0, the generated signal remains high, resulting in a high-level signal duration of at least one signal cycle.

[0130] If the counting comparison information is within the preset range, that is, TBPHSpre is the same as CMP, TBPHSnow is greater than CMP, and the previous signal cycle may include the high level of the first half of the signal cycle and the low level of the second half of the signal cycle, then: when the synchronization signal is triggered when CTR1 counts to PRD, CTR2 is assigned to TBPHSnow, so that CTR2 does not match CMP, and the inverter does not generate a high-level signal.

[0131] Furthermore, when CTR2 starts counting from TBPHSnow and reaches PRD, where it returns to zero, it maintains a low signal. When CTR2 starts counting from 0 and reaches CMP, the inverter control transformer generates a high signal. Therefore, from the time CTR2 starts counting from TBPHSnow until it reaches CMP, the generated signal remains low, resulting in a low signal duration of at least one signal cycle.

[0132] From this, it can be understood that when one of the count comparison value CMP and the period value PRD falls within the range formed by the first phase shift angle information and the second phase shift angle information, after the synchronization signal in the current signal period is triggered, part of the high-level signal or low-level signal may be missing in the current signal period, that is, the aforementioned signal loss situation occurs, thereby confirming that the output state of the transformer is the preset state.

[0133] For this reason, the embodiment of the present disclosure can control the output of the transformer according to the first phase shift angle information, the second phase shift angle information, the count comparison information and the signal period information when it is determined that signal loss may occur, thereby avoiding or improving the impact of signal loss.

[0134] For example, the inverter can simulate the current signal cycle to generate a first output signal based on the first phase shift angle information, the second phase shift angle information, the count comparison information and the signal cycle information, and simulate the current signal cycle to generate a second output signal based on the second phase shift angle information, the count comparison information and the signal cycle information, and then determine the output compensation signal of the current signal cycle based on the first high-level signal duration and the first low-level signal duration in the first output signal, and the second high-level signal duration and the second low-level signal duration in the second output signal.

[0135] Exemplarily, when the duration of the first high-level signal is longer than the duration of the second high-level signal, and the difference between the duration of the first high-level signal and the duration of the second high-level signal is half a signal cycle, the inverter may convert the low-level signal of half a signal cycle into a high-level signal of half a signal cycle when generating the output signal corresponding to the current signal cycle.

[0136] In this way, the inverter of the embodiment of the present disclosure can determine that the transformer output state is a damaged state when the counting comparison information or the preset time base counting information is within a preset range, thereby determining that a signal loss situation may occur, and then executing the output control of the transformer, which can reliably avoid or improve the negative impact of the signal loss situation to a certain extent, and the inverter and transformer can stably output signals or currents.

[0137] In addition, it can be understood that there may be differences between the first phase shift angle information and the second phase shift angle information in the embodiments of the present disclosure, or in other words, the phase shift angles determined twice may be different, thereby avoiding the situation where the phase shift angles determined twice are the same as PRD or CMP.

[0138] Please refer to FIG8 . In certain embodiments of the present disclosure, step 020 includes:

[0139] 0200: confirming that the transformer output state is a preset state when the count comparison information or the preset time base count information is within a preset range, and determining the lost signal type information based on the first phase shift angle information, the second phase shift angle information, the count comparison information, and the signal period information;

[0140] 0201: Control the output of the transformer based on the lost signal type information.

[0141] The control module of the embodiment of the present disclosure is also used to confirm that the output state of the transformer is a preset state when the counting comparison information or the preset time base counting information is within a preset range, and to determine the lost signal type information based on the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information; and to control the output of the transformer based on the lost signal type information.

[0142] The processor of the embodiment of the present disclosure is also used to confirm that the output state of the transformer is a preset state when the counting comparison information or the preset time base counting information is within a preset range, and to determine the lost signal type information based on the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information; and to control the output of the transformer based on the lost signal type information.

[0143] Specifically, the embodiment of the present disclosure can determine the type of signal that may be lost in the signal generated or output by the inverter control transformer, that is, the lost signal type information, based on the first phase shift angle information, the second phase shift angle information, the count comparison information and the signal period information.

[0144] It is understandable that the specific process of determining the lost signal type information according to the first phase shift angle information, the second phase shift angle information, the count comparison information and the signal period information can be set according to actual conditions.

[0145] For example, in some embodiments, the inverter can simulate the generation of a first output signal by using first phase shift angle information, count comparison information, and signal period information during the current signal cycle, and simulate the generation of a second output signal by using second phase shift angle information, count comparison information, and signal period information during the current signal cycle, so as to determine the lost signal type information based on the time difference in the duration of the high-level signal or the time difference in the duration of the low-level signal between the first and second output signals.

[0146] In other embodiments, the inverter may determine the lost signal type information by looking up a pre-stored or pre-selected lost signal type information mapping table based on the first phase shift angle information, the second phase shift angle information, the count comparison information, and the signal period information. The lost signal type information mapping table may be understood as data that can represent a mapping relationship, such as a table or function, that uses the first phase shift angle information, the second phase shift angle information, the count comparison information, and the signal period information as keys and the lost signal type information as a value.

[0147] It is also understood that if the output signal of the inverter includes a high-level signal and a low-level signal, the lost signal type information in the embodiments of the present disclosure may be one of three types: a high-level signal, a low-level signal, and no loss. For example, if it is determined that a high-level signal of half a signal cycle length is lost within the current signal cycle, the lost signal type information may be a high-level signal.

[0148] It is also understood that the process of controlling the transformer output based on the lost signal type information can be configured according to actual circumstances. For example, if the lost signal type information is a high-level signal, the inverter can generate a high-level signal at the synchronization signal triggering moment of the current signal cycle.

[0149] To be more specific, please refer to Figure 7 again. That is, when the inverter determines a new, non-zero phase shift angle (corresponding to the second phase shift angle information) at the 2000th second, the inverter can be based on the previously determined phase shift angle (corresponding to the first phase shift angle information) and the currently determined phase shift angle, combined with CTR1 and CTR2 count to PRD and return to 0 and generate a low-level signal (corresponding to the signal cycle information and the preset time base count information), CTR1 and CTR2 count to CMP (corresponding to the count comparison information) and generate a high-level signal, and determine that after the synchronization signal of the current signal cycle is triggered, that is, after the synchronization signal at the 2400th second is triggered, the maintenance duration of the high-level signal is not less than one signal cycle, then the lost signal type information may be a high-level signal.

[0150] Furthermore, if the lost signal type information is a high-level signal, the inverter can generate a low-level signal at the synchronization signal triggering moment of the current signal cycle. Furthermore, when CTR2 starts counting from the phase shift angle and counts to CMP, the control transformer generates a high-level signal.

[0151] In this way, the inverter of the embodiment of the present disclosure can confirm that the transformer output state is a preset state when the counting comparison information or the preset time base counting information is within a preset range, and then determine the lost signal type information according to the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information, and control the transformer output according to the lost signal type information. For example, when it is determined that the lost signal type information is a high level, the transformer is controlled to output a high-level signal, thereby avoiding signal loss.

[0152] In certain embodiments of the present disclosure, the transformer includes a pre-set first signal setting device, and step 0201 includes:

[0153] In response to the triggering of the synchronization signal, the first signal setting device generates a signal of a type corresponding to the missing signal type information to determine the output of the transformer.

[0154] The control device of the embodiment of the present disclosure, the control module is further configured to generate a signal corresponding to the lost signal type information according to the first signal setting device in response to the triggering of the synchronization signal to determine the output of the transformer.

[0155] The processor of the embodiment of the present disclosure is further configured to generate, in response to the triggering of the synchronization signal, a signal of a type corresponding to the lost signal type information according to the first signal setting device to determine the output of the transformer.

[0156] That is, the embodiment of the present disclosure can generate a corresponding similar signal such as a high-level signal or a low-level signal according to the first signal setting device and the determined lost signal type information when the synchronization signal is triggered, thereby avoiding the occurrence of the aforementioned signal loss situation.

[0157] It is understandable that the first signal setting device can be set according to actual conditions.

[0158] For example, in some embodiments, the drive waveform signal that can be output by the inverter includes a high-level signal and a low-level signal. The inverter includes a DSP, the DSP includes an EPWM, and the EPWM includes a register A (corresponding to a first signal setting device). When the lost signal type information is a high-level signal, the value stored in the register A is 1, and when the lost signal type information is a low-level signal, the value stored in the register A is 0. Then:

[0159] When the inverter determines a new phase shift angle in the current signal cycle and determines that the lost signal type information for the current signal cycle is a low-level signal, when the synchronization signal is triggered, the inverter reads register A to obtain a value of 0, and then outputs a low-level signal based on the value 0, thereby generating a low-level signal when the synchronization signal is triggered in the current signal cycle. Conversely, when the inverter determines that the lost signal type information is a high-level signal, when the synchronization signal is triggered, the inverter reads register A to obtain a value of 1, and then outputs a high-level signal based on the value 1, thereby generating a high-level signal when the synchronization signal is triggered in the current signal cycle.

[0160] In other embodiments, EPWM includes an event module (corresponding to the first signal setting device), and thus, the inverter of the embodiment of the present disclosure can generate an event "for generating a signal corresponding to the lost signal type information" when the synchronization signal is triggered according to the pre-set event processing logic. Then, when the synchronization signal of the current signal cycle is triggered, the inverter can control the corresponding signal generation based on the pre-set event triggered by the synchronization signal, or in other words, forcibly set the output phase-shifted waveform.

[0161] In this way, the inverter of the embodiment of the present disclosure can generate a corresponding type of signal when the synchronization signal is triggered according to the first signal setting device and the determined lost signal type information during the signal generation process of the transformer, thereby avoiding the occurrence of signal loss and enabling the signal output of the inverter and transformer to be controlled in a timely manner.

[0162] In addition, the embodiments of the present disclosure can also control the transformer output without considering the lost signal type information. For example, in some embodiments, the EPWM of the inverter includes two count comparison value registers, A and B, respectively. A is used to store the aforementioned count comparison value CMP. Then, when the synchronization signal is triggered, the value of A is assigned to B, and the current count value of the time base counter CTR is compared with the current value of B to generate a set event. Therefore, when the synchronization signal is triggered, a corresponding signal is generated according to the set event, such as generating a high-level signal when B is greater than CTR, and generating a low-level signal when B is less than CTR, thereby generating "a signal of a type corresponding to the lost signal type information".

[0163] In certain embodiments of the present disclosure, the inverter includes a pre-set second signal setting device, and the transformer is connected to the secondary power grid via the second signal setting device. Then, step 0201 includes:

[0164] The original output signal of the transformer is adjusted according to the second signal setting device, so that the adjusted original output signal includes a signal of a type corresponding to the lost signal type information.

[0165] The control module of the embodiment of the present disclosure is further configured to adjust the original output signal of the transformer according to the second signal setting device, so that the adjusted original output signal includes a signal of a type corresponding to the lost signal type information.

[0166] The processor of the embodiment of the present disclosure is further configured to adjust the original output signal of the transformer according to the second signal setting device, so that the adjusted original output signal includes a signal of a type corresponding to the lost signal type information.

[0167] Specifically, the inverter of the embodiment of the present disclosure can, when a signal indicating a "signal loss situation exists" has been generated, that is, the original output signal, perform signal loss compensation on the original output signal based on the previously determined lost signal type information and the second signal setting device "for compensating the loss of the original output signal" in the inverter, thereby ensuring that the output signal of the inverter and the output current driven by the output signal are normal.

[0168] It is understood that the second signal setting device in the inverter can be configured according to actual circumstances. For example, in certain embodiments, see Figure 9 for details, which is a schematic diagram of the circuit structure of the second signal setting device in certain embodiments of the present disclosure. It is understood that the circuit structure shown in Figure 9 can be configured in the DSP included in the inverter.

[0169] Furthermore, in the circuit structure shown in FIG9 , when the inverter generates lost signal type information, or the transformer output state is a preset state, or when it is determined that the count comparison information or the preset time base count information is within a preset range, the enable signal is 1, otherwise it is 0.

[0170] Furthermore, after obtaining the aforementioned lost signal type information, the inverter can input the original output signal, enable signal and lost signal type information into the circuit shown in Figure 9, so that the circuit shown in Figure 9 generates a signal of a type corresponding to the lost signal type information at the moment when the synchronization signal of the signal period corresponding to the original output signal is triggered.

[0171] For example, when the original output signal corresponds to the signal at the synchronization signal triggering moment of the current signal cycle, the inverter can generate a signal of a type corresponding to the lost signal type information at the synchronization signal triggering moment of the current signal cycle based on the circuit shown in Figure 9, thereby forming an output signal, and signal loss in the output signal is avoided.

[0172] It can be understood that if it is determined based on the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information that no signal loss will occur in the current signal period, the original output signal can be directly output, that is, the original output signal is converted into an output signal.

[0173] Furthermore, in the circuit structure shown in FIG9 , if it is determined that signal loss will not occur in the current signal cycle, since the enable signal is 0, the lost signal type information is empty or null, and thus, the original output signal can be directly converted into the output signal.

[0174] Optionally, in some embodiments, when the lost signal type information is 1, the circuit structure shown in FIG9 can cause the original output signal to generate a high-level signal. When the lost signal type information is 1, the circuit structure shown in FIG9 can cause the original output signal to generate a low-level signal. When the lost signal type information is not 1 or 0, the circuit structure shown in FIG9 can cause the original output signal to be directly used as the output signal.

[0175] In this way, the inverter of the embodiment of the present disclosure can generate a signal of a type corresponding to the lost signal type information in the original output signal according to the second signal setting device, the original output signal and the lost signal type information when generating the original output signal, so that the high-level signal or low-level signal lost in the original output signal can be compensated, thereby avoiding the signal loss in the output signal of the transformer and ensuring the output quality of the inverter.

[0176] Optionally, in certain embodiments of the present disclosure, when the preset time base count information is within a preset range and the preset time base count information satisfies the first phase shift angle information, the lost signal type information is the first signal type.

[0177] Specifically, in some embodiments, the inverter satisfies the first scenario, and the first phase shift angle information in the first scenario includes the phase shift angle TBPHSpre determined by the inverter in the previous signal cycle, the second phase shift angle information includes the phase shift angle TBPHSnow determined by the inverter in the current signal cycle, the count comparison information includes the aforementioned count comparison value CMP, the signal cycle information includes the aforementioned cycle value PRD and preset time information, the preset time information is 0, CMP is half of PRD, PRD is greater than 0, the time base counter CTR1 corresponding to the reference time base and the time base counter CTR2 corresponding to the phase shift time base are both based on For sawtooth wave counting, the inverter generates a high level when CTR1 and CTR2 count to CMP. CTR1 and CTR2 return to zero when they count to PRD. CTR1 and CTR2 generate a low level signal when they count to PRD or 0. CTR1 triggers the synchronization signal when it counts to 0. When the synchronization signal is triggered, CTR2 is assigned to TBPHSnow. Then, when the inverter generates the signal of each signal cycle, it only considers the phase shift angle information within the current signal cycle. That is, in the current signal cycle, TBPHSpre is not considered. When only the output signal generated by TBPHSnow is used, the simulated or predicted output signals are:

[0178] When the preset time base count information is within the preset range and the preset time base count information satisfies the first phase shift angle information, that is, when 0 belongs to [TBPHSpre, TBPHSnow) and TBPHSpre=0, before the synchronization signal is triggered, CTR is greater than CMP but less than PRD, so the phase shift waveform is a high-level signal before the synchronization signal is triggered.

[0179] At the time the synchronization signal is triggered, if CTR2 is assigned to TBPHSpre, CTR2 is 0, and the inverter control phase-shift waveform is a low-level signal. However, in the current signal cycle, CTR2 is assigned to TBPHSnow, and CTR2 is greater than 0, causing CTR2 to not match 0 or PRD. This causes the inverter control phase-shift waveform to maintain a high-level signal, and the phase-shift waveform loses a low-level signal. As a result, the high-level signal duration from the previous signal cycle to the end of the current cycle is longer than the expected half signal cycle, but not less than a full signal cycle.

[0180] Therefore, at this time, the lost signal type information is a low-level signal, that is, a first type signal.

[0181] In other embodiments, it is assumed that the inverter satisfies the second scenario, and the first phase shift angle information in the second scenario includes the phase shift angle TBPHSpre determined by the inverter in the previous signal cycle, the second phase shift angle information includes the phase shift angle TBPHSnow determined by the inverter in the current signal cycle, the count comparison information includes the aforementioned count comparison value CMP, the signal period information includes the aforementioned period value PRD and preset time information, the preset time information is 0, CMP is half of PRD, PRD is greater than 0, the time base counter CTR1 corresponding to the reference time base and the time base counter CTR2 corresponding to the phase shift time base are both based on sawtooth wave counting, the inverter generates a high level when CTR1 and CTR2 count to a "first value CMPup higher than CMP", and the inverter generates a low level when CTR1 and CTR2 count to a "second value CMPdown lower than CMP", and CTR1 and CTR2 return to zero when counting to PRD. CTR1 triggers a synchronization signal when counting to 0, and CTR2 is assigned to TBPHSnow when the synchronization signal is triggered. Then:

[0182] When 0 belongs to [TBPHSpre, TBPHSnow) and TBPHSpre = 0, CTR has already counted to CMPup before the synchronization signal is triggered, so the phase-shift waveform before the synchronization signal is triggered is a high-level signal. At the synchronization signal triggering moment, CTR2 is assigned the value TBPHSnow. TBPHSnow is equal to CTR2 and is therefore less than the aforementioned CMP and less than CMPdown. This causes CTR2 to not match CMPdown, causing the inverter control phase-shift waveform to maintain a low-level signal. This results in a "high-level signal when CTR2 is less than CMPdown" situation. In other words, this contradicts the "high level when CTR2 is greater than CMPup and low level when CTR2 is less than CMPdown" situation, resulting in a high-level signal duration that exceeds the expected half-signal period. As a result, the phase-shift waveform loses a low-level signal, and the missing signal type information is a low-level signal.

[0183] Optionally, in some embodiments of the present disclosure, when the counting comparison information is within a preset range and the counting comparison information satisfies the first phase shift angle information, the lost signal type information is the second signal type.

[0184] Taking the aforementioned first scenario as an example, when the inverter generates signals for each signal period, only the phase shift angle information within the current each signal period, that is, when not considering TBPHSpre in the current signal period and only generating the output signal according to TBPHSnow, the simulated or predicted output signal satisfies:

[0185] When the counting comparison information is within a preset range and the counting comparison information satisfies the first phase shift angle information, that is, when CMP belongs to [TBPHSpre, TBPHSnow), 0 < TBPHSpre < CMP < TBPHSnow, and (TBPHSnow - TBPHSpre) > CMP, or CMP belongs to [TBPHSpre, TBPHSnow), and TBPHSpre = CMP < TBPHSnow, before the synchronization signal is triggered, CTR2 is less than CMP, so the phase shift waveform before the synchronization signal is triggered is a low-level signal.

[0186] At the moment when the synchronization signal is triggered, CTR2 is assigned the value of TBPHSnow, then CTR2 is greater than CMP, resulting in that CTR2 fails to match CMP, causing the inverter to control the phase shift waveform to maintain a low-level signal. At the same time, because (TBPHSnow - TBPHSpre) > CMP, the duration required for CTR2 to count from TBPHSnow to CMP is not less than one signal period, making the duration of the low-level signal during the period from the previous signal period to the end of the current period higher than the expected half signal period and not less than one entire signal period, and a high-level signal of the phase shift waveform in the current signal period is lost. Thus, the lost signal type information at this time is a high-level signal.

[0187] Correspondingly, taking the aforementioned second scenario as an example, when 0 < TBPHSpre <= CMP < TBPHSnow is satisfied, before the synchronization signal is triggered, CTR2 has counted up to CMPdown. Therefore, the phase-shifted waveform before the synchronization signal is triggered is a low-level signal. When the synchronization signal is triggered, CTR2 is assigned TBPHSnow which is higher than CMPup, resulting in the phase-shifted waveform remaining at a low level when CTR2 counts from TBPHSnow to CMPdown. There is a situation where "the signal is a low-level signal when CTR2 is greater than CMPup", or rather, a situation contrary to "a high-level signal is generated when CTR2 is greater than CMPup, and a low-level signal is generated when CTR2 is less than CMPdown". When CTR2 counts from CMPdown to CMPup, the phase-shifted waveform shows a high level, and the duration of the low-level signal is longer than half of the expected signal period. As a result, the high-level signal is lost.

[0188] To more clearly illustrate the signal loss situation in the second scenario of the embodiments of the present disclosure, please refer to FIG. 10. FIG. 10 is a schematic diagram of an application scenario in some embodiments of the present disclosure. That is, before 2500 seconds, CTR2 is assigned TBPHSnow which is higher than CMPup, resulting in the phase-shifted waveform remaining at a low level when CTR2 counts from TBPHSnow to CMPdown, and the phase-shifted waveform showing a high level when CTR2 counts from CMPdown to CMPup. That is, the high-level signal is lost.

[0189] Optionally, in some embodiments of the present disclosure, when the counting comparison information is within a preset range and the counting comparison information satisfies the second phase-shift angle information, the signal loss type information is the first signal type.

[0190] Taking the aforementioned first scenario as an example, when the inverter generates signals for each signal period, only the phase-shift angle information within the current each signal period, that is, when generating the output signal based only on TBPHSnow without considering TBPHSpre in the current signal period, the simulated or predicted output signal satisfies:

[0191] When the count comparison information is within a preset range and the count comparison information satisfies the second phase shift angle information, that is, when CMP belongs to (TBPHSnow, TBPHSpre) and (TBPHSpre - TBPHSnow) > CMP, before the synchronization moment is triggered, CTR2 is greater than CMP, and the inverter controls the phase-shifted waveform to generate a high level. When the synchronization moment is triggered, CTR2 is assigned TBPHSnow which is less than CMP, and the inverter maintains the high level. When CTR2 counts from TBPHSnow to CMP, the inverter continues to maintain the high level until CTR2 counts to CMP, at which time the inverter controls the phase-shifted waveform to generate a low level, so that during the period from the previous signal cycle to the end of the current cycle, the duration of the high-level signal is longer than the expected half signal cycle and not less than one whole signal cycle. Thus, a low-level signal is lost in the phase-shifted waveform, or rather, the lost signal type is the first signal type.

[0192] Correspondingly, taking the aforementioned second scenario as an example, when CMP belongs to (TBPHSnow, TBPHSpre), so TBPHSnow < CMP < TBPHSpre, before the synchronization moment arrives, the inverter controls the phase-shifted waveform to generate a low level. When the synchronization moment arrives, CTR2 is assigned TBPHSnow which is greater than CMPup, so that CTR2 does not match CMPup, and the inverter controls the phase-shifted waveform to maintain the low level until CTR2 counts from TBPHSnow to CMPdown and then from CMPdown to CMPup, at which time the inverter controls the phase-shifted waveform to generate a high level, resulting in the situation that "the signal is a low-level signal when CTR2 is greater than CMPup", or rather, the situation contrary to "a high level is generated when CTR2 is greater than CMPup and a low level is generated when CTR2 is less than CMPdown", and the duration of the low-level signal is longer than the expected half signal cycle. Thus, a high-level signal is lost in the phase-shifted waveform.

[0193] In addition, it can be understood that the first signal type, the second signal type, the first scenario, and the second scenario of the embodiments of the present disclosure are all one of the feasible embodiments of the present disclosure, and the present disclosure can determine the lost signal type information through other similar embodiments.

[0194] The present disclosure also provides a computer-readable storage medium storing a computer program, which implements the above control method when executed by one or more processors.

[0195] In the description of this specification, the descriptions with reference to the terms "specifically", "further", "particularly", "understandably", etc. are intended to mean that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present disclosure. In this specification, the schematic expressions of the above terms are not intended to refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0196] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present disclosure includes additional implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present disclosure belong.

[0197] Although the embodiments of the present disclosure have been shown and described above, it is understood that the above embodiments are exemplary and are not to be construed as limitations on the present disclosure. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present disclosure.

Claims

1. A control method for an inverter, wherein: The inverter includes a transformer, the input end of the transformer is connected to the primary photovoltaic assembly, the output end of the transformer is connected to the secondary power grid, the input end and the output end each include a plurality of bridge arms, the inverter can determine the phase shift angle information corresponding to the plurality of bridge arms to control the output of the transformer, and the method includes: Acquire the first phase shift angle information determined last time and the second phase shift angle information determined currently, so as to determine the output state of the transformer according to the first phase shift angle information and the second phase shift angle information; When the output state of the transformer is a preset state, the output of the transformer is controlled according to the first phase shift angle information and the second phase shift angle information.

2. The method according to claim 1, wherein: The method comprises: When the analog output signal corresponding to the second phase shift angle information satisfies a preset condition, the transformer output state is determined to be the preset state, wherein, when the analog output signal satisfies the preset condition, a first duration of a first type of signal in the analog output signal exceeds a first preset target duration corresponding to the first type of signal, or a second duration of a second type of signal exceeds a second preset target duration corresponding to the second type of signal.

3. The method according to claim 1 or 2, wherein: The acquiring the first phase shift angle information determined last time and the second phase shift angle information determined currently, so as to determine the output state of the transformer according to the first phase shift angle information and the second phase shift angle information, comprises: The transformer output state is determined according to the first phase shift angle information and the second phase shift angle information, and predetermined count comparison information and signal period information.

4. The method according to claim 3, wherein: The signal cycle information includes preset time base count information, and when the output state of the transformer is a preset state, controlling the output of the transformer according to the first phase shift angle information and the second phase shift angle information, comprises: When the counting comparison information or the preset time base counting information is within a preset range, the output state of the transformer is confirmed to be a preset state, and the output of the transformer is controlled according to the first phase shift angle information, the second phase shift angle information, the counting comparison information and the signal period information, wherein the preset range is determined according to the first phase shift angle information and the second phase shift angle information.

5. The method according to claim 4, wherein: The step of confirming that the transformer output state is a preset state when the count comparison information or the preset time base count information is within a preset range, and controlling the output of the transformer according to the first phase shift angle information, the second phase shift angle information, the count comparison information and the signal period information, comprises: When the count comparison information or the preset time base count information is within a preset range, confirming that the transformer output state is a preset state, and determining the lost signal type information according to the first phase shift angle information, the second phase shift angle information, the count comparison information and the signal period information; The output of the transformer is controlled according to the lost signal type information.

6. The method according to claim 5, wherein: The transformer includes a preset first signal setting device, and the controlling the output of the transformer according to the lost signal type information includes: In response to the triggering of the synchronization signal, the first signal setting device generates a signal of a type corresponding to the lost signal type information to determine the output of the transformer.

7. The method according to claim 5, wherein: The inverter includes a preset second signal setting device, the transformer is connected to the secondary power grid through the second signal setting device, and the output of the transformer is controlled according to the lost signal type information, including: The original output signal of the transformer is adjusted according to the second signal setting device so that the adjusted original output signal includes a signal of a type corresponding to the lost signal type information.

8. The method according to any one of claims 5 to 7, wherein: In the case where the preset time base count information is within the preset range and the preset time base count information satisfies the first phase shift angle information, the lost signal type information is the first signal type.

9. The method according to any one of claims 5 to 7, wherein: When the count comparison information is within the preset range and the count comparison information satisfies the first phase shift angle information, the lost signal type information is the second signal type.

10. The method according to any one of claims 5 to 7, wherein: When the count comparison information is within the preset range and the count comparison information satisfies the second phase shift angle information, the lost signal type information is the first signal type.

11. An inverter, wherein: The method comprises a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the method according to any one of claims 1 to 10 is implemented.

12. A photovoltaic system, wherein: Includes the inverter as claimed in claim 11.

13. A computer-readable storage medium, wherein: The computer-readable storage medium stores a computer program, and when the computer program is executed by one or more processors, the method according to any one of claims 1 to 10 is implemented.

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