Data generation device, battery monitoring device, data generation method, and data generation program

Abstract

This data generation device generates digital data of at least a part of a sine wave (SIN) or a cosine wave (COS) (hereinafter abbreviated as a prescribed wave). Initial values are given to storage units (11s, 11c). A generation unit (S1; S2; S3) generates digital data by multiplying the values stored in the storage units by a predetermined coefficient at a predetermined calculation interval shorter than the basic period of the prescribed wave in the manner of rotating the unit vector on a two-dimensional complex plane by a predetermined step angle of the prescribed wave.

Description

Data generation device, battery monitoring device, data generation method, and data generation program CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based on Japanese Application No. 2023-205372 filed on December 5, 2023, the contents of which are incorporated herein by reference.

[0002] The present disclosure relates to a data generation device, a battery monitoring device, a data generation method, and a data generation program.

[0003] When generating digital data of sine wave and cosine wave frequencies, there have been proposed a method of storing digital data of sine wave and cosine wave at a predetermined step angle in a ROM, reading out the digital data, and generating data (see, for example, Patent Document 1), and a method of generating data by calculation (see, for example, Patent Document 2).

[0004] JP-A-5-283937 Patent No. 5798844

[0005] The method described in Patent Document 1 is undesirable because it requires a large amount of memory and increases the circuit scale. Furthermore, the frequencies that can be generated are determined depending on the digital data, which reduces the flexibility of the frequencies that can be generated. If there is no data stored in the ROM when generating a low-frequency signal, the digital data must be interpolated, which results in the inclusion of harmonics, which is undesirable.

[0006] The present disclosure has been made in consideration of the above circumstances, and its purpose is to provide a data generation device that can generate digital data of sine wave or cosine wave frequencies as accurately as possible using stored data without the need to interpolate digital data, a battery monitoring device using the data generation device, a data generation method, and a data generation program.

[0007] One aspect of the present disclosure is directed to a data generation device that generates digital data of at least a portion of a sine wave (SIN) or cosine wave (COS) (hereinafter referred to as a predetermined wave), including: a storage unit that stores an initial value; and a generation unit that generates digital data by multiplying a value stored in the storage unit by a predetermined coefficient so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle of the predetermined wave, at a predetermined calculation interval that is shorter than the fundamental period of the predetermined wave.

[0008] According to one aspect of the present disclosure, the generation unit generates digital data by multiplying the stored value of the memory unit by a predetermined coefficient so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle of the predetermined wave. Therefore, digital data can be generated by calculation without using the stored data, and digital data constituting the frequency of a sine wave or cosine wave can be generated as accurately as possible.

[0009] The above and other objects, features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. 7 is an example of output digital data of a SIN / COS waveform according to the third embodiment; FIG. 8 is an electrical configuration diagram of a battery monitoring device according to a fourth embodiment; FIG. 9 is an electrical configuration diagram of components of a lock-in amplifier according to the fourth embodiment and an explanatory diagram of nodes; FIG. 10 is a diagram showing the spectrum of each node of the battery monitoring device according to the fourth embodiment; FIG. 11 is an electrical configuration diagram of a battery monitoring device according to a fifth embodiment; and FIG. 12 is a flowchart outlining the operation according to the fifth embodiment.

[0010] Hereinafter, several embodiments of the data generating device and the battery monitoring device will be described with reference to the drawings. In the embodiments described later, the same or similar reference numerals as those in the embodiments described earlier will be used, and the description thereof will be omitted.

[0011] First Embodiment A first embodiment will be described with reference to Figures 1 to 3. A data generating device 10 is configured as a device that generates digital data of sine waves (SIN) and cosine waves (COS). In the following description, one period of the digital data of sine waves and cosine waves generated by the data generating device 10 is defined as a "fundamental period."

[0012] First, the data generating device 10 includes registers 11s and 11c in which initial values ​​are stored. The registers 11s and 11c correspond to a storage unit. The data generating device 10 also includes selectors 12s and 12c, real part coefficient multipliers 13r and 15r, imaginary part coefficient multipliers 13i and 15i, and adders 14 and 16. The real part coefficient multipliers 13r and 15r, imaginary part coefficient multipliers 13i and 15i, and adders 14 and 16 constitute a generating unit S1.

[0013] The real part coefficient multiplier 13r multiplies the value stored in the register 11c by the real part coefficient A and outputs the result to the adder 14. The imaginary part coefficient multiplier 13i multiplies the value stored in the register 11s by the negative value of the imaginary part coefficient -B and outputs the result to the adder 14. The adder 14 adds the output data of the real part coefficient multiplier 13r and the output digital data of the imaginary part coefficient multiplier 13i to output digital data of a cosine wave (COS). The digital data of the cosine wave is input to the selector 12c.

[0014] The real part coefficient multiplier 15r multiplies the value stored in the register 11s by the real part coefficient A and outputs the result to the adder 16. The imaginary part coefficient multiplier 15i multiplies the value stored in the register 11c by the positive value of the imaginary part coefficient B and outputs the result to the adder 16. The adder 14 adds the output data of the real part coefficient multiplier 15r and the output digital data of the imaginary part coefficient multiplier 15i to output digital data of a sine wave (SIN). The digital data of the sine wave is input to the selector 12s.

[0015] The real part coefficient A of the real part coefficient multipliers 13r, 15r and the imaginary part coefficient B of the imaginary part coefficient multipliers 13i, 15i are predetermined for each frequency f1, f2, .... These coefficients A and B may be preset for each multiplier 13r, 13i, 15r, 15i as long as the output frequency f (e.g., f1) is predetermined. Furthermore, if the data generating device 10 is connected to another control circuit (e.g., the control unit 30 described below), these coefficients A and B may be configured to be externally set by the other circuit. Note that it is desirable to set the coefficients A and B under the condition that A^2 + B^2 = 1. As the frequencies f1, f2, ... become smaller, the real part coefficient A is set larger and the imaginary part coefficient B is set smaller.

[0016] The upper diagram of Figure 3 shows an explanatory diagram of the principle of the digital data generation method. The generation unit S1 generates digital data by multiplying the stored values ​​of registers 11s and 11c by a predetermined coefficient (A + jB) so as to rotate a unit vector on a two-dimensional complex plane by a predetermined step angle θ at predetermined calculation intervals (step periods) T (T0 → T1 → T2 → ... in Figure 3) that are shorter than the fundamental period of the predetermined wave. Referring to the upper diagram of Figure 3, the digital data is generated so as to rotate counterclockwise on a two-dimensional complex plane by a step angle θ. This configuration allows sine wave (SIN) and cosine wave (COS) digital data to be output as shown in Figure 2.

[0017] It can be expressed as follows in mathematical terms: n is the real component, Y n is the imaginary component, A is the real coefficient, and B is the imaginary coefficient. Since it rotates left, by multiplying the coefficient (A + jB) as in equation (1), the real component X n-1 , imaginary component Y n-1 to the real component X of the next step angle θ n , imaginary component Y n can be expressed as:

[0018] Furthermore, since the real and imaginary numbers in equation (1) are the same, it can be expressed as equation (2). If the equation in equation (2) is configured using hardware, it can be configured as shown in the data generation device 10 in FIG.

[0019] Since the coefficients A and B are set by digital data, there is a limit to the number of bits. Furthermore, when the result of multiplying coefficient A + jB is stored in registers 11s and 11c, there is also a limit to the number of bits, which results in rounding errors. The more the calculation proceeds, the more this rounding error accumulates. As shown in the simulation and experimental results in the lower diagram of Figure 3, accumulating output digital data also increases the absolute value of the data error. It is desirable to reset this error. Therefore, the data generator 10 is provided with a reset counter 17, as shown in Figure 1.

[0020] The reset counter 17 is a circuit that starts counting from an initial value and outputs a reset signal R to the selectors 12s and 12c each time it reaches a predetermined threshold. When the reset signal R is input to the selector 12s, it temporarily switches its input and outputs a reset value (initial value S) to the register 11s. When the reset signal R is input to the selector 12c, it temporarily switches its input and outputs a reset value (initial value C) to the register 11c. As a result, the reset counter 17 and the selectors 12s and 12c function as a reset unit, so that the digital data generation result of the generation unit S1 can be reset at periodic timing, and as a result, the error can be reset.

[0021] For example, as shown in Figure 2, a reset signal R1 may be provided every 360° (2π [rad]) of the fundamental period of the sine wave and cosine wave to clear the signals to their initial values ​​S and C. In this case, the initial values ​​S = 0 and C = 1. Furthermore, if the initial values ​​S and C are periodically changed and set, the reset signals R1 to R4 may be repeatedly provided every 90° (π / 4 [rad]).

[0022] In this case, it is preferable to set the initial values ​​S and C as (initial values ​​S=0, C=1 @ reset signal R1), (initial values ​​S=1, C=0 @ reset signal R2), (initial values ​​S=0, C=-1 @ reset signal R3), (initial values ​​S=-1, C=0 @ reset signal R4). Here, a form has been described in which the reset signal R1 or R1 to R4 is applied periodically every 360° or every 90° by the action of the reset unit to clear the initial values ​​S and C, but resetting at any other timing (for example, any timing such as 30°, 10°, or 45°) is also possible.

[0023] In the method described in Patent Document 2 in the Background Art section, an increase in the number of calculations increases the calculation error, which is undesirable. Furthermore, an increase in the number of calculations is also undesirable because it generates DC components. As in this embodiment, by using the reset counter 17 to reset the results generated by the generator S1 at any timing, the error components can be cleared, and sine waves (SIN) and cosine waves (COS) can be generated with as little DC components as possible.

[0024] <Summary of this embodiment> As described above, according to this embodiment, the generation unit S1 generates digital data by multiplying the stored values ​​of the registers 11s and 11c by a predetermined coefficient (A+jB) so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle θ. Therefore, digital data can be generated by calculation without using stored data, and digital data constituting the frequencies of sine waves or cosine waves can be generated as accurately as possible.

[0025] Second Embodiment A second embodiment will be described with reference to Figures 4 and 5. A data generator 210 includes the same configuration as the data generator 10, as well as a control unit 30, sign inverters 18s and 18c, and selectors 19s and 19c. The control unit 30 is configured with a digital control circuit and a counter, and generates reset signals R1 and R3 to be supplied to the selectors 12s and 12c, and also generates selection signals to be supplied to the selectors 19a and 19c.

[0026] The sign inverter 18s receives the addition result from the adder 16, inverts the sign of the input digital data, and outputs it to the selector 19s. The selector 19s selects whether to output the addition result from the adder 16 as is or to invert the sign and output it as sine wave (SIN) digital data based on a selection signal from the control unit 30.

[0027] The sign inverter 18c receives the addition result from the adder 14, inverts the sign of the input digital data, and outputs it to the selector 19c. The selector 19c selects whether to output the addition result from the adder 14 as is or to invert the sign and output it as cosine wave (COS) digital data based on a selection signal from the control unit 30.

[0028] The generator S2 of the second embodiment includes the same configuration as the generator S1 of the first embodiment, as well as sign inverters 18s and 18c and selectors 19s and 19c. The generator S2 may also include a control unit 30. The control unit 30 outputs a reset signal R1 to the selectors 12s and 12c to clear the output values ​​of the selectors 12s and 12c to initial values ​​S=0 and C=1. After this, the generator S2 generates digital data of the sine and cosine waves at a calculation interval T (T0 → T1 → T2 → ... in FIG. 3 ) for the initial half of the fundamental period of the sine and cosine waves, as in the first embodiment. For this half (180°) of the initial fundamental period, the selectors 19s and 19c output the sums of the adders 16 and 14 as is.

[0029] After the generation unit S2 generates digital data with half the initial fundamental period, the control unit 30 outputs a reset signal R1 to the selectors 12s and 12c to clear the output values ​​of the selectors 12s and 12c to the initial values ​​S = 0 and C = 1. The control unit 30 also outputs a selection signal to the selectors 19s and 19c to output the addition results of the adders 14 and 16, whose signs have been inverted by the sign inverters 18s and 18c, as sine wave and cosine wave digital data.

[0030] Then, the generation unit S2 regenerates the initially generated digital data for the first half (180°) while inverting the sign of the digital data and outputs it as sine wave and cosine wave digital data, respectively. As a result, when generating digital data for the fundamental cycle of the sine wave and cosine wave, the generation unit S2 repeats the initial generation of the first half (180°) of digital data twice, outputting the first half without inverting the sign and outputting the second half with an inverted sign.

[0031] Summary of the Present Embodiment As described above, the generator S2 of the second embodiment generates digital data of sine waves and cosine waves at calculation intervals T (T0 → T1 → T2 → ...) for the first half of the fundamental period of the sine waves and cosine waves. The generator S2 then switches the signs of the digital data of the sine waves and cosine waves for the remaining half of the fundamental period of the sine waves and cosine waves, thereby generating digital data of the sine waves and cosine waves during the fundamental period. This allows waveforms to be generated that minimize DC components. In particular, the controller 30 outputs a reset signal R1 to the selectors 12s and 12c, which allows the selectors 12s and 12c to be reset to the initial values ​​S = 0 and C = 1 every half of the fundamental period, thereby reducing generation errors.

[0032] Third Embodiment A third embodiment will be described with reference to Fig. 6 and Fig. 7. A data generator 310 shown in Fig. 6 includes the same configuration as the data generator 210, as well as selectors 20s and 20c. A control unit 30 generates a reset signal R1 to be supplied to selectors 12s and 12c, and also generates selection signals to be supplied to selectors 19a, 19c, 20s, and 20c.

[0033] The selector 20s is provided to select digital data for a sine wave, and selects one of the addition results of the adders 14, 16 based on a selection signal input from the control unit 30, and outputs it to the selector 19s and the sign inverter 18s. When the sign inverter 18s receives the output digital data of the selector 20s, it inverts the sign of the input digital data and outputs it to the selector 19s. Based on the selection signal from the control unit 30, the selector 19s selects whether to output the output digital data of the selector 20s as is or to output it after inverting the sign using the sign inverter 18s, and outputs it as digital data of a sine wave (SIN).

[0034] The selector 20c is provided to select digital data for a cosine wave, and selects one of the addition results of the adders 14, 16 based on a selection signal input from the control unit 30, and outputs it to the selector 19c and the sign inverter 18c. The sign inverter 18c inputs the output digital data of the selector 20c, inverts the sign of the input digital data, and outputs it to the selector 19c. Based on the selection signal from the control unit 30, the selector 19c selects whether to output the output digital data of the selector 20c as is or to output the data after inverting the sign using the sign inverter 18c, and then outputs it as digital data of a cosine wave (COS).

[0035] The generator S3 of the third embodiment includes selectors 20s and 20c in addition to the generator S2 of the second embodiment. After the control unit 30 outputs a reset signal R1 to the selectors 12s and 12c to clear the output values ​​of the selectors 12s and 12c to initial values ​​S=0 and C=1, the generator S3 generates digital data of the sine waves and cosine waves at calculation intervals T (T0 → T1 → T2 → ... in FIG. 3 ) for the initial ¼ of the fundamental period of the sine waves and cosine waves, as in the first embodiment.

[0036] <0° to 90°> During this initial ¼ (90°) of the fundamental period, selector 20s selects and outputs the addition result of adder 16, and selector 20c selects and outputs the addition result of adder 14, based on the selection signal of control unit 30. Also, selectors 19s and 19c output the addition results of adders 14 and 16 as is. That is, during the initial ¼ of the fundamental period, generation unit S3 outputs the addition results of adders 16 and 14 as sine wave and cosine wave digital data, respectively, similar to those in the first embodiment (see (D1) and (D2) in FIG. 7).

[0037] After the generation unit S3 generates digital data with a period that is 1 / 4 of the original basic period, the control unit 30 outputs a reset signal R1 to the selectors 12s and 12c to clear the output values ​​of the selectors 12s and 12c to the initial values ​​S=0 and C=1.

[0038] <90° to 180°> During the next quarter of the fundamental period, the control unit 30 outputs a selection signal to the selectors 20s and 20c to switch the data between sine and cosine waves. That is, the generation unit S3 outputs the sum of the adder 14 to the selector 19s and the sign inverter 18s, and outputs the sum of the adder 16 to the selector 19c and the sign inverter 18c. The control unit 30 then outputs a selection signal to the selector 19c, which outputs the sum of the adder 16, the sign of which has been inverted by the sign inverter 18c, as digital data of a cosine wave (see (D3) in FIG. 7). At the same time, the selector 19s outputs the output of the selector 20s, to which the sum of the adder 14 has been input, as digital data of a sine wave (see (D4) in FIG. 7).

[0039] After the generation unit S3 generates digital data that is 2 / 4 (180°) of the initial basic period, the control unit 30 outputs a reset signal R1 to the selectors 12s and 12c to clear the output values ​​of the selectors 12s and 12c to the initial values ​​S=0 and C=1.

[0040] <180° to 270°> During the next quarter of the fundamental period, the control unit 30 outputs a selection signal to the selectors 20s and 20c to switch the data between sine and cosine waves from the previous state, and restores the original data switching state. That is, the generation unit S3 outputs the sum of the adder 16 to the selector 19s and the sign inverter 18s, and also outputs the sum of the adder 14 to the selector 19c and the sign inverter 18c. Furthermore, the selector 19c outputs the sum of the adder 14, whose sign has been inverted by the sign inverter 18c, as digital data of a cosine wave (see (D5) in FIG. 7). At the same time, the control unit 30 outputs a selection signal to the selector 19s from the previous state, and outputs the sum of the adder 16, whose sign has been inverted by the sign inverter 18s, as digital data of a sine wave (see (D6) in FIG. 7).

[0041] After the generation unit S3 generates digital data having a period of 3 / 4 (270°) of the initial fundamental period, the control unit 30 outputs a reset signal R1 to the selectors 12s and 12c to clear the output values ​​of the selectors 12s and 12c to the initial values ​​S=0 and C=1.

[0042] <180° to 270°> Furthermore, during the next quarter of the fundamental period, the control unit 30 outputs a selection signal to the selectors 20s and 20c to switch the data between sine waves and cosine waves from the previous state. That is, the generation unit S3 outputs the sum of the adder 14 to the selector 19s and the sign inverter 18s, and also outputs the sum of the adder 16 to the selector 19c and the sign inverter 18c. Furthermore, the selector 19c outputs the sum of the adder 16 as digital data of a cosine wave (see (D7) in FIG. 7). At the same time, the selector 19s outputs the sum of the adder 14, the sign of which has been inverted by the sign inverter 18s, as digital data of a sine wave (see (D8) in FIG. 7).

[0043] After the generation unit S3 generates digital data having a period of 4 / 4 (360°) of the initial fundamental period, the control unit 30 outputs a reset signal R1 to the selectors 12s and 12c to clear the output values ​​of the selectors 12s and 12c to the initial values ​​S=0 and C=1. The control is then restored to their original values ​​and the control is repeated (see (D1) in FIG. 7). The generation unit S3 can periodically generate sine wave and cosine wave digital data by repeating the control in the same manner.

[0044] Summary of the Present Embodiment As described above, the generator S3 of the third embodiment generates digital data of sine waves and cosine waves at a calculation interval T for the first quarter of the fundamental period of the sine waves and cosine waves. The generator S3 then swaps the signs of the digital data of the sine waves and cosine waves and swaps the sine wave and cosine wave data for the remaining period of the fundamental period of the sine waves and cosine waves (i.e., three-quarters of the fundamental period), thereby generating digital data of the sine waves and cosine waves during the fundamental period. This allows waveforms to be generated that minimize DC components. Furthermore, the controller 30 outputs a reset signal R1 every quarter of the fundamental period, thereby resetting the initial values ​​S = 0 and C = 1 every quarter of the fundamental period, thereby reducing generation errors.

[0045] (Fourth Embodiment) A fourth embodiment will be described with reference to Figs. 8 to 10. Fig. 8 shows an example of the electrical configuration of a battery monitoring system 401 incorporating the data generating device 310 shown in the third embodiment as a SIN / COS generating unit 310a. Note that only parts related to the features of this embodiment are shown, and other block configurations are omitted. The SIN / COS generating unit 310a in Fig. 8 has the same configuration as the generating unit S3 of the data generating device 310, and so a description thereof will be omitted.

[0046] The battery monitoring system 401 includes a battery monitoring master device 2 and a plurality of battery monitoring slave devices 51, 52, etc. The battery monitoring master device 2 includes an MPU 3 and an external interface 4, and is configured to be able to communicate with the plurality of battery monitoring slave devices 51, 52 via the external interface 4.

[0047] The battery monitoring slave devices 51 and 52 each monitor the voltage across the terminals of n unit cells Ce1, Ce2, ... Cen of a secondary battery connected in series. The series-connected circuit of the unit cells Ce1, Ce2, ... Cen constitutes a battery pack, and the voltage of the series-connected circuit of the battery pack is applied to a current load 40.

[0048] The current load 40 is configured by an inverter or a DC-DC converter, etc., and is connected in series to the unit cells Ce1, Ce2, ... Cen. The battery monitoring slave device 51 includes RC filters 32, 320, a FET_M, and an integrated circuit IC. The battery monitoring slave device 51 or the integrated circuit IC is configured as a battery monitoring device.

[0049] An RC filter 32 is connected to each of the unit cells Ce1, Ce2, ..., Cen. As shown in FIG. 8, the RC filter 32 is configured by connecting resistors Rs and capacitors Cs in a low-pass configuration, and the voltages between the terminals of the n capacitors Cs are input to an integrated circuit IC. The integrated circuit IC has a battery impedance measurement function using a lock-in amplifier. The battery monitoring slave devices 51, 52 are configured to generate excitation signals to the unit cells Ce1, Ce2, ..., Cen using FET_M at a certain predetermined excitation frequency fexc, regardless of the operation of the current load 40 described above. When measuring the battery impedance, the integrated circuit IC measures the impedance at the excitation frequency fexc.

[0050] The integrated circuit IC includes n delta-sigma A / D converters 33, a digital filter 34, a lock-in amplifier 35, a control unit 30, and an external interface 31. The n delta-sigma A / D converters 33 input the inter-terminal voltages of each unit cell Ce1, Ce2, ... Cen via an RC filter 32 and perform A / D conversion. The digital filter 34 uses a CIC (Cascaded Integrator-Comb) filter, which reduces the sampling frequency and converts the voltages into multi-bit digital values.

[0051] The lock-in amplifier 35 receives the digital data output from the digital filter 34. As shown in Fig. 9, the lock-in amplifier 35 includes multipliers 36c and 36s that receive the IQ signals branched from the output of the digital filter 34, and LPFs 37c and 37s that receive the outputs of the multipliers 36c and 36s, cut high frequencies, and pass low frequencies.

[0052] The cosine wave (COS) and sine wave (SIN) signals generated by the SIN / COS generation unit 310a are input to the multipliers 36c and 36s, respectively, and are subjected to orthogonal transformation. The LPFs 37c and 37s receive the outputs of the multipliers 36c and 36s, cut off the high frequencies, obtain the desired DC data, and output the real and imaginary parts (corresponding to complex signals) to the control unit 30. Therefore, the lock-in amplifier 35 uses the data generated by the SIN / COS generation unit 310a to convert the data into a complex signal.

[0053] The control unit 30 can acquire information about the terminal voltages of the unit cells Ce1...Cen from the complex signal input from the lock-in amplifier 35. The external interface 31 is also connected to the external interface 4 of the battery monitoring master device 2, enabling communication between the master and slave. By communicating with each of the battery monitoring slave devices 51, 52, the battery monitoring master device 2 can acquire information about the terminal voltages of the unit cells Ce1, Ce2...Cen that each of the battery monitoring slave devices 51, 52 is responsible for.

[0054] A set of an RC filter 320, a delta-sigma A / D converter 330, a digital filter 340, and a lock-in amplifier 350 is also provided for the shunt resistor Rsh. The A / D converter 330 receives the terminal voltage of the shunt resistor Rsh via the RC filter 320, which is made up of a resistor Rs0 and a capacitor Cs0 (Vcp-Vcm in FIG. 8). The drain and source of the FET_M are connected in series to the shunt resistor Rsh, and a series-connected circuit of unit cells Ce1, Ce2, ... Cen is further connected via a current-limiting resistor Rz. The FET_M is composed of an N-channel MOS transistor.

[0055] <Impedance Measurement> When measuring the impedance of the battery pack at the excitation frequency fexc of the current load 40, the MPU 3 of the battery monitoring master device 2 sets the excitation frequency fexc of the SIN / COS generation unit 310a and transmits it to the target battery monitoring slave device (e.g., 51). The MPU 3 also transmits a measurement start command via the external interface 4, causing the battery monitoring slave device 51 to start operation and the SIN / COS generation unit 310a to output an excitation signal of the excitation frequency fexc set above. The sine wave signal output by the SIN / COS generation unit 310a is applied to the gate of FET_M via the DA converter 36.

[0056] When FET_M is turned on or off, the A / D converter 330 detects the terminal voltage corresponding to the excitation signal current flowing through the shunt resistor Rsh via the unit cells Ce1, Ce2...Cen and converts it into a digital signal. The digital filter 340 thins out the digital data, and the lock-in amplifier 350 performs an orthogonal conversion and cuts high frequencies, thereby obtaining a complex signal of the excitation signal current from DC data. The integrated circuit IC measures the impedance based on the excitation signal current obtained along with the voltage between each terminal of the unit cells Ce1, Ce2...Cen. The impedance measurement results are sent to the battery monitoring master device 2, a higher-level device, via the external interfaces 31 and 4.

[0057] <Explanation of Frequency Spectrum and Technical Significance of SIN / COS Generator 310a> Next, the frequency spectrum distribution of the internal nodes of the lock-in amplifier 35 will be described with reference to Fig. 9 and Fig. 10. As defined in Fig. 9, the output node of the digital filter 34 is node NA, the output node of the SIN / COS generator 310a is node NB, and the output node of the multiplier 36c (or 36s) is node NC.

[0058] In principle, the battery impedance is measured as described above, but components of the excitation frequency fexc and its harmonics are generated at the internal nodes of the lock-in amplifier 35. As shown in Figure 10, at node NA during impedance measurement, floor noise FN is superimposed at a low level on the excitation signal current / voltage components. As described above, the external RC filter 32 is used, so the floor noise FN is cut off in a predetermined high frequency band.

[0059] At node NA, the excitation signal component DS of the output of digital filter 34, its second harmonic component DSd, and the DC component DC of unit cells Ce1, Ce2, ... Cen appear superimposed on the frequency band of floor noise FN. At node NB, the main component SC of SIN / COS generating unit 310a is generated, and its harmonic component SCd and DC error component DCn are also contained in small amounts.

[0060] The multipliers 36c and 36s multiply the sine wave and cosine wave of the excitation signal at the excitation frequency fexc, thereby converting the frequencies into their sum and difference. Therefore, at the node NC, the DC component DC1 (dotted line in FIG. 10) obtained by multiplying the excitation signal component DS at the excitation frequency fexc at the node NA by the main component SC at the node NB can be obtained as the desired component.

[0061] In addition, at node NC, a DC error component DC2 (solid line in FIG. 10) resulting from the multiplication of DC component DC and DC error component DCn is also extracted. Furthermore, a DC error component DC3 (dashed line in FIG. 10) obtained by multiplying second harmonic component DSd of the excitation signal at excitation frequency fexc by harmonic component SCd of SIN / COS generation unit 310a is also extracted as an unwanted component.

[0062] The LPFs 37c and 37s provided downstream of the node NC can extract only low frequency components by cutting out predetermined high frequency components, thereby significantly reducing the floor noise FL, but cannot cut out the DC error components DC2 and DC3.

[0063] In this case, if the SIN / COS generating unit 310a generates at node NB a large DC error component DCn or harmonic component SCd having the same frequency as the component generated at node NA, this undesirably results in DC error components DC2 and DC3 being generated to a non-negligible degree. In particular, in order for the integrated circuit IC to accurately measure the DC component DC1 of the battery unit cells Ce1, Ce2, ... Cen, it is desirable to reduce the DC error components DC2 and DC3 as much as possible.

[0064] Summary of this embodiment In this embodiment, the SIN / COS generator 310a is configured as shown in the data generator 310 described in the third embodiment, so that digital data of sine and cosine waves with a fundamental period can be generated at node NB while minimizing the generation of DC error component DCn and harmonic component SCd. Therefore, only the desired principal component SC can be generated at node NB while suppressing the generation of DC error component DCn and harmonic component SCd. As a result, the DC error components DC2 and DC3 appearing at node NC can be reduced. This allows the DC component DC1 of the battery's unit cells Ce1, Ce2, ... Cen to be measured as accurately as possible.

[0065] Fifth Embodiment A fifth embodiment will be described with reference to Fig. 11 and Fig. 12. Fig. 11 shows an example of the electrical configuration of a battery monitoring system 501 in which the data generating device 310 shown in the third embodiment is incorporated as SIN / COS generating units 310a and 310b.

[0066] 11 have the same configuration as the generation unit S3 of the data generation device 310, and the configuration of the control units 30a and 30b are the same as the configuration of the control unit 30, so a description thereof will be omitted. Note that only the parts related to the features of this embodiment are extracted and shown, and other block configurations are omitted.

[0067] The battery monitoring system 501 includes a battery monitoring master device 2 and a plurality of battery monitoring slave devices 51 a, 51 b, 52, etc. The fifth embodiment differs from the fourth embodiment in that the functions of the battery monitoring slave device 51 of the fourth embodiment are divided into two battery monitoring slave devices 51 a, 51 b.

[0068] The battery monitoring slave devices 51a, 51b, 52... are used in a system in which an external current load 40 is excited at an excitation frequency fexc. The battery monitoring slave device 51a is provided for a shunt resistor Rsh. The battery monitoring slave device 51b is a device that monitors the terminal voltages of unit cells Ce1, Ce2...Cen of n secondary batteries connected in series. The series-connected circuit of unit cells Ce1, Ce2...Cen constitutes a battery pack, and the voltage of the series-connected circuit is applied to the current load 40.

[0069] The current load 40 is configured with an inverter or a DC-DC converter, and operates at a relatively low excitation frequency fexc (for example, approximately 0.1 Hz to 1 kHz). The battery monitoring slave device 51a includes an RC filter 320 and an integrated circuit ICa. The battery monitoring slave device 51b includes an RC filter 320 and an integrated circuit ICb. The battery monitoring slave devices 51a, 51b, or the integrated circuits ICa, ICb are configured as equivalent battery monitoring devices.

[0070] The integrated circuits ICa and ICb cooperate with each other to provide a lock-in amplifier-type battery impedance measurement function. When measuring the battery impedance, the integrated circuit ICa measures the excitation signal current at the excitation frequency fexc of the current load 40 through the shunt resistor Rsh. The integrated circuit ICb also measures the inter-terminal voltages of the unit cells Ce1, Ce2, ... Cen at the excitation frequency fexc of the current load 40, and measures the battery impedance based on these measurement results.

[0071] That is, in the fourth embodiment, the impedance of the battery was measured by intentionally passing an excitation signal current of excitation frequency fexc from the SIN / COS generation unit 310a through the unit cells Ce1, Ce2, ... Cen, but in the fifth embodiment, the impedance of the battery is measured when the excitation signal current of excitation frequency fexc passed through the current load 40 flows through the unit cells Ce1, Ce2, ... Cen, which is different.

[0072] The integrated circuit ICa includes a delta-sigma A / D converter 330, a digital filter 340, a lock-in amplifier 350, a control unit 30a, and an external interface 31a. The integrated circuit ICb includes n delta-sigma A / D converters 33, a digital filter 34, a lock-in amplifier 35, a control unit 30b, and an external interface 31b. The configurations of the delta-sigma A / D converters 33, 330, the digital filters 34, 340, and the lock-in amplifiers 35, 350 are the same as those in the fourth embodiment, and therefore descriptions thereof will be omitted. The configurations of the control units 30a, 30b, and the external interfaces 31a, 31b are also the same as those of the control unit 30 and external interface 31 in the fourth embodiment, and therefore descriptions thereof will be omitted.

[0073] As a result, by communicating with each battery monitoring slave device 51a, 51b, 52, etc., the battery monitoring master device 2 can obtain information on the excitation signal current handled by each battery monitoring slave device 51a, 51b, and information on the inter-terminal voltage of the unit cells Ce1, Ce2, etc., Cen.

[0074] <Explanation of the Significance of the Present Embodiment> It is difficult to strictly match, from default, the excitation frequency fexc of the inverter and DCDC converter that constitute the current load 40 and the measurement frequency fmeas of the sine wave and cosine wave of the SIN / COS generation units 310a and 310b of the integrated circuits ICa and ICb that constitute the battery monitoring system 501. If these excitation frequency fexc and measurement frequency fmeas do not match, it becomes difficult for the lock-in amplifiers 35 and 350 to detect the DC component DC1.

[0075] Therefore, in this embodiment, the measurement frequency fmeas of the excitation signal of the SIN / COS generation units 310a and 310b is swept to search for the excitation frequency fexc of the current load 40, and a measurement frequency fmeas that matches or is close to the excitation frequency fexc is searched for. The operation at this time will be described with reference to the flowchart in FIG.

[0076] 12, the battery monitoring master device 2 of the battery monitoring system 501 first excites an AC current of excitation frequency fexc by operating the inverter or DC-DC converter that constitutes the current load 40 in S1. Then, the excitation signal current flows through the unit cells Ce1, Ce2, ... Cen and the shunt resistor Rsh.

[0077] Next, in S2, the battery monitoring slave devices 51a, 51b use the sine / cosine generators 310a, 310b to generate sine and cosine waves at a start measurement frequency fmeas_start, which is lower than the excitation frequency fexc. Then, in S3, the control unit 30b measures the AC voltages associated with the unit cells Ce1, Ce2, ..., Cen, and the control unit 30a measures the AC current based on the shunt resistance Rsh to determine the signal strength. Here, the control units 30a, 30b monitor the strength of the real and imaginary parts (complex signals) obtained by converting the inter-terminal voltages and currents of the unit cells Ce1, Ce2, ..., Cen using the lock-in amplifiers 35, 350, based on the signals excited by the current load 40 of the battery monitoring system 501.

[0078] The control units 30a, 30b of the battery monitoring slave devices 51a, 51b transmit information on the measurement results of the signal strength to the MPU 3 of the battery monitoring master device 2. The MPU 3 sequentially records the information on the signal strength of the AC voltage and AC current in its internal memory, and determines whether these monitored strengths have become smaller than the immediately preceding values ​​(S4).

[0079] If the MPU 3 determines in S4 that the measurement frequency fmeas is greater than or equal to the measured value (NO in S4), it commands the sine / cosine generators 310a and 310b to increase the measurement frequency fmeas in S5. The sine / cosine generators 310a and 310b then change the measurement frequency fmeas and output sine waves and cosine waves to the lock-in amplifiers 35 and 350. Thereafter, the processes of S4 and S5 are repeatedly executed and the process waits until the monitor signal intensity becomes smaller than the immediately preceding value (YES in S4).

[0080] In other words, the battery monitoring slave devices 51a, 51b use the SIN / COS generating units 310a, 310b to sweep the measurement frequency fmeas of sine and cosine waves, while the control units 30a, 30b monitor the strength of the received signal, which has real and imaginary parts (complex signals) obtained by converting the signal excited by the battery monitoring system 501 using the lock-in amplifiers 35, 350 (function as a monitor unit). Then, the processes of S4 and S5 are repeatedly executed and the device waits until the monitored signal strength becomes smaller than the immediately preceding value (YES in S4). This allows the device to search for the excitation frequency fexc based on the monitored signal strength.

[0081] If the monitor signal strength is smaller than the immediately preceding value (YES in S4), the MPU 3 adopts the measurement result of the previous measurement frequency fmeas and commands that value as the measurement frequency fmeas for the sine / cosine generators 310a and 310b, which then use that value. This allows the sine / cosine generators 310a and 310b to be set to the measurement frequency fmeas that results in the highest monitor signal strength. As a result, the lock-in amplifiers 35 and 350 can easily detect the desired DC component DC1.

[0082] 1 for each measurement frequency fmeas (f1, f2, ...), the frequency settings of the sin / cos generating units 310a and 310b can be changed minutely. Therefore, as shown in this embodiment, even if the measurement frequency fmeas is swept at small frequency intervals, flexible response is possible.

[0083] Here, we have explained an embodiment in which the MPU 3 of the battery monitoring master device 2 takes the lead in commanding the measurement frequency fmeas, but this is not limited to this, and either the control unit 30a or 30b of the battery monitoring slave devices 51a, 51b may take the lead in commanding and sweeping the measurement frequency fmeas with each other.

[0084] Other Embodiments The present invention is not limited to the embodiments described above, and the following modifications or extensions are possible, for example: In the above embodiments, the data generators 10, 210, and 310 are described as generating predetermined wave data of sine waves (SIN) and cosine waves (COS) periodically over one or more periods, but the present invention is not limited to this and may be applied to devices that output data of either sine waves or cosine waves, or may be applied to devices that generate data for at least a portion of one period of these sine waves or cosine waves, for example, 30°, 60°, 90°, 180°, or 270°.

[0085] Although the embodiment in which the unit vector is rotated left on a two-dimensional complex plane for each predetermined step angle has been described, the present invention is not limited to this and may be applied to a right rotation. When rotating left, the coefficient B is set to a positive value and the coefficient −B is set to a negative value, but when rotating right, the coefficient B is set to a negative value and the coefficient −B is set to a positive value. Digital data of a predetermined wave can also be generated in this embodiment.

[0086] The data generating apparatus 10, 210, 310 and methods described herein may be implemented by a special purpose computer provided by configuring a processor and memory programmed to perform one or more functions embodied in a computer program, or the data generating apparatus 10, 210, 310 and methods described herein may be implemented by a special purpose computer provided by configuring a processor with one or more dedicated hardware logic circuits.

[0087] Alternatively, the data generating apparatus 10, 210, 310 and methods described herein may be implemented by one or more special-purpose computers configured by combining a processor and memory programmed to perform one or more functions with a processor configured with one or more hardware logic circuits. Also, the computer program may be stored as instructions executed by the computer on a non-transitory computer-readable storage medium.

[0088] In other words, the means and / or functions provided by a processor or the like can be provided by software recorded in a physical memory device and a computer that executes the software, software alone, hardware alone, or a combination of these. For example, some or all of the functions of a processor may be realized as hardware. A mode in which a certain function is realized as hardware includes a mode in which it is realized using one or more ICs, etc.

[0089] In addition to the contents of the claims, the present disclosure also includes the following disclosure: [1] A data generation device that generates digital data of at least a part of a sine wave (SIN) or a cosine wave (COS) (hereinafter abbreviated as a predetermined wave), comprising: a storage unit (11s, 11c) to which an initial value is given, and generation units (S1; S2; S3) that generate digital data by multiplying a stored value in the storage unit by a predetermined coefficient so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle of the predetermined wave, at a predetermined calculation interval that is shorter than the fundamental period of the predetermined wave.

[0090] [2] The data generating device according to [1], further comprising a reset unit (17, 12c, 12s) that resets an error by resetting a generated result of the generating unit at an arbitrary timing.

[0091] [3] The data generation device according to [1] or [2], wherein the generation unit generates the sine wave and the cosine wave as the predetermined waves, the generation unit repeats generating digital data of the sine wave and the cosine wave at the calculation interval for an initial half of the fundamental period of the sine wave and the cosine wave, and generates digital data of the sine wave and the cosine wave during the fundamental period by switching signs of the digital data of the sine wave and the cosine wave for the remaining period of the fundamental period of the sine wave and the cosine wave.

[0092] [4] The data generation device of [1] or [2], wherein the generation unit generates the sine wave and the cosine wave as the predetermined waves, and the generation unit repeats generating digital data of the sine wave and the cosine wave at the calculation interval for an initial quarter of the fundamental period of the sine wave and the cosine wave, and generates digital data of the sine wave and the cosine wave during the fundamental period by swapping signs of the digital data of the sine wave and the cosine wave and swapping data of the sine wave and the cosine wave for the remaining period of the fundamental period of the sine wave and the cosine wave.

[0093] [5] A battery monitoring device comprising the data generating device according to any one of [1] to [4], and a lock-in amplifier (35; 350) that converts the digital data generated by the data generating device into a complex signal.

[0094] [6] A battery monitoring device used in a system in which an external load (40) is excited at an excitation frequency, wherein the data generating device is configured to sweep the measurement frequencies of the sine wave and the cosine wave, and the battery monitoring device according to [5] is provided with a monitor unit (30a, 30b) that monitors the intensity of the complex signal obtained by converting the signal excited by the system using the lock-in amplifier, and searches for the excitation frequency based on the intensity of the monitored signal.

[0095] [7] A data generation method for generating digital data of at least a part of a sine wave (SIN) or a cosine wave (COS) (hereinafter abbreviated as a predetermined wave), wherein a data generation device has initial values ​​stored in a memory unit (11s, 11c), and a generation unit (S; S2; S3) generates digital data by multiplying a stored value in the memory unit by a predetermined coefficient so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle of the predetermined wave, at a predetermined calculation interval shorter than the fundamental period of the predetermined wave.

[0096] [8] A data generation program for generating at least a part of digital data of a sine wave (SIN) or a cosine wave (COS) (hereinafter abbreviated as a predetermined wave) by a data generation device, wherein the data generation device has a memory unit (11s, 11c) to which an initial value is given, and the data generation program causes a generation unit (S; S2; S3) to execute the following steps to generate digital data by multiplying a stored value in the memory unit by a predetermined coefficient so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle of the predetermined wave, at a predetermined calculation interval shorter than the fundamental period of the predetermined wave.

[0097] In the drawings, 10, 210, and 310 indicate data generating devices, 11s and 11c indicate registers (storage units), 310a and 310b indicate SIN / COS generating units (data generating devices), S1, S2, and S3 indicate generating units, IC, ICa, and ICb indicate integrated circuits (battery monitoring devices), and 51, 51a, 51b, and 52 indicate battery monitoring slave devices (battery monitoring devices).

[0098] Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

Claims

1. A data generation device that generates at least a portion of digital data of a sine wave (SIN) or cosine wave (COS) (hereinafter abbreviated as a specified wave), comprising: a memory unit (11s, 11c) to which an initial value is given; and a generation unit (S1; S2; S3) that generates digital data by multiplying a stored value in the memory unit by a predetermined coefficient so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle of the specified wave, at a predetermined calculation interval shorter than the fundamental period of the specified wave.

2. A data generating device according to claim 1, further comprising a reset section (17, 12c, 12s) that resets an error by resetting a result generated by said generating section at any timing.

3. The data generating device of claim 1, wherein the generating unit generates the sine wave and the cosine wave as the specified waves, and the generating unit repeats generating digital data of the sine wave and the cosine wave at the calculation interval for an initial half of the fundamental period of the sine wave and the cosine wave, and generates digital data of the sine wave and the cosine wave during the fundamental period by switching the signs of the digital data of the sine wave and the cosine wave for the remaining period of the fundamental period of the sine wave and the cosine wave.

4. The data generating device of claim 1, wherein the generating unit generates the sine wave and the cosine wave as the specified waves, and the generating unit repeats generating digital data of the sine wave and the cosine wave at the calculation interval for an initial 1 / 4 of the basic period of the sine wave and the cosine wave, and generates digital data of the sine wave and the cosine wave during the basic period by swapping the signs of the digital data of the sine wave and the cosine wave and swapping the data of the sine wave and the cosine wave for the remaining period of the basic period of the sine wave and the cosine wave.

5. A battery monitoring device comprising a data generating device according to any one of claims 1 to 4, and a lock-in amplifier (35; 350) for converting digital data generated by the data generating device into a complex signal.

6. A battery monitoring device used in a system in which an external load (40) is excited at an excitation frequency, the data generating device being configured to sweep the measurement frequencies of the sine wave and the cosine wave, the battery monitoring device being equipped with a monitor unit (30a, 30b) that monitors the intensity of the complex signal obtained by converting the signal excited by the system using the lock-in amplifier, and the battery monitoring device as described in claim 5, which searches for the excitation frequency based on the intensity of the monitored signal.

7. A data generation method for generating at least a part of digital data of a sine wave (SIN) or cosine wave (COS) (hereinafter abbreviated as a specified wave), wherein the data generation device has initial values ​​in a memory unit (11s, 11c), and a generation unit (S; S2; S3) generates digital data by multiplying the stored value in the memory unit by a predetermined coefficient so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle of the specified wave, at a predetermined calculation interval shorter than the fundamental period of the specified wave.

8. A data generation program for generating at least a portion of digital data of a sine wave (SIN) or cosine wave (COS) (hereinafter abbreviated as a specified wave) by a data generation device, wherein the data generation device has a memory unit (11s, 11c) to which an initial value is given, and the data generation program executes the following steps: a procedure for giving an initial value to the memory unit; and a procedure for causing a generation unit (S; S2; S3) to generate digital data by multiplying the stored value in the memory unit by a predetermined coefficient so as to rotate a unit vector on a two-dimensional complex plane for each predetermined step angle of the specified wave, at a predetermined calculation interval shorter than the fundamental period of the specified wave.

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