Head-wearable electronic device having multiple displays, and method thereof

Abstract

A head-wearable electronic device is provided. The head-wearable electronic device may comprise: a head-wearable housing structure; a display assembly including a first display and a second display located over each eye of a user wearing the head-wearable housing structure; a first display driver circuit connected to the first display; a second display driver circuit connected to the second display; and a processor including one or more processing circuits.

Description

Head-worn electronic device having multiple displays and method thereof

[0001] The following descriptions relate to a head-wearable electronic device having multiple displays and a method thereof.

[0002] A head-wearable electronic device may be used to provide augmented reality (AR) services, virtual reality (VR) services, mixed reality (MR) services, or extended reality (XR) services. For example, the head-wearable electronic device may include multiple displays, each positioned over the user's eyes. The multiple displays may be used to display images.

[0003] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above-described matters constitute prior art related to the present disclosure.

[0004] A head-wearable electronic device is described. The head-wearable electronic device may include a head-wearable housing structure. The head-wearable electronic device may include a display assembly including a first display and a second display, each positioned over the eyes of a user wearing the head-wearable housing structure. The head-wearable electronic device may include a first display driving circuit connected to the first display. The head-wearable electronic device may include a second display driving circuit connected to the second display. The head-wearable electronic device may include a processor including one or more processing circuits. The processor may be configured to transmit a command to the first display driving circuit at a first timing and to transmit the command to the second display driving circuit at a second timing.The first display driving circuit may be configured to, based on receiving the command transmitted from the processor at the first timing, transmit a first signal indicating reception of the command to the second display driving circuit and postpone control of the first display according to the command until receiving a second signal indicating reception of the command from the second display driving circuit, and, in response to receiving the command transmitted from the processor at the first timing, transmit the first signal to the second display driving circuit, and, based on receiving the second signal from the second display driving circuit in response to receiving the command transmitted from the processor at the second timing, execute the control of the first display according to the command, thereby synchronizing the control of the second display according to the command with the control of the first display according to the command.

[0005] A head-worn electronic device is described. The head-worn electronic device may include a head-worn housing structure. The head-worn electronic device may include a display assembly including a first display and a second display, each of which is positioned over the eyes of a user wearing the head-worn housing structure. The head-worn electronic device may include a first display driving circuit connected to the first display. The head-worn electronic device may include a second display driving circuit connected to the second display. The head-worn electronic device may include a processor including one or more processing circuits. The processor may be configured to transmit a command to the first display driving circuit and to transmit the command to the second display driving circuit while a first signal is transmitted from the first display driving circuit to the second display driving circuit and a second signal is transmitted from the second display driving circuit to the first display driving circuit. Each of the first display driving circuit and the second display driving circuit may be configured to postpone control of each of the first display and the second display according to the command until a signal transmitted from the first display driving circuit to the second display driving circuit changes from the first signal to a third signal and a signal transmitted from the second display driving circuit to the first display driving circuit changes from the second signal to a fourth signal, based on receiving the command paired with a predetermined command from the processor.Each of the first display driving circuit and the second display driving circuit may be configured to execute control of each of the first display and the second display according to the command while the signal transmitted from the first display driving circuit to the second display driving circuit is maintained as the first signal and the signal transmitted from the second display driving circuit to the first display driving circuit is maintained as the second signal, based on receiving the command that is not paired with the predetermined command from the processor.

[0006] Figure 1 illustrates an exemplary head-worn electronic device.

[0007] Figure 2 is a simplified block diagram of an exemplary head-worn electronic device.

[0008] FIG. 3 illustrates an exemplary method executed within a head-worn electronic device to synchronize control of a first display in accordance with a command transmitted from a processor assembly to a first display driving circuit with control of a second display in accordance with the command transmitted from the processor assembly to a second display driving circuit.

[0009] FIG. 4 illustrates an exemplary method implemented within a head-worn electronic device to asynchronously execute control of a first display in accordance with a command transmitted from a processor assembly to a first display driving circuit and control of a second display in accordance with the command transmitted from the processor assembly to a second display driving circuit.

[0010] FIG. 5 illustrates an exemplary method executed within a head-worn electronic device to process commands and other commands transmitted from a processor assembly to each of a first display driver circuit and a second display driver circuit.

[0011] FIG. 6 illustrates an exemplary method executed within a head-worn electronic device to synchronize waking a first display from a sleep state in response to a command transmitted from a processor assembly to a first display driver circuit with waking a second display from a sleep state in response to a command transmitted from the processor assembly to a second display driver circuit.

[0012] FIG. 7 illustrates an exemplary method executed within a head-worn electronic device to synchronize changing a brightness level of a first display in response to a command transmitted from a processor assembly to a first display driver circuit with changing a brightness level of a second display in response to a command transmitted from the processor assembly to a second display driver circuit.

[0013] FIG. 8 illustrates an exemplary method executed within a head-worn electronic device to change the state of a first screen displayed on a first display at a first rate that is higher than a second rate that changes the state of a second screen displayed on a second display.

[0014] Figure 9 illustrates an example of signals exchanged between a first display driving circuit and a second display driving circuit.

[0015] FIG. 10 is a block diagram of an electronic device within a network environment according to various embodiments.

[0016] FIG. 11 is a block diagram of a display module according to various embodiments.

[0017] Figure 1 illustrates an exemplary head-worn electronic device.

[0018] Referring to FIG. 1, a head-worn electronic device (100) may include a head-worn housing structure (110). The head-worn housing structure (110) may at least partially enclose at least a portion of one or more components of the head-worn electronic device (100) (as exemplified in the description of FIG. 2) for protection from debris and other degrading forces external to the head-worn electronic device (100). The head-worn housing structure (110) may include an eye frame (111), a left temple frame (112) extending from the eye frame (111), and a right temple frame (113) extending from the eye frame (111). For example, when the head-worn electronic device (100) is worn by a user (190), the head-worn housing structure (110) may be configured such that the eye frame (111) is positioned in front of the eyes (or at least one eye) of the user's (190) head, the left temple frame (112) is held against the left surface of the user's (190) head, and the right temple frame (113) is held against the right surface of the user's (190) head.

[0019] A head-worn electronic device (100) may include a display assembly (120). The display assembly (120) may be arranged relative to a head-worn structure (110) (or eye frame (111)). The display assembly (120) may include a first display (121) positioned over a left eye of a user (190) wearing the head-worn structure (110) and a second display (122) positioned over a right eye of the user (190) wearing the head-worn structure (110). Each of the first display (121) and the second display (122) may include any suitable type of display for presenting visual data to a user wearing the head-worn structure (110) in the form of visible light. As a non-limiting example, the first display (121) and the second display (122) may be usable (or configured) to display visual content as two separate images (e.g., including a first image and a second image) such that the visual content is displayed as a stereoscopic image. For example, the first image may be displayed on the first display (121) and the second image may be displayed on the second display (122). The head-worn electronic device (100) may include a first display driving circuit used to display the first image on the first display (121) and a second display driving circuit used to display the second image on the second display (122). A head-worn electronic device (100) including the first display driving circuit and the second display driving circuit is exemplified in the description of FIG. 2 .

[0020] Figure 2 is a simplified block diagram of an exemplary head-worn electronic device.

[0021] Referring to FIG. 2, the head-worn electronic device (100) may include a processor assembly (210), a memory assembly (220), a display assembly (120), a first display driving circuit (221), and a second display driving circuit (222).

[0022] The processor assembly (210) may include any processing circuitry operative to control the performance and operations of one or more assemblies (e.g., the display assembly (120)) of the head-mounted electronic device (100). For example, the processor assembly (210) may include one or more processing circuits. For example, the processor assembly (210) may include a central processing unit (CPU) (e.g., including a central processing circuit). For example, the processor assembly (210) may include a first display processing unit (DPU) (211) (e.g., including a first display processing circuit) and a second DPU (212) (e.g., including a second display processing circuit). For example, the processor assembly (210) may be implemented as a single chip or a single chipset, such as a system on chip (SoC). For example, the processor assembly (210) may be implemented as a plurality of chips or a plurality of chip sets. For example, the processor assembly (210) may be referred to as one or more processors (210) or a processor (210).

[0023] For example, the processor assembly (210) may be used to execute or run one or more software applications, such as an operating system software application, a firmware software application, a media playback software application, a media editing software application, and / or any other suitable software applications.

[0024] The memory assembly (220) may include one or more storage media. For example, the one or more storage media may include a hard drive, flash memory, permanent memory such as read-only memory (ROM), semi-permanent memory such as random access memory (RAM), any other suitable type of storage assembly, or any combination thereof. The memory assembly (220) may include a cache memory, which is one or more different types of memory used to temporarily store data for the function or feature of the head-mounted electronic device (100). The memory assembly (220) may be fixedly embedded within the head-worn electronic device (100) or may be incorporated into one or more suitable types of components (e.g., a subscriber identity module (SIM) card and / or a secure digital (SD) memory card) that can be repeatedly inserted into and removed from the head-worn electronic device (100).

[0025] The memory assembly (220) may store one or more software applications, such as an operating system software application, a firmware software application, a media playback software application, a media editing software application, and / or any other suitable software applications. For example, the one or more software applications may include instructions executable by at least a portion of the processor assembly (210).

[0026] The display assembly (120) may include any suitable circuitry for displaying visual data (or visual information) generated or acquired by the processor assembly (210) with visible light. The display assembly (120) may include a first display (121) positioned over the left eye of a user (e.g., user (190)) wearing the head-mounted housing structure (110) and a second display (122) positioned over the right eye of the user wearing the head-mounted housing structure (110). The first display (121) may include first sub-pixels. By way of non-limiting example, the first sub-pixels may include a set of sub-pixels for emitting red light, a set of sub-pixels for emitting green light, a set of sub-pixels for emitting blue light, and / or sub-pixels for emitting white light. For example, each of the first sub-pixels may include a first light-emitting element (e.g., an organic light emitting diode (OLED), an OLED on silicon (OLEDoS), a micro LED, a liquid crystal display (LCD), or a liquid crystal on silicon (LCoS)) for emitting light and / or a color filter. The second display (122) may include second sub-pixels. As a non-limiting example, the second sub-pixels may include a set of sub-pixels for emitting red light, a set of sub-pixels for emitting green light, a set of sub-pixels for emitting blue light, and / or sub-pixels for emitting white light. For example, each of the first sub-pixels may include a second light-emitting element (e.g., an OLED, an OLEDoS, a micro LED, an LCD, or an LCoS) for emitting light and / or a color filter.

[0027] The first display driver circuit (display driver circuitry or display driver integrated circuitry) (221) may be connected to the first display (121) among the first display (121) and the second display (122). The first display driver circuit (221) may be connected to the processor assembly (210). For example, the first display driver circuit (221) may be connected to the first DPU (211) among the first DPU (211) and the second DPU (212).

[0028] The first display driving circuit (221) may be used to display visual information transmitted from the processor assembly (210) (e.g., data or information regarding the first image as exemplified in the description of FIG. 1) on the first display (121). For example, the first display driving circuit (221) may be configured to control the first display (121) for displaying the visual information. As a non-limiting example, the visual information may be transmitted from the CPU within the processor assembly (210) to the first display driving circuit (221) via the first DPU (211).

[0029] The first display driving circuit (221) can control the first display (121) under the control of the processor assembly (210). For example, the first display driving circuit (221) can control the first display (121) according to a command received from the first DPU (211) (or from the CPU in the processor assembly (210) through the first DPU (211)).

[0030] The second display driver circuit (display driver circuitry or display driver integrated circuitry) (222) may be connected to the second display (122) among the first display (121) and the second display (122). The second display driver circuit (222) may be connected to the processor assembly (210). For example, the second display driver circuit (222) may be connected to the second DPU (212) among the first DPU (211) and the second DPU (212).

[0031] The second display driving circuit (222) may be used to display visual information transmitted from the processor assembly (210) (e.g., data or information regarding the second image as exemplified in the description of FIG. 1) on the second display (122). For example, the second display driving circuit (222) may be configured to control the second display (122) for displaying the visual information. As a non-limiting example, the visual information may be transmitted from the CPU within the processor assembly (210) to the second display driving circuit (222) via the second DPU (212).

[0032] The second display driving circuit (222) can control the second display (122) under the control of the processor assembly (210). For example, the second display driving circuit (222) can control the second display (122) according to a command received from the second DPU (212) (or from the CPU in the processor assembly (210) through the second DPU (212)).

[0033] The first display driving circuit (221) may be connected to the second display driving circuit (222). For example, the first display driving circuit (221) may be connected to the second display driving circuit (222) via the first interface (241), and may be connected to the second display driving circuit (222) via the second interface (242). For example, the first interface (241) may be used to transmit the first signal and / or the third signal exemplified below from the first display driving circuit (221) to the second display driving circuit (222), and the second interface (242) may be used to transmit the second signal and / or the fourth signal exemplified below from the second display driving circuit (222) to the first display (221). As a non-limiting example, the first display driving circuit (221) may include an output pin (e.g., a general purpose output (GPO) pin) of the first interface (241) and an input pin (e.g., a general purpose input (GPI) pin) of the second interface (242). As a non-limiting example, the second display driving circuit (222) may include an output pin (e.g., a GPO pin) of the second interface (242) and an input pin (e.g., a GPI pin) of the first interface (241).

[0034] For example, the head-mounted electronic device (100) may further include a power management integrated circuit (PMIC) (230). The PMIC (230) may include any suitable circuitry for receiving and / or generating power and providing such power to each of the first display driving circuit (221) and the second display driving circuit (222). For example, the PMIC (230) may be used to provide the first driving voltage and the second driving voltage exemplified in the description of FIG. 6 to each of the first display driving circuit (221) and the second display driving circuit (222).

[0035] For example, the head-worn electronic device (100) may further include another PMIC (not shown) that is distinct from the PMIC (230). For example, the other PMIC may be used to provide a voltage that is distinct from the first driving voltage and the second driving voltage to each of the first display driving circuit (221) and the second display driving circuit (222). As a non-limiting example, the PMIC (230) and the other PMIC may be included in one power supply assembly. As a non-limiting example, the power supply assembly may include a rechargeable battery of the head-worn electronic device (100).

[0036] A command for controlling the display assembly (120) can be transmitted from the processor assembly (210) to each of the first display driving circuit (221) and the second display driving circuit (222) while providing visual information using the display assembly (120). The command to be executed (or processed) (or used) by the first display driving circuit (221) for controlling the first display (121) is transmitted from the first DPU (211), and the command to be executed (or processed) (or used) by the second display driving circuit (222) for controlling the second display (122) is transmitted from the second DPU (212). Therefore, the first timing at which the command to be executed by the first display driving circuit (221) for controlling the first display (121) is transmitted to the first display driving circuit (221) may be different from the second timing at which the command to be executed by the second display driving circuit (222) for controlling the second display (122) is transmitted to the second display driving circuit (222). For example, since the first timing is different from the second timing, controlling the first display (121) (immediately or instantly) in response to the command transmitted from the first DPU (211) to the first display driving circuit (221) at the first timing and controlling the second display (122) (immediately or instantly) in response to the command transmitted from the second DPU (212) to the second display driving circuit (222) at the second timing may be asynchronous.For example, if the control of the first display (121) and the control of the second display (122) are asynchronous, this may cause non-intended operation (or abnormal operation) of at least a portion of the display assembly (120) (e.g., the first display (121) and / or the second display (122). As a non-limiting example, if the command is to wake up the display assembly (120) from a sleep state, the control of the first display (121) and the control of the second display (122) are asynchronous, this may cause unintended display of white color (e.g., whitening phenomenon) on a portion of the first display (121) or a portion of the second display (122). As a non-limiting example, if the command is to change the brightness level of each of the first display (121) and the second display (122), the control of the first display (121) and the control of the second display (122) The asynchronous control of the display (122) may reduce the quality of the screen displayed on the display assembly (120) due to the timing of the change in the brightness level of the second display (122) being different from the timing of the change in the brightness level of the first display (121).

[0037] For example, synchronization of the control of the first display (121) and the control of the second display (122) may be utilized within the head-worn electronic device (100). For example, the head-worn electronic device (100) may include a first interface (241) and a second interface (242) for synchronization between the control of the first display (121) and the control of the second display (122). Synchronizing the control of the first display (121) and the control of the second display (122) using the first interface (241) and the second interface (242) is exemplified within the description of FIG. 3.

[0038] FIG. 3 illustrates an exemplary method executed within a head-worn electronic device to synchronize control of a first display in accordance with a command transmitted from a processor assembly to a first display driving circuit with control of a second display in accordance with the command transmitted from the processor assembly to a second display driving circuit.

[0039] Referring to FIG. 3, the processor assembly (210) can transmit a command (303) to the first display driving circuit (221) at a timing (301) and transmit a command (303) to the second display driving circuit (222) at a timing (302) different from the timing (301). For example, the command (303) can be transmitted from the first DPU (211) to the first display driving circuit (221) at a timing (301). For example, the command (303) can be transmitted from the second DPU (212) to the second display driving circuit (222) at a timing (302). As a non-limiting example, the command (303) should be applied to the first display (121) and the second display (122) simultaneously (synchronously or concurrently), but the timing (302) at which the command (303) is transmitted from the second DPU (212) to the second display driving circuit (222) may be after the timing (301) at which the command (303) is transmitted from the first DPU (211) to the first display driving circuit (221) due to the difference between the priorities of the first DPU (211) and the second DPU (212).

[0040] The first display driving circuit (221) can synchronize controlling the first display (121) according to a command (303) transmitted from the first DPU (211) at timing (301) with controlling the second display (122) according to a command (303) transmitted from the second DPU (212) at timing (302). In order to synchronize controlling the first display (121) according to a command (303) transmitted from the first DPU (211) at timing (301) with controlling the second display (122) according to a command (303) transmitted from the second DPU (212) at timing (302), the first display driving circuit (221) can delay controlling the first display (121) according to a command (303) until the second display driving circuit (222) receives the command (303).

[0041] The second display driving circuit (222) can synchronize controlling the second display (122) according to a command (303) transmitted from the second DPU (212) at timing (302) with controlling the first display (121) according to a command (303) transmitted from the first DPU (211) at timing (301). In order to synchronize controlling the second display (122) according to a command (303) transmitted from the second DPU (212) at timing (302) with controlling the first display (121) according to a command (303) transmitted from the first DPU (211) at timing (301), the second display driving circuit (222) can delay controlling the second display (122) according to a command (303) until the first display driving circuit (221) receives the command (303).

[0042] For example, the first display driving circuit (221) may transmit a first signal (311) to the second display driving circuit (222) via the first interface (241), as indicated by arrow (304), in response to receiving a command (303) transmitted from the first DPU (211) at timing (301) to indicate (or inform) the second display driving circuit (222) that the command (303) has been received from the first DPU (211). For example, the first display driving circuit (221) may delay controlling the first display (121) according to the command (303) transmitted from the first DPU (211) at timing (301) until it transmits a first signal (311) to the second display driving circuit (222) and receives a second signal (312) from the second display driving circuit (222), as indicated by arrows (305) and (306), in order to synchronize controlling the first display (121) according to the command (303) transmitted from the first DPU (211) at timing (301) with controlling the second display (122) according to the command (303) transmitted from the second DPU (212) at timing (302). For example, since the first display driving circuit (221) is in a state in which it does not transmit the first signal (311) to the second display driving circuit (222) and does not receive the second signal (312) from the second display driving circuit (222) at the timing (396) after the timing (301) in which the command (303) is received, the first display driving circuit (221) may not execute control of the first display (121) according to the command (303) at the timing (396) (or may refrain from executing the control of the first display (121) according to the command (303)).For example, since the first display driving circuit (221) is in a state where it transmits the first signal (311) to the second display driving circuit (222) at a timing (307) after the timing (301) at which the command (303) is received, but does not receive the second signal (312) from the second display driving circuit (222), the first display driving circuit (221) may not execute control of the first display (121) according to the command (303) at the timing (307).

[0043] For example, the second display driver circuit (222) may transmit a second signal (312) to the first display driver circuit (221) via the second interface (242), as indicated by arrow (308), in response to receiving a command (303) transmitted from the second DPU (212) at timing (302) to indicate (or inform) the first display driver circuit (221) that the command (303) has been received from the second DPU (212). For example, the second display driving circuit (222) may delay controlling the second display (122) according to the command (303) transmitted from the second DPU (212) at timing (302) until it transmits a second signal (312) to the first display driving circuit (221) and receives the first signal (311) from the first display driving circuit (221), in order to synchronize controlling the second display (122) according to the command (303) transmitted from the second DPU (212) at timing (302) with controlling the first display (121) according to the command (303) transmitted from the first DPU (211) at timing (301). For example, since the second display driving circuit (222) is in a state in which it receives the first signal (311) from the first display driving circuit (221) at timing (326) but does not receive the command (303) from the second DPU (212), the second display driving circuit (222) may not execute control of the second display (122) according to the command (303) at timing (326) (or may refrain from executing the control of the second display (122) according to the command (303)).For example, since the second display driving circuit (222) is in a state of receiving the first signal (311) from the first display driving circuit (221) at a timing (327) after the timing (302) at which the command (303) is received, but not transmitting the second signal (312) to the first display driving circuit (221), the second display driving circuit (222) may not execute control of the second display (122) according to the command (303) at the timing (327).

[0044] For example, the first display driving circuit (221) can execute control of the first display (121) according to the command (303) based on transmitting a first signal (311) to the second display driving circuit (222) as indicated by arrow (305) and receiving a second signal (312) from the second display driving circuit (222) as indicated by arrow (306). For example, the second display driving circuit (222) can execute control of the second display (122) according to the command (303) based on receiving a first signal (311) from the first display driving circuit (221) as indicated by arrow (309) and transmitting a second signal (312) to the first display driving circuit (221) as indicated by arrow (310). For example, since the first signal (311) transmitted from the first display driving circuit (221) to the second display driving circuit (222) indicates that the command (303) is received by the first display driving circuit (221), and the second signal (312) transmitted from the second display driving circuit (222) to the first display driving circuit (221) indicates that the command (303) is received by the second display driving circuit (222), the control of the first display (121) according to the command (303) can be synchronized with the control of the second display (122) according to the command (303). As a non-limiting example, the first display driving circuit (221) can execute the control of the first display (121) according to the command (303) in response to the timing of the vertical synchronization signal used for the first display driving circuit (221). For example, the first display driving circuit (221) can execute the control of the first display (121) according to the command (303) in response to the timing of the vertical synchronization signal generated after transmitting the first signal (311) and receiving the second signal (312).As a non-limiting example, the second display driving circuit (222) may execute the control of the second display (122) according to the command (303) in response to the timing of the vertical synchronization signal used for the second display driving circuit (222). For example, the second display driving circuit (222) may execute the control of the second display (122) according to the command (303) in response to the timing of the vertical synchronization signal generated after receiving the first signal (311) and transmitting the second signal (312).

[0045] As a non-limiting example, the first display driving circuit (221) may stop transmitting the first signal (311) to the second display driving circuit (222) and transmit the third signal (313) to the second display driving circuit (222) based on executing the control of the first display (121) according to the command (not shown) to be transmitted from the processor assembly (210) (or the first DPU (211)) to the first display driving circuit (221) with the control of the second display (122) according to the command to be transmitted from the processor assembly (210) (or the second DPU (212)) to the second display driving circuit (222). For example, a signal provided from the first display driving circuit (221) to the second display driving circuit (222) may be changed from the first signal (311) to the third signal (313) in response to executing the control of the first display (121) according to the command (303).

[0046] As a non-limiting example, the second display driving circuit (222) may stop transmitting the second signal (312) to the first display driving circuit (221) and transmit the fourth signal (314) to the first display driving circuit (221) based on executing the control of the second display (122) according to the command (303) to be transmitted from the processor assembly (210) (or the second DPU (212)) to the second display driving circuit (222) in order to synchronize the control of the second display (122) according to the command (not shown) to be transmitted from the processor assembly (210) (or the first DPU (211)) to the first display driving circuit (221). For example, a signal provided from the second display driving circuit (222) to the first display driving circuit (221) may be changed from the second signal (312) to the fourth signal (314) in response to executing the control of the second display (122) according to the command (303).

[0047] As a non-limiting example, the command (303) may be transmitted from the first DPU (211) to the first display driving circuit (221) at timing (301) while the third signal (313) is transmitted from the first display driving circuit (221) to the second display driving circuit (222). For example, the first display driving circuit (221) may change the signal transmitted from the first display driving circuit (221) to the second display driving circuit (222) from the third signal (313) to the first signal (311) in response to the command (303) transmitted from the first DPU (211) at timing (301). For example, the first display driving circuit (221) may stop transmitting the third signal (313) to the second display driving circuit (222) and transmit the first signal (313) to the second display driving circuit (222) in response to a command (303) transmitted from the first DPU (211) at timing (301).

[0048] As a non-limiting example, the command (303) may be transmitted from the second DPU (212) to the second display driving circuit (222) at timing (302) while the fourth signal (314) is transmitted from the second display driving circuit (222) to the first display driving circuit (221). For example, the second display driving circuit (222) may change the signal transmitted from the second display driving circuit (222) to the first display driving circuit (221) from the fourth signal (314) to the second signal (312) in response to the command (303) transmitted from the second DPU (212) at timing (302). For example, the second display driving circuit (222) may stop transmitting the fourth signal (314) to the first display driving circuit (221) and transmit the second signal (312) to the first display driving circuit (221) in response to a command (303) transmitted from the second DPU (212) at timing (302).

[0049] As a non-limiting example, the processor assembly (210) may transmit a predetermined command (333) to each of the first display driving circuit (221) and the second display driving circuit (222) before the command (303) is transmitted to indicate (or inform) each of the first display driving circuit (221) and the second display driving circuit (222) that a command (303) is transmitted from the processor assembly (210) to cause (or require) synchronization of control of the first display (121) with control of the second display (122).

[0050] For example, the first DPU (211) can transmit a predetermined command (333) to the first display driving circuit (221) at timing (335) and transmit a command (303) to the first display driving circuit (221) within a time interval (334) from timing (335). For example, the first display driving circuit (221) may recognize that a command (e.g., command (303)) causing (or requesting) synchronization of control of the first display (121) with control of the second display (122) is to be received from the first DPU (211) based on a predetermined command (333) transmitted from the first DPU (211) at a timing (335), and may transmit a first signal (311) to the second display driving circuit (222) based on receiving the command (303) transmitted from the first DPU (211) at a timing (301) within a time interval (334) without executing control of the first display (121) according to the command (303). For example, the command (303) transmitted within the time interval (334) may be paired with the predetermined command (333).

[0051] For example, the second DPU (212) may transmit a predetermined command (333) to the second display driving circuit (222) at timing (337) and transmit a command (303) to the second display driving circuit (222) within a time interval (336) from timing (337). As a non-limiting example, the length of the time interval (336) may be (substantially) equal to the length of the time interval (334). For example, the second display driving circuit (222) may recognize that a command (e.g., command (303)) causing (or requesting) synchronization of control of the first display (121) with control of the second display (122) is to be received from the second DPU (212) based on a predetermined command (333) transmitted from the second DPU (212) at a timing (337), and may transmit a second signal (312) to the first display driving circuit (221) based on receiving the command (303) transmitted from the second DPU (212) at a timing (302) within a time interval (336) without executing control of the second display (122) according to the command (303). For example, the command (303) transmitted within the time interval (336) may be paired with the predetermined command (333).

[0052] As a non-limiting example, the processor assembly (210) may transmit a plurality of commands to each of the first display driver circuit (221) and the second display driver circuit (222) that cause (or require) synchronization of control of the first display (121) executed by the first display driver circuit (221) with control of the second display (122) executed by the second display driver circuit (222). For example, the processor assembly (210) may further transmit another predetermined command (343) to each of the first display driver circuit (221) and the second display driver circuit (222) after transmitting the plurality of commands, indicating completion of transmission of the plurality of commands, to indicate (or inform) that the plurality of commands will be transmitted to each of the first display driver circuit (221) and the second display driver circuit (222).

[0053] For example, in response to receiving a predetermined command (333) from the first DPU (211), the first display driving circuit (221) may store a plurality of commands received from the first DPU (211) in a storage medium (or storage device) (e.g., memory, register, or buffer) of the first display driving circuit (221) after the predetermined command (333) is received, and in response to receiving another predetermined command (343) from the first DPU (211), transmit a first signal (311) to the second display driving circuit (222).

[0054] For example, in response to receiving a predetermined command (333) from the second DPU (212), the second display driving circuit (222) may store the plurality of commands received from the second DPU (212) in a storage medium (or storage device) (e.g., memory, register, or buffer) of the second display driving circuit (222) after receiving the predetermined command (333), and in response to receiving another predetermined command (343) from the second DPU (212), transmit a second signal (312) to the first display driving circuit (221).

[0055] For example, the first display driving circuit (221) can control the first display (121) according to the plurality of commands stored in the storage medium of the first display driving circuit (221) in response to the transmission of the first signal (311) and the reception of the second signal (312). For example, the second display driving circuit (222) can control the second display (122) according to the plurality of commands stored in the storage medium of the second display driving circuit (222) in response to the reception of the first signal (311) and the transmission of the second signal (312).

[0056] As a non-limiting example, command (303) may not be transmitted from the second DPU (212) to the second display driving circuit (222) due to the priority of the second DPU (212) being lower than the priority of the first DPU (211). For example, the first display driving circuit (221) may activate a timer in response to command (303) to prevent control of the first display (121) according to command (303) from not being executed by command (303) not being transmitted from the second DPU (212) to the second display driving circuit (222). For example, the first display driving circuit (221) may execute control of the first display (121) according to command (303) in response to confirming expiration of the timer before the second signal (312) is received from the second display driving circuit (222).

[0057] For example, a command transmitted from the processor assembly (210) to each of the first display driving circuit (221) and the second display driving circuit (222) may not require (or cause) synchronization of control of the first display (121) executed by the first display driving circuit (221) with control of the second display (122) executed by the second display driving circuit (222). Operations associated with such a command are exemplified within the description of FIG. 4.

[0058] FIG. 4 illustrates an exemplary method implemented within a head-worn electronic device to asynchronously execute control of a first display in accordance with a command transmitted from a processor assembly to a first display driving circuit and control of a second display in accordance with the command transmitted from the processor assembly to a second display driving circuit.

[0059] Referring to FIG. 4, the processor assembly (210) can transmit a command (403) to each of the first display driving circuit (221) and the second display driving circuit (222) that does not require (or cause) synchronization of control of the second display (122) executed by the second display driving circuit (222) with control of the first display (121) executed by the first display driving circuit (221). As a non-limiting example, the command (403) can be transmitted from the first DPU (211) to the first display driving circuit (221) at a timing (401) that is outside a time interval (334) from a timing (335) at which a predetermined command (333) is transmitted from the first DPU (211) to the first display driving circuit (221). As a non-limiting example, the command (403) may be transmitted from the second DPU (212) to the second display driving circuit (222) at a timing (402) that is outside of a time interval (336) from a timing (337) at which the predetermined command (333) is transmitted from the second DPU (212) to the second display driving circuit (222). As a non-limiting example, the timing (402) may be after the timing (401). For example, a command (403) transmitted outside of a time interval (334) may not be paired with the predetermined command (333). For example, a command (403) transmitted outside of a time interval (336) may not be paired with the predetermined command (333).

[0060] For example, the first display driving circuit (221) can keep transmitting the third signal (313) to the second display driving circuit (222) in response to the command (403) received from the first DPU (211). For example, since the control of the first display (121) according to the command (403) and the control of the second display (122) according to the command (403) can be executed asynchronously, the first display driving circuit (221) can keep transmitting the third signal (313) to the second display driving circuit (222) in response to the command (403) received from the first DPU (211). For example, the first display driving circuit (221) can, in response to a command (403) received from the first DPU (211), (immediately) execute control of the first display (121) according to the command (403) without checking whether the second display driving circuit (222) receives the command (403) from the second DPU (212), as indicated by the arrow (406).

[0061] For example, the second display driving circuit (222) can keep transmitting the fourth signal (314) to the first display driving circuit (221) in response to the command (403) received from the second DPU (212). For example, since the control of the first display (121) according to the command (403) and the control of the second display (122) according to the command (403) can be asynchronously executed, the second display driving circuit (222) can keep transmitting the fourth signal (314) to the first display driving circuit (221) in response to the command (403) received from the second DPU (212). For example, the second display driving circuit (222) can, in response to a command (403) received from the second DPU (212), (immediately) execute control of the second display (122) according to the command (403) without checking whether the first display driving circuit (221) receives the command (403) from the first DPU (211), as indicated by the arrow (410).

[0062] The operations according to the command (303) exemplified in the description of FIG. 3 and the operations according to the command (403) exemplified in the description of FIG. 4 can be combined as in the description of FIG. 5.

[0063] FIG. 5 illustrates an exemplary method executed within a head-worn electronic device to process commands and other commands transmitted from a processor assembly to each of a first display driver circuit and a second display driver circuit.

[0064] Referring to FIG. 5, the first DPU (211) can transmit a command (303) to the first display driving circuit (221). For example, the command (303) can be transmitted to the first display driving circuit (221) within a time interval (334) from a timing (335) at which a predetermined command (333) is transmitted from the first DPU (211) to the first display driving circuit (221) to indicate that control of the first display (121) according to the command (303) is synchronized with control of the second display (211) according to the command (303).

[0065] For example, the first display driving circuit (221) may, in response to a command (303) received from the first DPU (211), transmit the first signal (311) changed from the third signal (313) to the second display driving circuit (222), as indicated by the arrow (501).

[0066] For example, the first DPU (211) may transmit a command (403) to the first display driving circuit (221). For example, the command (403) may be transmitted to the first display driving circuit (221) outside of the time interval (334) to indicate that control of the first display (121) according to the command (403) is executed independently of control of the second display (122).

[0067] For example, the first display driving circuit (221) can, in response to a command (403) received from the first DPU (211), execute control of the first display (121) according to the command (403), as indicated by the arrow (504).

[0068] For example, the second DPU (212) may transmit a command (303) to the second display driving circuit (222). For example, the command (303) may be transmitted to the second display driving circuit (222) within a time interval (336) from a timing (337) at which a predetermined command (333) is transmitted from the second DPU (212) to the second display driving circuit (222) to indicate that control of the second display (122) according to the command (303) is synchronized with control of the first display (121) according to the command (303).

[0069] For example, the second display driving circuit (222) may, in response to a command (303) received from the second DPU (212), transmit the second signal (312) changed from the fourth signal (314) to the first display driving circuit (221), as indicated by the arrow (511).

[0070] For example, the second display driving circuit (222) can control the second display (122) according to the command (303), as indicated by arrows (512) and (513), based on a first signal (311) received from the first display driving circuit (221) after the command (303) is received and a second signal (312) transmitted to the first display driving circuit (211) after the command (303) is received. For example, the first display driving circuit (221) can execute control of the first display (201) according to the command (303), as indicated by arrows (502) and (503), based on a first signal (311) transmitted to the second display driving circuit (222) after the command (303) is received and a second signal (312) received from the second display driving circuit (222) after the command (303) is received. For example, since the control of the first display (201) according to the command (303) and the control of the second display (202) according to the command (303) are executed based on the first signal (311) and the second signal (312), the control of the first display (121) according to the command (303) and the control of the second display (122) according to the command (303) can be synchronized.

[0071] For example, the second DPU (212) may transmit a command (403) to the second display driving circuit (222) after the control of the second display (122) according to the command (303) is executed. For example, the command (403) may be transmitted to the second display driving circuit (221) outside of the time interval (336) to indicate that the control of the first display (212) according to the command (403) is executed independently of the control of the first display (121).

[0072] For example, the second display driving circuit (222) may, in response to a command (403) received from the second DPU (212), execute control of the second display (122) according to the command (403), as indicated by an arrow (514). The control of the second display (122) according to the command (403) may be executed after the control of the first display (121) according to the command (403) is executed.

[0073] As described above, the head-mounted electronic device (100) includes a first interface (241) and a second interface (242) between the first display driving circuit (221) and the second display driving circuit (222), thereby enabling the processing of a command (303) using the first display driving circuit (221) to be synchronized with the processing of a command (303) using the second display driving circuit (222).

[0074] For example, a command that causes control of the first display (121) to be synchronized with control of the second display (122), such as command (303), may be variously defined for the head-worn electronic device (100). As a non-limiting example, the command may include a command to wake the display assembly (120) from a sleep state. As a non-limiting example, the command may include a command to change each of the brightness levels of the first display (121) and the second display (122). Operations associated with the command to wake the display assembly (120) from a sleep state are exemplified in the description of FIG. 6, and operations associated with the command to change each of the brightness levels of the first display (121) and the second display (122) are exemplified in the description of FIG. 7.

[0075] FIG. 6 illustrates an exemplary method executed within a head-worn electronic device to synchronize waking a first display from a sleep state in response to a command transmitted from a processor assembly to a first display driver circuit with waking a second display from a sleep state in response to a command transmitted from the processor assembly to a second display driver circuit.

[0076] Referring to FIG. 6, the first DPU (211) can transmit a command (603) to the first display driving circuit (221). The command (603) can be transmitted to wake up the display assembly (120) (or the first display (121) and the second display (122)) from a sleep state. Control of the first display (121) according to the command (603) executed by the first display driving circuit (221) can be synchronized with control of the second display (122) according to the command (603) executed by the second display driving circuit (222). Although not illustrated in FIG. 6, the command (603) may be transmitted from the first DPU (211) within a time interval (e.g., time interval (334)) from a timing (e.g., timing (335)) at which a predetermined command (333) is transmitted from the first DPU (211) to the first display driving circuit (221). For example, the first display driving circuit (221) may transmit a first signal (311) to the second display driving circuit (222), as indicated by an arrow (604), in response to the command (603) received from the first DPU (211).

[0077] The second DPU (212) can transmit a command (603) to the second display driving circuit (222). The command (603) can be transmitted to wake up the display assembly (120) (or the first display (121) and the second display (122)) from a sleep state. Control of the second display (122) according to the command (603) executed by the second display driving circuit (222) can be synchronized with control of the first display (121) according to the command (603) executed by the first display driving circuit (221). Although not illustrated in FIG. 6, the command (603) may be transmitted from the second DPU (212) within a time interval (e.g., time interval (336)) from a timing (e.g., timing (337)) at which a predetermined command (333) is transmitted from the second DPU (212) to the first display driving circuit (221). For example, the second display driving circuit (222) may transmit a second signal (312) to the first display driving circuit (221), as indicated by an arrow (614), in response to the command (603) received from the second DPU (212).

[0078] The first display driving circuit (221) may, in response to transmitting a first signal (311) to the second display driving circuit (222) and receiving a second signal (312) from the second display driving circuit (222), execute control (631) of the first display (121) according to the command (603), as indicated by arrows (605) and (606). For example, control (631) of the first display (121) according to the command (603) may include initializing the first display driving circuit (221) to wake up the first display (121) from a sleep state. As a non-limiting example, the control (631) of the first display (121) executed in accordance with the command (603) to wake the first display (121) from a sleep state may include initializing voltages provided to the first terminal (terminal, electrode, or end) and the second terminal of the first light-emitting element, respectively, as illustrated in the description of FIG. 2.

[0079] The second display driving circuit (222) may, in response to transmitting the second signal (312) to the first display driving circuit (221) and receiving the first signal (311) from the first display driving circuit (221), execute control (641) of the second display (122) according to the command (603), as indicated by arrows (615) and (616). For example, control (641) of the second display (122) according to the command (603) may include initializing the second display driving circuit (222) to wake up the second display (122) from a sleep state. As a non-limiting example, the control (641) of the second display (122) executed in accordance with the command (603) to wake up the second display (122) from the sleep state may include initializing the voltages provided to the second terminal and the second terminal of the second light-emitting element, respectively, as illustrated in the description of FIG. 2. For example, since the initializing the voltages provided to the first terminal and the second terminal of the first light-emitting element and the initializing the voltages provided to the first terminal and the second terminal of the second light-emitting element are executed based on the first signal (311) and the second signal (312), the initializing the voltages provided to the first terminal and the second terminal of the first light-emitting element (hereinafter, referred to as the first initialization) and the initializing the voltages provided to the first terminal and the second terminal of the second light-emitting element (hereinafter, referred to as the second initialization) may be synchronized.

[0080] For example, the first display driving circuit (221) can further execute transmitting a first request (681) to the PMIC (230) compared to the second display driving circuit (222). For example, the first request (681) can be transmitted from the first display driving circuit (221) to the PMIC (230) based on the first initialization. For example, the first request (681) can include a request to provide a first driving voltage (691) (e.g., VDD) for the first terminal of the first light-emitting element (e.g., the anode electrode of the first light-emitting element) and to provide a first driving voltage (691) for the first terminal of the second light-emitting element (e.g., the anode electrode of the second light-emitting element). As a non-limiting example, since the PMIC (230) does not have the ability to receive requests (e.g., the first request (681) and the second request (682)) from all of the plurality of display driving circuits (e.g., the first display driving circuit (221) and the second display driving circuit (222)), the first request (681) may be transmitted to the PMIC (230) from the first display driving circuit (221) among the first display driving circuit (221) and the second display driving circuit (222).

[0081] For example, the PMIC (230) may provide a first driving voltage (691) to each of the first display driving circuit (221) and the second display driving circuit (222) in response to the first request (681). For example, since the first driving voltage (691) is provided in response to the first request (681) from the first display driving circuit (221), the first driving voltage (691) may be provided from the PMIC (230) to the first display driving circuit (221) after the first initialization is completed (or executed). For example, the first driving voltage (691) is provided from the PMIC (230) to the second display driving circuit (222) without a request from the second display driving circuit (222), but since the first driving voltage (691) is provided from the PMIC (230) to the second display driving circuit (222) in response to a first request (681) transmitted from the first display driving circuit (221) to the PMIC (230) after the first initialization synchronized with the second initialization is completed (or executed), the first driving voltage (691) can be provided from the PMIC (230) to the second display driving circuit (222) after the second initialization is completed (or executed). For example, the electronic device (100) can reduce the probability of malfunction of the second display (122) by providing the first driving voltage (691) to the second display driving circuit (222) before the second initialization is completed through the operations exemplified above.

[0082] For example, the first display driving circuit (221) may execute control (632) of the first display (121) to obtain a second driving voltage (692) (e.g., VSS) for the second terminal (e.g., the cathode electrode of the first light-emitting element) of the first light-emitting element from the PMIC (230) while obtaining a first driving voltage (691) from the PMIC (230). For example, the control (632) may be executed after the control (631) is executed according to the command (603).

[0083] For example, the second display driving circuit (222) may execute control (642) of the second display (122) to obtain a second driving voltage (692) for the second terminal of the second light-emitting element from the PMIC (230) while obtaining a first driving voltage (691) from the PMIC (230). For example, the control (642) may be executed after the control (641) is executed according to the command (603).

[0084] For example, the first display driving circuit (221) can further execute transmitting a second request (682) to the PMIC (230) compared to the second display driving circuit (222). For example, the second request (682) can be transmitted from the first display driving circuit (221) to the PMIC (230) based on the execution (or completion) of the control (632). For example, the second request (682) can include a request to provide a second driving voltage (692) for each of the second terminal of the first light-emitting element and the second terminal of the second light-emitting element. For example, the second request (682) can be transmitted from the first display driving circuit (221) among the first display driving circuit (221) and the second display driving circuit (222) to the PMIC (230).

[0085] For example, the PMIC (230) may provide a second driving voltage (692) to each of the first display driving circuit (221) and the second display driving circuit (222) in response to the second request (682). For example, since the second driving voltage (692) is provided in response to the second request (682) from the first display driving circuit (221), the second driving voltage (692) may be provided from the PMIC (230) to the first display driving circuit (221) after the control (632) is completed (or executed). For example, the second driving voltage (692) is provided from the PMIC (230) to the second display driving circuit (222) without a request from the second display driving circuit (222), but since the second driving voltage (692) is provided from the PMIC (230) to the second display driving circuit (222) in response to a second request (682) transmitted from the first display driving circuit (221) to the PMIC (230) after the control (632) synchronized with the control (642) is completed (or executed), the second driving voltage (692) can be provided from the PMIC (230) to the second display driving circuit (222) after the control (642) is completed (or executed). For example, the electronic device (100) can reduce the probability of malfunction of the second display (122) by providing the second driving voltage (692) to the second display driving circuit (222) before the control (642) is completed through the operations exemplified above.

[0086] Although not shown in FIG. 6, the first display driving circuit (221) can release the sleep state of the first display (121) using the first driving voltage (691) and the second driving voltage (692). For example, the second display driving circuit (222) can release the sleep state of the second display (122) using the first driving voltage (691) and the second driving voltage (692). For example, releasing the sleep state of the first display (121) according to the command (603) can be synchronized with releasing the sleep state of the second display (122) according to the command (603). For example, the state of the first display (121) can be changed to a state for powering on the first display (121) according to the release of the sleep state of the first display (121). For example, the state of the second display (122) may be changed to a state for powering on the second display (122) upon release of the sleep state of the second display (122).

[0087] FIG. 7 illustrates an exemplary method executed within a head-worn electronic device to synchronize changing a brightness level of a first display in response to a command transmitted from a processor assembly to a first display driver circuit with changing a brightness level of a second display in response to a command transmitted from the processor assembly to a second display driver circuit.

[0088] Referring to FIG. 7, the first DPU (211) may transmit a command (703) to the first display driving circuit (221). The command (703) may be transmitted to change the brightness level of the first display (121). As a non-limiting example, the command (703) may be obtained by the processor assembly (210) (or by a CPU within the processor assembly (210)) and transmitted from the first DPU (211) in response to a change in the illumination around the head-worn electronic device (100). As a non-limiting example, the command (703) may be obtained by the processor assembly (210) (or by a CPU within the processor assembly (210)) and transmitted from the first DPU (211) in response to a change in the refresh rate of the first screen displayed on the first display (121). Since a change in the brightness level of the first display (121) that is not synchronized with a change in the brightness level of the second display (122) may reduce the quality of visual content displayed through the display assembly (120), the control of the first display (121) according to the command (703) executed by the first display driving circuit (221) may be synchronized with the control of the second display (122) according to the command (703) executed by the second display driving circuit (222). Although not illustrated in FIG. 7, the command (703) may be transmitted from the first DPU (211) within a time interval (e.g., time interval (334)) from a timing (e.g., timing (335)) at which a predetermined command (333) is transmitted from the first DPU (211) to the first display driving circuit (221). For example, the first display driving circuit (221) may transmit a first signal (311) to the second display driving circuit (222), as indicated by an arrow (704), in response to a command (703) received from the first DPU (211).

[0089] The second DPU (212) can transmit a command (703) to the second display driving circuit (222). The command (703) can be transmitted to change the brightness level of the second display (122). Since a change in the brightness level of the second display (122) that is not synchronized with a change in the brightness level of the first display (121) can reduce the quality of visual content displayed through the display assembly (120), the control of the second display (122) according to the command (703) executed by the second display driving circuit (222) can be synchronized with the control of the first display (121) according to the command (703) executed by the first display driving circuit (221). Although not illustrated in FIG. 7, the command (703) may be transmitted from the second DPU (212) within a time interval (e.g., time interval (336)) from a timing (e.g., timing (337)) at which a predetermined command (333) is transmitted from the second DPU (212) to the first display driving circuit (221). For example, the second display driving circuit (222) may transmit a second signal (312) to the first display driving circuit (221), as indicated by an arrow (714), in response to the command (703) received from the second DPU (212).

[0090] The first display driving circuit (221) can change the brightness level of the first display (121) according to the command (703), as indicated by arrows (705) and (706), under the condition of transmitting the first signal (311) to the second display driving circuit (222) and receiving the second signal (312) from the second display driving circuit (222). The second display driving circuit (222) can change the brightness level of the second display (122) according to the command (703), as indicated by arrows (715) and (716), under the condition of receiving the first signal (311) from the first display driving circuit (221) and transmitting the second signal (312) to the first display driving circuit (221). For example, since the change in brightness level of the first display (121) according to the command (703) and the change in brightness level of the second display (122) according to the command (703) are executed based on the first signal (311) and the second signal (312), the change in brightness level of the second display (122) according to the command (703) can be synchronized with the change in brightness level of the first display (121) according to the command (703). For example, the head-mounted electronic device (100) can prevent a decrease in the quality of a screen displayed on the display assembly (120) by synchronizing the change in brightness level of the second display (122) according to the command (703) and the change in brightness level of the first display (121) according to the command (703).

[0091] As a non-limiting example, the second display (122) may be gazed upon by the right eye, which is the dominant eye of a user wearing the head-mounted electronic device (100), and the first display (121) may be gazed upon by the left eye of the user. For example, the visual quality (e.g., resolution, refresh rate, FPS (frames per second), bit rate, bit depth, etc.) of the second screen displayed on the second display (122) may be substantially the same as (or correspond to) the visual quality (e.g., resolution, refresh rate, FPS, bit rate, bit depth, etc.) of the first screen displayed on the first display (121). For example, while the first screen and the second screen are displayed on the first display (121) and the second display (122), respectively, with substantially the same visual quality, a predetermined event (or a designated event) (e.g., the display of the first screen and the second screen is maintained for a reference time or longer, the type of content provided through the first screen and the second screen is a reference type, and / or the remaining level of the rechargeable battery of the electronic device (100) is less than a reference level) may be detected, caused, identified, or recognized. For example, the visual quality (e.g., resolution, refresh rate, FPS, data transfer rate, bit depth, etc.) of the first screen viewed by the left eye of the user wearing the head-worn electronic device (100) may be reduced compared to the visual quality (e.g., resolution, refresh rate, FPS, data transfer rate, bit depth, etc.) of the second screen viewed by the right eye of the user wearing the head-worn electronic device (100) based on the predetermined event.

[0092] As a non-limiting example, the speed at which the state of the first screen displayed on the first display (121) controlled by the first display driving circuit (221) changes may be different from the speed at which the state of the second screen displayed on the second display (122) controlled by the second display driving circuit (222) changes. For example, the dominant eye of a user (e.g., user (190)) wearing the head-worn electronic device (100) may change according to movement of the user's gaze and / or movement of the user's head. As a non-limiting example, the dominant eye may change, at least temporarily, from the right eye to the left eye according to movement of the gaze and / or movement of the head (e.g., when the user looks to the left side). For example, while the dominant eye is displayed on the second screen (e.g., the screen gazed upon by the right eye as the dominant eye) with a higher visual quality (e.g., resolution, refresh rate, FPS, data transfer rate, bit depth, etc.) than the visual quality (e.g., resolution, refresh rate, FPS, data transfer rate (bit rate), bit depth, etc.) of the first screen (e.g., the screen gazed upon by the left eye), the dominant eye may be changed from the right eye to the left eye. For example, when the dominant eye is changed from the right eye to the left eye, changing the state of the first screen at a first speed that is higher than the second speed that changes the state of the second screen may be executed within the head-worn electronic device (100). Changing the state of the first screen at a first speed that is higher than the second speed that changes the state of the second screen is exemplified within the description of FIG. 8.

[0093] FIG. 8 illustrates an exemplary method executed within a head-worn electronic device to change the state of a first screen displayed on a first display at a first rate that is higher than a second rate that changes the state of a second screen displayed on a second display.

[0094] Referring to FIG. 8, the first DPU (211) may transmit a command (803) to the first display driving circuit (221) that causes (or controls) the first display driving circuit (221) to change the state of the first screen displayed on the first display (121). As a non-limiting example, changing the state of the first screen according to the command (803) may include changing a brightness level of the first screen, changing a refresh rate of the first screen, and / or changing a color temperature of the first screen. Although not illustrated in FIG. 8, the command (803) may be transmitted from the first DPU (211) within a time interval (e.g., time interval (334)) from a timing (e.g., timing (335)) at which a predetermined command (333) is transmitted from the first DPU (211) to the first display driving circuit (221). For example, the first display driving circuit (221) may transmit a first signal (311) to the second display driving circuit (222), as indicated by an arrow (804), in response to a command (803) received from the first DPU (211).

[0095] The second DPU (212) may transmit a command (803) to the second display driver circuit (222) that causes (or controls) the second display driver circuit (222) to change the state of the second screen displayed on the second display (122). As a non-limiting example, changing the state of the second screen according to the command (803) may include changing a brightness level of the second screen, changing a refresh rate of the second screen, and / or changing a color temperature of the second screen. Although not illustrated in FIG. 8, the command (803) may be transmitted from the second DPU (212) within a time interval (e.g., time interval (336)) from a timing (e.g., timing (337)) at which a predetermined command (333) is transmitted from the second DPU (212) to the first display driver circuit (221). For example, the second display driving circuit (222) may transmit a second signal (312) to the first display driving circuit (221), as indicated by arrow (814), in response to a command (803) received from the second DPU (212).

[0096] The first display driving circuit (221) can change the state of the first screen (891) according to the command (803), as indicated by arrows (805) and (806), based on transmitting a first signal (311) to the second display driving circuit (222) and receiving a second signal (312) from the second display driving circuit (222). The second display driving circuit (222) can change the state of the second screen (892) according to the command (803), as indicated by arrows (815) and (816), based on receiving a first signal (311) from the first display driving circuit (221) and transmitting a second signal (312) to the first display driving circuit (221). For example, since changing the state of the first screen (891) and changing the state of the second screen (892) are executed based on the first signal (311) and the second signal (312), changing the state of the first screen (891) and changing the state of the second screen (892) can be synchronized. Although not shown in FIG. 8, a signal transmitted from the first display driving circuit (221) to the second display driving circuit (222) can be changed from the first signal (311) to the third signal (313) in response to changing the state of the first screen (891), and a signal transmitted from the second display driving circuit (222) to the first display driving circuit (221) can be changed from the second signal (312) to the fourth signal (314) in response to changing the state of the second screen (892).

[0097] For example, the first DPU (211) can transmit a command (833) to the first display driving circuit (221). For example, the command (833), like the command (803), is a command for changing the state of the first screen, or, unlike the command (803), the command (833) can be transmitted from the first DPU (211) to execute changing the state of the first screen among changing the state of the first screen and changing the state of the second screen. As a non-limiting example, the command (833) can be transmitted from the first DPU (211) to the first display driving circuit (221) in response to receiving a signal indicating that the command (803) is transmitted from the second DPU (212). As a non-limiting example, the command (833) may be transmitted from the first DPU (211) to the first display driving circuit (221) after a reference time has elapsed from the timing at which the command (803) is transmitted. Although not illustrated in FIG. 8, the command (833), unlike the command (803), may be transmitted from the first DPU (211) outside the time interval from the timing at which the predetermined command (333) is transmitted from the first DPU (211) to the first display driving circuit (221).

[0098] For example, the first display driving circuit (221), in response to receiving the command (833), may execute (895) changing the state of the first screen according to the command (833), as indicated by the arrow (807). For example, the first display driving circuit (221), independently of receiving the command (833), may maintain the signal transmitted from the first display driving circuit (221) to the second display driving circuit (222) as the third signal (313).

[0099] For example, the second DPU (212) may first transmit a command (803) to the second display driving circuit (222), and then transmit the command (803) again to the second display driving circuit (222). For example, the second display driving circuit (222) may transmit a second signal (312) to the first display driving circuit (221), as indicated by an arrow (818), in response to the command (803) received from the second DPU (212).

[0100] For example, the first DPU (211) may transmit a command (803) to the first display driving circuit (221) after transmitting the command (833). For example, the command (803) may be transmitted from the first DPU (211) to the first display driving circuit (221) while the second signal (312) is transmitted from the second display driving circuit (222) to the first display driving circuit (221). For example, the first display driving circuit (221) may transmit the first signal (311) to the second display driving circuit (222) as indicated by the arrow (808) in response to the command (803) received from the first DPU (211).

[0101] For example, the first display driving circuit (221) can change the state of the first screen (893) according to the command (803), as indicated by arrows (809) and (810), based on transmitting the first signal (311) to the second display driving circuit (222) and receiving the second signal (312) from the second display driving circuit (222). The second display driving circuit (222) can change the state of the second screen (894) according to the command (803), as indicated by arrows (819) and (820), based on receiving the first signal (311) from the first display driving circuit (221) and transmitting the second signal (312) to the first display driving circuit (221). For example, since changing the state of the first screen (893) and changing the state of the second screen (894) are executed based on the first signal (311) and the second signal (312), changing the state of the first screen (893) and changing the state of the second screen (894) can be synchronized.

[0102] As described above, since changing the state of the first screen (895) is performed between changing the state of the second screen (892) synchronized with changing the state of the first screen (891) and changing the state of the second screen (894) synchronized with changing the state of the first screen (893), the first speed of changing the state of the first screen may be faster than the second speed of changing the state of the second screen.

[0103] For example, the electronic device (100) can control the first display (121) at a first speed that is faster than the second speed at which it controls the second display (122) by alternately executing the execution of transmitting the command (803) from the second DPU (212) to the second display driving circuit (222) and the execution of transmitting the command (803) from the first DPU (211) to the first display driving circuit (221) and the execution of transmitting the command (833) from the first DPU (211) to the first display driving circuit (221). For example, the electronic device (100) can enhance the quality of the screen displayed on the display assembly (120) when the dominant eye changes through the operations exemplified above.

[0104] The first signal (311) and the second signal (312) illustrated in the descriptions of FIGS. 3 to 8 may be replaced with the fifth signal and the sixth signal, respectively. The fifth signal and the sixth signal are illustrated in the description of FIG. 9.

[0105] Figure 9 illustrates an example of signals exchanged between a first display driving circuit and a second display driving circuit.

[0106] Referring to FIG. 9, the first signal (311) may be replaced with a fifth signal (915). For example, the fifth signal (915) may be defined or formed within a time interval (930) of a vertical synchronization signal for the first display driver circuit (221) (e.g., a time interval corresponding to a refresh rate of a screen displayed on the first display (121). For example, the fifth signal (915) may further indicate to the second display driver circuit (222) the number of one or more commands transmitted from the first DPU (211) to the first display driver circuit (221) for controlling the first display (121) in synchronization with the control of the second display (122), as compared to the first signal (311). For example, the fifth signal (915) may include one or more portions (931) each corresponding to a pulse signal within the time interval (930), such as a state (900). For example, the number of one or more portions (931) of the fifth signal (915) may correspond to the number of the one or more commands transmitted from the first DPU (211) to the first display driving circuit (221) for control of the first display (121) that is synchronized with control of the second display (122). For example, the fifth signal (915) in the state (900) may indicate that the number of the one or more commands is 3.

[0107] For example, the fifth signal (915) may further indicate a malfunction state of the first display driving circuit (221) compared to the first signal (311). For example, when the first display driving circuit (221) that has received a command transmitted from the first DPU (211) for controlling the first display (121) in synchronization with the control of the second display (122) is malfunctioning, the first display driving circuit (221) may transmit the fifth signal (915) that does not include one or more portions corresponding to a pulse signal, such as the state (950), to the second display driving circuit (222) through the first interface (241).

[0108] For example, the second signal (312) may be replaced with the sixth signal (916). For example, the sixth signal (916) may be defined or formed within a time interval (930) of a vertical synchronization signal for the second display driver circuit (222). For example, the sixth signal (916) may further indicate to the first display driver circuit (221) the number of one or more commands transmitted from the second DPU (212) to the second display driver circuit (222) for control of the second display (122) synchronized with the control of the first display (121), as compared to the second signal (312). For example, the sixth signal (916) may include one or more portions (931) each corresponding to a pulse signal within the time interval (930), such as a state (900). For example, the number of one or more portions (931) of the sixth signal (916) may correspond to the number of the one or more commands transmitted from the second DPU (212) to the second display driving circuit (222) for control of the second display (122) synchronized with the control of the first display (121). For example, the sixth signal (916) in the state (900) may indicate that the number of the one or more commands is 3.

[0109] For example, the sixth signal (916) may further indicate a malfunction state of the second display driving circuit (222) compared to the second signal (312). For example, when the second display driving circuit (222) that has received a command transmitted from the second DPU (212) for controlling the second display (122) in synchronization with the control of the first display (121) is malfunctioning, the second display driving circuit (222) may transmit the sixth signal (916) that does not include one or more portions corresponding to a pulse signal, such as the state (950), to the first display driving circuit (221) through the second interface (242).

[0110] The operations described above, which are performed within a head-mounted electronic device (100), are merely exemplary. The operations may be performed within an electronic device comprising a display assembly comprising a plurality of display drive circuits and a plurality of displays. For example, the electronic device may comprise a foldable electronic device, such as a foldable type smartphone.

[0111] The operations exemplified in the above description can be performed by the electronic devices exemplified in the description below.

[0112] FIG. 10 is a block diagram of an electronic device (1001) within a network environment (1000) according to various embodiments. Referring to FIG. 10, in the network environment (1000), the electronic device (1001) may communicate with the electronic device (1002) via a first network (1098) (e.g., a short-range wireless communication network), or may communicate with at least one of the electronic device (1004) or the server (1008) via a second network (1099) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (1001) may communicate with the electronic device (1004) via the server (1008). According to one embodiment, the electronic device (1001) may include a processor (1020), a memory (1030), an input module (1050), an audio output module (1055), a display module (1060), an audio module (1070), a sensor module (1076), an interface (1077), a connection terminal (1078), a haptic module (1079), a camera module (1080), a power management module (1088), a battery (1089), a communication module (1090), a subscriber identification module (1096), or an antenna module (1097). In some embodiments, the electronic device (1001) may omit at least one of these components (e.g., the connection terminal (1078)), or may have one or more other components added. In some embodiments, some of these components (e.g., sensor module (1076), camera module (1080), or antenna module (1097)) may be integrated into a single component (e.g., display module (1060)).

[0113] The processor (1020) may, for example, execute software (e.g., a program (1040)) to control at least one other component (e.g., a hardware or software component) of the electronic device (1001) connected to the processor (1020) and perform various data processing or operations. According to one embodiment, as at least a part of the data processing or operations, the processor (1020) may store commands or data received from other components (e.g., a sensor module (1076) or a communication module (1090)) in a volatile memory (1032), process the commands or data stored in the volatile memory (1032), and store result data in a non-volatile memory (1034). According to one embodiment, the processor (1020) may include a main processor (1021) (e.g., a central processing unit or an application processor) or an auxiliary processor (1023) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together with the main processor (1021). For example, when the electronic device (1001) includes the main processor (1021) and the auxiliary processor (1023), the auxiliary processor (1023) may be configured to use less power than the main processor (1021) or to be specialized for a given function. The auxiliary processor (1023) may be implemented separately from the main processor (1021) or as a part thereof.

[0114] The auxiliary processor (1023) may control at least a portion of functions or states associated with at least one component (e.g., the display module (1060), the sensor module (1076), or the communication module (1090)) of the electronic device (1001), for example, on behalf of the main processor (1021) while the main processor (1021) is in an inactive (e.g., sleep) state, or together with the main processor (1021) while the main processor (1021) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (1023) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (1080) or a communication module (1090)). In one embodiment, the auxiliary processor (1023) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (1001) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (1008)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0115] The memory (1030) can store various data used by at least one component (e.g., the processor (1020) or the sensor module (1076)) of the electronic device (1001). The data can include, for example, software (e.g., the program (1040)) and input data or output data for commands related thereto. The memory (1030) can include volatile memory (1032) or non-volatile memory (1034).

[0116] The program (1040) may be stored as software in memory (1030) and may include, for example, an operating system (1042), middleware (1044), or an application (1046).

[0117] The input module (1050) can receive commands or data to be used in a component of the electronic device (1001) (e.g., a processor (1020)) from an external source (e.g., a user) of the electronic device (1001). The input module (1050) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0118] The audio output module (1055) can output audio signals to the outside of the electronic device (1001). The audio output module (1055) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0119] The display module (1060) can visually provide information to an external party (e.g., a user) of the electronic device (1001). The display module (1060) may include, for example, a display, a holographic device, or a projector, and a control circuit for controlling the device. In one embodiment, the display module (1060) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0120] The audio module (1070) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (1070) can acquire sound through the input module (1050), output sound through the sound output module (1055), or an external electronic device (e.g., electronic device (1002)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (1001).

[0121] The sensor module (1076) can detect the operating status (e.g., power or temperature) of the electronic device (1001) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (1076) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0122] The interface (1077) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (1001) to an external electronic device (e.g., the electronic device (1002)). In one embodiment, the interface (1077) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0123] The connection terminal (1078) may include a connector through which the electronic device (1001) may be physically connected to an external electronic device (e.g., the electronic device (1002)). In one embodiment, the connection terminal (1078) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0124] The haptic module (1079) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. In one embodiment, the haptic module (1079) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0125] The camera module (1080) can capture still images and videos. In one embodiment, the camera module (1080) may include one or more lenses, image sensors, image signal processors, or flashes.

[0126] The power management module (1088) can manage power supplied to the electronic device (1001). According to one embodiment, the power management module (1088) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

[0127] A battery (1089) may power at least one component of the electronic device (1001). In one embodiment, the battery (1089) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0128] The communication module (1090) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (1001) and an external electronic device (e.g., electronic device (1002), electronic device (1004), or server (1008)), and the performance of communication through the established communication channel. The communication module (1090) may operate independently from the processor (1020) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (1090) may include a wireless communication module (1092) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (1094) (e.g., a local area network (LAN) communication module, or a power line communication module). Any of these communication modules may communicate with an external electronic device (1004) via a first network (1098) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (1099) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (1092) may use subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (1096) to verify or authenticate the electronic device (1001) within a communication network such as the first network (1098) or the second network (1099).

[0129] The wireless communication module (1092) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimizing terminal power and connecting multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (1092) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (1092) may support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (1092) may support various requirements specified in the electronic device (1001), an external electronic device (e.g., the electronic device (1004)), or a network system (e.g., the second network (1099)). According to one embodiment, the wireless communication module (1092) may support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.

[0130] The antenna module (1097) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (1097) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). In one embodiment, the antenna module (1097) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (1098) or the second network (1099), may be selected from the plurality of antennas, for example, by the communication module (1090). A signal or power may be transmitted or received between the communication module (1090) and an external electronic device via the at least one selected antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (1097).

[0131] According to various embodiments, the antenna module (1097) may form a mmWave antenna module. In one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high frequency band.

[0132] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0133] According to one embodiment, commands or data may be transmitted or received between the electronic device (1001) and an external electronic device (1004) via a server (1008) connected to a second network (1099). Each of the external electronic devices (1002 or 1004) may be the same or a different type of device as the electronic device (1001). According to one embodiment, all or part of the operations executed in the electronic device (1001) may be executed in one or more of the external electronic devices (1002, 1004, or 1008). For example, when the electronic device (1001) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (1001) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (1001). The electronic device (1001) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (1001) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In one embodiment, the external electronic device (1004) may include an Internet of Things (IoT) device. The server (1008) may be an intelligent server utilizing machine learning and / or a neural network.According to one embodiment, an external electronic device (1004) or server (1008) may be included within the second network (1099). The electronic device (1001) may be applied to intelligent services (e.g., smart homes, smart cities, smart cars, or healthcare) based on 5G communication technology and IoT-related technology.

[0134] FIG. 11 is a block diagram (1100) of a display module (1060) according to various embodiments. Referring to FIG. 11, the display module (1060) may include a display (1110) and a display driver IC (DDI) (1130) for controlling the display (1110). The DDI (1130) may include an interface module (1131), a memory (1133) (e.g., a buffer memory), an image processing module (1135), or a mapping module (1137). The DDI (1130) may receive image information including, for example, image data or an image control signal corresponding to a command for controlling the image data, from another component of the electronic device (1001) through the interface module (1131). For example, according to one embodiment, image information may be received from a processor (1020) (e.g., a main processor (1021) (e.g., an application processor) or an auxiliary processor (1023) (e.g., a graphics processing unit) that operates independently of the function of the main processor (1021). The DDI (1130) may communicate with a touch circuit (1150) or a sensor module (1076) through the interface module (1131). In addition, the DDI (1130) may store at least a part of the received image information in the memory (1133), for example, in units of frames. The image processing module (1135) may, for example, perform preprocessing or postprocessing (e.g., resolution, brightness, or size adjustment) on at least a part of the image data based on at least a characteristic of the image data or a characteristic of the display (1110). The mapping module (1137) may output a voltage value or a value corresponding to the image data preprocessed or postprocessed through the image processing module (1135). Current values ​​can be generated.According to one embodiment, the generation of the voltage value or current value may be performed at least in part based on, for example, properties of pixels of the display (1110) (e.g., arrangement of pixels (RGB stripe or pentile structure), or size of each sub-pixel). At least some pixels of the display (1110) may be driven at least in part based on, for example, the voltage value or current value, so that visual information (e.g., text, image, or icon) corresponding to the image data may be displayed through the display (1110).

[0135] According to one embodiment, the display module (1060) may further include a touch circuit (1150). The touch circuit (1150) may include a touch sensor (1151) and a touch sensor IC (1153) for controlling the same. The touch sensor IC (1153) may control the touch sensor (1151) to detect, for example, a touch input or a hovering input for a specific location of the display (1110). For example, the touch sensor IC (1153) may detect a touch input or a hovering input by measuring a change in a signal (e.g., voltage, light quantity, resistance, or charge quantity) for a specific location of the display (1110). The touch sensor IC (1153) may provide information (e.g., location, area, pressure, or time) regarding the detected touch input or hovering input to the processor (1020). According to one embodiment, at least a portion of the touch circuit (1150) (e.g., touch sensor IC (1153)) may be included as part of the display driver IC (1130), or as part of the display (1110), or as part of another component (e.g., auxiliary processor (1023)) disposed external to the display module (1060).

[0136] According to one embodiment, the display module (1060) may further include at least one sensor (e.g., a fingerprint sensor, an iris sensor, a pressure sensor, or an illuminance sensor) of the sensor module (1076), or a control circuit therefor. In this case, the at least one sensor or the control circuit therefor may be embedded in a part of the display module (1060) (e.g., the display (1110) or the DDI (1130)) or a part of the touch circuit (1150). For example, when the sensor module (1076) embedded in the display module (1060) includes a biometric sensor (e.g., a fingerprint sensor), the biometric sensor may obtain biometric information (e.g., a fingerprint image) associated with a touch input through a part of the display (1110). For another example, if the sensor module (1076) embedded in the display module (1060) includes a pressure sensor, the pressure sensor may obtain pressure information associated with a touch input through a portion or the entire area of ​​the display (1110). According to one embodiment, the touch sensor (1151) or the sensor module (1076) may be disposed between pixels of a pixel layer of the display (1110), or above or below the pixel layer.

[0137] As described above, a head-wearable electronic device (e.g., head-wearable electronic device (100)) may include a head-wearable housing structure (e.g., head-wearable housing structure (110)), a display assembly (e.g., display (120)) including a first display (e.g., first display (121)) and a second display (e.g., second display (122)) positioned over the eyes of a user wearing the head-wearable housing structure, a first display driving circuit (e.g., first display driving circuit (221)) connected to the first display, a second display driving circuit (e.g., second display driving circuit (222)) connected to the second display, a processor assembly (e.g., processor assembly (210)) including one or more processing circuits, and a memory assembly (e.g., memory assembly (220)). The memory assembly can store instructions that cause at least a portion of the processor assembly to transmit a command to the first display driving circuit at a first timing and to transmit the command to the second display driving circuit at a second timing.The memory assembly may store instructions that cause the first display driving circuit to synchronize the control of the second display according to the command with the control of the first display according to the command by transmitting a first signal indicating receipt of the command to the second display driving circuit based on receiving the command transmitted at the first timing from the processor assembly and postponing control of the first display according to the command until receiving a second signal indicating receipt of the command from the second display driving circuit, and transmitting the first signal to the second display driving circuit in response to receiving the command transmitted at the first timing from the processor assembly, and receiving the second signal from the second display driving circuit in response to receiving the command transmitted at the second timing from the processor assembly, thereby executing the control of the first display according to the command.

[0138] For example, the memory assembly may store instructions that cause the second display driving circuit to synchronize the control of the first display according to the command with the control of the second display according to the command by receiving the first signal transmitted from the first display driving circuit in response to receiving the command transmitted at the first timing from the processor assembly and transmitting the second signal to the first display driving circuit in response to receiving the command transmitted at the second timing from the processor assembly.

[0139] For example, the memory assembly may store instructions that cause the first display driving circuit to stop transmitting the first signal to the second display driving circuit and to transmit a third signal to the second display driving circuit based on executing the control of the first display according to the command. For example, the memory assembly may store instructions that cause the second display driving circuit to stop transmitting the second signal to the first display driving circuit and to transmit a fourth signal to the first display driving circuit based on executing the control of the second display according to the command.

[0140] For example, the memory assembly may store instructions that cause the first display driver circuit to receive the command transmitted at the first timing from the processor assembly while the third signal is transmitted to the second display driver circuit and the fourth signal is received from the second display driver circuit. For example, the memory assembly may store instructions that cause the second display driver circuit to receive the command transmitted at the second timing from the processor assembly while the third signal is received from the first display driver circuit and the fourth signal is transmitted to the second display driver circuit.

[0141] For example, the head-mounted electronic device may include a first interface connecting the first display driving circuit to the second display driving circuit for the first signal and the third signal transmitted from the first display driving circuit to the second display driving circuit, and a second interface connecting the second display driving circuit to the first display driving circuit for the second signal and the fourth signal transmitted from the second display driving circuit to the first display driving circuit.

[0142] For example, the memory assembly may store instructions that cause the processor assembly to transmit a predetermined command to the first display driver circuit before the command is transmitted to the first display driver circuit at the first timing, and to transmit the predetermined command to the second display driver circuit before the command is transmitted to the second display driver circuit at the second timing. For example, the memory assembly may store instructions that cause the first display driver circuit to stop transmitting the third signal to the second display driver circuit, transmit the first signal to the second display driver circuit, and postpone the control of the first display according to the command until the second signal is received from the second display driver circuit, based on receiving the command transmitted from the processor assembly at the first timing after the predetermined command is received. For example, the memory assembly may store instructions that cause the second display driving circuit to stop transmitting the fourth signal to the first display driving circuit, transmit the second signal to the first display driving circuit, and postpone the control of the second display according to the command until the first signal is received from the first display driving circuit, based on receiving the command transmitted from the processor assembly at the second timing after the predetermined command is received.

[0143] For example, the memory assembly may store instructions that cause the processor assembly to transmit another command to the first display driver circuit at a third timing different from the first timing and the second timing without transmitting the predetermined command to the first display driver circuit, and to transmit the another command to the second display driver circuit at a fourth timing different from the first timing, the second timing, and the third timing without transmitting the predetermined command to the second display driver circuit. For example, the memory assembly may store instructions that cause the first display driver circuit, in response to receiving the another command transmitted at the third timing from the processor assembly, to maintain the third signal transmitted to the second display driver circuit and to execute control of the first display according to the another command. For example, the memory assembly may store instructions that, in response to receiving the other command transmitted from the processor assembly at the fourth timing, cause the second display driving circuit to maintain the fourth signal transmitted to the first display driving circuit and to execute control of the second display according to the other command. For example, the control of the first display according to the other command may be executed independently from the execution of the control of the second display according to the other command.

[0144] For example, the head-mounted electronic device may include a power management integrated circuit (PMIC). For example, the first display may include first sub-pixels. For example, the second display may include second sub-pixels. For example, the command may indicate waking the display assembly from a sleep state.For example, the memory assembly, based on receiving the command transmitted at the first timing from the processor assembly, transmits the first signal to the second display driving circuit and delays initializing voltages provided to the first terminal and the second terminal of the first light-emitting element in each of the first sub-pixels until receiving the second signal from the second display driving circuit, thereby postponing the control of the first display according to the command, and based on transmitting the first signal to the second display driving circuit and receiving the second signal from the second display driving circuit, initializes the voltages provided to the first terminal of the first light-emitting element and the second terminal of the first light-emitting element, respectively, and transmits a first request to the PMIC, which causes the PMIC to provide a first driving voltage to the first terminal of the first light-emitting element and the first terminal of the second light-emitting element in each of the second sub-pixels after the voltages provided to the first terminal of the first light-emitting element and the second terminal of the first light-emitting element are initialized. And by transmitting to the PMIC a second request causing the PMIC to provide a second driving voltage to each of the second terminal of the first light-emitting element and the second terminal of the second light-emitting element, thereby executing the control of the first display according to the command, instructions causing the first display driving circuit to synchronize waking up the second display from a sleep state according to the command and waking up the first display from a sleep state according to the command can be stored.

[0145] For example, the memory assembly may store instructions that cause the second display driving circuit to execute the control of the second display according to the command by initializing voltages provided to the first terminal of the second light-emitting element and the second terminal of the second light-emitting element based on receiving the first signal from the first display driving circuit and transmitting the second signal to the first display driving circuit. For example, the memory assembly may store instructions that cause the first display driving circuit to wake the first display from the sleep state using the first driving voltage provided from the PMIC in response to the first request from the first display driving circuit to the PMIC and the second driving voltage provided from the PMIC in response to the second request from the first display driving circuit to the PMIC. For example, the memory assembly may store instructions that cause the second display driving circuit to obtain the first driving voltage provided from the PMIC in response to the first request from the first display driving circuit to the PMIC and the second driving voltage provided from the PMIC in response to the second request from the first display driving circuit to the PMIC after the voltages provided to the first terminal of the second light-emitting element and the second terminal of the second light-emitting element are initialized based on the reception of the first signal and the transmission of the second signal, and to release the sleep state of the second display using the first driving voltage provided from the PMIC to the second display driving circuit and the second driving voltage provided from the PMIC to the second display driving circuit.

[0146] For example, the command may indicate changing the brightness level of each of the first display and the second display. For example, the memory assembly may store instructions that cause the first display driving circuit to synchronize changing the brightness level of the second display with changing the brightness level of the first display according to the command by, based on receiving the command transmitted at the first timing from the processor assembly, sending the first signal to the second display driving circuit and delaying changing the brightness level of the first display until receiving the second signal from the second display driving circuit, and executing the control of the first display according to the command by changing the brightness level of the first display based on sending the first signal to the second display driving circuit and receiving the second signal from the second display driving circuit.

[0147] For example, the memory assembly may store instructions that cause the second display driving circuit to execute the control of the second display according to the command by changing the brightness level of the second display based on receiving the first signal from the first display driving circuit and transmitting the second signal to the first display driving circuit.

[0148] For example, the processor assembly may include a first display processing unit (DPU) connected to the first display driving circuit and a second DPU connected to the second display driving circuit. For example, the memory assembly may store instructions that cause the processor assembly to transmit the command to the first display driving circuit at the first timing using the first DPU and to transmit the command to the second display driving circuit at the second timing using the second DPU.

[0149] For example, the memory assembly may store instructions that cause the first display driving circuit to execute the control of the first display according to the command in response to the timing of a vertical synchronization signal for the first display that is caused after transmitting the first signal to the second display driving circuit and receiving the second signal from the second display driving circuit.

[0150] For example, the memory assembly may store instructions that cause the second display driving circuit to execute the control of the second display according to the command in response to the timing of a vertical synchronization signal for the second display that is caused after receiving the first signal from the first display driving circuit and transmitting the second signal to the first display driving circuit.

[0151] For example, the memory assembly may store instructions that cause the first display driving circuit to execute the control of the first display according to the command, in response to determining, before the second signal is received, the expiration of a timer activated based on receiving the command transmitted from the processor assembly at the first timing.

[0152] As described above, a head-wearable electronic device (e.g., head-wearable electronic device (100)) may include a head-wearable housing structure (e.g., head-wearable housing structure (110)), a display assembly (e.g., display (120)) including a first display (e.g., first display (121)) and a second display (e.g., second display (122)) positioned over the eyes of a user wearing the head-wearable housing structure, a first display driving circuit (e.g., first display driving circuit (221)) connected to the first display, a second display driving circuit (e.g., second display driving circuit (222)) connected to the second display, a processor assembly (e.g., processor assembly (210)) including one or more processing circuits, and a memory assembly (e.g., memory assembly (220)). The memory assembly may store instructions that cause the processor assembly to transmit a command to the first display driving circuit and to transmit the command to the second display driving circuit while a first signal is transmitted from the first display driving circuit to the second display driving circuit and a second signal is transmitted from the second display driving circuit to the first display driving circuit.

[0153] For example, the memory assembly may store instructions that cause each of the first display driving circuit and the second display driving circuit to postpone control of each of the first display and the second display according to the command until a signal transmitted from the first display driving circuit to the second display driving circuit changes from the first signal to a third signal and a signal transmitted from the second display driving circuit to the first display driving circuit changes from the second signal to a fourth signal, based on receiving the command paired with the predetermined command from the processor assembly, and to execute control of each of the first display and the second display according to the command while the signal transmitted from the first display driving circuit to the second display driving circuit remains the first signal and the signal transmitted from the second display driving circuit to the first display driving circuit remains the second signal.

[0154] For example, the memory assembly may store instructions that, in response to receiving the command paired with the predetermined command, cause the first display driver circuit to change the signal transmitted from the first display driver circuit to the second display driver circuit from the first signal to the third signal. For example, the memory assembly may store instructions that, in response to receiving the command paired with the predetermined command, cause the second display driver circuit to change the signal transmitted from the second display driver circuit to the first display driver circuit from the second signal to the fourth signal.

[0155] For example, the memory assembly may store instructions that cause the first display driver circuit to maintain the signal transmitted from the first display driver circuit to the second display driver circuit as the first signal in response to receiving the command that is not paired with the predetermined command. For example, the memory assembly may store instructions that cause the second display driver circuit to maintain the signal transmitted from the second display driver circuit to the first display driver circuit as the second signal in response to receiving the command that is not paired with the predetermined command.

[0156] For example, the head-mounted electronic device may include a first interface used for the first signal and the third signal and connecting the second display driving circuit to the first display driving circuit, and a second interface used for the second signal and the fourth signal and connecting the first display driving circuit to the second display driving circuit.

[0157] For example, the one or more processing circuits may include a first display processing unit (DPU) connected to the first display driving circuit and a second DPU connected to the second display driving circuit. For example, the memory assembly may store instructions that cause the first DPU to transmit the command to the first display driving circuit. For example, the memory assembly may store instructions that cause the second DPU to transmit the command to the second display driving circuit.

[0158] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.

[0159] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0160] The term "module" used in various embodiments of this document may include a unit implemented by hardware, software, or firmware, or any combination thereof, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0161] Various embodiments of the present document may be implemented as software (e.g., a program (1040)) including one or more instructions stored in a storage medium (e.g., an internal memory (1036) or an external memory (1038)) readable by a machine (e.g., an electronic device (1001)). For example, a processor (e.g., a processor (1020)) of the machine (e.g., an electronic device (1001)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0162] According to one embodiment, the method according to various embodiments disclosed in this document may be provided as included in a computer program product. The computer program product may be traded as a commodity between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) via an application store (e.g., Play Store™) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0163] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In a head-wearable electronic device, Head-wearable housing structure; A display assembly including a first display and a second display, each positioned over the eyes of a user wearing the head-mounted housing structure; A first display driving circuit connected to the first display; a second display driving circuit connected to the second display; and A processor comprising one or more processing circuits, The above processor, It is configured to transmit a command to the first display driving circuit at a first timing, and to transmit the command to the second display driving circuit at a second timing, The above first display driving circuit, Based on receiving the command transmitted from the processor at the first timing, transmitting a first signal indicating reception of the command to the second display driving circuit and postponing control of the first display according to the command until receiving a second signal indicating reception of the command from the second display driving circuit; and By transmitting the first signal to the second display driving circuit in response to receiving the command transmitted at the first timing from the processor, and by executing the control of the first display according to the command based on receiving the second signal from the second display driving circuit in response to receiving the command transmitted at the second timing from the processor, configured to synchronize the control of the second display according to the above command and the control of the first display according to the above command; Head-worn electronic devices.

2. In claim 1, the second display driving circuit, By executing the control of the second display according to the command based on receiving the first signal transmitted from the first display driving circuit in response to receiving the command transmitted at the first timing from the processor and transmitting the second signal to the first display driving circuit in response to receiving the command transmitted at the second timing from the processor, configured to synchronize the control of the first display according to the command and the control of the second display according to the command; Head-worn electronic devices.

3. In claim 2, the first display driving circuit, Based on executing the control of the first display according to the command, the transmitting of the first signal to the second display driving circuit is stopped, and the third signal is transmitted to the second display driving circuit, The above second display driving circuit, Based on executing the control of the second display according to the command, the transmitting of the second signal to the first display driving circuit is stopped, and the fourth signal is transmitted to the first display driving circuit, Head-worn electronic devices.

4. In claim 3, the first display driving circuit, configured to receive the command transmitted at the first timing from the processor while the third signal is transmitted to the second display driving circuit and the fourth signal is received from the second display driving circuit; The above second display driving circuit, configured to receive the command transmitted at the second timing from the processor while the third signal is received from the first display driving circuit and the fourth signal is transmitted to the second display driving circuit. Head-worn electronic devices.

5. In claim 4, A first interface connecting the first display driving circuit to the second display driving circuit for the first signal and the third signal transmitted from the first display driving circuit to the second display driving circuit; and Further comprising a second interface connecting the second display driving circuit to the first display driving circuit for the second signal and the fourth signal transmitted from the second display driving circuit to the first display driving circuit. Head-worn electronic devices.

6. In claim 4, the processor, Before the above command is transmitted to the first display driving circuit at the first timing, a predetermined command is transmitted to the first display driving circuit, Before the above command is transmitted to the second display driving circuit at the second timing, the predetermined command is further configured to be transmitted to the second display driving circuit. The above first display driving circuit, configured to stop transmitting the third signal to the second display driving circuit based on receiving the command transmitted from the processor at the first timing after the predetermined command is received, transmit the first signal to the second display driving circuit, and postpone the control of the first display according to the command until the second signal is received from the second display driving circuit; The above second display driving circuit, configured to stop transmitting the fourth signal to the first display driving circuit based on receiving the command transmitted from the processor at the second timing after the predetermined command is received, transmit the second signal to the first display driving circuit, and postpone the control of the second display according to the command until the first signal is received from the first display driving circuit. Head-worn electronic devices.

7. In claim 6, the processor, It is further configured to transmit another command to the first display driving circuit at a third timing different from the first timing and the second timing without transmitting the predetermined command to the first display driving circuit, and to transmit the other command to the second display driving circuit at a fourth timing different from the first timing, the second timing, and the third timing without transmitting the predetermined command to the second display driving circuit. The above first display driving circuit, In response to receiving the other command transmitted from the processor at the third timing, the third signal transmitted to the second display driving circuit is further configured to be maintained and control of the first display according to the other command is executed. The above second display driving circuit, In response to receiving the other command transmitted from the processor at the fourth timing, the fourth signal transmitted to the first display driving circuit is further configured to be maintained and control of the second display according to the other command is executed. The control of the first display according to the above other commands, Independently of executing said control of said second display according to said other command, Head-worn electronic devices.

8. In claim 1, It further includes PMIC (power management integrated circuitry), The above first display, Contains the first sub-pixels, The second display above, Contains second sub-pixels, The above command is, Indicates that the sleep state of the above display assembly is released, The above first display driving circuit, Based on receiving the command transmitted from the processor at the first timing, delaying the control of the first display according to the command by delaying the initialization of the voltages provided to the first terminal and the second terminal of the first light-emitting element in each of the first sub-pixels until transmitting the first signal to the second display driving circuit and receiving the second signal from the second display driving circuit; and By transmitting the first signal to the second display driving circuit and receiving the second signal from the second display driving circuit, initializing the voltages provided to the first terminal of the first light-emitting element and the second terminal of the first light-emitting element, respectively, and transmitting a first request to the PMIC for causing the PMIC to provide a first driving voltage to the first terminal of the first light-emitting element and each of the first terminals of the second light-emitting elements in each of the second sub-pixels after the voltages provided to the first terminal of the first light-emitting element and the second terminal of the first light-emitting element are initialized, and transmitting a second request to the PMIC for causing the PMIC to provide a second driving voltage to the second terminal of the first light-emitting element and each of the second terminals of the second light-emitting elements, thereby executing the control of the first display according to the command, configured to synchronize waking up the second display from a sleep state according to the above command and waking up the first display from a sleep state according to the above command; Head-worn electronic devices.

9. In claim 8, the second display driving circuit, Based on receiving the first signal from the first display driving circuit and transmitting the second signal to the first display driving circuit, the voltages provided to the first terminal of the second light-emitting element and the second terminal of the second light-emitting element are initialized to execute the control of the second display according to the command. The above first display driving circuit, Further configured to release the sleep state of the first display by using the first driving voltage provided from the PMIC in response to the first request from the first display driving circuit to the PMIC and the second driving voltage provided from the PMIC in response to the second request from the first display driving circuit to the PMIC. The above second display driving circuit, After the voltages provided to the first terminal of the second light-emitting element and the second terminal of the second light-emitting element are initialized based on the reception of the first signal and the transmission of the second signal, the first driving voltage provided from the PMIC in response to the first request from the first display driving circuit to the PMIC and the second driving voltage provided from the PMIC in response to the second request from the first display driving circuit to the PMIC are obtained, Further configured to release the sleep state of the second display by using the first driving voltage provided from the PMIC to the second display driving circuit and the second driving voltage provided from the PMIC to the second display driving circuit. Head-worn electronic devices.

10. In claim 1, the order, Indicates that the brightness level of each of the first display and the second display is changed, The above first display driving circuit, Based on receiving the command transmitted from the processor at the first timing, delaying the control of the first display according to the command by transmitting the first signal to the second display driving circuit and delaying changing the brightness level of the first display until receiving the second signal from the second display driving circuit; and By executing the control of the first display according to the command by changing the brightness level of the first display based on transmitting the first signal to the second display driving circuit and receiving the second signal from the second display driving circuit, configured to synchronize changing the brightness level of the second display according to the command and changing the brightness level of the first display according to the command; Head-worn electronic devices.

11. In claim 10, the second display driving circuit, configured to execute the control of the second display according to the command by changing the brightness level of the second display based on receiving the first signal from the first display driving circuit and transmitting the second signal to the first display driving circuit. Head-worn electronic devices.

12. In claim 1, the one or more processing circuits, a first DPU (display processing unit) connected to the first display driving circuit; and comprising a second DPU connected to the second display driving circuit; The above processor, Transmitting the command to the first display driving circuit at the first timing using the first DPU, configured to transmit the command to the second display driving circuit at the second timing using the second DPU; Head-worn electronic devices.

13. In claim 1, the first display driving circuit, configured to execute the control of the first display according to the command in response to the timing of the vertical synchronization signal for the first display caused after transmitting the first signal to the second display driving circuit and receiving the second signal from the second display driving circuit. Head-worn electronic devices.

14. In claim 13, the second display driving circuit, configured to execute the control of the second display according to the command in response to the timing of the vertical synchronization signal for the second display caused after receiving the first signal from the first display driving circuit and transmitting the second signal to the first display driving circuit. Head-worn electronic devices.

15. In claim 1, the first display driving circuit, Further configured to execute the control of the first display according to the command in response to confirming, before the second signal is received, the expiration of the activated timer based on receiving the command transmitted from the processor at the first timing. Head-worn electronic devices.

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