Electronic device
By using solder balls of varying heights to connect integrated circuit chips to a substrate with imperfections, the electronic device achieves improved chip alignment and image quality, addressing the challenges of substrate defects.
Patent Information
- Application Number
- PCT/FR2023/052018
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-14
- Publication Date
- 2025-06-19
AI Technical Summary
Existing electronic devices with multiple integrated circuit chips connected to the same substrate face challenges due to imperfections in the substrate, such as defects in flatness and positioning inaccuracies, which lead to poor chip alignment and compromised image quality in applications like image sensors.
The electronic device employs a transfer substrate with multiple integrated circuit chips connected via distinct sets of solder balls, where each solder ball has a unique height to ensure coplanarity of the chip faces, thereby compensating for substrate imperfections.
This solution effectively attenuates substrate irregularities, achieving a significantly improved flatness defect reduction, resulting in enhanced image quality and manufacturing efficiency for electronic devices like image sensors.
Smart Images

Figure FR2023052018_19062025_PF_FP_ABST
Abstract
Description
DESCRIPTION Electronic device Technical field
[0001] The present description relates generally to electronic devices, and in particular to electronic devices comprising several integrated circuit chips connected to the same substrate. The present description also relates to methods of designing and producing such devices. Prior art
[0002] Many electronic devices comprise an integrated circuit chip, for example silicon-based, connected to a substrate. In these devices, the substrate performs, for example, functions of mechanical support, electrical connection, optical transmission of the chip with other elements or circuits of the device, heat dissipation, etc. Depending on the application, the substrate may be a printed circuit board, a metal housing, a ceramic housing, a polymer housing, etc. The integrated circuit chip is, for example, transferred to one side of the substrate by means of solder balls.
[0003] Some applications benefit from the use of chips with increasingly large lateral dimensions. For example, in the field of image sensors, the use of larger chips allows for an improvement in the spatial resolution of image sensors. However, the increase in the lateral dimensions of the chips degrades their manufacturing yield. In order to overcome this drawback, it has been proposed to transfer, on a substrate, not a single large chip, but several smaller chips, the manufacturing of which is easier due to a better yield.
[0004] The strategy of transferring, on one face of the same substrate, several small chips instead of a single large chip, however, encounters various problems linked to imperfections affecting said face, such as defects in flatness and inclination, inaccuracies in the positioning of contact recovery elements, etc. These imperfections cause poor positioning of the chips relative to each other. In the example of an image sensor, this results in an offset between the edges of the chips and / or an inclination of all or part of the chips relative to a focal plane of the sensor, thus harming the image quality. Summary of the invention
[0005] There is a need to overcome all or part of the disadvantages of existing electronic devices in which several integrated circuit chips are connected to the same transfer substrate. It would also be desirable to overcome all or part of the disadvantages of the design and production methods of such devices.
[0006] For this, one embodiment provides an electronic device comprising: - a transfer substrate; - a first integrated circuit chip, connected to the transfer substrate by a first set of solder balls; and - at least one second integrated circuit chip, connected to the transfer substrate by a second set of solder balls distinct from the first set of solder balls, in which one of the solder balls of the first and second sets has a height different from that of at least one other solder ball of the first and second sets, so that a face of the first integrated circuit chip opposite the transfer substrate and a face of the second integrated circuit chip opposite the transfer substrate are coplanar.
[0007] According to one embodiment, one of the solder balls of the first set has a height different from that of at least one other solder ball of the first set and / or in which one of the solder balls of the second set has a height different from that of at least one other solder ball of the second set.
[0008] According to one embodiment: - the solder balls of the first set have the same first height; and - the solder balls of the second set have the same second height, different from the first height.
[0009] According to one embodiment: - the first set of solder balls is interposed between a first group of contact recovery elements, located on one face of the transfer substrate, and a second group of contact recovery elements, located on a second face of the first integrated circuit chip opposite its first face; and - the second set of solder balls is interposed between a third group of contact recovery elements, located on said face of the transfer substrate, and a fourth group of contact recovery elements, located on a second face of the second integrated circuit chip opposite its first face.
[0010] According to one embodiment, said face of the transfer substrate is non-planar.
[0011] According to one embodiment, the transfer substrate is a package made of a ceramic material.
[0012] One embodiment provides an image sensor comprising a device as described, wherein the first faces of the first and second integrated circuit chips are located in a focal plane of the image sensor.
[0013] One embodiment provides a method for designing a device as described, intended to be implemented by an electronic processing device, the method comprising the following successive steps: a) obtaining a mapping of said face of the transfer substrate; b) determining the position of the contact recovery elements of the first and third groups; and c) for each contact recovery element, calculating a size of the corresponding solder ball.
[0014] According to one embodiment, the method further comprises, in step c), operations of calculating a compression rate of each solder ball as a function of a insertion stroke of the integrated circuit chip and of comparing the compression rate to minimum and maximum values.
[0015] According to one embodiment, in step c), the sizes of the solder balls are calculated by starting with the set of solder balls intended to be placed on an area of said face of the transfer substrate of lower altitude.
[0016] According to one embodiment, step a) comprises a step of acquiring a 3D image of said face of the transfer substrate. Brief description of the drawings
[0017] These and other features and advantages will be set forth in detail in the following description of particular embodiments given without limitation in relation to the attached figures, among which:
[0018] Figure 1A and Figure 1B are respectively a side view and section along plane AA of Figure 1B and a top view, schematic and partial, of an electronic device according to one embodiment;
[0019] Figure 2 is a flowchart illustrating successive steps of a method for designing and producing an electronic device according to one embodiment; and
[0020] Figure 3 represents, in a very schematic and partial manner, an image sensor integrating the electronic device of Figures 1A and 1B. Description of the embodiments
[0021] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.
[0022] For the sake of clarity, only the steps and elements useful for understanding the embodiments described have been shown and are detailed. In particular, the applications of the electronic devices of the present description have not been detailed, the embodiments described being compatible with all or most of the applications likely to benefit from the substitution of a single large chip by a plurality of smaller chips, for example in the field of image sensors, possibly subject to adaptations within the scope of the person skilled in the art upon reading the present description.
[0023] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when we refer to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.
[0024] In the following description, when referring to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.
[0025] Unless otherwise specified, the expressions “about”, “approximately”, “substantially”, and “in the order of” mean to within 10%, preferably to within 5%.
[0026] In the following description, the terms "insulator" and "conductor" mean, unless otherwise specified, electrically insulating and electrically conductive respectively.
[0027] Figure 1A and Figure 1B are respectively a side view and section along plane AA of Figure 1B and a top view, schematic and partial, of an electronic device 100 according to one embodiment.
[0028] In the example shown, the electronic device 100 comprises a transfer substrate 101. The transfer substrate 101 is for example a package made of a ceramic material, for example aluminum nitride (AIN). Alternatively, the transfer substrate 101 may be a printed circuit board (PCB), a package made of a metallic material, a package made of a polymer material, a package made of a metal oxide, for example alumina (AI2O3), etc. The transfer substrate 101 may have, in view from above, any shape, for example rectangular, square, oval, circular, etc. The transfer substrate 101 has, for example, maximum lateral dimensions of the order of several tens or hundreds of millimeters. For example, the transfer substrate 101 has, in top view, a square-shaped perimeter whose side is equal to approximately 100 mm.
[0029] In the illustrated example, the electronic device 100 further comprises contact recovery elements 103, for example conductive pads, located on a face 101T of the transfer substrate 101 (the upper face of the substrate 101, in the orientation of FIG. 1A). The contact recovery elements 103 are for example made of a conductive metal, for example copper, or of a conductive metal alloy. For example, the contact recovery elements are made of copper coated with a nickel-gold alloy. In the orientation of FIG. 1A, the contact recovery elements 103 are located on and in contact with the face 101T of the transfer substrate 101. In the example shown, the contact recovery elements 103 protrude from the face 101T. The contact recovery elements 103 are for example, as illustrated in FIG. 1B, conductive pads having, in top view, a circular-shaped periphery.This example is however not limiting, the contact recovery elements 103 being able, as a variant, to have any shape, for example rectangular, square, oval, etc.
[0030] In the example shown, the electronic device 100 further comprises several integrated circuit chips 105 connected to the transfer substrate 101. More precisely, in this example, each integrated circuit chip 105 comprises contact recovery elements 107 connected, by solder balls 109, to the contact recovery elements 103 located on the face 101T of the transfer substrate 101. In the orientation of Figure 1A, each solder ball 109 is located on and in contact with the upper face of one of the contact recovery elements 103 of the transfer substrate 101, and under and in contact with the lower face of the contact recovery element 107 of the integrated circuit 105 located opposite. Each solder ball 109 is thus interposed between, on the one hand, one of the contact recovery elements 103 of the transfer substrate 101, distinct from the other contact recovery elements 103, and, on the other hand, one of the contact recovery elements 107 of one of the integrated circuit chips 105, distinct from the other contact recovery elements 107.
[0031] Each integrated circuit chip 105 has, in top view, any shape, for example rectangular, square, oval, circular, etc. For example, each integrated circuit chip 105 has, in top view, a square shape whose side is equal to approximately 12 mm. All the integrated circuit chips 105 of the electronic device 100 have, for example, identical shapes and dimensions, apart from manufacturing and / or cutting variations.
[0032] The contact recovery elements 107 of the integrated circuit chips 105 are for example identical or analogous to the contact recovery elements 103 of the transfer substrate 101. The contact recovery elements 107 are for example conductive pads, for example made of a conductive metal or a conductive metal alloy. By way of example, each contact recovery element 107 may have a single-layer structure, or a multi-layer structure comprising for example a stack of layers of metals chosen from copper, titanium, nickel, platinum and gold. In the orientation of FIG. 1A, each contact recovery element 107 is located under and in contact with a lower face 105B of one of the integrated circuit chips 105, the contact recovery elements 107 forming a projection on the faces 105B. The contact recovery elements 107 have, for example, in top view, shapes and dimensions substantially identical to those of the contact recovery elements 103. This example is however not limiting, the contact recovery elements 107 being able, as a variant, to have shapes and / or dimensions different from those of the contact recovery elements 103, for example identical shapes and dimensions smaller or larger than those of the contact recovery elements 103.
[0033] In the illustrated example, the solder balls 109 connecting a same integrated circuit chip 105 to the transfer substrate 101 form a set of solder balls 109 distinct from other sets of solder balls 109 respectively connecting each of the other chips 105 of the electronic device 100 to the substrate 101. In this example, each set of solder balls 109 connects a group of contact recovery elements 107 of one of the integrated circuit chips 105 to a group of contact recovery elements 103 underlying the transfer substrate 101.
[0034] For the purpose of simplification, the solder balls 109 have been symbolized, in FIG. 1A, by circles. However, the solder balls 109 may have a flattened, convex or oblong shape, this being for example due to the fact that the solder balls 109, initially having substantially spherical shapes, are compressed during a step of transferring the integrated circuit chips 105 onto the substrate 101.
[0035] In the same group, the contact recovery elements 103 and 107 are for example arranged in a matrix according to rows and columns. In this case, the solder balls 109 forming part of the same set are also arranged in matrix according to rows and columns. The rows are for example approximately orthogonal to the columns.
[0036] In the example shown, for each integrated circuit chip 105, the numbers of contact recovery elements 103, solder balls 109, and contact recovery elements 107 are identical. Alternatively, the numbers of contact recovery elements 103, solder balls 109, and / or contact recovery elements 107 may be different for at least one of the chips 105, for example in a case where the contact recovery elements 107 of the chip 105 are not all connected to the contact recovery elements 103 of the transfer substrate 101.
[0037] Figures 1A and 1B illustrate, by way of example, a case in which the groups of contact recovery elements 103, 107 and the sets of solder balls 109 each comprise nine elements 103, 107, or nine balls 109. This example is not, however, limiting. Alternatively, each group or set may comprise any number, for example several dozen, of contact recovery elements 103, 107 or solder balls 109. Furthermore, Figures 1A and 1B illustrate an example in which all the integrated circuit chips 105 comprise the same number of contact recovery elements 107. This example is, however, not limiting, one of the integrated circuit chips 105 being able, by way of alternative, to comprise a number of contact recovery elements 107 different from that of at least one other integrated circuit chip 105 of the electronic device 100.
[0038] For example, the electronic device 100 comprises 25 integrated circuit chips 105 arranged on the face 101T of the transfer substrate 101 so as to form, in top view, a structure of substantially square shape, each side of the square then comprising five integrated circuit chips. 105. This example is however not limiting, the electronic device 100 being able, as a variant, to comprise any integer number, greater than or equal to two, of integrated circuit chips 105 arranged in any manner on the face 101T. For the purposes of simplification, the integrated circuit chips 105 and the groups of contact recovery elements 103 have not been fully represented in FIG. 1B. Furthermore, in order not to overload the drawing, the assemblies of solder balls 109 and the groups of contact recovery elements 107 have not been illustrated in FIG. 1B.
[0039] The structure formed by the integrated circuit chips 105 has, for example, in top view, a surface area substantially equivalent to that which a single integrated circuit chip would have implementing functions similar or identical to those of all the integrated circuit chips 105. For example, the integrated circuit chips 105 are image sensor chips, and all the chips 105 have a spatial resolution substantially equivalent to that of an image sensor chip whose surface area is, in top view, substantially equal to the cumulative surface area of the chips 105 of the electronic device 100.Using several integrated circuit chips 105 rather than a single integrated circuit chip with a surface area substantially equivalent to the sum of the surfaces of the chips 105 advantageously makes it easier to manufacture the electronic device 100, insofar as the chips 105 of small dimensions have better manufacturing yields than those of the chips of larger dimensions.
[0040] However, the face 101T of the substrate 101 on which the integrated circuit chips 105 are transferred is, in the illustrated example, not planar. This may be due in particular to manufacturing constraints of the package or to feasibility limits of existing processes. The face 101T has by example irregularities, or imperfections, for example flatness defects such as hollows and / or bumps, parallelism or inclination defects, positioning inaccuracies of the contact recovery elements 103, etc. Figure 1A illustrates an example in which the face 101T of the transfer substrate 101 has a flatness defect AH. In other words, the substrate 101 has, along a vertical axis Oz, a difference in altitude or thickness AH between a location, or an area, of minimum altitude of the face 101T, and a location, or an area, of maximum altitude of the face 101T. By way of example, the flatness defect AH is of the order of one or more hundreds of micrometers, for example equal to approximately 300 pm.
[0041] According to one embodiment, one of the solder balls 109 of the solder ball assemblies of the electronic device 100 has a height different from that of at least one other solder ball 109 of the solder ball assemblies of the device 100. This makes it possible to ensure that faces 105T of the integrated circuit chips 105 opposite the transfer substrate 101 (the upper faces of the chips 105, in the orientation of FIG. 1A) are coplanar. More precisely, in the example shown, one of the solder balls 109 of one of the solder ball assemblies has a height different from that of at least one other solder ball of this assembly, and / or one of the solder balls 109 of another set of solder balls has a height different from that of at least one other solder ball 109 of this other set. This makes it possible, for example, to compensate for, or attenuate, significant local irregularities on the 101T face.Alternatively, the heights of the solder balls 109 may be identical to each other within a single set, but different from those of the balls 109 of at least one other set. This corresponds, for example, to a case in which the. face 101T exhibits larger-scale topology irregularities.
[0042] Providing solder balls 109 of different heights advantageously makes it possible to attenuate, or even compensate for, the irregularities of the transfer substrate 101, for example the flatness defect AH of the face 101T. For example, the faces 105T of the integrated circuit chips 105 thus transferred to the face 101T of the substrate 101 form a surface having, as a result, a flatness defect AH' at least two times lower, for example at least five times lower, than that of the face 101T of the transfer substrate 101. For example, in the case where the face 101T has a flatness defect AH equal to approximately 300 pm, the flatness defect AH' of the surface constituted by the faces 105T of the chips 105 transferred to the face 101T is between 50 and 100 pm.
[0043] Figure 2 is a flowchart illustrating successive steps of a method 200 for designing and producing an electronic device, for example the device 100 previously described in relation to Figures 1A and 1B, according to one embodiment.
[0044] In the example shown, the method 200 comprises a step 201 consisting of mapping the upper face 101T of the transfer substrate 101. During step 201, at least one three-dimensional image, or 3D image, of the face 101T is formed by means of equipment capable of detecting the relief of the face 101T, and in particular the pattern and the topology of the contact recovery elements 103, or pads 103. The equipment is for example of the interferometer, mechanical probe, etc. type. The 3D image of the face 101T comprises for example a plurality of points, or pixels, each characterized by a triplet of coordinates (x, y, z) located respectively along the orthogonal axes Ox, Oy and Oz of figures 1A and 1B.
[0045] During a step 203, subsequent to step 201, the position of each contact recovery element 103 is determined, for example by processing the 3D image acquired during step 201. For example, the center of the upper face of each contact recovery element 103 is located, along the axes Ox, Oy and Oz, respectively, by a triplet of coordinates (X, Y, Z). The Z coordinate corresponds, in this example, to the altitude of the center of the upper face of the contact recovery element 103. As a variant, the triplet of coordinates (X, Y, Z) can identify the position, in space, of a point different from the center of the upper face of each contact recovery element 103, for example the highest point, or the lowest point, of the contact recovery element 103, or an average of the coordinates (x, y, z) of the points of the contact recovery element 103, for example a barycenter of the points of the contact recovery element 103.Step 203 comprises for example the implementation of rectification and / or threshold functions, and takes into account for example criteria of size of the contact recovery elements 103, number of pixels of the 3D image, etc.
[0046] During a step 205, subsequent to step 203, the size of each solder ball 109 is calculated with the aim of compensating for or attenuating the irregularities, for example the flatness defect AH, of the face 101T.
[0047] In order to enable the balls 109 to interconnect the contact recovery elements 103 and 107, the size values, for example diameter, possible for each solder ball 109 are for example limited by the lateral dimensions of the underlying contact recovery element 103 and / or the lateral dimensions of the overlying contact recovery element 107. For example, if the contact recovery element 103 or 107 has, in top view, a circular shape with a diameter equal to approximately 200 pm, the associated solder ball 109 has, for example, a diameter of between 180 and 300 pm.
[0048] Furthermore, in the case where the contact recovery elements 103 are arranged in the form of a matrix, the maximum lateral dimension of the solder balls 109 is strictly less than the pitch of the contact recovery elements 103, that is to say the center-to-center distance between two adjacent contact recovery elements 103, in order to avoid any contact between adjacent balls 109. For example, the maximum diameter of the solder balls is equal to approximately 500 μm in a case where the pitch of the contact recovery elements 103 is of the order of 600 μm.
[0049] The inventors have noticed that providing solder balls of different sizes could prove unsatisfactory, or insufficient, to compensate for the most significant flatness defects. If necessary, a complementary strategy consists of acting on a compression rate of the solder balls 109. Indeed, for the same integrated circuit chip 105, the smallest solder balls 109 will have, after transfer of the chip 105 onto the substrate 101, a compression rate greater than that applied to the largest solder balls 109. To ensure that the compression rate of each solder ball 109 will be included in a range of admissible compression rates, step 205 for example further comprises operations of calculating the compression rate of each solder ball 109, as a function of a target value of depression travel, and of comparing this rate with minimum and maximum admissible values.
[0050] In view of the postponement of the 105 chips, a compromise is for example sought between different parameters such as: - imperfections, for example AH flatness defect, of the face 101T of the transfer substrate 101; - the lateral dimensions of the contact recovery elements 103 and / or 107; - the minimum and maximum size of compatible 109 solder balls; - the minimum and maximum compression rates that can be applied to the solder balls 109; and - the flatness targeted at the end of assembly.
[0051] In practice, a squeezing stroke of the integrated circuit chip 105 to be transferred first onto the face 101T is for example chosen. The squeezing stroke, or distance, involves, as explained above, different compression ratio values of the solder balls 109 connecting the chip 105 to the substrate 101. For the chip 105 to be transferred first, the following parameters are for example considered: - minimum altitude Zmin among the altitudes Z of the contact recovery elements 103 located in the area considered; - maximum altitude Zmax among the altitudes Z of the contact recovery elements 103 located in the area considered; - minimum admissible compression rate of a solder ball 109; - maximum permissible compression rate of a solder ball 109; - nominal compression rate of a solder ball 109, for example equal to approximately 20%; - minimum diameter of a solder ball 109, including for example a margin of error linked to the method of obtaining the ball (screen printing, beading, or any other method); and - maximum diameter of a solder ball 109, including for example a margin of error linked to the method of obtaining the ball.
[0052] Checks are carried out in particular to ensure that the stroke value implies, for each solder ball 109, a compression ratio: - less than or equal to the maximum rate, in the case of ball 109 intended to be placed on pad 103 of maximum altitude Z, i.e. the smallest ball; and - greater than or equal to the minimum rate, in the case of ball 109 intended to be placed on the plot of minimum altitude Z, i.e. the largest ball 109.
[0053] In certain cases, for example when the area of the face 101T of the substrate 101 intended to receive one of the integrated circuit chips 105 has significant differences between the maximum altitude Zmin and the minimum altitude Zmax, the initially chosen depression travel value may for example prove incompatible with compliance with the limits set by the minimum and maximum compression ratios. In this case, an iterative process is for example used so as to determine, for other depression travel values of the chip 105, whether the above limits are respected. The transfer, or hybridization, altitude of the first chip 105 intended to be transferred onto the substrate 101 is then for example used for the other chips 105.For example, the sinking stroke for transferring the other chips 105 to the same height as the first chip 105 to be transferred is used to choose the sizes of the solder balls 109 for the other chips and to verify, as indicated above, that the sizes and compression ratios of these balls 109 will be within the ranges of admissible sizes and compression ratios.
[0054] The integrated circuit chip 105 to be transferred first onto the substrate 101 is preferably the one which is intended to be arranged directly above the deepest zone of the face 101T, that is to say the zone for which the contact recovery elements 103 have the lowest altitude Z values. Advantageously, this makes it possible to ensure that the solder balls 109 can interconnect the contact recovery elements 107 and 103 located directly above the lowest areas, i.e. the deepest or hollowest, of the face 101T.
[0055] During a step 207, subsequent to step 205, the solder balls 109 are arranged on the contact resumption elements 103 of the transfer substrate 101. For example, the solder balls 109 are deposited by means of a nozzle, for example by implementing a technique called jet balling, or by screen printing, or by a technique called pick and place, etc. Depositing the solder balls 109 on the contact recovery elements 103 of the substrate 101 before transferring the integrated circuit chips 105 has the advantage of allowing greater control over the precision of the size of the solder balls 109. For example, the diameter of each solder ball 109 is chosen from a range of discrete diameters, for example varying in steps of 5 μm with a precision equal to approximately plus or minus 0.005 μm.
[0056] During a step 209, subsequent to step 207, the integrated circuit chips 105 are transferred onto the face 101T of the substrate 101 by applying the predetermined driving stroke during step 205. For example, the transfer is carried out by means of hybridization equipment comprising a transfer arm orientable inside a space called an “integrating sphere” making it possible to orient the first integrated circuit chip 105 so as to apply, during the transfer, a force along a direction substantially orthogonal to the area of the face 101T where the chip 105 is transferred. The other integrated circuit chips 105 are for example then transferred in the same direction as the first chip. In order to transfer the integrated circuit chips 105 to a same altitude, the hybridization equipment is for example configured to memorize, for the first chip 105, a report altitude as well as angles 0 and <p d'inclinaison de la puce par rapport au plan Oxy des figures IA et IB. À titre d'exemple, les angles 0 et <p correspondent, pour la puce de circuit intégré 105, à des inclinaisons de la puce 105 par rotation autour des axes Ox et Oy, respectivement. L'équipement d'hybridation est par exemple en outre configuré pour appliquer, pour toutes les autres puces 105, des valeurs d'altitude de report et des angles 0 et cp d'inclinaison identiques, aux dispersions de fabrication près liées par exemple à des imprécisions d'un équipement utilisé pour le report, à celles de la première puce 105. Chaque puce 105 peut ainsi être reportée, ou hybridée, le long d'une direction non orthogonale à la zone de la face 101T destinée à recevoir la puce.In practice, the transfer is for example carried out by means of equipment comprising an arm whose orientation is, once the first chip 105 has been transferred, unchanged for the transfer of the other chips 105.
[0057] The values of the angles 0 and cp of the integrated circuit chip 105 which is transferred first onto the face 101T of the substrate 101 are for example determined with respect to reflective patterns, for example nine patterns allowing the implementation of a laser leveling technique. As a variant, the alignment of the chip 105 with respect to the substrate 101 can be carried out by means of patterns previously formed on the substrate 101 and on the chip 105.
[0058] The implementation of the method 200 advantageously makes it possible to attenuate or compensate for the flatness defect AH of the face 101T of the transfer substrate 101. The method 200 makes it possible, for example, to reduce the flatness defect AH by a factor greater than or equal to four after transfer of the chips 105 onto the face 101T. For example, in a case where the face 101T of the transfer substrate 101 has a flatness defect AH of the order of 300 pm, the integrated circuit chips 105 have, after transfer onto the face 101T, a flatness defect of the order of 70 pm.
[0059] Alternatively, the solder balls 109 may be mechanically attached to the integrated circuit chips 105 before the chips 105 are transferred to the substrate 101. In this case, each integrated circuit chip 105 is, for example, associated with an area of the face 101T of the transfer substrate 101. Depositing the solder balls 109 on the contact recovery elements 107 of the integrated circuit chips 105 prior to the chips 105 being transferred to the face 101T of the substrate 101 advantageously makes it possible to implement methods more commonly used in the field of microelectronics than methods for depositing the solder balls 109 on the contact recovery elements 103 prior to the chips 105 being transferred to the face 101T of the substrate 101.For example, the methods for forming the solder balls 109 on the contact recovery elements 107 are identical or similar to the methods previously discussed for forming the solder balls 109 on the contact recovery elements 103. In the case where the solder balls 109 are formed by screen printing, a stencil is for example manufactured for each integrated circuit chip 105.
[0060] The steps of the method 200 described above may, in whole or in part, be implemented by a data processing device, for example a computer, comprising a processor configured to implement steps of the method 200. In particular, a computer program product may be provided comprising instructions which, when the program is executed by a computer, causing it to implement all or part of the steps of the method 200.
[0061] Figure 3 represents, in a very schematic and partial manner, an image sensor 300 integrating the electronic device 100 of figures 1A and 1B.
[0062] In the example shown, the image sensor 300 further comprises an optical system, symbolized by a block 301. The optical system 301 is for example a focusing system intended to focus incident radiation, for example visible light, onto a focal plane formed by the faces 105T of the integrated circuit chips 105 of the electronic device 100. By way of example, the optical system 301 comprises one or more elements among at least one converging lens, at least one diverging lens, at least one diaphragm, a bolometer, etc.
[0063] Although this has not been detailed in FIG. 3, the image sensor 300 may comprise other elements or circuits, for example a control circuit, one or more data buses, an energy source, etc. These elements or circuits have been symbolized in FIG. 3, by a block 303.
[0064] Integrating the electronic device 100 into the image sensor 300 advantageously makes it possible to obtain higher quality images, for example sharper images, than those which would be obtained by transferring the integrated circuit chips 105 onto the face 101T of the substrate 101 using solder balls of identical sizes. The image sensor 300 also has a lower cost than that of a sensor integrating an electronic device similar to the device 100 but comprising only a single integrated circuit chip having an area substantially equal to the cumulative area of the faces 105T of the integrated circuit chips 105.
[0065] Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will occur to those skilled in the art. In particular, although the present description takes as an example a case in which the face 101T of the transfer substrate 101 intended to receive the integrated circuit chips 105 has a planarity defect AH, the described embodiments apply more generally to other types of imperfections affecting the face 101T, such as alignment defects, parallelism defects, positioning defects of the contact recovery elements 103, etc. Adaptation of the described embodiments to any one, or any combination, of these defects is within the scope of the skilled person from the indications of the present description.
[0066] Furthermore, the person skilled in the art is able, from the indications of the present description, to adapt the embodiments described to the variant in which the solder balls 109 are mechanically fixed to the integrated circuit chips 105 before the chips 105 are transferred to the substrate 101.
[0067] Finally, the practical implementation of the described embodiments and variants is within the reach of the person skilled in the art from the functional indications given above. In particular, the described embodiments are not limited to the particular examples of materials and dimensions mentioned in the present description.
Claims
CLAIMS 1. Electronic device (100) comprising: - a transfer substrate (101); - a first integrated circuit chip (105), connected to the transfer substrate by a first set of solder balls (109); and - at least one second integrated circuit chip (105), connected to the transfer substrate by a second set of solder balls (109) distinct from the first set of solder balls, in which one of the solder balls of the first and second sets has a height different from that of at least one other solder ball of the first and second sets, so that a face (105T) of the first integrated circuit chip opposite the transfer substrate and a face (105T) of the second integrated circuit chip opposite the transfer substrate are coplanar.
2. Device (100) according to claim 1, wherein one of the solder balls (109) of the first set has a height different from that of at least one other solder ball (109) of the first set and / or wherein one of the solder balls (109) of the second set has a height different from that of at least one other solder ball (109) of the second set.
3. Device (100) according to claim 1, in which: - the solder balls (109) of the first set have the same first height; and - the solder balls (109) of the second set have the same second height, different from the first height.
4. Device (100) according to claim 1, 2 or 3, in which: - the first set of solder balls (109) is interposed between a first group of contact recovery elements (103), located on one face (101T) of the transfer substrate (101), and a second group of contact recovery elements (107), located on a second face (105B) of the first integrated circuit chip (105) opposite its first face (105T); and - the second set of solder balls (109) is interposed between a third group of contact recovery elements (103), located on said face (101T) of the transfer substrate (101), and a fourth group of contact recovery elements (107), located on a second face (105B) of the second integrated circuit chip (105) opposite its first face (105T).
5. Device (100) according to claim 4, wherein said face (101T) of the transfer substrate (101) is non-planar.
6. Device (100) according to any one of claims 1 to 5, in which the transfer substrate (101) is a package made of a ceramic material.
7. An image sensor (300) comprising a device (100) according to any one of claims 1 to 6, wherein the first faces (105T) of the first and second integrated circuit chips (105) are located in a focal plane of the image sensor.
8. Method (200) for designing a device (100) according to claim 4 or 5, intended to be implemented by an electronic processing device, the method comprising the following successive steps: a) obtaining a map of said face (101T) of the transfer substrate (101); b) determining the position of the recovery elements of contact (103) of the first and third groups; and c) for each contact recovery element, calculating a size of the corresponding solder ball (109).
9. The method (200) of claim 8, further comprising, in step c), operations of calculating a compression ratio of each solder ball (109) as a function of a insertion stroke of the integrated circuit chip (105) and comparing the compression ratio to minimum and maximum values.
10. Method (200) according to claim 8 or 9, wherein, in step c), the sizes of the solder balls (109) are calculated starting with the set of solder balls intended to be placed on an area of said face (101T) of the transfer substrate (101) of lower altitude.
11. Method (200) according to claim 8, 9 or 10, wherein step a) comprises a step of acquiring a 3D image of said face (101T) of the transfer substrate (101).
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