Semiconductor substrate, method and apparatus for manufacturing semiconductor substrate, and semiconductor device

Abstract

This semiconductor substrate comprises: a template substrate having a seed part and a non-seed part; and a GaN-based semiconductor part that is positioned above the template substrate and has a base part positioned on the seed part and a wing part connected to the base part. The wing part has a first portion that contains carbon at a concentration of 1019 / cm3 or more and is positioned above the non-seed part, and a second portion that contains carbon at a concentration higher than that of the first portion and is positioned above the non-seed part.

Description

Semiconductor substrate, manufacturing method and manufacturing apparatus thereof, and semiconductor device

[0001] The present disclosure relates to semiconductor substrates and the like.

[0002] Patent Document 1 discloses a technique for laterally growing a GaN-based semiconductor layer on a substrate.

[0003] Japanese Patent Publication No. 2012-114263

[0004] The semiconductor substrate includes a template substrate having a seed portion and a non-seed portion, and a GaN-based semiconductor portion located above the template substrate and having a base portion located on the seed portion and wing portions connected to the base, the wing portions being located above the non-seed portion, and １９ / cm ３ and a second portion located above the non-seed portion and having a higher carbon concentration than the first portion.

[0005] 9 is a plan view showing the configuration of a semiconductor substrate according to the present embodiment. FIG. 10 is a cross-sectional view showing the configuration of a semiconductor substrate according to the present embodiment. FIG. 11 is a cross-sectional view showing the configuration of a semiconductor substrate according to the present embodiment. FIG. 12 is a cross-sectional view showing the configuration of a semiconductor substrate according to the present embodiment. FIG. 13 is a cross-sectional view showing the configuration of a semiconductor substrate according to the present embodiment. FIG. 14 is a cross-sectional view showing the configuration of a semiconductor substrate according to the present embodiment. FIG. 15 is a cross-sectional view showing the configuration of a semiconductor substrate according to the present embodiment. FIG. 16 is a graph showing element concentrations in the base portion of FIG. 8. FIG. 17 is a graph showing element concentrations in the wing portion of FIG. 8. FIG. 18 is a cross-sectional view showing the configuration of the semiconductor substrate according to the present embodiment. FIG. 19 is a cross-sectional view showing the configuration of the semiconductor substrate according to the present embodiment. FIG. 19 is a secondary electron image of a cross section of the semiconductor substrate measured with an SEM. FIG. 19 is a CL image obtained by CL measurement of a cross section of the semiconductor substrate according to the present embodiment. FIG. 10 is a flowchart showing a method for manufacturing a semiconductor substrate according to the present embodiment. FIG. 11 is a table showing conditions for the V / III ratio. FIG. 12 is a cross-sectional view showing a method for manufacturing a semiconductor substrate according to the present embodiment. FIG. 13 is a block diagram showing an apparatus for manufacturing a semiconductor substrate according to the present embodiment. FIG. 14 is a flowchart showing a method for manufacturing a semiconductor laser element according to the present embodiment. FIG. 15 is a cross-sectional view showing a configuration of a semiconductor substrate according to the present embodiment. FIG. 16 is a cross-sectional view showing a configuration of a semiconductor laser element according to the present embodiment.

[0006] Fig. 1 is a plan view showing the configuration of a semiconductor substrate according to this embodiment. Fig. 2 is a cross-sectional view showing the configuration of a semiconductor substrate according to this embodiment. As shown in Figs. 1 and 2, a semiconductor substrate 10 includes a template substrate TS having a seed portion SA and a non-seed portion (growth suppression portion) DA, and a GaN-based semiconductor portion 8 located above the template substrate TS and having a base portion B located above the seed portion SA and wing portions W connected to the base portion B.

[0007] The wing portion W is located above the non-seed portion DA, and 10 １９ / cm ３ The wing portion W has a first portion P1 containing a carbon-family element, which is carbon or germanium, at a concentration of 10 or more, and a second portion P2 located above the non-seed portion DA and having a higher concentration of the carbon-family element than the first portion P1. １９ / cm ３ The carbon concentration of the second portion P2 may be two or more times or four or more times the carbon concentration of the first portion P1. For example, the carbon concentration of the second portion P2 may be 2.0×10 or more times the carbon concentration of the first portion P1. １９ ~1.0 x 10 ２０ / cm ３ When １９ ~5.0 x 10 ２０ / cm ３ may be.

[0008] Forming the first and second portions P1 and P2 in the wing portion W reduces internal stress (e.g., tensile stress) in the wing portion W. This improves anisotropic strain (e.g., a state in which the amount of strain differs in the first direction X and the second direction Y) in the wing portion W, and enables the formation of a high-quality nitride semiconductor layer above the wing portion W with little crystal slip.

[0009] The seed portion SA and the non-seed portion DA may be aligned in the first direction X in a planar view, and the first portion P1 and the second portion P2 may be aligned in the first direction X such that the first portion P1 is located closer to the base portion B than the second portion P2. By providing a gradation in the carbon concentration of the wing portion W according to the distance from the seed portion SA, anisotropic strain can be more effectively reduced. A planar view refers to a view in the normal direction of the template substrate TS, and includes a perspective planar view. "Two members overlapping in a planar view" may mean "at least a portion of one member overlaps the other in a planar view viewed in the normal direction of the main substrate 1," and two members may overlap in a planar view when one of the two members is located above or below the other.

[0010] 2, the wing portion W may have a third portion P3 located above the first portion P1 and having a higher carbon concentration than the first portion P1. The carbon concentration of the third portion P3 may be at least two times or at least four times the carbon concentration of the first portion P1. For example, the carbon concentration of the third portion P3 may be 2.0×10 １９ ~1.0 x 10 ２０ / cm ３ When １９ ~5.0 x 10２０ / cm ３ The carbon concentrations of the second portion P2 and the third portion P3 may be approximately the same, and may differ by, for example, a factor of 2 or less (the carbon concentration of the third portion P3 being 0.5 to 2 times the carbon concentration of the second portion P2).

[0011] By disposing the third portion P3 on the first portion P1, the anisotropic strain in the wing portion W is more effectively reduced, and a high-quality nitride semiconductor layer with little m-plane slip (crystal misalignment along the m-plane, which is the cleavage plane) can be formed above the wing portion W. The third portion P3 may be located on the first and second portions P1 and P2.

[0012] The entire wing part W is 10 １９ / cm ３ The base portion B and the wing portion W may contain carbon (C) at a concentration of 10 or more. １９ / cm ３ The second portion P2 may be the entire portion of the wing portion W that is located in the first direction X relative to the first portion P1. The third portion P3 may be the entire portion of the wing portion W above the first portion P1 and the second portion P2. The first portion P1 may be a portion that is surrounded (covered) by the second portion P2 and the third portion P3.

[0013] The second portion P2 may have a length in the first direction X that is longer than that of the first portion P1. The first portion P1 may have a length in the first direction X that is, for example, 2 to 20 μm, or 5 to 15 μm. The second portion P2 may have a length in the first direction X that is, for example, 5 to 100 μm, or 10 to 50 μm. The third portion P3 may be thinner than the first portion P1.

[0014] The first portion P1 may have a thickness of, for example, 1 to 10 μm, or 2 to 5 μm. The third portion P3 may have a thickness of, for example, 0.5 to 6 μm, or 1 to 4 μm. The first portion P1 may have tensile strain in the m-axis direction of the GaN-based semiconductor portion 8, and the third portion may have a smaller tensile strain in the m-axis direction than the first portion P1. The value of the tensile strain can be confirmed by stress analysis using, for example, Raman spectroscopy or XRD (X-ray diffraction).

[0015] The nitride semiconductor can be expressed as AlxGayInzN (0≦x≦1; 0≦y≦1; 0≦z≦1; x+y+z=1), for example, and specific examples include GaN-based semiconductors, AlN (aluminum nitride), InAlN (indium aluminum nitride), and InN (indium nitride). GaN-based semiconductors are semiconductors containing gallium atoms (Ga) and nitrogen atoms (N), and typical examples include GaN, AlGaN, AlGaInN, and InGaN. The GaN-based semiconductor portion 8 contains a GaN-based semiconductor as a main component. The GaN-based semiconductor may be doped or non-doped.

[0016] A semiconductor substrate means a substrate that includes a semiconductor, and the main substrate 1 included in the template substrate TS may or may not include a semiconductor (e.g., silicon, silicon carbide). An example of a main substrate 1 that does not include a semiconductor is a sapphire substrate. The template substrate TS is sometimes called a growth substrate. The main substrate 1 may be a free-standing substrate (wafer).

[0017] The a-axis direction of a GaN-based semiconductor is, for example, the <11-20> direction, and the m-axis direction is, for example, the <1-100> direction. The thickness direction of the GaN-based semiconductor portion 8 may be the c-axis direction of the GaN-based semiconductor (for example, the <0001> direction). In FIG. 1 and other figures, the first direction X may be the a-axis direction (hereinafter sometimes referred to as the lateral direction), the second direction Y may be the m-axis direction, and the third direction Z may be the c-axis direction (thickness direction).

[0018] The GaN-based semiconductor portion 8 may be a GaN-based crystalline body G1 (for example, a GaN crystalline body) grown by ELO (Epitaxial Lateral Overgrowth) starting from the seed portion SA. In the GaN-based semiconductor portion 8, the threading dislocation density of the wing portions W may be 1 / 5 or less, 1 / 10 or less, or 1 / 100 or less of the threading dislocation density of the base portion B. The threading dislocation density of the wing portions W may be 5×10 ６ / cm ２ It may be the following:

[0019] Two GaN-based crystal bodies G1 and G2 may be located on the template substrate TS, adjacent to each other in the first direction X with a gap GP between them, and the GaN-based crystal body G1 (GaN-based semiconductor portion 8) may include an edge ED located above the non-seed portion DA. By halting the growth of the GaN-based crystal bodies G1 and G2 (stopping the supply of raw materials) before they meet, which are growing in opposite directions on the non-seed portion DA by ELO, it is possible to form an island-shaped GaN-based crystal body G1 (GaN-based semiconductor portion 8).

[0020] 3 and 4 are cross-sectional views showing the configuration of the semiconductor substrate according to this embodiment. In FIG. 2, the wing portion W includes a third portion P3, but this is not limiting. As shown in FIG. 3, the GaN-based semiconductor portion 8 may be configured with first and second portions P1 and P2 adjacent to each other in the first direction X. In FIG. 2, the first portion P1 is located on the base portion B side, but this is not limiting. As shown in FIG. 4, the second portion P2 (having a higher carbon concentration than the first portion P1) may be located on the base portion B side.

[0021] FIG. 5 is a cross-sectional view showing the configuration of a semiconductor substrate according to this embodiment. As shown in FIG. 5 , the template substrate TS may include a main substrate 1 and an underlayer 4 whose main component is a non-nitride semiconductor, and the underlayer 4 may include a seed portion SA. The underlayer 4 may be, for example, a gallium nitride film (GaN), an aluminum nitride film (AlN), or a gallium-aluminum mixed crystal film (AlGaN, InGaN, AlInGaN, etc.). The underlayer 4 may be formed using a sputtering method. Of course, it may also be formed using a metal organic chemical vapor deposition (MOCVD) method, molecular beam epitaxy (MBE) method, or the like.

[0022] The template substrate TS has a mask pattern 6, and the mask pattern 6 may include openings K that overlap the seed portions SA and mask portions 5 that function as non-seed portions DA. The mask portions 5 may include at least one of silicon nitride and silicon oxide.

[0023] 5, the first portion P1 and the second portion P2 may be aligned in the first direction X so that the first portion P1 is located on the base portion B side, and the third portion P3 may be located on the first and second portions P1 and P2. The semiconductor substrate 10 is required to suppress slip defects caused by tensile strain that may occur in the upper functional layer (device layer). For example, １９ / cm ３ The carbon content described above can induce compressive strain in the GaN-based crystal, but as shown in Figure 5, the first portion P1 with a low carbon concentration is surrounded (covered) by the second and third portions P2 and P3 (adjacent portions PS) with a high carbon concentration, and the adjacent portions PS (covered portions) with strong compressive strain are located closer to the functional layer (device layer), which can effectively suppress slip defects that may occur in the functional layer on the wing portion W.

[0024] At least a portion of the bottom surface Q1 of the first portion P1 may be in contact with the non-seed portion DA, and at least a portion of the bottom surface Q2 of the second portion P2 may be floating above the non-seed portion DA. This can facilitate cleavage of the wing portion W while reducing the external force (e.g., tensile force) that the second portion P2 receives from the template substrate TS. The thickness of the gap JD between the non-seed portion DA and the second portion P2 may be 10 nm or less, and the thickness of the gap JD between the non-seed portion DA and the second portion P2 may increase as the distance from the base B in the first direction X increases.

[0025] The greater the carbon content of the GaN-based crystal on the mask portion 5, the easier it is to peel off from the mask portion 5 and the easier it is to cleave. For example, when the wing portion W is used in a laser element, an optical resonator (ridge structure) can be disposed at a position away from the base portion B in the first direction X in a plan view, and a resonator end facet can be formed by cleavage. Therefore, by positioning the first portion P1 with a low carbon concentration close to the base portion B and the second portion P2 with a high carbon concentration farther from the base portion B, it is possible to avoid peeling of the GaN-based semiconductor portion 8 and ensure ease of cleavage at the same time.

[0026] The base B is connected to the first portion P1. １９ / cm ３and an upper portion BT connected to the third portion P3 and containing a higher concentration of carbon than the lower portion BF. The threading dislocation density of the adjacent portions PS (second and third portions P2 and P3) may be 1 / 10 or less of the threading dislocation density of the base portion B (upper portion BT). By forming the adjacent portions PS by ELO, the threading dislocation density of the adjacent portions PS is significantly reduced (for example, 5×10) compared to the base portion B, which is a dislocation inheritance portion. ６ / cm ２ (The following can be done.)

[0027] The first portion P1 may have an inversely tapered side surface T1, and the second portion P2 may have an inversely tapered side surface T2 with a larger area than the side surface of the first portion P1. This reduces the risk of functional layers on adjacent GaN crystal bodies (GaN-based semiconductor portions 8) being connected to each other. The third portion P3 may have a lower transmittance for light with wavelengths of less than 500 nm than the first portion P1. This reduces stray light.

[0028] As shown in FIG. 5 , the first portion P1 may have both an inversely tapered side surface T1 and a forwardly tapered side surface TU. In the first portion P1, the area of ​​the forwardly tapered side surface TU may be smaller than the area of ​​the inversely tapered side surface T1. In the first portion P1, the area of ​​the forwardly tapered side surface TU may be larger than the area of ​​the inversely tapered side surface T1. The side surface T2 of the second portion P2 may include multiple side surfaces each having a different inclination angle with respect to the template substrate TS. Note that the inversely tapered shape refers to a shape in which the distance from the base portion B increases with increasing distance from the template substrate TS. The side surface T1 and the side surface T2 may have different inclination angles with respect to the surface of the template substrate TS. The inclination angle of the side surface T1 with respect to the surface of the template substrate TS may be larger than that of the side surface T2. The inclination angle of the side surface T1 with respect to the surface of the template substrate TS may be smaller than that of the side surface T2.

[0029] The template substrate TS may include a main substrate 1 (silicon wafer, silicon carbide wafer, sapphire wafer, etc.) having a different lattice constant from that of the GaN-based semiconductor portion 8 (e.g., a GaN layer). The main substrate 1 may have a smaller thermal expansion coefficient than the GaN-based semiconductor portion 8. The first portion P1 and the second portion P2 may be layers containing GaN. The first portion P1, the second portion P2, and the third portion P3 may be single-crystal layers of GaN.

[0030] 6 and 7 are cross-sectional views showing the configuration of a semiconductor substrate according to this embodiment. As shown in Fig. 6, the semiconductor substrate 10 may include a nitride semiconductor layer LA containing Al above the third portion P3. The nitride semiconductor layer LA may be an aluminum gallium nitride layer (AlGaN layer).

[0031] 7, a nitride semiconductor layer LS having a lattice constant and a thermal expansion coefficient larger than those of the GaN-based semiconductor portion 8 may be included above the third portion P3. The nitride semiconductor layer LS may be an indium gallium nitride layer (InGaN layer). This InGaN layer may have a composition (atomic ratio relative to Ga) of 3% to 20% and a thickness of 10 nm to 300 nm. A GaN layer LG (e.g., a silicon-doped n-GaN layer) may be provided on the nitride semiconductor layer LS.

[0032] 8 is a cross-sectional view showing the configuration of a semiconductor substrate according to this embodiment. As shown in Fig. 8, a functional layer 9 (e.g., a laminate of nitride semiconductors) may be provided on a GaN-based semiconductor portion 8. The functional layer 9 may include an n-type semiconductor layer, an active layer, and a p-type semiconductor layer.

[0033] 9 is a graph showing the element concentration in the portion including the base portion of FIG. 8. FIG. 10 is a graph showing the element concentration in the portion including the wing portion of FIG. 8. As shown in FIG. 9, the carbon concentration in the lower portion BF is 10 １９ / cm ３ The carbon concentration of the upper portion BT is higher than that of the lower portion BF (three times or more that of the lower portion BF). １９ / cm ３As described above, the second and third portions P2 and P3 (adjacent portions PS) have a higher carbon concentration than the first portion P1 (at least three times that of the first portion P1).

[0034] In the semiconductor substrate 10, the first portion P1 may contain silicon (Si), and the carbon concentration may be higher than the silicon concentration in the first portion P1. The first portion P1 may contain oxygen (O), and the silicon concentration may be higher than the oxygen concentration in the first portion P1. As shown in FIGS. 9 and 10 , the second and third portions P2 and P3 (adjacent portions PS) may contain silicon, and the carbon concentration may be higher than the silicon concentration in the second and third portions P2 and P3 (adjacent portions PS). The second portion P2 may contain oxygen, and the silicon concentration may be higher than the oxygen concentration in the second portion P2.

[0035] 9 and 10 show the results of SIMS analysis, and the measurement device used was an IMS-7f manufactured by CAMECA. The measurement conditions were as follows: Cs+ was used as the primary ion species, the primary acceleration voltage was 15 kV, and the detection area was Φ8 μm. The concentrations of each component in the first portion P1, the second portion P2, and the third portion P3 may be the average concentration values ​​of the corresponding portions in the SIMS analysis, or may be the average concentration values ​​within a given depth range (e.g., 0.5 μm to 1.0 μm) of the corresponding portions. Each portion in the semiconductor substrate 10 may be identified visually from an SEM image or a TEM image, or by overlaying the SEM image or TEM image with the SIMS analysis results.

[0036] 11 is a cross-sectional view showing the configuration of the semiconductor substrate 1. As shown in FIG. 11, the base layer 4 of the template substrate TS may have a modified portion 4D that functions as a non-seed portion DA and a non-modified portion 4S that functions as a seed portion SA.

[0037] 12 is a cross-sectional view showing the configuration of this semiconductor substrate. As shown in FIG. 12, the GaN-based semiconductor portion 8 has a raised portion R in contact with the seed portion SA (4S) of the underlayer 4, and a growth inhibiting film 7 is located on the side surface of the raised portion R. A gap JD may be located between the non-seed portion DA (4D) and the first and second portions P1 and P2 of the wing portion W (the entire wing portion W may be floating above the template substrate TS). The growth inhibiting film 7 may be a silicon compound film such as a silicon nitride film, and the growth inhibiting film 7 may be located on the non-seed portion DA (4D).

[0038] 13 shows a cross-sectional SEM secondary electron image of the GaN-based semiconductor portion 8. The secondary electron image shows a difference in carrier density. The second portion P2 contains more carbon as an impurity than the first portion P1, which is thought to result in a lower carrier density, and this difference can be confirmed in the detected secondary electron image. Other electron microscopes that can be used include SCM (Scanning Capacitance Microscopy) and SNDM (Scanning Nonlinear Dielectric Microscopy).

[0039] Regarding the GaN-based semiconductor portion 8, the portion immediately above the seed portion SA (for example, the portion corresponding to the lower portion BF) has a carbon concentration of 10 １９ / cm ３ As described above, the carbon concentration may be higher than that of the first portion P1, and such an embodiment is also included in the present disclosure.

[0040] 14 is a CL image obtained by CL measurement of a cross section of the semiconductor substrate. The GaN-based semiconductor portion 8 has a first crystalline portion 11 including a first portion P1 and a second crystalline portion 12 including a second portion P2 and a third portion P3. In a CL (Cathode Luminescence) measurement method, the first crystalline portion 11 may have a higher brightness than the second crystalline portion 12. The first crystalline portion 11 may include a lower portion BF, and the second crystalline portion 12 may include an upper portion BT.

[0041] In the CL measurement, the fundamental luminescence intensity of the first crystalline portion 11 relative to the fundamental luminescence intensity of the second crystalline portion 12 may be between 2 and 1000. Here, as the conditions for the CL measurement, a scanning electron microscope (SEM) JSM-7000F manufactured by JEOL Ltd. and a detector MP-32S manufactured by HORIBA Ltd. may be used, and the measurement can be performed at an acceleration voltage of 3 kV.

[0042] 14 , the white portion of the GaN-based semiconductor portion 8 is the first crystal portion 11, and the black portion of the GaN-based semiconductor portion 8 is the second crystal portion 12. As shown in FIG. 14 , the center portion of the GaN-based semiconductor portion 8 may be the second crystal portion 12.

[0043] The GaN-based semiconductor portion 8 may include a portion that includes the first portion P1 and that appears relatively light (high gray scale) when a secondary electron image is confirmed with a scanning electron microscope such as an SEM, and a portion that includes the second portion P2 and the third portion P3 and that appears relatively dark (low gray scale) when a secondary electron image is confirmed with the SEM. In this case, the lightly appearing portion may be the first crystalline portion 11, and the darkly appearing portion may be the second crystalline portion 12.

[0044] FIG. 15 is a flowchart showing a method for manufacturing a semiconductor substrate according to this embodiment. FIG. 16 is a table showing conditions for the V / III ratio. FIG. 17 is a cross-sectional view showing a method for manufacturing a semiconductor substrate according to this embodiment. In FIGS. 15 to 17, the following steps are performed to manufacture a semiconductor substrate 10 including a template substrate TS having a seed portion SA and a non-seed portion DA, and a GaN-based semiconductor portion 8 located above the template substrate TS and having a base portion B located above the seed portion SA and a wing portion W connected to the base portion B. That is, the process includes a step (S30) of preparing a template substrate TS, a step (S40) of alternately executing (e.g., repeatedly executing) during a first period first film formation conditions and second film formation conditions having a V / III ratio larger than that of the first film formation conditions to form a lower portion BF of the base B and a first portion P1 of the wing portion W by ELO, and a step (S45) of alternately executing (e.g., repeatedly executing) during a second period third film formation conditions having a V / III ratio smaller than that of the first film formation conditions and fourth film formation conditions having a V / III ratio larger than that of the first film formation conditions and a V / III ratio smaller than that of the second film formation conditions to form adjacent portions PS (second and third portions P2 and P3) in contact with the first portion P1 in the upper portion BT of the base B and the wing portion W by ELO.

[0045] The raw materials supplied in the first period (ELO period of BF and P1) and the second period (ELO period of BT and PS) include a group III element, a group V element, and carbon (C). The V / III ratio is the molar ratio of a group V element (e.g., nitrogen) to a group III element (e.g., Ga, Al, In) in the supplied raw materials. Carbon may be contained in either the group III element source or the group V element source. A carbon source may be supplied separately.

[0046] The adjacent portion PS may cover the first portion P1, and may include a second portion P2 adjacent to the first portion P1 in the a-axis direction (first direction X) of the GaN-based semiconductor portion, and a third portion P3 located above the first portion P1. The third portion P3 may be located on the first and second portions P1 and P2.

[0047] The V / III ratio under the second deposition conditions may be 5 times or more the V / III ratio under the first deposition conditions, the V / III ratio under the third deposition conditions may be 1 / 2 or less the V / III ratio under the first deposition conditions, and the V / III ratio under the fourth deposition conditions may be 6 times or more the V / III ratio under the third deposition conditions. The V / III ratio under the first deposition conditions may be 50 to 90, the V / III ratio under the second deposition conditions may be 450 to 650, the V / III ratio under the third deposition conditions may be 15 to 30, and the V / III ratio under the fourth deposition conditions may be 100 to 300. As shown in the specific example of FIG. 16 , the V / III ratio under the first deposition conditions may be 68, the V / III ratio under the second deposition conditions may be 546, the V / III ratio under the third deposition conditions may be 21, and the V / III ratio under the fourth deposition conditions may be 215.

[0048] Under the first to fourth film formation conditions, the V / III ratio may be controlled by maintaining a substantially constant supply rate of the Group III element source (e.g., a gallium source) and varying the supply rate of the Group V element source (e.g., a nitrogen source). Trimethylgallium or triethylgallium may be used as the gallium source (Group III element source), and ammonia may be used as the nitrogen source (Group V element source). FIG. 18 is a block diagram showing a semiconductor substrate manufacturing apparatus according to this embodiment. The semiconductor substrate manufacturing apparatus 60 includes an apparatus M30 that performs step S30 of FIG. 15, an apparatus M50 (MOCVD apparatus) that performs steps S40 and S45 of FIG. 15, and a control device MC that controls the apparatuses M30 and M50.

[0049] Fig. 19 is a flowchart showing a method for manufacturing a semiconductor laser device according to this embodiment. Fig. 20 is a cross-sectional view showing a method for manufacturing a semiconductor laser device according to this embodiment. Fig. 19 and Fig. 20 show a method for manufacturing a semiconductor laser device according to this embodiment. A GaN-based semiconductor portion 8 is provided above the template substrate TS, the GaN-based semiconductor portion 8 having a base portion B located above the seed portion SA and a wing portion W connected to the base portion B. The wing portion W is located above the non-seed portion DA and extends 10 １９ / cm ３The method includes a step S70 of preparing a semiconductor substrate 10 having a first portion P1 containing carbon at a concentration equal to or higher than that of the first portion P1 and a second portion P2 located above a non-seed portion DA and having a higher concentration of carbon than the first portion P1, a step S80 of forming a functional layer 9 including an optical resonator LR above a wing portion W, and a step S90 of cleaving (e.g., m-plane) the wing portion W and the optical resonator LR. The cleavage plane CF generated by the cleavage in step S90 is the resonant cavity end facet of the optical resonator LR, and the cleavage plane CF may be along the m-plane (a plane perpendicular to the m-axis) of the GaN-based semiconductor portion 8.

[0050] The first portion P1 and the second portion P2 may be adjacent to each other in the a-axis direction of the GaN-based semiconductor portion 8, with at least a part of the bottom surface Q1 of the first portion P1 being in contact with the non-seed portion DA, and at least a part of the bottom surface Q2 of the second portion P2 being floating above the non-seed portion DA. In this case, cleavage becomes easier.

[0051] Fig. 21 is a cross-sectional view showing the configuration of a semiconductor substrate according to this embodiment. Fig. 22 is a cross-sectional view showing the configuration of a semiconductor laser element according to this embodiment. Before step S90 in Fig. 19 or after step S90, a plurality of electrodes (anodes EA, cathodes EC) and insulating films located on the functional layer 9 are formed, thereby obtaining the semiconductor substrate 10 (laser element array substrate) shown in Fig. 21. By peeling the template substrate TS from the semiconductor substrate 10 in Fig. 21, the semiconductor laser element 20 in Fig. 22 can be obtained.

[0052] The semiconductor laser element 20 includes a base material (GaN-based semiconductor portion) 8 including a GaN-based semiconductor and having a first portion P1 and a second portion P2 aligned in a first direction X, and an optical resonator LR located above the base material 8 and including a nitride semiconductor. The first portion P1 is 10 １９ / cm ３ The second portion P2 may have a higher concentration of carbon than the first portion P1. The optical resonator LR may be located above the first portion P1, or the optical resonator LR may be located above the second portion P2.

[0053] By being located above the second portion P2, the optical cavity portion LR is less susceptible to the influence of defects (dislocation inheritance) from the seed portion SA, thereby improving the quality of the semiconductor laser device 20. The optical cavity portion LR may overlap with at least one of the second portion P2 and the third portion P3 in a plan view.

[0054] The optical resonator LR may be located above the boundary between the first portion P1 and the second portion P2 (the optical resonator LR and the boundary may overlap in a plan view). The optical resonator LR may be included in the functional layer 9 located on the base material 8. The threading dislocation density of the second portion P2 may be 1 / 10 or less of the threading dislocation density of the base portion B (upper portion BT).

[0055] The base material 8 may have a third portion P3 located above the first portion P1 and having a higher carbon concentration than the first portion P1, and the carbon concentration of the third portion P3 may be at least twice the carbon concentration of the first portion P1. The third portion P3 may be located on the first and second portions P1 and P2. The threading dislocation density of the third portion P3 may be 1 / 10 or less of the threading dislocation density of the base portion B (upper portion BT).

[0056] The first direction X is the a-axis direction of the GaN-based semiconductor, the optical resonator LR may include at least one of AlGaN and InGaN, and the carbon concentration of the second portion P2 may be three times or more the carbon concentration of the first portion P1. The resonator end facet RF of the optical resonator LR may be a cleavage plane along the m-plane of the GaN-based semiconductor. The optical resonator LR may include an n-type semiconductor layer 9N, a p-type semiconductor layer 9P, and an active layer 9A located between the n-type semiconductor layer 9N and the p-type semiconductor layer 9P.

[0057] The active layer 9A may be a light-emitting layer with a quantum well structure and may emit light with a peak wavelength of, for example, less than 500 nm. At least one of the n-type semiconductor layer 9N and the p-type semiconductor layer 9P may include a cladding layer for confining light. At least one of the n-type semiconductor layer 9N and the p-type semiconductor layer 9P may include an AlGaN layer. The second and third portions P2 and P3 may be colored portions. The carbon concentration of the p-type semiconductor layer 9P may be 1 / 10 or less of the carbon concentration of the first portion P1 of the base material 8. The semiconductor laser element 20 may be bar-shaped. The back surface (lower surface of the base portion B) of the semiconductor laser element 20 may have peeling marks VA (e.g., regions where the surface roughness is locally doubled or more).

[0058] (Note) The above disclosure is intended to be illustrative and explanatory, and is not intended to be limiting. Based on these examples and explanations, many variations will be obvious to those skilled in the art, and it should be noted that these variations are also included in the embodiments.

[0059] REFERENCE SIGNS LIST 1 Main substrate 4 Underlayer 5 Mask portion 6 Mask pattern 8 GaN-based semiconductor portion (base material) 9 Functional layer 9P p-type semiconductor layer 10 Semiconductor substrate 20 Semiconductor laser element (semiconductor device) P1 First portion P2 Second portion P3 Third portion TS Template substrate SA Seed portion (seed region) B Base portion W Wing portion DA Non-seed portion (growth-inhibited region) LR Optical resonator portion

Claims

1. A method for manufacturing a GaN-based semiconductor device comprising: a template substrate having a seed portion and a non-seed portion; and a GaN-based semiconductor portion located above the template substrate and having a base portion located above the seed portion and a wing portion connected to the base, the wing portion being located above the non-seed portion, and １９ / cm ３ and a second portion located above the non-seed portion and having a higher concentration of carbon than the first portion.

2. The semiconductor substrate according to claim 1, wherein the carbon concentration of the second portion is at least twice the carbon concentration of the first portion.

3. A semiconductor substrate as described in claim 1 or 2, wherein the seed portion and the non-seed portion are aligned in a first direction in a planar view, and the first portion and the second portion are aligned in the first direction such that the first portion is located on the base side.

4. A semiconductor substrate according to any one of claims 1 to 3, wherein the wing portion has a third portion located above the first portion and having a higher concentration of carbon than the first portion.

5. The semiconductor substrate according to claim 4, wherein the carbon concentration of said third portion is at least twice the carbon concentration of said first portion.

6. The semiconductor substrate according to claim 4, wherein said third portion is thinner than said first portion.

7. The semiconductor substrate according to claim 1, wherein the first portion has a tensile strain in the m-axis direction of the GaN-based semiconductor portion.

8. The semiconductor substrate according to claim 4, wherein the third portion has a smaller tensile strain in the m-axis direction of the GaN-based semiconductor portion than the first portion.

9. A semiconductor substrate according to any one of claims 1 to 8, wherein at least a portion of a bottom surface of the first portion is in contact with the non-seed portion, and at least a portion of a bottom surface of the second portion is floating above the non-seed portion.

10. The semiconductor substrate according to claim 9, wherein the thickness of the gap between the non-seed portion and the second portion is 10 nm or less.

11. The semiconductor substrate of claim 9, wherein the thickness of the gap between the non-seed portion and the second portion increases with increasing distance from the base in the first direction.

12. The base portion is connected to the first portion, １９ / cm ３ 5. The semiconductor wafer according to claim 4, further comprising: a lower portion containing carbon at a concentration equal to or higher than said third portion; and an upper portion connected to said third portion and containing carbon at a concentration higher than said lower portion.

13. The semiconductor substrate according to any one of claims 1 to 12, wherein the first portion has an inversely tapered side surface.

14. The semiconductor substrate according to claim 13, wherein the second portion has an inversely tapered side surface having a larger area than a side surface of the first portion.

15. The semiconductor substrate according to any one of claims 1 to 14, wherein the template substrate includes a main substrate having a lattice constant different from that of the GaN-based semiconductor portion.

16. The semiconductor substrate according to claim 15, wherein the main substrate has a smaller thermal expansion coefficient than the GaN-based semiconductor portion.

17. The semiconductor substrate according to any one of claims 1 to 16, wherein the first portion and the second portion are GaN layers.

18. The semiconductor substrate according to claim 4, wherein the third portion has a lower transmittance for light with a wavelength of less than 500 nm than the first portion.

19. A semiconductor substrate according to any one of claims 1 to 18, wherein the template substrate has a mask pattern, and the mask pattern includes an opening portion that overlaps with the seed portion and a mask portion that functions as the non-seed portion.

20. A semiconductor substrate according to any one of claims 1 to 19, wherein the template substrate has an underlayer, and the underlayer has a modified portion that functions as the non-seed portion and a non-modified portion that functions as the seed portion.

21. The semiconductor substrate according to claim 3, wherein a plurality of GaN-based crystal bodies including the GaN-based semiconductor portion are arranged in the first direction with gaps between them.

22. A method for manufacturing a semiconductor substrate comprising: a template substrate having a seed portion and a non-seed portion; and a GaN-based semiconductor portion located above the template substrate and having a base located on the seed portion and a wing portion connected to the base, the method comprising: a step of alternately executing first film formation conditions and second film formation conditions having a V / III ratio higher than that of the first film formation conditions to form a first portion of the wing portion; and a step of alternately executing third film formation conditions having a V / III ratio lower than that of the first film formation conditions and fourth film formation conditions having a V / III ratio higher than that of the first film formation conditions and a V / III ratio lower than that of the second film formation conditions to form an adjacent portion of the wing portion that is in contact with the first portion.

23. The method for manufacturing a semiconductor substrate according to claim 22, wherein the adjacent portion covers the first portion.

24. The method for producing a semiconductor substrate according to claim 22 or 23, wherein the V / III ratio under the second film formation conditions is 5 times or more the V / III ratio under the first film formation conditions.

25. The method for manufacturing a semiconductor substrate according to any one of claims 22 to 24, wherein the V / III ratio of the third film-forming conditions is equal to or less than half the V / III ratio of the first film-forming conditions.

26. The method for manufacturing a semiconductor substrate according to any one of claims 22 to 25, wherein the V / III ratio of the fourth film-forming condition is six times or more the V / III ratio of the third film-forming condition.

27. A method for manufacturing a semiconductor substrate according to any one of claims 22 to 26, wherein under the first to fourth film formation conditions, the supply amount of the gallium source is kept substantially constant, and the V / III ratio is controlled by changing the supply amount of the nitrogen source.

28. The method for producing a semiconductor substrate according to any one of claims 22 to 27, wherein trimethylgallium or triethylgallium is used as the gallium source, and ammonia is used as the nitrogen source.

29. A method for manufacturing a GaN-based semiconductor device comprising: a template substrate having a seed portion and a non-seed portion; and a GaN-based semiconductor portion located above the template substrate and having a base portion located above the seed portion and a wing portion connected to the base, the wing portion being located above the non-seed portion, １９ / cm ３ and a second portion located above the non-seed portion and having a higher concentration of carbon than the first portion; forming an optical resonator above the wing portion; and cleaving the wing portion and the optical resonator.

30. The method for producing a semiconductor laser element according to claim 29, wherein a cleavage plane produced by the cleavage is along an m-plane of the GaN-based semiconductor portion.

31. A method for manufacturing a semiconductor laser element as described in claim 29 or 30, wherein the first portion and the second portion are adjacent to each other in the a-axis direction of the GaN-based semiconductor portion, at least a part of a bottom surface of the first portion is in contact with the non-seed portion, and at least a part of a bottom surface of the second portion is floating above the non-seed portion.

32. A GaN-based semiconductor device includes a base material having a first portion and a second portion aligned in a first direction, and an optical resonator portion located above the base material and including a nitride semiconductor, １９ / cm ３ the second portion has a higher concentration of carbon than the first portion.

33. The semiconductor laser element described in claim 32, wherein the first direction is an a-axis direction of the GaN-based semiconductor, the optical resonator portion includes at least one of AlGaN and InGaN, and the carbon concentration of the second portion is three times or more higher than the carbon concentration of the first portion.

34. The semiconductor laser device according to claim 32 or 33, wherein the optical resonator includes a resonant end facet, the resonant end facet being a cleavage plane along an m-plane of the GaN-based semiconductor.

35. A semiconductor laser element according to any one of claims 32 to 34, wherein the optical resonator portion includes a p-type semiconductor layer, and the carbon concentration of the p-type semiconductor layer is 1 / 10 or less of the carbon concentration of the first portion.

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