Flexible circuit board, cof module, and electronic device comprising same

Abstract

A flexible circuit board according to an embodiment includes: a substrate; an upper wiring pattern disposed on the substrate; an upper protective layer disposed on the upper wiring pattern and including an open region; a lower wiring pattern disposed under the substrate; and a lower protective layer disposed under the lower wiring pattern, wherein the upper wiring pattern includes a first overlapping region overlapping the upper protective layer in the thickness direction of the substrate, the lower wiring pattern includes a second overlapping region overlapping the lower protective layer in the thickness direction of the substrate, and the metal content of the upper wiring pattern in the first overlapping region is different from the metal content of the lower wiring pattern in the second overlapping region.

Description

Flexible circuit boards, COF modules and electronic devices including the same

[0001] The embodiments relate to a flexible circuit board, a COF module and an electronic device including the same.

[0002] Recently, various electronic products are becoming thinner and smaller. Consequently, there is a growing demand for high-density semiconductor chips to be mounted within the narrow spaces of these electronic products.

[0003] A COF (Chip-On-Film) includes a circuit board and a chip on the circuit board. The circuit board is flexible. That is, the COF includes a flexible circuit board. Accordingly, the COF is applicable to flexible displays. For example, the COF can be applied to various wearable electronic devices. Furthermore, the COF has a fine pitch, and therefore, the COF is applicable to high-resolution displays.

[0004] The chip includes a semiconductor chip. For example, the chip may be an integrated circuit (IC) chip or a large scale integrated circuit (LSI) chip.

[0005] The chip is connected to an external circuit board and a display panel via a circuit pattern. For example, pads are provided at each end of the circuit pattern. One pad is electrically connected to a terminal of the chip. The other pad is connected to a terminal of the circuit board or the display panel. Accordingly, the chip, the circuit board, and the display panel are electrically connected via the COF. As a result, a signal is transmitted to the display panel via the circuit pattern.

[0006] The above flexible circuit board may have circuit patterns arranged on both sides of the substrate. In this case, a protective layer is arranged on each side of the substrate. The circuit patterns can be protected from corrosion by the protective layer.

[0007] However, the above-described flexible circuit board has a problem in that cracks may occur during repeated bending of the circuit pattern formed on the flexible circuit board or during the process of combining the circuit pattern with the display panel and / or external circuit board in a bent state, or the circuit board may be damaged due to tensile force generated during the bending process.

[0008] The embodiment provides a flexible circuit board, a COF module, and an electronic device including the same, which can solve electrical reliability and / or physical reliability problems that occur during bending of the flexible circuit board.

[0009] In addition, the embodiment provides a flexible circuit board capable of being slimmed down, a COF module, and an electronic device including the same.

[0010] In addition, the embodiment provides a flexible circuit board with improved bending durability of a circuit pattern, a COF module, and an electronic device including the same.

[0011] The technical tasks to be achieved in the proposed embodiment are not limited to the technical tasks mentioned above, and other technical tasks not mentioned can be clearly understood by a person having ordinary skill in the technical field to which the proposed embodiment belongs from the description below.

[0012] A flexible circuit board according to an embodiment comprises: a substrate; an upper wiring pattern disposed on the substrate; an upper protective layer disposed on the upper wiring pattern and including an open area; a lower wiring pattern disposed under the substrate; and a lower protective layer disposed under the lower wiring pattern, wherein the upper wiring pattern includes a first overlapping region overlapping the upper protective layer along a thickness direction of the substrate, and the lower wiring pattern includes a second overlapping region overlapping the lower protective layer along a thickness direction of the substrate, and a metal content of the upper wiring pattern in the first overlapping region is different from a metal content of the lower wiring pattern in the second overlapping region.

[0013] Additionally, the first overlapping region includes a region in which the content of the metal constituting the upper wiring pattern changes as it approaches the upper protective layer, and the second overlapping region does not include a region in which the content of the metal constituting the lower wiring pattern changes.

[0014] In addition, the amount of change in the content of the metal constituting the upper wiring pattern in the first overlapping area is greater as it approaches the upper protective layer than the amount of change in the content of the metal constituting the lower wiring pattern in the second overlapping area as it approaches the lower protective layer.

[0015] In addition, the upper wiring pattern includes an upper wiring layer disposed on the substrate, a first upper plating layer disposed on the upper wiring layer, and a second upper plating layer disposed on the first upper plating layer within the open area, and the lower wiring pattern includes a lower wiring layer disposed under the substrate, the upper protective layer is in direct contact with the first upper plating layer in the first overlapping area, and the lower protective layer is in direct contact with the lower wiring layer in the second overlapping area.

[0016] Additionally, the first upper plating layer includes an open portion overlapping at least a portion of the upper wiring layer along the thickness direction, and the upper protective layer includes a first protective pattern disposed within the open portion of the first upper plating layer, and a second protective pattern disposed on the first upper plating layer and the first protective pattern.

[0017] Additionally, the upper protective layer includes a first open area located between the first side end and the second side end of the substrate, and a second open area spaced apart from the first open area and closer to the first side end than the first open area, and the open portion of the first upper plating layer is closer to the second side end of the substrate than the first open area and the second open area.

[0018] Additionally, the lower protective layer includes a third open area that is closer to the second side end of the substrate than the first open area and the second open area, and the lower wiring pattern further includes a first lower plating layer disposed under the lower wiring layer within the third open area, and a second lower plating layer disposed under the first lower plating layer.

[0019] Additionally, the upper protective layer includes a third open area that is closer to the second side end of the substrate than the first open area and the second open area, and the lower protective layer does not include an open area, and the lower surface of the lower wiring layer of the lower wiring pattern is in direct contact with the lower protective layer as a whole.

[0020] In addition, a first via electrode is provided that penetrates the substrate along the thickness direction at a position adjacent to the first open area and connects the upper wiring pattern and the lower wiring pattern; and a second via electrode is provided that penetrates the substrate along the thickness direction at a position adjacent to the third open area and connects the upper wiring pattern and the lower wiring pattern, and the open portion of the first upper plating layer is provided to extend in a direction different from the separation direction of the first via electrode and the second via electrode between the first via electrode and the second via electrode.

[0021] Additionally, the lower wiring pattern does not overlap with the area between the first open area and the second open area along the thickness direction.

[0022] Additionally, the flexible circuit board further includes a lower dummy pattern disposed under the substrate and overlapping the interlayer region along the thickness direction.

[0023] A flexible circuit board of an embodiment includes a substrate, an upper wiring pattern, a lower wiring pattern, an upper protective layer, and a lower protective layer. The substrate includes a first region corresponding to a bending region, and a second region excluding the first region. In addition, the upper wiring pattern includes an upper wiring layer, a first upper plating layer, and a second upper plating layer. At this time, the first and second upper plating layers may not be disposed in the first region of the flexible circuit board of the embodiment. Through this, the embodiment can prevent cracks occurring when the flexible circuit board is bent in the first region, thereby further improving the physical reliability and / or electrical reliability of the flexible circuit board. In addition, the embodiment can prevent damage to the upper wiring pattern due to a tensile force of the upper wiring pattern occurring when the flexible circuit board is bent in the first region, thereby improving the durability of the upper wiring pattern.

[0024] Additionally, a second protective pattern of the upper protective layer may be provided on the first upper plating layer, surrounding the first protective pattern of the upper protective layer provided in the open portion of the first upper plating layer.

[0025] That is, the first protective pattern of the upper protective layer can be in contact with the upper wiring layer and the first upper plating layer. The first protective pattern can be in contact with the upper surface of the upper wiring layer and the side surface of the first upper plating layer on the first region. That is, the first protective pattern is in direct contact with the upper wiring layer, and thus can disperse stress that may occur during bending in the first region, and thus can further improve the physical reliability and / or electrical reliability of the flexible circuit board. In addition, the lower surface of the second protective pattern is in contact with the first upper plating layer and does not contact the second upper plating layer. Accordingly, the thickness of the flexible circuit board can be prevented from increasing by the thickness of the second upper plating layer.

[0026] In addition, the lower wiring pattern includes a lower wiring layer, a first lower plating layer, and a second lower plating layer. At this time, the lower protective layer includes a third open area. In addition, the first lower plating layer and the second lower plating layer of the lower wiring pattern are disposed only within the third open area of ​​the lower protective layer. That is, the first lower plating layer and the second lower plating layer may not be disposed between the lower wiring layer and the lower protective layer.

[0027] Specifically, the first lower plating layer and the second lower plating layer may not be disposed between the lower wiring layer and the lower protective layer. For example, the upper surface of the lower protective layer may not be in contact with the first lower plating layer and the second lower plating layer. The first lower plating layer and the second lower plating layer may be selectively disposed only in the third open area of ​​the lower protective layer.

[0028] That is, the embodiment prevents the lower plating layer from being positioned between the lower wiring layer and the lower protective layer. Accordingly, the embodiment can prevent the bending characteristics of the flexible circuit board from being deteriorated by the lower plating layer. Furthermore, the embodiment can prevent cracks from occurring in the lower wiring pattern when the flexible circuit board is bent by the lower plating layer. Therefore, the embodiment can further improve the durability of the lower wiring pattern.

[0029] In addition, the substrate of the embodiment is provided with a via electrode connecting between the upper wiring pattern and the lower wiring pattern. The via electrode includes a first open area and a first via electrode overlapping along a thickness direction. In addition, the via electrode includes a second via electrode adjacent to one end of the substrate from the first open area. And, the embodiment is such that the first area is provided between the first via electrode and the second via electrode. Preferably, the first area can extend between the first via electrode and the second via electrode in a direction perpendicular to a separation direction of the first via electrode and the second via electrode. Through this, the embodiment can improve the rigidity of the flexible circuit board by the first via electrode and the second via electrode when the flexible circuit board is bent in the first area, thereby further improving the physical reliability and / or electrical reliability of the flexible circuit board.

[0030] In addition, the lower wiring pattern may not be arranged in an area of ​​the second surface of the substrate. Preferably, the lower wiring pattern may not overlap with the area between the first open area and the second open area of ​​the upper protective layer in the thickness direction. Preferably, the lower wiring pattern may not be arranged in an area of ​​the second surface of the substrate that overlaps with the area between the first open area and the second open area of ​​the upper protective layer in the thickness direction, and may be provided in an area that does not overlap with the area between the first open area and the second open area of ​​the upper protective layer in the thickness direction. Through this, the embodiment can control the arrangement area of ​​the lower wiring pattern to control the tensile force of the lower wiring pattern that occurs when the flexible circuit board is bent, and thus the durability of the lower wiring pattern can be further improved.

[0031] The flexible circuit board according to the embodiment is bent at least twice. Accordingly, the flexible circuit board prevents the bezel area of ​​the display panel from increasing.

[0032] Additionally, the flexible circuit board includes multiple open areas. No bonding layer is placed on the open areas. The flexible circuit board bends over the open areas. Accordingly, the bonding layer can be prevented from delaminating when the flexible circuit board is bent.

[0033] The protective layer may include at least one protective pattern. For example, the protective layer may include multiple protective patterns. Accordingly, multiple protective patterns are arranged over the open area. Therefore, when the flexible circuit board is bent, the protective layer can be prevented from being delaminated.

[0034] Figure 1 is a top view of a flexible circuit board according to an embodiment.

[0035] Figure 2 is a bottom view of a flexible circuit board according to an embodiment.

[0036] Figure 3 is a drawing showing an enlarged view of area A of Figure 1.

[0037] Figure 4 is a drawing showing an enlarged view of area B of Figure 1.

[0038] Figure 5 is a drawing showing an enlarged view of area C of Figure 2.

[0039] Figure 6 is a drawing showing an enlarged view of area D of Figure 2.

[0040] FIG. 7 is a cross-sectional view of a flexible circuit board according to the first embodiment taken along line A-A' of FIG. 1.

[0041] FIG. 8 is a cross-sectional view of a flexible circuit board according to the second embodiment taken along line A-A' of FIG. 1.

[0042] FIG. 9 is a cross-sectional view of a flexible circuit board according to a third embodiment taken along line A-A' of FIG. 1.

[0043] FIG. 10 is a cross-sectional view of a flexible circuit board according to the fourth embodiment taken along line A-A' of FIG. 1.

[0044] Fig. 11 is a top view of a flexible circuit board according to the fifth embodiment.

[0045] Fig. 12 is a bottom view of a flexible circuit board according to the fifth embodiment.

[0046] Figure 13 is a drawing showing an enlarged view of area E of Figure 11.

[0047] Figure 14 is a drawing showing an enlarged view of area F of Figure 11.

[0048] Figures 15 and 16 are drawings for explaining the shape in which the COF module is bent.

[0049] Figures 17 and 18 are drawings for explaining the shape in which the COF module is bent according to an embodiment.

[0050] FIGS. 19 and 20 are cross-sectional views taken along the AA' area of ​​FIG. 3 according to the fifth embodiment.

[0051] Figures 21 and 22 are cross-sectional views taken along the BB' area of ​​Figure 12.

[0052] Figure 23 is a drawing for explaining the positions of protective layers according to the fifth embodiment.

[0053] Figures 24 and 25 are cross-sectional views taken along the BB' area of ​​Figure 12.

[0054] FIGS. 26 to 29 are drawings illustrating various bending shapes of a COF module including a flexible circuit board according to an embodiment.

[0055] FIGS. 30 to 32 are drawings of electronic devices including flexible circuit boards according to embodiments.

[0056] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. However, the technical concept of the present invention is not limited to the described embodiments, but may be implemented in various different forms. Within the scope of the technical concept of the present invention, one or more of the components of the embodiments may be selectively combined or substituted for use.

[0057] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0058] In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention. In this specification, the singular may also include the plural unless specifically stated in the phrase, and when it is described as “and (and) at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C.

[0059] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only intended to distinguish the components from other components, and are not intended to limit the nature, order, or sequence of the components.

[0060] And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, it may include not only cases where the component is directly connected, coupled or connected to the other component, but also cases where the component is 'connected', 'coupled' or 'connected' by another component between the component and the other component.

[0061] Additionally, when it is described as being formed or disposed "above or below" each component, above or below includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or disposed between the two components.

[0062] Additionally, when expressed as “upper or lower,” it can include the meaning of not only the upward direction but also the downward direction based on one component.

[0063] Additionally, in the description below, the first direction (1D) may be defined as the width direction of the flexible circuit board, and the second direction (2D) may be defined as the length direction of the flexible circuit board.

[0064]

[0065] FIG. 1 is a top view of a flexible circuit board according to an embodiment, FIG. 2 is a bottom view of a flexible circuit board according to an embodiment, FIG. 3 is a drawing showing an enlarged view of area A of FIG. 1, FIG. 4 is a drawing showing an enlarged view of area B of FIG. 1, FIG. 5 is a drawing showing an enlarged view of area C of FIG. 2, and FIG. 6 is a drawing showing an enlarged view of area D of FIG. 2.

[0066] Hereinafter, a flexible circuit board according to an embodiment will be described with reference to FIGS. 1 to 6.

[0067] A flexible circuit board (1000) according to an embodiment includes a substrate (100), a wiring pattern portion, and a protective layer.

[0068] The substrate (100) includes a first surface (1S) and a second surface (2S) opposite to the first surface (1S). In addition, a wiring pattern portion and a protective layer are disposed on the first surface (1S) and the second surface (2S) of the substrate (100). That is, the wiring pattern portion includes a first wiring pattern portion or an upper wiring pattern portion disposed on the first surface (1S) of the substrate (100). In addition, the wiring pattern portion includes a second wiring pattern portion or a lower wiring pattern portion disposed on the second surface (2S) of the substrate (100). In addition, the protective layer includes a first protective layer disposed on the first surface (1S) of the substrate (100) and covering at least a portion of the first or upper wiring pattern portion. In addition, the protective layer includes a second protective layer disposed on the second surface (2S) of the substrate (100) and covering at least a portion of the second or lower wiring pattern portion. In other words, the wiring pattern portion and the protective layer are disposed on the first surface (1S) and the second surface (2S). Accordingly, the flexible circuit board (1000) of the embodiment may be a double-sided flexible circuit board.

[0069] The substrate (100) includes a cutting line (CL). The flexible circuit board (1000) is cut along the cutting line (CL). Specifically, a wiring pattern portion, a protective layer, and a chip are placed on the substrate (100). Subsequently, the substrate (100) is cut along the cutting line (CL). Accordingly, a COF module (2000) is manufactured. Accordingly, the cutting line (CL) becomes the end of the flexible circuit board (1000) and the COF module (2000).

[0070] The substrate (100) may include a valid area (AA) and an invalid area (UA). The valid area (AA) and the invalid area (UA) are separated by a cutting line (CL). The valid area (AA) is an area inside the cutting line (CL). The invalid area (UA) is an area outside the cutting line (CL).

[0071] A wiring pattern portion, a protective layer, and chips are arranged in the active area (AA). A dummy pattern and a sprocket hole (SH) are arranged in the inactive area (UA). The dummy pattern can increase the strength of the substrate (100). This prevents the flexible circuit board (1000) from warping. The flexible circuit board (1000) is rolled or unrolled in a roll-to-roll manner by the sprocket hole (SH).

[0072] The substrate (100) includes a chip mounting area (CHA). The chip mounting area (CHA) is positioned on an active area (AA). A chip is positioned on the chip mounting area (CHA). The pads of the wiring pattern portion are positioned inside the chip mounting area (CHA). The protective layer is not positioned on the chip mounting area (CHA).

[0073] The substrate (100) may include a flexible material. For example, the substrate (100) may include polyimide (PI). However, the embodiment is not limited thereto. The substrate (100) may include a polymer material such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN).

[0074] The substrate (100) may have a thickness of 20 μm to 100 μm. For example, the substrate (100) may have a thickness of 25 μm to 50 μm. For example, the substrate (100) may have a thickness of 30 μm to 40 μm. If the thickness of the substrate (100) exceeds 100 μm, the thickness of the flexible circuit board increases. Accordingly, the flexible characteristics of the flexible circuit board may deteriorate. If the thickness of the substrate (100) is less than 20 μm, the flexible circuit board (1000) may be damaged. That is, the chip is mounted using heat and pressure. Accordingly, if the thickness of the substrate (100) is less than 20 μm, the substrate (100) may be damaged by heat and pressure.

[0075] The wiring pattern portion and the protective layer are disposed on the substrate (100). In detail, the wiring pattern portion and the protective layer may be disposed on the effective area (AA) and the non-effective area (UA).

[0076] The wiring pattern portion may include a first wiring pattern (210), a second wiring pattern (220), and a third wiring pattern (230). The protective layer may include a first protective layer (310) and a second protective layer (320). The first wiring pattern (210) and the third wiring pattern (230) of the wiring pattern portion may be the first wiring pattern portion or the upper wiring pattern portion disposed on the first surface (1S) of the substrate (100). In addition, a part of the second wiring pattern (220) of the wiring pattern portion may be the first wiring pattern portion or the upper wiring pattern portion disposed on the first surface (1S) of the substrate (100), and another part of the second wiring pattern (220) may be the second wiring pattern portion or the lower wiring pattern portion disposed on the second surface (2S) of the substrate (100).

[0077] Referring to FIGS. 1 and 3, a first wiring pattern (210) is disposed on a first surface (1S). The first wiring pattern (210) includes a first connection wiring (211), a first pad (212a), and a second pad (212b). The first connection wiring (211), the first pad (212a), and the second pad (212b) may include the same material. The first connection wiring (211), the first pad (212a), and the second pad (212b) may be formed integrally.

[0078] The first pad (212a) is positioned within the chip mounting area (CHA). Accordingly, the first pad (212a) is connected to the terminal of the chip. This connects the first wiring pattern (210) and the chip.

[0079] The second pad (212b) is positioned outside the chip mounting area (CHA). The second pad (212b) is connected to a terminal of an external circuit board. As a result, the first wiring pattern (210) and the circuit board are connected. In addition, the second pad (212b) may be a first test pad. Specifically, the flexible circuit board (1000) may be tested before connecting the circuit board and the second pad (212b). For example, whether the first wiring pattern (210) is open or shorted can be checked through the second pad (212b).

[0080] The first connection wire (211) is positioned between the first pad (212a) and the second pad (212b). The first connection wire (211) electrically connects the first pad (212a) and the second pad (212b). Accordingly, the chip and the flexible circuit board (1000) are connected. Accordingly, signals generated from the chip are transmitted to the flexible circuit board (1000).

[0081] A first protective layer (310) is disposed on the first wiring pattern (210). The first protective layer (310) is disposed on the first connection wiring (211). The first protective layer (310) is not disposed on the first pad (212a) and the second pad (212b). That is, the first protective layer (310) may include a plurality of open areas. For example, the first protective layer (310) may include a first open area (OR1) that overlaps the first pad (212a) disposed in the chip mounting area (CHA) along the thickness direction. In addition, the first protective layer (310) may include a second open area (OR2) that overlaps the second pad (212b) along the thickness direction. That is, the substrate (100) may include a first side end and a second side end opposite to the first side end. In addition, the first open area (OR1) may be located between the first side end and the second side end. In addition, the second open area (OR2) may be spaced apart from the first open area (OR1) and may be located closer to the first side end than the first open area (OR1).

[0082] In addition, referring to FIGS. 1, 2, 4, and 5, the second wiring pattern (220) is disposed on the first surface (1S) and the second surface (2S). That is, the second wiring pattern (220) may include an upper wiring pattern disposed on the first surface (1S) of the substrate (100), and a lower wiring pattern disposed on the second surface (2S) of the substrate (100).

[0083] The second wiring pattern (220) includes second connection wirings (221a, 221b), a third pad (222a), a fourth pad (222b), and a first via electrode (V1). The second connection wirings (221a, 221b), the third pad (222a), and the fourth pad (222b) may include the same material. In addition, the second connection wirings (221a, 221b), the third pad (222a), and the fourth pad (222b) may be formed integrally.

[0084] A first protective layer (310) and a second protective layer (320) are disposed on the second connecting wires (221a, 221b). The first protective layer (310) and the second protective layer (320) are not disposed on the third pad (222a) and the fourth pad (222b). That is, the first open area of ​​the above-described first protective layer (310) can further expose the third pad (222a).

[0085] The third pad (222a) is positioned on the first surface (1S). The third pad (222a) is positioned within the chip mounting area (CHA). Accordingly, the third pad (222a) is connected to the terminal of the chip. As a result, the second wiring pattern (220) and the chip are connected.

[0086] The fourth pad (222b) is placed on the second surface (2S). The fourth pad (222b) is connected to a terminal of an external display panel. As a result, the second wiring pattern (220) and the display panel are connected.

[0087] The second connection wires (221a, 221b) include a second-first connection wire (221a) and a second-second connection wire (221b). The second-first connection wire (221a) is disposed on the first surface (1S). The second-second connection wire (221b) is disposed on the second surface (2S). The second connection wires (221a, 221b) connect the third pad (222a) and the fourth pad (222b). Specifically, the second-first connection wire (221a) is connected to the third pad (222a). The second-second connection wire (221b) is connected to the fourth pad (222b). Accordingly, the chip and the display panel are connected. Accordingly, a signal generated in the chip is transmitted to the display panel.

[0088] A first protective layer (310) and a second protective layer (320) are disposed on the second wiring pattern (220). Specifically, the first protective layer (310) is disposed on the second wiring pattern (220) on the first surface (1S). The second protective layer (320) is disposed on the second wiring pattern (220) on the second surface (2S). The first protective layer (310) and the second protective layer (320) are not disposed on the third pad (222a) and the fourth pad (222b).

[0089] The second-first connection wiring (221a) and the second-second connection wiring (221b) are electrically connected to each other. The second-first connection wiring (221a) and the second-second connection wiring (221b) are electrically connected through the first via electrode (V1). The first via electrode (V1) penetrates the first surface (1S) and the second surface (2S) of the substrate (100). Accordingly, the first via electrode (V1) is disposed on the first surface (1S) and the second surface (2S). The via land of the first via electrode (V1) on the first surface (1S) and the via land of the first via electrode (V1) on the second surface (2S) are disposed at positions corresponding to each other.

[0090] The first via electrode (V1) includes a first via land (VL1) and a first through-hole (VH1). The first through-hole (VH1) is formed inside the first via land (VL1). The first via land (VL1) includes the same material as the second connection wiring (221a, 221b). The first through-hole (VH1) is provided by filling the inside of a through-hole that passes through the first surface (1S) and the second surface (2S) of the substrate (100) with a conductive material. Accordingly, the 2-1 connection wiring (221a) and the 2-2 connection wiring (221b) are electrically connected to each other.

[0091] The second wiring pattern (220) may include a second test pad (TP2). The second test pad (TP2) may be disposed on the second surface (2S). The second test pad (TP2) may be disposed in an unusable area (UA). A second protective layer (320) is not disposed on the second test pad (TP2). The second test pad (TP2) may be connected to the second-second connection wiring (221b). In detail, the second test pad (TP2) and the second-second connection wiring (221b) may be formed integrally.

[0092] Before connecting the display panel and the fourth pad (222b), the second wiring pattern (220) can be tested. For example, whether the second wiring pattern is open or shorted can be checked through the second test pad (TP2).

[0093] Also, referring to FIGS. 1, 2, 3, and 6, the third wiring pattern (230) is disposed on the first surface (1S) and the second surface (2S). The third wiring pattern (230) includes a third connection wiring (231), a fifth pad (232a), a sixth pad (232b), and a second via electrode (V2). The third connection wiring (231), the fifth pad (232a), and the sixth pad (232b) may include the same material. In addition, the third connection wiring (231), the fifth pad (232a), and the sixth pad (232b) may be formed integrally.

[0094] The fifth pad (232a) is positioned on the first surface (1S). The fifth pad (232a) is positioned within the chip mounting area (CHA). Accordingly, the fifth pad (232a) is connected to the terminal of the chip. As a result, the third wiring pattern (230) and the chip are connected.

[0095] The sixth pad (232b) is placed on the second surface (2S). The sixth pad (232b) is connected to a terminal of the display panel. Thus, the third wiring pattern (230) and the display panel are connected.

[0096] The third connecting wire (231) electrically connects the fifth pad (232a) and the sixth pad (232b). Accordingly, the chip and the display panel are connected. Accordingly, signals generated from the chip are transmitted to the display panel.

[0097] A second protective layer (320) is disposed on the third wiring pattern (230). The second protective layer (320) is disposed on the third wiring pattern (230) on the second surface (2S). The second protective layer (320) is not disposed on the sixth pad (232b).

[0098] The fifth pad (232a) and the third connection wiring (231) are electrically connected to each other. In detail, the fifth pad (232a) and the third connection wiring (231) are connected through the second via electrode (V2). The second via electrode (V2) penetrates the first surface (1S) and the second surface (2S). Accordingly, the second via electrode (V2) is disposed on the first surface (1S) and the second surface (2S). The via land of the second via electrode (V2) on the first surface (1S) and the via land of the second via electrode (V2) on the second surface (2S) are disposed at positions corresponding to each other.

[0099] The second via electrode (V2) includes a second via land (VL2) and a second through-hole (VH2). The second via land (VL2) includes the same material as the third connection wiring (231). The second through-hole (VH2) is formed inside the second via land (VL2). The second through-hole (VH2) is provided by filling a through-hole penetrating the first surface (1S) and the second surface (2S) of the substrate (100) with a conductive material. Accordingly, the fifth pad (232a) and the third connection wiring (231) are electrically connected to each other.

[0100] The third wiring pattern (230) may include a third test pad (TP3). The third test pad (TP3) may be disposed on the second surface (2S). The third test pad (TP3) may be disposed on an unusable area (UA). In addition, the second protective layer (320) is not disposed on the third test pad (TP3). The third test pad (TP3) may be connected to a third connection wiring (231). In detail, the third test pad (TP3) may be formed integrally with the third connection wiring (231).

[0101] Before connecting the display panel and the sixth pad (232b), the third wiring pattern (230) can be tested. For example, whether the third wiring pattern is open or shorted can be checked through the third test pad (TP3).

[0102] Although not shown in the drawing, the wiring pattern portion may further include an additional wiring pattern portion. For example, the wiring pattern portion may further include a power supply pattern. The power supply pattern may be connected to a terminal of the circuit board and a terminal of the display panel. Accordingly, power may be transmitted to the circuit board and the display panel. That is, the additional wiring pattern portion may be arranged on the first surface (1S) of the substrate (100). The additional wiring pattern portion may be a bypass pattern portion. The additional wiring pattern portion may be a bypass line that directly connects an external circuit board and the display panel, and preferably, may be a power supply line.

[0103] The wiring pattern portion (210, 220, 230) may include a metal material having excellent electrical conductivity. Specifically, the wiring pattern portion (210, 220, 230) may include copper (Cu). However, the embodiment is not limited thereto. The wiring pattern portion (210, 220, 230) may include at least one metal selected from the group consisting of copper (Cu), aluminum (Al), chromium (Cr), nickel (Ni), silver (Ag), molybdenum (Mo), gold (Au), titanium (Ti), and alloys thereof.

[0104] The flexible circuit board (1000) may further include a dummy pattern (240). The dummy pattern (240) may be positioned on an active area (AA) and an unactive area (UA). The dummy pattern on the unactive area (UA) increases the strength of the substrate (100). The dummy pattern (240) on the active area (AA) improves the uniformity of the wiring pattern portion. In detail, the width, thickness, and spacing of the wiring pattern portion may be made uniform by the dummy pattern (240).

[0105] The dummy pattern (240) is not a pattern through which a signal moves. The dummy pattern (240) is not connected to the terminals of the circuit board and the terminals of the display panel.

[0106] The protective layer includes a first protective layer (310) and a second protective layer (320). The first protective layer is disposed on the first surface (1S). The second protective layer (320) is disposed on the second surface (2S). At least one of the first protective layer (310) and the second protective layer (320) may include solder paste. For example, the solder paste may include a thermosetting resin, a thermoplastic resin, a filler, a curing agent, or a curing accelerator.

[0107] The first protective layer (310) is disposed on the wiring pattern portion on the first surface (1S). In detail, the first protective layer (310) is disposed on the first wiring pattern (210) and the second wiring pattern (220) on the first surface (1S). The second protective layer (320) is disposed on the second wiring pattern (220) and the third wiring pattern (230) on the second surface (2S).

[0108]

[0109] As described above, the wiring pattern portion may include a first wiring pattern (210), a second wiring pattern (220), and a third wiring pattern (230) disposed on the first surface (1S) and the second surface (2S) of the substrate (100). Hereinafter, for convenience of explanation, a portion of the first wiring pattern (210), the second wiring pattern (220), and the third wiring pattern (230) disposed on the first surface (1S) of the substrate (100) is referred to as an upper wiring pattern (200U), and the remaining portion of the first wiring pattern (210), the second wiring pattern (220), and the third wiring pattern (230) disposed on the second surface (2S) of the substrate (100) is referred to as a lower wiring pattern (200L).

[0110] FIG. 7 is a cross-sectional view of a flexible circuit board according to the first embodiment taken along line A-A' of FIG. 1.

[0111] The flexible circuit board (1000) includes a first region (R1) and a second region (R2). The first region (R1) may be defined as a bending region of the flexible circuit board (1000), and the second region (R2) may be defined as a region excluding the first region (R1). For example, the flexible circuit board (1000) may be bent based on the bending region (BA). In addition, the first region (R1) may refer to the bending region (BA) of the flexible circuit board (1000), and the second region (R2) may be defined as a region remaining excluding the bending region (BA).

[0112] A flexible circuit board (1000) includes a substrate (100). An upper wiring pattern (200U) is arranged on a first surface (1S) of the substrate (100). In addition, a lower wiring pattern (200L) is arranged on a second surface (2S) of the substrate (100).

[0113] The upper wiring pattern (200U) may be provided in multiple layers. For example, the upper wiring pattern (200U) may include an upper wiring layer (200a) and an upper plating layer (200b) disposed on the upper wiring layer (200a).

[0114] The upper wiring layer (200a) may be arranged to a thickness of 1 μm to 20 μm. For example, the upper wiring layer (200a) may be arranged to a thickness of 5 μm to 20 μm. For example, the upper wiring layer (200a) may be arranged to a thickness of 5 μm to 15 μm.

[0115] If the thickness of the upper wiring layer (200a) is less than 1 μm, the resistance of the upper wiring layer (200a) may increase. If the thickness of the upper wiring layer (200a) exceeds 20 μm, it may be difficult to implement a fine pattern.

[0116] An upper plating layer (200b) may be disposed on the upper wiring layer (200a). The upper plating layer (200b) may include a first upper plating layer (200b1) and a second upper plating layer (200b2).

[0117] The first upper plating layer (200b1) may be partially disposed on the upper wiring layer (200a). The first upper plating layer (200b1) may be disposed on the second region (R2) excluding the first region (R1) on the upper wiring layer (200a). The first upper plating layer (200b1) may be disposed on a region other than the region where the first protection pattern (311) of the upper protection layer (310) on the upper wiring layer (200a) is disposed. For example, the first upper plating layer (200b1) may be disposed on a region where the second protection pattern (312) on the upper wiring layer (200a) is disposed.

[0118] That is, the first upper plating layer (200b1) may not be disposed on the first region (R1) on the upper wiring layer (200a). Accordingly, the first upper plating layer (200b1) may include an open portion (200b1O) provided in the first region (R1). For example, the width of the open portion (200b1O) may correspond to the width of the first region (R1). In detail, the side surface of the first upper plating layer (200b1) may be disposed in a boundary region between the first region (R1) and the second region (R1).

[0119] The first upper plating layers (200b1) may be separated from each other by an open portion (200b1O). For example, the first upper plating layer (200b1) provided on the outer side of one end of the first region (R1) and the first upper plating layer (200b1) provided on the outer side of the other end of the first region (R1) may not be connected to each other.

[0120] The second upper plating layer (200b2) may be disposed on the first upper plating layer (200b1). The second upper plating layer (200b2) may be partially disposed on the first upper plating layer (200b1).

[0121] The second upper plating layer (200b2) may be disposed in an area other than an area where the second protective pattern (312) of the upper protective layer (310) is disposed. For example, the upper protective layer (310) may include a plurality of open areas. The upper protective layer (310) may include a first open area (OR1) and a second open area (OR2). The first open area (OR1) of the upper protective layer (310) may correspond to a chip mounting area (CHA1). The second open area (OR2) of the upper protective layer (310) may be a first connection area connected to an external circuit board. That is, the substrate (100) may include a first side end and a second side end opposite to the first side end. In addition, the first open area (OR1) may be located between the first side end and the second side end. Additionally, the second open area (OR2) may be spaced apart from the first open area (OR1) and positioned closer to the first side end than the first open area (OR1).

[0122] And, the second upper plating layer (200b2) can be provided in an area excluding the second open area (OR2) on the first upper plating layer (200b1).

[0123] That is, the upper plating layer (200b) may not be disposed in the first region (R1) of the flexible circuit board (1000) of the embodiment. Specifically, the first upper plating layer (200b1) and the second upper plating layer (200b2) may not be disposed in the first region (R1) of the flexible circuit board (1000). Through this, the embodiment can prevent cracks that occur when the flexible circuit board (1000) is bent in the first region (R1), thereby further improving the physical reliability and / or electrical reliability of the flexible circuit board (1000). In addition, the embodiment can prevent the upper wiring pattern (200U) from being damaged by the tensile force of the upper wiring pattern (200U) that occurs when the flexible circuit board (1000) is bent in the first region (R1), thereby improving the durability of the upper wiring pattern (200U).

[0124] In this way, the upper plating layer (200b) may be provided in two layers. That is, the upper plating layer (200b) may include a first upper plating layer (200b1) and a second upper plating layer (200b2). The first upper plating layer (200b1) and the second upper plating layer (200b2) may be formed in two layers on the upper wiring layer (200a) to prevent the formation of whiskers. That is, the first upper plating layer (200b1) and the second upper plating layer (200b2) may be disposed on the first open area (OR1) and the second open area (OR2) of the upper protective layer (310). Accordingly, short circuits between patterns of the upper wiring layer (200a) can be prevented.

[0125] The upper plating layer (200b) may include tin (Sn). For example, the first upper plating layer (200b1) and the second upper plating layer (200b2) may include tin (Sn). For example, the upper wiring layer (200a) may include copper (Cu), and the first upper plating layer (200b1) and the second upper plating layer (200b2) may include tin (Sn). When the upper plating layer (200b) includes tin, since the corrosion resistance of tin (Sn) is excellent, oxidation of the upper wiring layer (200a) in an area where the upper protective layer (310) is not disposed can be prevented.

[0126] The upper protective layer (310) may have a two-layer structure including a first protective pattern (311) and a second protective pattern (312).

[0127] The first protective pattern (311) of the upper protective layer (310) may be provided in the first region (R1) of the flexible circuit board. That is, the first protective pattern (311) of the upper protective layer (310) may be in direct contact with the upper wiring layer (200a) of the upper wiring pattern (200U). For example, the lower surface of the first protective pattern (311) of the upper protective layer (310) may be in direct contact with the upper surface of the upper wiring layer (200a) and may not be in contact with the upper plating layer (200b).

[0128] The second protection pattern (312) of the upper protection layer (310) can be placed on the first protection pattern (311) and the first upper plating layer (200b1). That is, the second protection pattern (312) of the upper protection layer (310) can be placed in an area excluding the first open area (OR1) and the second open area (OR2).

[0129] Accordingly, the first surface (1S) of the substrate (100) may include a first arrangement region where an upper wiring layer (200a), a first protection pattern (311), and a second protection pattern (312) are arranged, a second arrangement region where an upper wiring layer (200a), a first upper plating layer (200b1), and a second protection pattern (312) are arranged, and a region where an upper wiring layer (200a), a first upper plating layer (200b1), and a second upper plating layer (200b1) are arranged.

[0130] The structure as described above may include a first process of applying a first protective pattern (311) of an upper protective layer (310) on an upper wiring layer (200a), a second process of plating a first upper plating layer (200b1) with tin (Sn) on the upper wiring layer (200a), a third process of plating a second protective pattern (312) on the first protective pattern (311) and the first upper plating layer (200b1), and a fourth process of plating a second upper plating layer (200b2) with tin (Sn).

[0131] At this time, the upper wiring layer (200a) and the upper plating layer (200b) may experience a diffusion effect of copper (Cu) of the upper wiring layer (200a) or tin (Sn) of the upper plating layer (200b) during the heat treatment process. Accordingly, as the diffusion concentration of copper (Cu) decreases from the first upper plating layer (200b1) to the surface of the second upper plating layer (200b2), the content of copper (Cu) may decrease. Meanwhile, the content of tin (Sn) may increase from the first upper plating layer (200b1) to the surface of the second upper plating layer (200b2).

[0132] The upper wiring layer (200a) and the upper plating layer (200b) may be formed by a chemical reaction at the laminated interface, such that the first upper plating layer (200b1) and the second upper plating layer (200b2) may be an alloy of tin and copper. In addition, the first upper plating layer (200b1) and the second upper plating layer (200b2) may have different contents of tin and copper. That is, the first upper plating layer (200b1) in direct contact with the upper wiring layer (200a) may have a greater copper content than the second upper plating layer (200b2). Alternatively, the first upper plating layer (200b1) may be an alloy of tin and copper, and the second upper plating layer (200b2) may include tin. The plating layer according to the embodiment can prevent electrochemical migration (Electrochemical Migration Resistance) due to the diffusion phenomenon of Cu / Sn, thereby blocking short circuit defects caused by metal growth.

[0133] However, the example is not limited thereto, and may include any one of Ni / Au alloy, gold (Au), electroless nickel immersion gold (ENIG), Ni / Pd alloy, and organic solderability preservative (OSP).

[0134] The first upper plating layer (200b1) may have a different thickness from the second upper plating layer (200b2). The thickness of the first upper plating layer (200b1) may be smaller than the thickness of the second upper plating layer (200b2). For example, the first upper plating layer (200b1) may have a thickness of 0.1 μm or less. For example, the second upper plating layer (200b2) may have a thickness of 1 μm or less. That is, the total thickness of the upper plating layer (200b) may be 1.1 μm or less.

[0135] The upper protective layer (310) may include a first protective pattern (311) and a second protective pattern (312). The first protective pattern (311) may be disposed in the first region (R1), which is a bending region of the upper wiring layer (200a), and the second protective pattern (312) may be disposed on the first protective pattern (311).

[0136] The first protective pattern (311) can be in contact with the upper wiring layer (200a) and the first upper plating layer (200b1). The first protective pattern (311) can be in contact with the upper surface of the upper wiring layer (200a) and the side surface of the first upper plating layer (200b1) on the first region (R1).

[0137] That is, the first protective pattern (311) is in direct contact with the upper wiring layer (200a), and thus can disperse stress that may occur when the first region (R1) is bent, thereby further improving the physical reliability and / or electrical reliability of the flexible circuit board. In addition, the lower surface of the second protective pattern (312) is in contact with the first upper plating layer (200b1) and does not contact the second upper plating layer (200b1). Accordingly, the thickness of the flexible circuit board can be prevented from increasing by the thickness of the second upper plating layer (200b2).

[0138] Meanwhile, a lower wiring pattern (200L) and a lower protective layer (320) may be arranged on the second side (2S) of the substrate (100).

[0139] A lower wiring pattern (200L) is arranged on the second side (2S) of the substrate (100). In addition, a lower wiring pattern (200L) is arranged on the second side (2S) of the substrate (100).

[0140] The lower wiring pattern (200L) may be formed of multiple layers. For example, the lower wiring pattern (200L) may include a lower wiring layer (200c) and a lower plating layer (200d) disposed on the lower wiring layer (200c).

[0141] The lower wiring layer (200c) may be arranged with a thickness of 1 μm to 20 μm. For example, the lower wiring layer (200c) may be arranged with a thickness of 5 μm to 20 μm. For example, the lower wiring layer (200c) may be arranged with a thickness of 5 μm to 15 μm.

[0142] If the thickness of the lower wiring layer (200c) is less than 1 μm, the resistance of the lower wiring layer (200c) may increase. If the thickness of the lower wiring layer (200c) exceeds 20 μm, it may be difficult to implement a fine pattern.

[0143] A lower plating layer (200d) may be disposed on the lower wiring layer (200c). The lower plating layer (200d) may include a first lower plating layer (200d1) and a second lower plating layer (200d2).

[0144] The first lower plating layer (200d1) may be partially disposed under the lower wiring layer (200c). The first lower plating layer (200d1) may not overlap with the lower protective layer (320) in the thickness direction. That is, the lower protective layer (320) may include a third open area (OR3). The third open area (OR3) may be a second connection area for connecting the lower wiring pattern (200L) and the display panel. The third open area (OR3) may be positioned closer to the second side edge of the substrate (100) than the first open area (OR1).

[0145] The second lower plating layer (200d2) may be disposed under the first lower plating layer (200d1). The second lower plating layer (200d2) may be disposed in the third open area (OR3) of the lower protective layer (320).

[0146] The first lower plating layer (200d1) and the second lower plating layer (200d2) may not be disposed between the lower wiring layer (200c) and the lower protective layer (320). For example, the upper surface of the lower protective layer (320) may not be in contact with the first lower plating layer (200d1) and the second lower plating layer (200d2). The first lower plating layer (200d1) and the second lower plating layer (200d2) may be selectively disposed only in the third open area (OR3) of the lower protective layer (320).

[0147] That is, the embodiment prevents the lower plating layer (200d) from being disposed between the lower wiring layer (200c) and the lower protective layer (320). Accordingly, the embodiment can prevent the bending characteristics of the flexible circuit board from being deteriorated by the lower plating layer (200d). Furthermore, the embodiment can prevent cracks from occurring in the lower wiring pattern (200L) when the flexible circuit board is bent by the lower plating layer (200d). Therefore, the embodiment can further improve the durability of the lower wiring pattern.

[0148] In addition, the substrate (100) of the embodiment is provided with a via electrode connecting the upper wiring pattern (200U) and the lower wiring pattern (200L). The via electrode includes a first via electrode (V1) that overlaps a first open area (OR1) along the thickness direction. In addition, the via electrode includes a second via electrode (V2) adjacent to one end of the substrate (100) from the first open area (OR1). And, the embodiment is such that the first area (R1) is provided between the first via electrode (V1) and the second via electrode (V2). Preferably, the first area (R1) may extend between the first via electrode (V1) and the second via electrode (V2) in a direction perpendicular to the separation direction of the first via electrode (V1) and the second via electrode (V2). Through this, the embodiment can improve the rigidity of the flexible circuit board by the first via electrode (V1) and the second via electrode (V2) when the flexible circuit board is bent in the first region (R1), thereby further improving the physical reliability and / or electrical reliability of the flexible circuit board.

[0149] In addition, the lower wiring pattern (200L) may not be arranged in an area of ​​the second surface (2S) of the substrate (100). Preferably, the lower wiring pattern (200L) may not overlap in the thickness direction with the area between the first open area (OR1) and the second open area (OR2) of the upper protective layer (310). Preferably, the lower wiring pattern (200L) may not be arranged in an area of ​​the second surface (2S) of the substrate (100) that overlaps in the thickness direction with the area between the first open area (OR1) and the second open area (OR2) of the upper protective layer (310), and may be provided in an area that does not overlap in the thickness direction with the area between the first open area (OR1) and the second open area (OR2) of the upper protective layer (310). Through this, the embodiment can control the tensile force of the lower wiring pattern (200L) that occurs when the flexible circuit board is bent by controlling the arrangement area of ​​the lower wiring pattern (200L), thereby further improving the durability of the lower wiring pattern (200L). However, a lower dummy pattern may be provided under the second surface (2S) of the substrate (100) that overlaps in the thickness direction with the area between the first open area (OR1) and the second open area (OR2) of the upper protective layer (310).

[0150] In addition, a region in which the metal content changes may be included between the upper wiring layer (200a) and the upper protective layer (310). Specifically, the upper wiring layer (200a) may include a first overlapping region that overlaps the upper protective layer (310) in the thickness direction. And, the first overlapping region of the upper wiring layer (200a) may include a region in which the metal content changes. For example, that is, the first overlapping region between the upper wiring layer (200a) and the upper protective layer (310) may include a region in which the copper content changes or a region in which the tin content changes due to the upper plating layer (200b).

[0151] In contrast, a region where the metal content changes may not be included between the lower wiring layer (200c) and the lower protection layer (320). That is, a lower plating layer (200d) is not disposed between the lower wiring layer (200c) and the lower protection layer (320), and thus a region where the copper content changes or a region where the tin content changes may not be included. Specifically, the lower wiring layer (200c) may include a second overlapping region that overlaps the lower protection layer (320) in the thickness direction. In addition, the metal content in the second overlapping region of the lower wiring layer (200c) may not change but may be constant. That is, even if the second overlapping region between the lower wiring layer (200c) and the lower protective layer (320) includes a region where the metal content changes, the amount of change in the metal content in the second overlapping region between the lower wiring layer (200c) and the lower protective layer (320) may be smaller than the amount of change in the metal content in the first overlapping region between the upper wiring layer (200a) and the upper protective layer (310).

[0152] That is, the upper protective layer (311) is in direct contact with the first upper plating layer (200b1) in the first overlapping region, and the lower protective layer (312) is in direct contact with the lower wiring layer (200c) in the second overlapping region. Accordingly, the metal content or the amount of change in the metal content in the first overlapping region may be different from the metal content or the amount of change in the metal content in the second overlapping region.

[0153] The flexible circuit board of the embodiment described above includes a substrate, an upper wiring pattern, a lower wiring pattern, an upper protective layer, and a lower protective layer. The substrate includes a first region corresponding to a bending region, and a second region excluding the first region. In addition, the upper wiring pattern includes an upper wiring layer, a first upper plating layer, and a second upper plating layer. At this time, the first and second upper plating layers may not be disposed in the first region of the flexible circuit board of the embodiment. Through this, the embodiment can prevent cracks occurring when the flexible circuit board is bent in the first region, thereby further improving the physical reliability and / or electrical reliability of the flexible circuit board. In addition, the embodiment can prevent damage to the upper wiring pattern due to a tensile force of the upper wiring pattern occurring when the flexible circuit board is bent in the first region, thereby improving the durability of the upper wiring pattern.

[0154] Additionally, a second protective pattern of the upper protective layer may be provided on the first upper plating layer, surrounding the first protective pattern of the upper protective layer provided in the open portion of the first upper plating layer.

[0155] That is, the first protective pattern of the upper protective layer can be in contact with the upper wiring layer and the first upper plating layer. The first protective pattern can be in contact with the upper surface of the upper wiring layer and the side surface of the first upper plating layer on the first region. That is, the first protective pattern is in direct contact with the upper wiring layer, and thus can disperse stress that may occur during bending in the first region, and thus can further improve the physical reliability and / or electrical reliability of the flexible circuit board. In addition, the lower surface of the second protective pattern is in contact with the first upper plating layer and does not contact the second upper plating layer. Accordingly, the thickness of the flexible circuit board can be prevented from increasing by the thickness of the second upper plating layer.

[0156] In addition, the lower wiring pattern includes a lower wiring layer, a first lower plating layer, and a second lower plating layer. At this time, the lower protective layer includes a third open area. In addition, the first lower plating layer and the second lower plating layer of the lower wiring pattern are disposed only within the third open area of ​​the lower protective layer. That is, the first lower plating layer and the second lower plating layer may not be disposed between the lower wiring layer and the lower protective layer.

[0157] Specifically, the first lower plating layer and the second lower plating layer may not be disposed between the lower wiring layer and the lower protective layer. For example, the upper surface of the lower protective layer may not be in contact with the first lower plating layer and the second lower plating layer. The first lower plating layer and the second lower plating layer may be selectively disposed only in the third open area of ​​the lower protective layer.

[0158] That is, the embodiment prevents the lower plating layer from being positioned between the lower wiring layer and the lower protective layer. Accordingly, the embodiment can prevent the bending characteristics of the flexible circuit board from being deteriorated by the lower plating layer. Furthermore, the embodiment can prevent cracks from occurring in the lower wiring pattern when the flexible circuit board is bent by the lower plating layer. Therefore, the embodiment can further improve the durability of the lower wiring pattern.

[0159] In addition, the substrate of the embodiment is provided with a via electrode connecting between the upper wiring pattern and the lower wiring pattern. The via electrode includes a first open area and a first via electrode overlapping along a thickness direction. In addition, the via electrode includes a second via electrode adjacent to one end of the substrate from the first open area. And, the embodiment is such that the first area is provided between the first via electrode and the second via electrode. Preferably, the first area can extend between the first via electrode and the second via electrode in a direction perpendicular to a separation direction of the first via electrode and the second via electrode. Through this, the embodiment can improve the rigidity of the flexible circuit board by the first via electrode and the second via electrode when the flexible circuit board is bent in the first area, thereby further improving the physical reliability and / or electrical reliability of the flexible circuit board.

[0160] In addition, the lower wiring pattern may not be arranged in an area of ​​the second surface of the substrate. Preferably, the lower wiring pattern may not overlap with the area between the first open area and the second open area of ​​the upper protective layer in the thickness direction. Preferably, the lower wiring pattern may not be arranged in an area of ​​the second surface of the substrate that overlaps with the area between the first open area and the second open area of ​​the upper protective layer in the thickness direction, and may be provided in an area that does not overlap with the area between the first open area and the second open area of ​​the upper protective layer in the thickness direction. Through this, the embodiment can control the arrangement area of ​​the lower wiring pattern to control the tensile force of the lower wiring pattern that occurs when the flexible circuit board is bent, and thus the durability of the lower wiring pattern can be further improved.

[0161]

[0162] FIG. 8 is a cross-sectional view of a flexible circuit board according to the second embodiment taken along line A-A' of FIG. 1.

[0163] Referring to FIG. 8, the flexible circuit board of the embodiment may have a different structure of the upper protective layer (310) compared to the flexible circuit board of FIG. 7.

[0164] For example, the first upper plating layer (200b1) may not have an open portion. Accordingly, the upper protective layer (310) of FIG. 8 may have a structure including only the second protective pattern (312) among the first protective pattern (311) and the second protective pattern (312) of the upper protective layer of FIG. 7.

[0165] That is, in the embodiment, the lower wiring pattern (200L) between the lower wiring pattern (200L) and the lower protection layer (320) may include only the lower wiring layer (200c). Accordingly, in the embodiment, the upper protection layer (310) may have a single-stage structure including only the second protection pattern (312), rather than a two-stage structure including the first protection pattern (311) and the second protection pattern (312). In addition, even if the upper protection layer has a single-stage structure, the embodiment can prevent the upper wiring pattern and / or the lower wiring pattern from being damaged due to the tensile force of the upper wiring pattern and / or the lower wiring pattern that occurs when the flexible circuit board is bent, thereby improving the durability of the upper wiring pattern and / or the lower wiring pattern.

[0166]

[0167] FIG. 9 is a cross-sectional view of a flexible circuit board according to a third embodiment taken along line A-A' of FIG. 1.

[0168] Referring to FIG. 9, the flexible circuit board of the embodiment may have a different structure of the upper protective layer (310) compared to the flexible circuit board of FIG. 7. For example, the upper surfaces of the first protective pattern (311) and the second protective pattern (312) of the upper protective layer (310) of FIG. 9 may have a rounded shape. Preferably, the upper surfaces of the first protective pattern (311) and the second protective pattern (312) may have a curved surface. For example, the upper surfaces of each of the first protective pattern (311) and the second protective pattern (312) may vary in height along the horizontal direction.

[0169] Through this, the embodiment can disperse the stress applied to the first protection pattern (311) and the second protection pattern (312) by making the upper surfaces of the first protection pattern (311) and the second protection pattern (312) have curved surfaces, thereby further improving the physical reliability and / or electrical reliability of the flexible circuit board.

[0170]

[0171] FIG. 10 is a cross-sectional view of a flexible circuit board according to the fourth embodiment taken along line A-A' of FIG. 1.

[0172] Referring to FIG. 10, a flexible circuit board according to the fourth embodiment can be connected to an external circuit board and a display panel, respectively, on the first surface (S1) of the substrate (100).

[0173] Accordingly, the upper protective layer (310) may include a first open area (OR1), a second open area (OR2), and a third open area (OR3).

[0174] Additionally, the lower protective layer (320) may not have an open area.

[0175] Accordingly, the lower wiring pattern (200L) may only have a lower wiring layer as a whole. For example, the lower wiring pattern (200L) may not have a plating layer.

[0176] Below, a flexible circuit board of another embodiment is described.

[0177] FIG. 11 is a top view of a flexible circuit board according to a fifth embodiment, FIG. 12 is a bottom view of a flexible circuit board according to a fifth embodiment, FIG. 13 is a drawing showing an enlarged view of an area E of FIG. 11, FIG. 14 is a drawing showing an enlarged view of an area F of FIG. 11, FIGS. 15 and 16 are drawings for explaining a shape in which a COF module is bent, FIGS. 17 and 18 are drawings for explaining a shape in which a COF module is bent according to an embodiment, FIGS. 19 and 20 are cross-sectional views taken along the line AA' of FIG. 3 according to the fifth embodiment, FIGS. 21 and 22 are cross-sectional views taken along the line BB' of FIG. 12, FIG. 23 is a drawing for explaining the positions of protective layers according to the fifth embodiment, and FIGS. 24 and 25 are cross-sectional views taken along the line BB' of FIG. 12.

[0178] In the following description, the same reference numerals are given to components that are substantially the same as the components of the flexible circuit board described with reference to FIGS. 1 to 10, and a detailed description thereof is omitted.

[0179] Referring to FIGS. 11 to 14, the flexible circuit board may further include a fourth wiring pattern (250).

[0180] The fourth wiring pattern (250) is arranged on the first surface (1S) and the second surface (2S). The fourth wiring pattern (250) includes fourth connection wirings (251a, 251b), a seventh pad (252a), an eighth pad (252b), and a third via (V3). The fourth connection wirings (251a, 251b), the seventh pad (252a), and the eighth pad (252b) may include the same material. In addition, the fourth connection wirings (251a, 251b), the seventh pad (252a), and the eighth pad (252b) may be formed integrally.

[0181] The seventh pad (252a) is positioned on the first surface (1S). The seventh pad (252a) is positioned adjacent to the first pad (212a). The seventh pad (252a) is connected to a terminal of an external circuit board. As a result, the fourth wiring pattern (220) and the circuit board are connected.

[0182] The eighth pad (252b) is placed on the second surface (2S). The eighth pad (252b) is connected to a terminal of an external display panel. Thus, the fourth wiring pattern (250) and the display panel are connected.

[0183] The fourth connecting wire includes a fourth-first connecting wire (251a) and a fourth-second connecting wire (251b). The fourth-first connecting wire (251a) is arranged on the first surface (1S). The fourth-second connecting wire (251b) is arranged on the second surface (2S). The fourth connecting wire connects the seventh pad (252a) and the eighth pad (252b). The fourth-first connecting wire (251a) is connected to the seventh pad (252a). The fourth-second connecting wire (251b) is connected to the eighth pad (252b).

[0184] The fourth wiring pattern (250) may be a power supply pattern. Power may be transmitted to the circuit board and the display panel by the fourth wiring pattern (250).

[0185] A first protective layer (310) and a second protective layer (320) are disposed on the fourth wiring pattern (250). Specifically, the first protective layer (310) is disposed on the fourth wiring pattern (250) on the first surface (1S). The second protective layer (320) is disposed on the fourth wiring pattern (250) on the second surface (2S). The first protective layer (310) and the second protective layer (320) are not disposed on the seventh pad (252a) and the eighth pad (252b).

[0186] The 4-1 connection wiring (251a) and the 4-2 connection wiring (251b) are connected. The 4-1 connection wiring (251a) and the 4-2 connection wiring (251b) are connected through a third via (V3). The third via (V3) is formed by penetrating the first surface (1S) and the second surface (2S). Accordingly, the third via (V3) is arranged on the first surface (1S) and the second surface (2S). The third via (V3) on the first surface (1S) and the third via (V3) on the second surface (2S) are arranged at positions corresponding to each other.

[0187] The third via (V3) includes a third via land (VL3) and a third through-hole (VH3). The third via land (VL3) and the fourth connection wires (251a, 251b) include the same material. The third through-hole (VH3) is formed inside the third via land (VL3). A conductive material is disposed in the third through-hole (VH3). Accordingly, the 4-1 connection wire (251a) and the 4-2 connection wire (251b) are electrically connected.

[0188] Meanwhile, as described above, the second wiring pattern (220) includes a plurality of first vias (V1). The number of first vias (V1) corresponds to the number of pads of the second wiring pattern (220). Accordingly, the number of first vias (V1) is proportional to the number of terminals of the display panel.

[0189] The number of terminals provided in a VR display panel is large. Accordingly, when a flexible circuit board and a VR display panel are connected, the number of first vias (V1) increases. The first vias (V1) can be arranged in various ways depending on the width of the flexible circuit board in the first direction (1D) and the length in the second direction (2D).

[0190] For example, a plurality of first via groups may be defined. The first via group includes a plurality of first vias (V1) arranged in a second direction (2D). Furthermore, the first via groups are spaced apart in the first direction (1D).

[0191] The number of first vias (V1) of the first via group may vary depending on the width of the flexible circuit board (1000) in the first direction (1D) and the length of the flexible circuit board (1000) in the second direction (2D). In addition, the number of first via groups may vary depending on the width of the flexible circuit board (1000) in the first direction (1D) and the length of the flexible circuit board (1000) in the second direction (2D).

[0192] For example, when the width of the flexible circuit board (1000) is large, the number of first vias (V1) of the first via group may be small. In addition, the number of first via groups may be large. For example, the width of the flexible circuit board connected to the mobile display panel may be large. Accordingly, the flexible circuit board connected to the mobile display panel may have a small number of first vias (V1) of the first via group. In addition, the number of first via groups may be large.

[0193] Alternatively, when the width of the flexible circuit board (1000) is small, the number of first vias (V1) of the first via group may increase. In addition, the number of first via groups may decrease. For example, the flexible circuit board connected to the display panel for VR may have a small width. Accordingly, the flexible circuit board connected to the display panel for VR may have a large number of first vias (V1) of the first via group. In addition, the number of first via groups may decrease.

[0194] At this time, referring to FIG. 12, the flexible circuit board (1000) has a plurality of separation areas defined. For example, the flexible circuit board (1000) may include a first separation area (IA1), a second separation area (IA2), and a third separation area (IA3). The first separation area (IA1) is an area between the fourth pad (222b) and the first via (V1) that is most adjacent to the fourth pad (222b). The second separation area (IA2) is an area between the fourth pad (222b), the first via (V1) that is most adjacent to the first pad (222b), and the cutting line (CL). The third separation area (IA3) is an area between the sixth pad (232b) and the chip mounting area (CHA).

[0195] The COF module (2000) is bendable. Referring to FIG. 15, the COF module (2000) is bendable in the third separation area (IA3). Accordingly, the COF module (2000) includes a bending area (BA). Specifically, the third separation area (IA3) includes the bending area (BA).

[0196] Accordingly, the first separation area (IA1) and the second separation area (IA2) overlap with the display panel (4000). Therefore, the first separation area (IA1) and the second separation area (IA2) become the bezel area of ​​the display panel (4000). Accordingly, as shown in (b) of FIG. 15, when the lengths of the first separation area (IA1) and the second separation area (IA2) increase, the bezel area of ​​the display panel (4000) increases.

[0197] For example, as the number of first vias (V1) of the first via group increases, the length of the second separation area (IA2) increases. Accordingly, the bezel area of ​​the display panel (4000) increases. For example, in the case of a COF module (2000) connected to a display panel for VR, the number of first vias (V1) of the first via group increases. Accordingly, the length of the second separation area (IA2) increases. Accordingly, the bezel area (BE) of the display panel (4000) increases.

[0198] Alternatively, if the size of the first via (V1) of the first via group increases, the bezel area of ​​the display panel (4000) may increase. For example, in the case of a COF module (2000) connected to a mobile display panel, the number of first vias (V1) of the first via group is small. However, the size of the first via (V1) may increase. Accordingly, the length of the second separation area (IA2) may increase, so that the bezel area (BE) of the display panel (4000) may increase.

[0199] Accordingly, the COF module (2000) according to the embodiment is bent in at least two areas. Referring to FIG. 16, the COF module (2000) may include a first bending area (BA1) and a second bending area (BA2).

[0200] In detail, referring to FIG. 17, the flexible circuit board (1000) includes a bending area (BA). In detail, the third separation area (IA3) includes the bending area (BA). When the flexible circuit board (1000) is bent only in the third separation area (IA3), the first bezel area (BE1) of the display panel (4000) increases. In detail, the first bezel area (BE1) includes a portion of the third separation area (IA3), the first separation area (IA1), and the second separation area (IA2).

[0201] However, referring to FIG. 18, the flexible circuit board (1000) includes a first bending area (BA1) and a second bending area (BA2). The third separation area (IA3) includes the first bending area (BA1). In addition, the first separation area (IA1) includes a second bending area (BA2). When the first separation area (IA1) is bent, the second bezel area (BE2) of the display panel (4000) is reduced.

[0202] In Fig. 18, the first separation area (IA1) is illustrated as being bent only once. However, the embodiment is not limited thereto. For example, the first separation area (IA1) may be bent at least twice. That is, the first separation area (IA1) may include at least two bending areas.

[0203] The flexible circuit board (1000) according to the embodiment is bent in the first separation area (IA1). Accordingly, the bezel area of ​​the display panel is reduced.

[0204] Additionally, the flexible circuit board does not bend in the second separation area (IA2). Accordingly, the flexible circuit board (1000) does not bend in the area where the first via (V1) is formed.

[0205] Accordingly, when the flexible circuit board (1000) is bent, stress can be prevented from being transmitted to the first via. Accordingly, the alignment of the first via can be prevented from being misaligned due to the stress. In addition, the shape or size of the first via can be prevented from changing.

[0206] As the flexible circuit board is bent in the first separation area (IA1) and the third separation area (IA3), stress is generated in the first bending area (BA1) and the second bending area (BA2). Accordingly, the wiring pattern in the first bending area (BA1) and the second bending area (BA2) may be peeled off. Alternatively, the protective layer in the first bending area (BA1) and the second bending area (BA2) may be peeled off.

[0207] Below, a flexible circuit board (1000) and COF module that can solve the above problems are described.

[0208] First, the layer structure of the wiring pattern is described with reference to FIGS. 19 and 20. For convenience of explanation, the first wiring pattern is described below as an example. The following description applies equally to the second through fourth wiring patterns.

[0209] Referring to Fig. 19, the first wiring pattern is formed in multiple layers. In detail, the first connection wiring (211), the first pad (212a), and the second pad (212b) include a buffer layer (205), a metal layer (201), and a bonding layer (203).

[0210] The buffer layer (205) may include multiple layers. Specifically, the buffer layer (205) includes a first buffer layer (205a) and a second buffer layer (205b). The first buffer layer (205a) is disposed on the substrate (100). The second buffer layer (205b) is disposed on the first buffer layer (205a).

[0211] The first buffer layer (205a) includes a material having good adhesion to the substrate (100). For example, the first buffer layer (205a) may include nickel (Ni). In addition, the second buffer layer (205b) includes a material having good adhesion to the first wiring pattern. For example, the second buffer layer (205b) may include chromium (Cr).

[0212] The buffer layer (205) may have a thin film thickness in nanometer units. For example, the buffer layer (205) may have a thickness of 20 nm or less. The adhesion between the substrate (100) and the first wiring pattern is improved by the buffer layer (205).

[0213] The metal layer (201) is disposed on the buffer layer (205). Specifically, the metal layer (201) is disposed on the second buffer layer (205b). The metal layer (201) includes a metal material. For example, the metal layer (201) may include copper (Cu).

[0214] The metal layer (201) can be formed by electroplating using the buffer layer as a seed layer. That is, the metal layer (201) can be a plating layer. The thickness of the metal layer (201) can be 10 µm to 30 µm.

[0215] The bonding layer (203) is disposed on the metal layer (201). The bonding layer (203) is disposed on the side and upper surfaces of the metal layer (201). For example, the bonding layer (203) may be disposed to surround the metal layer (201). The bonding layer (203) includes a metal. For example, the bonding layer (203) may include tin (Sn). The thickness of the bonding layer (203) may be 0.3 μm to 0.7 μm. The tin content may increase as it extends from the lower surface of the bonding layer (203) toward the upper surface.

[0216] Here, the bonding layer (203) may refer to the plating layer described in the previous embodiment. For example, the bonding layer disposed on the substrate may refer to the upper plating layer described in the previous embodiment, and the bonding layer disposed under the substrate may refer to the lower plating layer described in the previous embodiment.

[0217] That is, the bonding layer (203) is in contact with the metal layer (201). Therefore, the tin content increases from the lower surface of the bonding layer (203) toward the upper surface. Additionally, the copper content decreases from the lower surface of the bonding layer (203) toward the upper surface.

[0218] Accordingly, pure tin may remain in a thickness range of 0.1 μm to 0.3 μm from the upper surface of the bonding layer (203).

[0219] The pad can be easily bonded to terminals of chips, circuit boards, and display panels by the bonding layer (203). For example, when heat and pressure are applied to the pad, the upper surface of the bonding layer melts. Pure tin remains on the upper surface of the bonding layer. Therefore, the pad can be easily bonded to terminals of chips, circuit boards, and display panels.

[0220] Referring to FIG. 20, the metal layer (201) may include a first metal layer (201a) and a second metal layer (201b). The first metal layer (201a) is disposed on the buffer layer (205). The second metal layer (201b) is disposed on the first metal layer (201a).

[0221] The thickness of the first metal layer (201a) may be smaller than the thickness of the second metal layer (201b). For example, the thickness of the first metal layer (201a) may be 0.7 μm to 2 μm, and the thickness of the second metal layer (201b) may be 10 μm to 25 μm.

[0222] The first metal layer (201a) and the second metal layer (201b) may include the same metal material. For example, the first metal layer (201a) and the second metal layer (201b) may include copper (Cu).

[0223] The first metal layer (201a) and the second metal layer (201b) can be formed through a plating process. For example, the first metal layer (201a) is formed thinly on the buffer layer (205). Subsequently, the second metal layer (201b) can be formed using the first metal layer (201a) as a seed layer.

[0224] Additionally, the bonding layer (203) may include a first bonding layer (203a) and a second bonding layer (203b). The first bonding layer (203a) is disposed on the metal layer (201). Specifically, the first bonding layer (203a) is disposed on the first connection wiring (211), the first pad (212a), and the second pad (212b). The second bonding layer (203b) is disposed on the first bonding layer (203a). Specifically, the second bonding layer (203b) is disposed on the first pad (212a) and the second pad (212b).

[0225] Accordingly, the first connecting wire (211) includes a buffer layer (205), a metal layer (201), and a first bonding layer (203a). In addition, the first pad (212a) and the second pad (212b) include a buffer layer (205), a metal layer (201), a first bonding layer (203a), and a second bonding layer (203b).

[0226] Therefore, the layer structure of the first connecting wire (211) is different from the layer structures of the first pad (212a) and the second pad (212b).

[0227] The first bonding layer (203a) and the second bonding layer (203b) contain metal. In detail, the first bonding layer (203a) and the second bonding layer (203b) may contain tin (Sn).

[0228] The first bonding layer (203a) and the second bonding layer (203b) are arranged with different thicknesses. In detail, the thickness of the second bonding layer (203b) is greater than the thickness of the first bonding layer (203a).

[0229] For example, the first bonding layer (203a) has a thickness of 0.02 μm to 0.06 μm. Additionally, the second bonding layer (203b) has a thickness of 0.2 μm to 0.6 μm.

[0230] Accordingly, the thickness of the first connecting wire (211) is reduced. Accordingly, when the flexible circuit board is bent, cracking of the first connecting wire (211) can be prevented.

[0231] The thickness of the first wiring pattern may be 2 μm to 25 μm. Specifically, the thickness of the first wiring pattern may be 5 μm to 20 μm. Specifically, the thickness of the first wiring pattern may be 7 μm to 15 μm.

[0232] If the thickness of the first wiring pattern is less than 2 μm, the resistance of the first wiring pattern may increase. If the thickness of the first wiring pattern exceeds 25 μm, it becomes difficult to implement a fine pattern.

[0233] Referring to FIGS. 21 to 25, the flexible circuit board may include a plurality of open areas.

[0234] The open area may include a first open area (OA1) and a second open area (OA2). The first open area (OA1) is formed on the first surface (1S). The second open area (OA2) is formed on the second surface (2S).

[0235] The first open area (OA1) is an area where the bonding layer (203) on the first surface (1S) is not formed. The second open area (OA2) is an area where the bonding layer (203) on the second surface (2S) is not formed.

[0236] The first open area (OA1) is formed on the third separation area (IA3). The flexible circuit board is bent on the third separation area (IA3). Accordingly, the third separation area (IA3) includes the first bending area (BA1). Accordingly, the first bending area (BA1) is formed on the first open area (OA1).

[0237] The outer surface of the first bending area (BA1) is the first surface (1S). In addition, the inner surface of the first bending area (BA1) is the second surface (2S). Tensile stress occurs on the outer surface of the first bending area (BA1). Accordingly, the bonding layer (203) may be peeled off. Accordingly, the first open area (OA1) is formed on the first surface (1S).

[0238] A second open area (OA2) is formed on the first separation area (IA1). The flexible circuit board is bent on the first separation area (IA1). Accordingly, the first separation area (IA1) includes a second bending area (BA2). Accordingly, the second bending area (BA2) is formed on the second open area (OA2).

[0239] The outer surface of the second bending area (BA2) is the second surface (2S). In addition, the inner surface of the second bending area (BA2) is the first surface (1S). Tensile stress occurs on the outer surface of the second bending area (BA2). Accordingly, the bonding layer (203) may be peeled off. Accordingly, the second open area (OA1) is formed on the second surface (2S).

[0240] Stress occurs on the first bending area (BA1) and the second bending area (BA2). The bonding layer (203) is not disposed on the first open area (OA1) and the second open area (OA2). Therefore, the bonding layer (203) is not disposed on the first bending area (BA1) and the second bending area (BA2). Therefore, the bonding layer (203) can be prevented from being peeled off due to stress on the first bending area (BA1) and the second bending area (BA2).

[0241] Accordingly, the reliability of the flexible circuit board is improved. Furthermore, the degree of curvature freedom in the first bending area (BA1) and the second bending area (BA2) is increased. Consequently, the flexible circuit board can be bent to various curvatures.

[0242] Referring to FIGS. 22 and 23, the first protective layer (310) and the second protective layer (320) include a plurality of protective patterns.

[0243] The first protective layer (310) includes a first-first protective pattern (311) and a first-second protective pattern (312). The first-first protective pattern (311) is arranged inside the first open area (OA1).

[0244] The first open area (OA1) extends in the first direction (1D). Accordingly, the 1-1 protective pattern (311) extends in the first direction (1D). Accordingly, the 1-1 protective layer is disposed on the inside of the first open area (OA1) and on the second wiring pattern between the first open areas (OA1). The 1-1 protective pattern (311) may be disposed to a thickness less than or equal to the bonding layer (203).

[0245] The first-second protection pattern (312) is disposed on the first-first protection pattern (311). In detail, the first-second protection pattern (312) is disposed on the first-first protection pattern (311), the first wiring pattern, the second wiring pattern, and the first surface. The thickness of the first-second protection pattern (312) may be different from the thickness of the first-first protection pattern (311). For example, the thickness of the first-second protection pattern (312) may be greater than the thickness of the first-first protection pattern (311). That is, the distance from the uppermost surface of the first-second protection pattern (312) to the substrate may be greater than the distance from the uppermost surface of the first-first protection pattern (311) to the substrate.

[0246] Since the first protective layer (310) includes a first-first protective pattern (311) and a first-second protective pattern (312), two protective patterns can be arranged on the first open area (OA1). Accordingly, the first protective layer (310) can be prevented from being peeled off due to stress on the first bending area (BA1).

[0247] Accordingly, the reliability of the flexible circuit board is improved. Furthermore, the degree of curvature freedom of the first bending area (BA1) is increased. Consequently, the flexible circuit board can be bent to various curvatures.

[0248] The second protective layer (320) includes a second-first protective pattern (321) and a second-second protective pattern (322). The second-first protective pattern (321) is arranged inside the second open area (OA1).

[0249] The second open area (OA2) extends in the first direction (1D). Accordingly, the second-first protective pattern (321) extends in the first direction (1D). Accordingly, the second-first protective layer is disposed on the second wiring pattern inside the second open area (OA2) and between the second open areas (OA2). The second-first protective pattern (321) may be disposed to a thickness less than or equal to the bonding layer (203).

[0250] The second-second protection pattern (322) is disposed on the second-first protection pattern (321). In detail, the second-second protection pattern (312) is disposed on the second-first protection pattern (321), the second wiring pattern, the third wiring pattern, and the second surface. The thickness of the second-second protection pattern (322) may be different from the thickness of the second-first protection pattern (321). For example, the thickness of the second-second protection pattern (322) may be greater than the thickness of the second-first protection pattern (321). That is, the distance from the uppermost surface of the second-second protection pattern (322) to the substrate may be greater than the distance from the uppermost surface of the second-first protection pattern (321) to the substrate.

[0251] Since the second protective layer (320) includes a second-first protective pattern (321) and a second-second protective pattern (322), two protective patterns can be arranged on the second open area (OA2). Accordingly, the second protective layer (320) can be prevented from being peeled off due to stress on the second bending area (BA1).

[0252] Accordingly, the reliability of the flexible circuit board is improved. Furthermore, the degree of curvature freedom of the second bending area (BA2) is increased. Consequently, the flexible circuit board can be bent to various curvatures.

[0253] Referring to FIGS. 24 and 25, the first protective layer (310) or the second protective layer (320) may include multiple protective layers.

[0254] Referring to FIG. 24, the first protective layer (310) includes a first-first protective pattern (311) and a first-second protective pattern (312). Additionally, the second protective layer (320) includes only one protective pattern.

[0255] Referring to Fig. 25, the second protective layer (320) includes a second-first protective pattern (321) and a second-second protective pattern (322). In addition, the first protective layer (310) includes only one protective pattern.

[0256] For example, the curvature of the first bending area (BA1) may be greater than the curvature of the second bending area (BA2). Accordingly, the stress on the first bending area (BA1) may be greater than the stress on the second bending area (BA2). In this case, the first protective layer (310) may include a first-first protective pattern (311) and a first-second protective pattern (312). Accordingly, the first protective layer (310) on the first bending area (BA1) may be prevented from being peeled off.

[0257] Alternatively, the curvature of the second bending area (BA2) may be greater than the curvature of the first bending area (BA1). Accordingly, the stress on the second bending area (BA2) may be greater than the stress on the first bending area (BA1). In this case, the second protective layer (320) may include a second-first protective pattern (321) and a second-second protective pattern (322). Accordingly, the second protective layer (320) on the second bending area (BA2) may be prevented from being peeled off.

[0258] The thickness (T1) of the first protective layer (310) and the thickness (T2) of the second protective layer (320) may be the same or similar. Accordingly, the weights of the protective layers disposed on the first surface (1S) and the second surface (2S) may be similar. Accordingly, the flexible circuit board is prevented from being bent in one direction before being bent.

[0259] The thickness (T1) of the first protective layer (310) and the thickness (T2) of the second protective layer (320) may be different. For example, the thickness (T2) of the second protective layer (320) may be greater than the thickness (T1) of the first protective layer (310). Alternatively, the thickness (T1) of the first protective layer (310) may be greater than the thickness (T2) of the second protective layer (320).

[0260] The flexible circuit board can be bent more than twice on the first separation area (IA1). Therefore, the stress on the first surface (1S) and the second surface (2S) can be different. For example, the stress on the first surface (1S) can be greater than the stress on the second surface (2S). In this case, the thickness (T1) of the first protective layer (310) is made greater than the thickness (T2) of the second protective layer (320). Alternatively, the stress on the second surface (2S) can be greater than the stress on the first surface (1S). In this case, the thickness (T2) of the second protective layer (320) is made greater than the thickness (T1) of the first protective layer (310).

[0261] Accordingly, the protective layer on the surface where significant stress occurs becomes thicker. Accordingly, when the flexible circuit board is bent, the first or second protective layer can be prevented from being peeled off.

[0262] In Figures 21 to 25, one bonding layer is illustrated as being arranged. However, the embodiment is not limited thereto. The bonding layer may include a first bonding layer (203a) and a second bonding layer (203b).

[0263] At least one of the first bonding layer (203a) and the second bonding layer (203b) may not be disposed on the open area (OA1, OA2).

[0264] In detail, the second bonding layer (203b) may not be disposed on the open areas (OA1, OA2). Alternatively, neither the first bonding layer (203a) nor the second bonding layer (203b) may be disposed on the open areas (OA1, OA2). Alternatively, the second bonding layer (203b) may not be disposed on one open area, and neither the first bonding layer (203a) nor the second bonding layer (203b) may be disposed on the other open area.

[0265]

[0266] FIGS. 26 to 29 are drawings showing various bending shapes of a COF module including a flexible circuit board according to an embodiment, and FIGS. 30 to 32 are drawings of an electronic device including a flexible circuit board according to an embodiment.

[0267] Figures 26 to 29 are drawings illustrating various bending shapes of a COF module according to an embodiment.

[0268] Referring to FIGS. 26 to 29, the COF module (2000) can be bent at least three times. For example, referring to FIGS. 26 to 27, the COF module (2000) can be bent three times. That is, the COF module (2000) can include a first bending area (BA1), a second bending area (BA2), and a third bending area (BA3).

[0269] Referring to FIGS. 26 and 28, the first bending area (BA1) is formed on the third separation area (IA3). The second bending area (BA2) and the third bending area (BA3) are formed on the first separation area (IA1). Accordingly, a plurality of second open areas may be formed on the first separation area (IA1). For example, a second-first open area and a second-second open area may be formed on the first separation area (IA1).

[0270] The second bending area (BA2) is bent so that the second surface (2S) becomes the outer surface. The third bending area (BA3) is bent so that the first surface (1S) becomes the outer surface. Accordingly, the 2-1 open area and the 2-2 open area are formed on different surfaces. Specifically, the 2-1 open area is formed on the second surface (2S), and the 2-2 open area is formed on the first surface (1S).

[0271] Referring to Fig. 27, the first bending area (BA1) is formed on the third separation area (IA3). The second bending area (BA2) and the third bending area (BA3) are formed on the first separation area (IA1). Accordingly, a plurality of second open areas may be formed on the first separation area (IA1). For example, a second-first open area and a second-second open area may be formed on the first separation area (IA1).

[0272] The second bending area (BA2) is bent so that the second surface (2S) becomes the outer surface. The third bending area (BA3) is bent so that the second surface (2S) becomes the outer surface. Therefore, the second-first open area and the second-second open area are formed on the same surface. In detail, the second-first open area and the second-second open area are formed on the second surface (2S).

[0273] Referring to FIG. 29, the COF module (2000) can be bent four times. That is, the COF module (2000) can include a first bending area (BA1), a second bending area (BA2), a third bending area (BA3), and a fourth bending area (BA4).

[0274] The first bending area (BA1) is formed on the third separation area (IA3). The second bending area (BA2), the third bending area (BA3), and the fourth bending area (BA4) are formed on the first separation area (IA1). Therefore, a plurality of second open areas can be formed on the first separation area (IA1). For example, a second-first open area, a second-second open area, and a second-third open area can be formed on the first separation area (IA1).

[0275] The second bending area (BA2) is bent so that the second surface (2S) becomes the outer surface. The third bending area (BA3) is bent so that the first surface (1S) becomes the outer surface. The fourth bending area (BA4) is bent so that the first surface (1S) becomes the outer surface. Accordingly, the 2-1 open area, the 2-2 open area, and the 2-3 open area are formed on different surfaces. Specifically, the 2-1 open area is formed on the second surface (2S). In addition, the 2-2 open area and the 2-3 open area are formed on the first surface (1S).

[0276] The first separation area (IA1) and the third separation area (IA3) may be bent with the same or different curvatures. For example, referring to FIG. 22, the first separation area (IA1) and the third separation area (IA3) may be bent with different curvatures.

[0277]

[0278] A chip (CH) is mounted on a flexible circuit board according to an embodiment. Subsequently, it is cut along a cutting line (CL). Thus, a COF module is manufactured.

[0279] The COF module (2000) can transmit electrical signals by connecting a display panel (4000) and a circuit board (3000).

[0280] One end of the COF module (2000) is connected to a display panel (4000). The other end of the COF module (2000) is connected to a circuit board (3000). For example, the display panel (4000) is disposed on one surface of the COF module (2000). In addition, the circuit board (3000) is disposed on the other surface of the COF module (2000).

[0281] The COF module (2000) includes a flexible substrate. Accordingly, it can have both a rigid form and a bent form between the display panel (3000) and the circuit board (4000).

[0282] The COF module (2000) can be connected in a curved manner between a display panel (4000) and a circuit board (3000), which are arranged opposite each other. Therefore, the thickness of the electronic device is reduced. Furthermore, the design freedom of the electronic device is enhanced. Furthermore, the COF module (2000) does not break the wiring even when in a curved manner. Consequently, the reliability of the electronic device is enhanced.

[0283] In addition, since the COF module (2000) is bent in the first separation area (IA1), the bezel area of ​​the display panel (4000) is reduced. In addition, since the COF module (2000) is not bent in the second separation area (IA1), deformation of the via can be prevented. In addition, the COF module (2000) is formed with at least one second open area on the first separation area (IA1). Accordingly, when the flexible circuit board is bent, the bonding layer and the protective layer are prevented from being peeled off.

[0284] COF modules are flexible and can be applied to various electronic devices.

[0285] Referring to FIG. 30, the COF module can be applied to a flexible touch window. Accordingly, a touch device device including the same can be a flexible touch device device.

[0286] Referring to FIG. 31, the COF module can be applied to various wearable touch devices including curved displays. Accordingly, the wearable touch device can be slimmed down or made lighter.

[0287] Referring to FIG. 32, the COF module can be applied to various electronic devices having a display portion, such as a TV, monitor, or laptop.

[0288]

[0289] The features, structures, effects, etc. described in the above-described embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to just one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by those skilled in the art to which the embodiments pertain. Therefore, the contents related to such combinations and modifications should be construed as falling within the scope of the present invention.

[0290] In addition, although the above description focuses on embodiments, these are merely examples and do not limit the present invention. Those skilled in the art to which the present invention pertains will appreciate that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the present embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, differences related to such modifications and applications should be interpreted as being included within the scope of the present invention defined in the appended claims.

Claims

1. Description; An upper wiring pattern arranged on the above description; An upper protective layer disposed on the upper wiring pattern and including an open area; The lower wiring pattern arranged under the above description; and Including a lower protective layer disposed under the above lower wiring pattern, The above upper wiring pattern includes a first overlapping region overlapping the upper protective layer along the thickness direction of the above substrate, The above lower wiring pattern includes a second overlapping region overlapping the lower protective layer along the thickness direction of the above substrate, A flexible circuit board, wherein the metal content of the upper wiring pattern in the first overlapping region is different from the metal content of the lower wiring pattern in the second overlapping region.

2. In paragraph 1, The above first overlapping region includes a region in which the content of the metal forming the upper wiring pattern changes as it approaches the upper protective layer, A flexible circuit board, wherein the second overlapping region does not include a region in which the content of the metal forming the lower wiring pattern changes.

3. In paragraph 1, A flexible circuit board, wherein the amount of change in the content of the metal constituting the upper wiring pattern in the first overlapping area is greater as it approaches the upper protective layer than the amount of change in the content of the metal constituting the lower wiring pattern in the second overlapping area as it approaches the lower protective layer.

4. In paragraph 1, The above upper wiring pattern is An upper wiring layer disposed on the above substrate, a first upper plating layer disposed on the upper wiring layer, and a second upper plating layer disposed on the first upper plating layer within the open area, The above lower wiring pattern includes a lower wiring layer arranged under the above description, The upper protective layer is in direct contact with the first upper plating layer in the first overlapping area, A flexible circuit board, wherein the lower protective layer is in direct contact with the lower wiring layer in the second overlapping region.

5. In paragraph 4, The first upper plating layer includes an open portion overlapping at least a portion of the upper wiring layer along the thickness direction, A flexible circuit board, wherein the upper protective layer includes a first protective pattern disposed within the open portion of the first upper plating layer, and a second protective pattern disposed on the first upper plating layer and the first protective pattern.

6. In paragraph 5, The upper protective layer includes a first open area located between the first side end and the second side end of the substrate, and a second open area spaced from the first open area and closer to the first side end than the first open area, A flexible circuit board, wherein the open portion of the first upper plating layer is closer to the second side end of the substrate than the first open area and the second open area.

7. In paragraph 6, The lower protective layer includes a third open area closer to the second side end of the substrate than the first open area and the second open area, A flexible circuit board, wherein the lower wiring pattern further includes a first lower plating layer disposed under the lower wiring layer within the third open area, and a second lower plating layer disposed under the first lower plating layer.

8. In paragraph 6, The upper protective layer includes a third open area closer to the second side end of the substrate than the first open area and the second open area, The above lower protective layer does not include open areas, A flexible circuit board, wherein the lower surface of the lower wiring layer of the lower wiring pattern is in direct contact with the lower protective layer as a whole.

9. In paragraph 7 or 8, A first via electrode provided to penetrate the substrate along the thickness direction at a location adjacent to the first open area and connect the upper wiring pattern and the lower wiring pattern; and A second via electrode is provided that penetrates the substrate along the thickness direction at a location adjacent to the third open area and connects the upper wiring pattern and the lower wiring pattern, A flexible circuit board, wherein the open portion of the first upper plating layer extends between the first via electrode and the second via electrode in a direction different from the separation direction of the first via electrode and the second via electrode.

10. In paragraph 6, A flexible circuit board, wherein the lower wiring pattern does not overlap with an area between the first open area and the second open area along the thickness direction.

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