Method for preparing perovskite thin film by high-pressure annealing, and tandem solar cell

By introducing a high-pressure annealing process in the preparation of perovskite films, the problem of low perovskite film quality in the prior art is solved, and high-quality and low defect density film preparation is achieved, and the performance and stability of stacked solar cells are improved.

WO2025129824A1PCT designated stage expired Publication Date: 2025-06-26SHENZHEN HIKING PV TECHNOLOGY CO LTD
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Patent Information

Application Number
PCT/CN2024/081648
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-20
Filing Date
2024-03-14
Publication Date
2025-06-26

AI Technical Summary

Technical Problem

The existing perovskite film preparation methods cannot obtain high-quality and low defect density conformal perovskite films, resulting in low quality perovskite films, affecting the performance of stacked solar cells.

Method used

A high-pressure annealing process was introduced. Based on the traditional two-step method, the lead iodide film and ammonium salt film were treated through high-pressure annealing to increase the diffusion movement between the two films, making the reaction more full and efficient, and reducing internal defects of the film.

Benefits of technology

The perovskite film prepared by high-pressure annealing process has higher quality and lower defect density, which improves the photoelectric conversion efficiency and stability of stacked solar cells.

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Abstract

A method for preparing a perovskite thin film by high-pressure annealing, and a tandem solar cell. The method comprises: co-evaporating lead iodide and caesium bromide on a textured substrate (1) to form a lead iodide thin film (L1), co-evaporating formamidinium iodide and formamidinium bromide on the lead iodide thin film (L1) to form an ammonium salt thin film (L2), and then performing annealing under a high-pressure condition to obtain a perovskite thin film. The diffusion rate between the lead iodide thin film (L1) and the ammonium salt thin film (L2) can be increased by means of a high-pressure annealing process, so that components in the thin films can fully and efficiently react, thereby reducing the generation of internal defects, and improving the photoelectric conversion efficiency and stability of the tandem solar cell obtained by the method.
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Description

A method for preparing perovskite thin film by high-pressure annealing and a stacked solar cell Technical Field

[0001] The present invention mainly relates to the technical field of solar cells, and in particular to a method for preparing a perovskite thin film by high-pressure annealing and a stacked solar cell. Background Art

[0002] Solar energy, a sought-after new clean energy source, boasts abundant resources and low costs. Converting solar energy into electricity using photovoltaic cells is currently one of the most efficient ways to utilize solar energy. Monocrystalline and polycrystalline silicon solar cells have relatively mature industrial technologies. In recent years, perovskite solar cells have garnered widespread attention from both the scientific and industrial communities due to their advantages, including adjustable band gaps, low exciton binding forces, and high photoelectric conversion efficiency.

[0003] Most existing crystalline silicon / perovskite tandem solar cells are fabricated using polished crystalline silicon base cells. This is because existing perovskite film formation methods are generally targeted at polished substrates, whereas the surfaces of crystalline silicon cells currently commercialized on a large scale are mostly textured. Textured surfaces significantly reduce the device's reflection of incident light and enhance light absorption, an essential requirement for high-efficiency solar cells. Consequently, current crystalline silicon / perovskite tandem solar cells based on polished crystalline silicon base cells generally suffer from high light absorption losses and low short-circuit current density.

[0004] In this regard, the use of textured crystalline silicon substrates is an inevitable option for further improving the performance of crystalline silicon / perovskite tandem solar cells. To prepare conformal, fully covered perovskite films on textured crystalline silicon substrates, a two-step evaporation and solution method is commonly used. In the first step, a conformal lead iodide or lead iodide-cesium bromide mixed film is prepared by evaporation. In the second step, a mixed ammonium salt solution reacts with the evaporated film to form a conformal perovskite film.

[0005] However, in this traditional two-step process, the lead iodide near the top surface of the conformal hybrid film is more likely to react completely with the ammonium salt film. However, the lead iodide near the bottom surface of the film, which is not in direct contact with the ammonium salt film, is less likely to react completely, ultimately forming a large amount of lead iodide residue in the lower layer of the perovskite film. This free lead iodide forms numerous defects within the perovskite film, resulting in low-quality perovskite films and thus affecting device performance. Summary of the Invention

[0006] The purpose of the present invention is to overcome the problem that existing perovskite film preparation methods cannot obtain high-quality, low-defect-density conformal perovskite films. A method for preparing perovskite films by high-pressure annealing and a stacked solar cell are proposed. This method introduces a high-pressure annealing process into the traditional two-step method. After a lead iodide film and an ammonium salt film are prepared in sequence on a substrate, a high-pressure annealing treatment is performed to increase the diffusion movement between the lead iodide film and the ammonium salt film, making the lead iodide reaction more sufficient and efficient, reducing internal defects in the perovskite film, and forming a high-quality perovskite film. The stacked solar cell obtained by applying this method has higher performance and stability.

[0007] To achieve the above objectives, the present invention provides the following specific solutions.

[0008] A method for preparing a perovskite film by high pressure annealing, comprising the steps of:

[0009] A suede substrate is provided, lead iodide and cesium bromide are co-evaporated on the suede substrate to form a lead iodide film, an ammonium salt solution is prepared, formamidine iodide and formamidine bromide are co-evaporated on the lead iodide film to form an ammonium salt film, and the obtained structure is subjected to a high-pressure annealing treatment at a temperature of 0-200°C, an annealing time of 0-60 minutes, and an annealing pressure of 100-180 kPa to obtain a perovskite absorption layer.

[0010] In one embodiment, the evaporation rate of lead iodide is controlled at 0-10 A / s, the evaporation rate of cesium bromide is controlled at 0-10 A / s, the total evaporation time is controlled between 0-10000 s, and the thickness of the formed film is 200-800 nm.

[0011] Preferably, the evaporation rates of different materials are controlled so that the content ratio of lead iodide to cesium bromide is between 10:1 and 2:1.

[0012] In one embodiment, the evaporation rate of formamidine iodide is controlled at 0-10 A / s, the evaporation rate of formamidine bromide is controlled at 0-10 A / s, the total evaporation time is controlled between 0-10000 s, and the thickness of the formed film is 200-800 nm.

[0013] The evaporation rates of formamidine iodide and formamidine bromide are maintained at a constant value throughout the coating process by controlling the rate ratio, and controlling the ratio of formamidine iodide to formamidine bromide to be between 10:1 and 2:1.

[0014] In one embodiment, the preparation of the suede substrate comprises:

[0015] A textured silicon substrate is provided, and a base passivation layer, a P-type base doping layer, and a first conductive layer are sequentially prepared on one side of the textured silicon substrate; and a base surface passivation layer, an N-type base doping layer, a tunneling layer, and a hole transport layer are sequentially prepared on the other side of the textured silicon substrate to obtain the textured substrate, wherein the perovskite absorption layer is formed on the hole transport layer.

[0016] Specifically, the first conductive layer includes a first conductive transparent layer and a first metal electrode layer sequentially formed on the P-type doped layer.

[0017] In one embodiment, the method for preparing a perovskite thin film by high-voltage annealing further includes sequentially forming a passivation layer, an electron transport layer, a buffer layer, and a second conductive layer on the surface of the perovskite absorption layer.

[0018] Specifically, the second conductive layer includes a second conductive transparent layer and a second metal electrode layer sequentially formed on the buffer layer.

[0019] The present invention also provides a laminated solar cell prepared by the above method, comprising a velvet substrate; and a perovskite absorption layer, a passivation layer, an electron transport layer, a buffer layer and a second conductive layer sequentially arranged on the surface of the velvet substrate.

[0020] Specifically, the second conductive layer includes a second conductive transparent layer and a second metal electrode layer sequentially disposed on the buffer layer.

[0021] The textured substrate includes a textured crystalline silicon layer; a tunneling layer and a hole transport layer sequentially arranged on one surface of the textured crystalline silicon layer, the perovskite absorption layer is arranged on the hole transport layer; and a first conductive layer arranged on the other surface of the textured crystalline silicon layer.

[0022] Specifically, the first conductive layer includes a first conductive transparent layer and a first metal electrode layer sequentially provided on the surface of the textured crystalline silicon layer.

[0023] Specifically, the textured crystalline silicon layer includes a textured silicon substrate; and a base passivation layer and a P-type base doping layer sequentially arranged on one surface of the textured silicon substrate, and the first conductive layer is arranged on the P-type base doping layer; and a base surface passivation layer and an N-type base doping layer sequentially prepared on the other surface of the textured silicon substrate, and the tunneling layer is arranged on the N-type base doping layer.

[0024] The present invention provides a method for preparing a perovskite film by high-pressure annealing and a tandem solar cell. The method comprises co-evaporating lead iodide and cesium bromide on a substrate to form a lead iodide film, co-evaporating formamidine iodide and formamidine bromide on the lead iodide film to form an ammonium salt film, and then annealing the film under high pressure to obtain the perovskite film. In an embodiment of the present invention, the high-pressure annealing process can accelerate the diffusion rate between the lead iodide film and the ammonium salt film, allowing the various components within the film to react fully and efficiently, reducing the generation of internal defects, and improving the photoelectric conversion efficiency and stability of the tandem solar cell obtained by this method. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] FIG1 is a schematic diagram of the steps of a method for preparing a perovskite thin film by high pressure annealing according to an embodiment of the present invention.

[0026] FIG2 is a schematic diagram of the structure of a stacked solar cell according to an embodiment of the present invention.

[0027] 1. Velvet substrate; L1, lead iodide film; L2, ammonium salt film; 2. Perovskite absorption layer.

[0028] 10. First conductive layer; 11. Textured crystalline silicon layer; 12. Tunneling layer; 13. Hole transport layer; 21. Passivation layer; 22. Electron transport layer; 23. Buffer layer; 24. Second conductive layer.

[0029] 101. First metal electrode layer; 102. First conductive transparent layer; 111. P-type base doping layer; 112. Base passivation layer; 113. Textured silicon substrate; 114. Base surface passivation layer; 115. N-type base doping layer; 241. Second metal electrode layer; 242. Second conductive transparent layer. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0031] In the description of the present invention, unless otherwise specified, "plurality" means two or more; the terms "center", "longitudinal", "lateral", "upper", "lower", "left", "right", "inner", "outer", "front end", "rear end", "head", "tail", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the present invention. In addition, the terms "first", "second", "third", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance.

[0032] Referring to FIG1 , a method for preparing a perovskite thin film by high pressure annealing according to an embodiment of the present invention includes the following steps:

[0033] A textured substrate 1 is provided, lead iodide and cesium bromide are co-evaporated on the textured substrate to form a lead iodide film L1, and formamidine iodide and formamidine bromide are co-evaporated on the lead iodide film to form an ammonium salt film L2. The obtained structure is subjected to high-pressure annealing treatment to obtain a perovskite absorption layer 2.

[0034] In one embodiment, the evaporation rate of lead iodide is controlled at 0-10 A / s, the evaporation rate of cesium bromide is controlled at 0-10 A / s, the total evaporation time is controlled between 0-10000 s, and the thickness of the formed lead iodide film L1 is 200-800 nm.

[0035] Preferably, the evaporation rates of different materials are controlled so that the content ratio of lead iodide to cesium bromide is between 10:1 and 2:1.

[0036] In one embodiment, the evaporation rate of formamidine iodide is controlled at 0-10 A / s, the evaporation rate of formamidine bromide is controlled at 0-10 A / s, the total evaporation time is controlled between 0-10000 s, and the thickness of the formed ammonium salt film L2 is 200-800 nm.

[0037] The evaporation rates of formamidine iodide and formamidine bromide are maintained at a constant value throughout the coating process by controlling the rate ratio, and controlling the ratio of formamidine iodide to formamidine bromide to be between 10:1 and 2:1.

[0038] In one embodiment, the high pressure annealing treatment is performed at a temperature of 0-200° C., an annealing time of 0-60 min, and an annealing pressure of 100-180 kPa.

[0039] In an embodiment of the present invention, the lead iodide film L1 and the ammonium salt film L2 are formed by co-evaporation, the internal component uniformity will be better, and there will be no void defects caused by solvent volatilization at the interface. The formed perovskite film has better quality and more stable structure.

[0040] At the same time, since the two thin films are formed by co-evaporation, in order to increase the diffusion between the two thin films during annealing, the present invention adopts a high-pressure annealing method, and the suede substrate 1 on which the lead iodide film L1 and the ammonium salt film L2 have been prepared is placed in a sealed container and annealed under a high-pressure environment. This can increase the diffusion efficiency between the various components, and the ammonium salt can penetrate into the bottom of the lead iodide film L1, making the reaction of lead iodide more sufficient and efficient.

[0041] In this embodiment, the velvet base 1 is a layer film with a velvet structure on the surface. In the production and application of solar cells, the irregular surface of the velvet structure can increase the number of reflections of sunlight on the surface, effectively reduce the surface reflectivity of the solar cell, and increase the light absorption coefficient of the device, thereby increasing the photoelectric conversion efficiency of the device. The velvet base 1 described in this application has a velvet structure, which can also reduce light reflection.

[0042] In one embodiment, the preparation of the velvet base 1 includes: providing a velvet silicon substrate 113, sequentially preparing a base passivation layer 112, a P-type base doping layer 111 and a first conductive layer 10 on one side of the velvet silicon substrate 113, and sequentially preparing a base surface passivation layer 114, an N-type base doping layer 115, a tunneling layer 12 and a hole transport layer 13 on the other side of the velvet silicon substrate 113 to obtain the velvet base 1, wherein the perovskite absorption layer 2 is formed on the hole transport layer 13, and the first conductive layer 10 includes a first conductive transparent layer 102 and a first metal electrode layer 101 sequentially formed on the P-type base doping layer 111.

[0043] In this embodiment, the textured silicon substrate 113 has a textured surface on its surface. On this basis, each film layer formed on the two surfaces of the textured silicon substrate 113 also has a textured structure; specifically, the textured surface of the textured silicon substrate 113 can be prepared by anisotropically etching a silicon wafer with an alkaline solution.

[0044] The base passivation layer 112 and the base surface passivation layer 114 formed on the two surfaces of the textured silicon substrate 113 are both passivation structures, which can saturate the dangling bonds at the semiconductor surface, reduce surface activity, increase the surface cleaning process, and avoid the formation of recombination centers due to the introduction of impurities in the surface layer, thereby reducing the surface recombination rate of minority carriers; specifically, the base passivation layer 112 and the base surface passivation layer 114 can be formed by methods such as vapor deposition and atomic layer deposition.

[0045] In this embodiment, the P-type base doping layer 111 and the N-type base doping layer 115 can be formed by diffusion. Specifically, a phosphorus source / nitrogen source is diffused on the textured silicon substrate 113 to form a doping structure, thereby obtaining the P-type base doping layer 111 and the N-type base doping layer 115 respectively.

[0046] The first conductive transparent layer 102 can be formed by magnetron sputtering. The substrate sample to be prepared is placed in a magnetron sputtering device, the power is controlled between 50 and 200 W, a target is set, and the first conductive transparent layer 102 is sputtered. The first metal electrode layer 101 is formed by evaporation. The substrate sample to be prepared is placed on a mask plate for evaporation. The evaporation vacuum is 5×10 -5 ~2×10 -4 Pa, the evaporation temperature is 500-2000° C., the evaporation rate is 0.1-5 Å / S, and the metal material is evaporated to form the first metal electrode layer 101.

[0047] In this embodiment, the tunneling layer 12 is prepared by atomic layer deposition, magnetron sputtering or wet chemical method, which can eliminate the electrical mismatch and device instability problems caused by direct series connection of crystalline silicon cells and perovskite cells.

[0048] In this embodiment, the hole transport layer 13 is prepared by spin coating, and the hole transport layer dispersion is evenly coated on the surface of the tunneling layer 12. The spin coating speed is 1000-5000 rpm, and the spin coating time is 10-100 s. After the spin coating is completed, an annealing operation is performed. The annealing temperature is 300-600° C. and the annealing time is 10-50 min to obtain the hole transport layer 13.

[0049] In this embodiment, the hole transport layer 13 can also be prepared by magnetron sputtering. The substrate sample to be prepared is placed in a magnetron sputtering device, and the power is controlled to be 30-90W to obtain the hole transport layer 13 by sputtering.

[0050] In one embodiment, the method for preparing a perovskite film by high-voltage annealing further includes sequentially forming a passivation layer 21, an electron transport layer 22, a buffer layer 23 and a second conductive layer 24 on the surface of the perovskite absorption layer 2, wherein the second conductive layer 24 includes a second conductive transparent layer 242 and a second metal electrode layer 241 sequentially formed on the buffer layer 23.

[0051] The passivation layer 21 can be prepared by evaporation, wherein the passivation layer material is evaporated onto the surface of the perovskite absorption layer 2, and the evaporation vacuum degree is 1~5×10 -4 Pa, the evaporation temperature is 50-400°C, the evaporation rate is 0.05-1 Å / S, and after the evaporation is completed, an annealing operation is performed, the annealing temperature is 0-150°C, and the annealing time is 0-30 min to obtain the passivation layer 21.

[0052] The passivation layer 21 can also be prepared by a spin coating method, wherein the passivation layer dispersion is evenly coated on the surface of the perovskite absorption layer 2, ultrasonically dissolved and spin-coated, the ultrasonic time is 0-30 min, the spin coating speed is 1000-7000 rpm, and the spin coating time is 20-120 s; after the spin coating is completed, an annealing operation is performed, the annealing temperature is 40-160° C., and the annealing time is 5-40 min to obtain the passivation layer 21.

[0053] The passivation layer 21 can also be prepared by spraying, spraying the passivation layer dispersion on the surface of the perovskite absorption layer at a spraying rate of 1-100 cm / s. After spraying, annealing is performed at a temperature of 20-170° C. and a time of 0-30 min to obtain the passivation layer 21.

[0054] The passivation layer 21 is used to reduce the surface activity of the perovskite absorption layer, thereby reducing the surface carrier recombination efficiency, thereby improving the photoelectric conversion efficiency of the device.

[0055] The electron transport layer 22 is prepared by spin coating, and the electron transport layer dispersion is evenly coated on the surface of the passivation layer 21 at a spin coating speed of 500-4000 rpm and a spin coating time of 10-80 s to obtain the electron transport layer 22.

[0056] The electron transport layer 22 can also be prepared by evaporation, wherein the electron transport layer material is evaporated onto the surface of the passivation layer 21, and the evaporation vacuum degree is 5×10 -5 ~5×10 -4 Pa, the evaporation temperature is 100-400° C., and the evaporation rate is 0.05-1 Å / S to obtain the electron transport layer 22.

[0057] The buffer layer 23 is prepared by atomic layer deposition. The buffer layer material is deposited on the surface of the electron transport layer 22 using an atomic layer deposition device. The deposition vacuum is 0-1×10 4 Pa, the deposition pipeline temperature is between 50 and 150° C., the deposition chamber temperature is between 40 and 150° C., and the buffer layer 23 is obtained.

[0058] The buffer layer 23 can also be prepared by evaporation, wherein the buffer layer material is evaporated onto the surface of the electron transport layer 22, and the evaporation vacuum is 6×10 -5 ~4×10 -4 Pa, the evaporation temperature is 100~500℃, and the evaporation rate is 0.05~1 Å / S to obtain the buffer layer 23.

[0059] In this embodiment, the second conductive layer 24 can be prepared by the same method as the first conductive layer 10. Specifically, the second conductive transparent layer 242 can be formed by magnetron sputtering. The substrate sample to be prepared is placed in a magnetron sputtering device, the power is controlled between 50 and 200 W, a target material is set, and the second conductive transparent layer 242 is sputtered. The first metal electrode layer 101 is formed by evaporation. The substrate sample to be prepared is placed on a mask plate for evaporation. The evaporation vacuum degree is 5×10 -5 ~2×10 -4 Pa, the evaporation temperature is 500-2000° C., the evaporation rate is 0.1-5 Å / S, and the metal material is evaporated to form the second metal electrode layer 241.

[0060] Please refer to Figure 2. An embodiment of the present invention also provides a stacked solar cell obtained by the above-mentioned method of preparing a perovskite thin film by high-voltage annealing, comprising a suede substrate 1; and a perovskite absorption layer 2, a passivation layer 21, an electron transport layer 22, a buffer layer 23 and a second conductive layer 24 sequentially arranged on the surface of the suede substrate.

[0061] Specifically, the second conductive layer 24 includes a second conductive transparent layer 242 and a second metal electrode layer 241 sequentially disposed on the buffer layer 23 .

[0062] In this embodiment, the surface of the velvet substrate 1 has a velvet structure. Therefore, the perovskite absorption layer 2, the passivation layer 21, the electron transport layer 22, the buffer layer 23 and the second conductive layer 24 formed on the surface of the velvet substrate 1 are also film layers with a velvet structure. The irregular surface of the velvet structure can increase the number of reflections of sunlight on the surface, effectively reduce the surface reflectivity of the solar cell, and improve the light absorption coefficient of the device, thereby increasing the photoelectric conversion efficiency of the device.

[0063] In this embodiment, the perovskite absorption layer 2 is specifically an ABX3 structure, and the A position is an organic cation, including CH3NH3 + (MA + ), NH2CH=NH2 + (FA + ), CH3CH2NH3 + or Cs + At least one of .

[0064] The B position is a metal cation, including Pb 2+ 、Sn 2+ At least one of .

[0065] The X position is a halogen anion, including F - 、Cl - Br - , I - At least one of .

[0066] The passivation layer 21 on the perovskite absorption layer 2 can reduce the surface activity of the perovskite absorption layer 2, reduce the surface carrier recombination efficiency, and thus improve the photoelectric conversion efficiency of the device; specifically, the passivation layer 21 is composed of at least one of propylenediamine iodide, propylenediamine bromide (PDADBr), butylammonium chloride (BACl), butylammonium bromide (BABr), butylammonium iodide (BAI), N,N-dimethyl-1,3-propylenediamine hydrochloride (DMePDADCl), dodecadiamine bromide (DDDADBr), magnesium fluoride, lithium fluoride (LiF), and sodium fluoride (NaF).

[0067] The electron transport layer 22 can effectively transport electrons and block holes. Specifically, the electron transport layer is made of zinc oxide (ZnO), tin dioxide (SnO2), titanium dioxide (TiO2), [6,6]-phenyl C61 butyric acid methyl ester (PC 61 BM), carbon 60 (C 60 ), 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP).

[0068] The buffer layer 23 can effectively improve problems such as band mismatch between interfaces, carrier recombination and chemical reactions, thereby improving the charge separation and collection efficiency in the perovskite battery, and effectively improving interface and stability problems. Specifically, the buffer layer 23 is composed of at least one of zinc oxide (ZnO), tin dioxide (SnO2), and titanium dioxide (TiO2).

[0069] The second conductive layer 24 is composed of a second conductive transparent layer 242 and a second metal electrode layer 241, which plays the role of conducting electrons and outputting current. Specifically, the second metal electrode layer 241 is composed of at least one of silver (Ag), gold (Au), copper (Cu), aluminum (Al), and carbon (C); the second conductive transparent layer 242 is composed of at least one of indium tin oxide (ITO), indium zinc oxide (IZO), and aluminum zinc oxide (AZO).

[0070] In this embodiment, the textured substrate 1 includes a textured crystalline silicon layer 11; a tunneling layer 12 and a hole transport layer 13 sequentially arranged on one surface of the textured crystalline silicon layer 11, and the perovskite absorption layer 2 is arranged on the hole transport layer 13; and a first conductive layer 10 arranged on the other surface of the textured crystalline silicon layer 11, and the first conductive layer 10 includes a first conductive transparent layer 102 and a first metal electrode layer 101 sequentially arranged on the surface of the textured crystalline silicon layer 11.

[0071] Specifically, the textured crystalline silicon layer 11 includes a textured silicon substrate 113; and a base passivation layer 112 and a P-type base doping layer 111 sequentially arranged on one surface of the textured silicon substrate 113, and the first conductive layer 10 is arranged on the P-type base doping layer 111; and a base surface passivation layer 114 and an N-type base doping layer 115 sequentially prepared on the other surface of the textured silicon substrate 113, and the tunneling layer 12 is arranged on the N-type base doping layer 115.

[0072] The tunneling layer 12 may be made of oxides such as silicon dioxide, and may generate a tunneling current at the contact position of the stacked battery to connect the two sub-batteries.

[0073] The hole transport layer 13 is made of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), poly-3-hexylthiophene (P3HT), nickel oxide (NiO x ), molybdenum oxide (MoO x ), cuprous iodide (CuI), and cuprous thiocyanate (CuSCN), can transport holes and block electron transmission.

[0074] In this embodiment, the hole transport layer 13, perovskite absorption layer 2, passivation layer 21, and electron transport layer 22 constitute a perovskite cell. The P-type base doping layer 111, base passivation layer 112, textured silicon substrate 113, base surface passivation layer 114, and N-type base doping layer 115 constitute a textured crystalline silicon layer 11. The textured crystalline silicon layer 11 is a crystalline silicon cell, specifically, a crystalline silicon cell formed of single crystal silicon, polycrystalline silicon, or amorphous silicon semiconductors. Connecting the two cells to form a series structure through a tunneling layer 12 can achieve excellent surface passivation and selective carrier collection, thereby improving device performance.

[0075] The present invention provides a stacked solar cell, comprising a velvet substrate 1, a perovskite absorption layer 2, a passivation layer 21, an electron transport layer 22, a buffer layer 23, and a second conductive layer 24. During the preparation of the perovskite absorption layer 2, a high-voltage annealing process is used to make the reaction of lead iodide more sufficient and efficient, reduce film defects, and have higher open-circuit voltage, photoelectric conversion efficiency, and device stability.

[0076] The following specific embodiments and comparative examples are provided to clearly and completely describe the technical solutions of the present invention. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention. Example

[0077] A stacked solar cell is provided, comprising a first metal electrode layer 101, a first conductive transparent layer 102, a P-type base doping layer 111, a base passivation layer 112, a textured silicon substrate 113, a base surface passivation layer 114, an N-type base doping layer 115, a tunneling layer 12, a hole transport layer 13, a perovskite absorption layer 2, a passivation layer 21, an electron transport layer 22, a buffer layer 23, a second conductive transparent layer 242, and a second metal electrode layer 241. The stacked solar cell is prepared by the following method, comprising the steps of:

[0078] Step 1: providing a textured silicon substrate 113, sequentially preparing a base passivation layer 112 and a P-type base doping layer 111 on the back side of the textured silicon substrate 113, and sequentially preparing a base surface passivation layer 114 and an N-type base doping layer 115 on the other side.

[0079] Step 2: Using magnetron sputtering, an ITO target is set, the power is controlled to 60 W, the operation time is 1.5 hours, and the first conductive transparent layer 102 is formed on the P-type base doped layer 111.

[0080] Step 3: Using the evaporation method, place the substrate sample prepared in the previous step into the evaporation chamber and wait for the evaporation vacuum to reach 2×10 -4Pa, the evaporation voltage is adjusted to the evaporation temperature, the evaporation rate is controlled at 2.5 Å / s, and silver is evaporated to the first conductive transparent layer 102 to obtain the first metal electrode layer 101.

[0081] Step 4: Using magnetron sputtering, place the substrate sample prepared in the previous step on the mask and then place it in the magnetron sputtering equipment, control the power to 60W, run for 1 hour, and form a tunneling layer 12 on the N-type substrate doping layer 115. The tunneling layer 12 is silicon dioxide.

[0082] Step 5: Treat the substrate sample prepared in the previous step with UV-Ozone for 15 minutes, and use the spin coating method to prepare a hole transport layer dispersion. Weigh 0.05 mol NiOx powder and dissolve it in 1 ml ultrapure water, and ultrasonically vibrate for 20 minutes; evenly coat the hole transport layer dispersion on the surface of the tunneling layer 12, set the spin coating speed to 2000 rpm, the spin coating time to 40 seconds, and the solution volume to 100 ul; after the spin coating is completed, perform annealing operation at an annealing temperature of 450°C and an annealing time of 30 minutes to obtain a hole transport layer 13.

[0083] Step 6: Using a co-evaporation method, lead iodide and cesium bromide are evaporated on the surface of the hole transport layer 13 to form a lead iodide film L1. The evaporation rate of lead iodide is 8A / s, and the evaporation rate of cesium bromide is controlled at 0.8A / s. By controlling the evaporation rates of different materials, the ratio of lead iodide to cesium bromide is controlled at 10:1, the evaporation time is controlled at 1000s, and the thickness of the formed film is 440nm; using a co-evaporation method, formamidine iodide (FAI) and formamidine bromide (FABr) are evaporated on the surface of the lead iodide film L1 to form an ammonium salt film L2. The evaporation rate of formamidine iodide (FAI) is 4A / s. The evaporation rate of formamidine bromide (FABr) was controlled at 0.4 A / s, the total evaporation time was controlled at 1000 s, and the thickness of the formed film was 440 nm. The evaporation rates of formamidine iodide (FAI) and formamidine bromide (FABr) were maintained at a constant value throughout the coating process by controlling the rate ratio and the ratio of formamidine iodide (FAI) to formamidine bromide (FABr) at 10:1. After the evaporation was completed, the film was subjected to high-pressure annealing treatment at an annealing temperature of 150°C, an annealing time of 30 min, and a pressure of 120 kPa to obtain the perovskite absorption layer 2.

[0084] Step 7: Using the evaporation method, weigh 3 mg of propylene diamine iodide and place it in a crucible. Place the substrate sample prepared in the previous step on the mask and place it in the evaporation chamber. Wait until the evaporation vacuum reaches 2×10 -4Pa, the evaporation voltage is adjusted to the evaporation temperature, the evaporation rate is controlled at 0.1Å / S, and propylene diamine iodide is evaporated onto the perovskite absorption layer 2. After the annealing table temperature is set to 100°C, and an annealing operation is performed for 8 minutes to obtain the passivation layer 21.

[0085] Step 8: Using the evaporation method, place the substrate sample prepared in the previous step on the mask and put it into the evaporation chamber until the evaporation vacuum degree reaches 1×10 -4 Pa, the evaporation voltage is adjusted to the evaporation temperature, the evaporation rate is controlled at 0.1-0.15Å / S, and C60 is evaporated onto the passivation layer 21 to obtain the electron transport layer 22.

[0086] Step 9: Using atomic layer deposition, set the vacuum degree of the atomic layer deposition equipment to 0.5×10 4 Pa, the deposition pipeline temperature is 60° C., the deposition chamber temperature is 70° C., SnO 2 is evaporated onto the electron transport layer 22 to obtain the buffer layer 23 .

[0087] Step 10: Using magnetron sputtering, setting an IZO target, controlling the power to 50 W, and running for 1 hour, a second conductive transparent layer 242 is formed on the buffer layer 23 .

[0088] Step 11: Using the evaporation method, place the substrate sample prepared in the previous step into the evaporation chamber and wait for the evaporation vacuum to reach 2×10 -4 Pa, the evaporation voltage is adjusted to the evaporation temperature, the evaporation rate is controlled at 2.5 Å / S, silver is evaporated to the second conductive transparent layer 242 to obtain the second metal electrode layer 241, and finally a stacked solar cell is obtained. Example

[0089] A stacked solar cell is provided, which has the same device structure as that of Example 1, but the difference in the preparation method from that of Example 1 is that the pressure of the high-pressure annealing treatment in step six is ​​150 kPa. Example

[0090] A stacked solar cell is provided, which has the same device structure as that of Example 1, but the difference in the preparation method from that of Example 1 is that the pressure of the high-pressure annealing treatment in step six is ​​180 kPa. Example

[0091] A stacked solar cell is provided, which has the same device structure as Example 1, but the difference in preparation method from Example 1 is that high pressure conditions are not applied during annealing in step six, that is, annealing is performed under normal pressure conditions.

[0092] A solar simulator was used to perform a standard solar intensity calibration and a solar light intensity calibration was performed on an area of ​​1.0 cm2 The device obtained in the above embodiment was subjected to IV testing, with the starting voltage set to 1.95V, the cut-off voltage set to 0V, the range set to 100 mA, and the result rounded to two decimal places. The test results are shown in the following table:

[0093] Device photoelectric conversion efficiency (%) Open circuit voltage (v) Short circuit current density (mA / cm 2 ) Decay rate / stability (% / year) Example 1 31.58 2.30 21.54 0.62 Example 2 33.88 2.31 21.83 0.41 Example 3 30.54 2.29 21.36 0.88 Example 4 26.40 2.06 18.46 5.12

[0094] From the test data of Examples 1 to 4, we can see that applying high pressure conditions during annealing of the co-evaporated lead iodide film and the ammonium salt film affects the performance and stability of the resulting stacked solar cell device. Examples 1 to 3 use a high pressure environment for film annealing, which results in a more thorough lead iodide reaction, reduced internal defects, and higher film uniformity and stability. The resulting devices have better photoelectric conversion efficiency, open-circuit voltage, and short-circuit density than those prepared by conventional methods, and the annealing effect is even better when performed at 150 kPa. In contrast, in Example 4, no high pressure conditions were applied during annealing. Due to the low diffusion efficiency of the two co-evaporated films, the reaction was not sufficient, which increased the generation of internal defects. The resulting device has a lower photoelectric conversion efficiency, a device attenuation rate of 5.12% / year, and poor stability.

[0095] The above embodiments are only preferred implementation modes of the present invention. It should be pointed out that for ordinary technicians in this technical field, various changes, modifications, replacements and deformations can be made to these embodiments without departing from the principles of the present invention. These technical solutions that are equivalent to the claims of the present invention all fall within the scope of protection of the present invention, and the scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A method for preparing a perovskite film by high pressure annealing, characterized in that: Includes steps: A suede substrate is provided, lead iodide and cesium bromide are co-evaporated on the suede substrate to form a lead iodide film, an ammonium salt solution is prepared, formamidine iodide and formamidine bromide are co-evaporated on the lead iodide film to form an ammonium salt film, and the obtained structure is subjected to high-pressure annealing treatment, wherein the high-pressure annealing treatment temperature is 0-200°C, the annealing time is 0-60 min, and the annealing pressure is 100-180 kPa, to obtain a perovskite absorption layer.

2. The method for preparing a perovskite thin film by high pressure annealing according to claim 1, characterized in that: The evaporation rate of lead iodide is controlled at 0-10A / s, the evaporation rate of cesium bromide is controlled at 0-10A / s, the total evaporation time is controlled between 0-10000s, and the thickness of the formed film is 200-800nm.

3. The method for preparing a perovskite thin film by high pressure annealing according to claim 2, characterized in that: By controlling the evaporation rates of different materials, the content ratio of lead iodide to cesium bromide is between 10:1 and 2:

1.

4. The method for preparing a perovskite thin film by high pressure annealing according to claim 1, characterized in that: The evaporation rate of the formamidine iodide is controlled at 0-10A / s, the evaporation rate of the formamidine bromide is controlled at 0-10A / s, the total evaporation time is controlled between 0-10000s, and the thickness of the formed film is 200-800nm.

5. The method for preparing a perovskite thin film by high pressure annealing according to claim 4, characterized in that: The evaporation rates of formamidine iodide and formamidine bromide are maintained at a constant value during the entire coating process by controlling the rate ratio, and controlling the ratio of formamidine iodide to formamidine bromide to be between 10:1 and 2:

1.

6. The method for preparing a perovskite thin film by high pressure annealing according to any one of claims 1 to 5, characterized in that: The preparation of the suede substrate comprises: A textured silicon substrate is provided, and a base passivation layer, a P-type base doping layer and a first conductive layer are sequentially prepared on one side of the textured silicon substrate, and a base surface passivation layer, an N-type base doping layer, a tunneling layer and a hole transport layer are sequentially prepared on the other side of the textured silicon substrate to obtain the textured substrate, wherein the perovskite absorption layer is formed on the hole transport layer.

7. The method for preparing a perovskite thin film by high pressure annealing according to claim 1, characterized in that: The method for preparing a perovskite film by high-voltage annealing also includes sequentially forming a passivation layer, an electron transport layer, a buffer layer and a second conductive layer on the surface of the perovskite absorption layer.

8. A laminated solar cell, prepared by the method for preparing a perovskite thin film by high pressure annealing according to any one of claims 1 to 7, characterized in that: The invention comprises a suede substrate; and a perovskite absorption layer, a passivation layer, an electron transport layer, a buffer layer and a second conductive layer which are sequentially arranged on the surface of the suede substrate.

9. The tandem solar cell according to claim 8, characterized in that: The textured substrate comprises a textured crystalline silicon layer; a tunneling layer and a hole transport layer sequentially arranged on one surface of the textured crystalline silicon layer, the perovskite absorption layer being arranged on the hole transport layer; and a first conductive layer arranged on the other surface of the textured crystalline silicon layer.

10. The tandem solar cell according to claim 9, characterized in that: The textured crystalline silicon layer comprises a textured silicon substrate; and a base passivation layer and a P-type base doping layer sequentially arranged on a surface of the textured silicon substrate, wherein the first conductive layer is arranged on the P-type base doping layer; A substrate surface passivation layer and an N-type substrate doping layer are sequentially prepared on the other surface of the textured silicon substrate, and the tunneling layer is arranged on the N-type substrate doping layer.

Citation Information

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