Surface light-emitting element, distance measuring device, and method for manufacturing surface light-emitting element

Abstract

Provided is a surface light-emitting element capable of suppressing a decrease in light emission efficiency even when the diameter of a laminated structure is small.　A surface light-emitting element according to the present technology comprises a light-emitting element part including a laminated structure in which a plurality of layers including at least semiconductor layers are laminated. The light-emitting element part further includes a separate semiconductor layer that covers a side surface of the laminated structure, the separate semiconductor layer having a band gap larger than a minimum band gap among the band gaps of the semiconductor layers of the plurality of layers. The surface light-emitting element according to the present technology can provide a surface light-emitting element capable of suppressing a decrease in light emission efficiency even when the diameter of a laminated structure is small.

Description

Surface light emitting device, distance measuring device, and method of manufacturing the surface light emitting device

[0001] The technology according to the present disclosure (hereinafter also referred to as "the technology") relates to a surface light emitting element, a distance measuring device, and a method for manufacturing the surface light emitting element.

[0002] 2. Description of the Related Art Conventionally, surface-emitting devices capable of obtaining surface-emitting output, such as surface-emitting lasers, have been known.

[0003] Among conventional surface light emitting devices, there is one that has a laminated structure in which a plurality of layers including semiconductor layers are laminated on a substrate (see, for example, Patent Document 1).

[0004] Japanese Patent Application Laid-Open No. 2014-138096

[0005] However, in conventional surface light emitting devices, it is difficult to prevent a decrease in luminous efficiency when the diameter of the laminated structure is small.

[0006] Therefore, a main object of the present technology is to provide a surface light emitting device that can suppress a decrease in luminous efficiency even if the diameter of the laminated structure is small.

[0007] The present technology provides a surface-emitting device including a light-emitting element section including a laminated structure in which a plurality of layers including at least a semiconductor layer are stacked, the light-emitting element section further including another semiconductor layer covering a side surface of the laminated structure, the another semiconductor layer having a band gap larger than the smallest band gap among the plurality of semiconductor layers. The laminated structure may include a light-emitting layer as the layer, and the another semiconductor layer may cover at least a side surface of the light-emitting layer. The another semiconductor layer may cover the entire periphery of the side surface. The another semiconductor layer may include GaAs, AlSb, AlGaAs, GaP, ZnSe, ZnO, ZnS, or (AlIn)GaN. The light-emitting element section may further include a substrate stacked with the laminated structure, and the surface orientation of the substrate may be (111). The light-emitting element section may further include a substrate stacked with the laminated structure, and the substrate may include any of Si, Ge, GaAs, InP, and GaN. The light-emitting element component may further include a substrate laminated with the laminate structure, the laminate structure being provided on the substrate via an insulating layer having an opening, with a portion of the laminate structure located within the opening. The other semiconductor layer may be located on the insulating layer. The laminate structure may have an oxide constriction layer as the layer. The laminate structure may include a multilayer film reflector as the layer, and the multilayer film reflector may include an oxide constriction layer in which a non-oxidized region as the semiconductor layer is surrounded by an oxidized region. A side surface of the oxide constriction layer may be exposed to an outer surface of the other semiconductor layer. The light-emitting element component may include a substrate laminated with the laminate structure, the substrate being any of a germanium-on-insulator (GOI) substrate, an SOI (silicon-on-insulator) substrate, and a substrate in which a semiconductor layer is laminated on an insulating substrate or a semi-insulating substrate. The light-emitting element component may further include a substrate laminated with the laminate structure and a reflector provided between the laminate structure and the substrate or within the substrate. The light emitting element may further include a substrate laminated with the laminated structure, and a reflector provided on the side of the laminated structure opposite to the substrate. The laminated structure may have a mesa, and the diameter of the mesa may be 10 μm or less.The laminated structure has a mesa, and the mesa is polygonal in plan view. The difference between the minimum bandgap and the bandgap of the other semiconductor layer may be 0.1 eV or more. The present technology also provides a distance measuring device comprising: a surface light emitting device having a light emitting element portion including a laminated structure in which a plurality of layers including at least a semiconductor layer are laminated; the light emitting element portion further including another semiconductor layer covering a side surface of the laminated structure, the other semiconductor layer having a bandgap larger than the smallest bandgap of the plurality of semiconductor layers; and a light receiving element, wherein the laminated structure and the light receiving element are provided on the same substrate. The present technology also provides a method for manufacturing a surface light emitting element, the method including: forming a laminated structure on a substrate in which a plurality of layers including at least a semiconductor layer are laminated; and forming another semiconductor layer, the other semiconductor layer having a bandgap larger than the smallest bandgap of the semiconductor layers of the plurality of layers, so as to cover the side surface of the laminated structure. The forming step includes at least one selective growth. The forming step may include growing the other semiconductor layer radially outward from the side surface of the laminated structure.

[0008] 16 is a cross-sectional view of a surface light-emitting device according to Example 1 of an embodiment of the present technology. FIG. 17 is a plan view of a surface light-emitting device according to Example 1 of an embodiment of the present technology. FIG. 18 is a flowchart for describing an example of a manufacturing method of the surface light-emitting device of FIG. 1. FIGS. 4A and 4B are cross-sectional views of each process of an example of a manufacturing method of the surface light-emitting device of FIG. 1. FIGS. 5A and 5B are cross-sectional views of each process of an example of a manufacturing method of the surface light-emitting device of FIG. 1. FIGS. 18 are cross-sectional views of each process of an example of a manufacturing method of the surface light-emitting device of FIG. 1. FIGS. 19 are cross-sectional views of each process of an example of a manufacturing method of the surface light-emitting device of FIG. 1. FIGS. 19 are cross-sectional views of each process of an example of a manufacturing method of the surface light-emitting device of FIG. 1. FIGS. 19 are cross-sectional views of a surface light-emitting device according to Example 2 of an embodiment of the present technology. FIG. 10 is a flowchart for describing an example of a manufacturing method of the surface light-emitting device of FIG. 10. FIGS. 19 are cross-sectional views of each process of the ... 24. A cross-sectional view of each step in an example of a method for manufacturing the surface light emitting device of FIG. 16 ... a surface light emitting device according to Example 4 of an embodiment of the present technology. A flowchart for describing an example of a method for manufacturing the surface light emitting device of FIG. 24. A cross-sectional view of each step in an example of a method for manufacturing the surface light emitting device of FIG. 24. A cross-sectional view of each step in an example of a method for manufacturing the surface light emitting device of FIG. 24. A cross-sectional view of each step in an example of a method for manufacturing the surface light emitting device of FIG. 24. A cross-sectional view of each step in an example of a method for manufacturing the surface light emitting device of FIG. 24. A cross-sectional view of each step in an example of a method for manufacturing the surface light emitting device of FIG. 24. A cross-sectional view of a surface light emitting device according to Example 5 of an embodiment of the present technology.FIG. 36 is a cross-sectional view of a surface light emitting device according to Example 6 of an embodiment of the present technology. FIG. 37 is a cross-sectional view of a surface light emitting device according to Example 7 of an embodiment of the present technology. FIG. 38 is a cross-sectional view of a surface light emitting device according to Example 8 of an embodiment of the present technology. FIG. 39 is a flowchart for describing an example of a method for manufacturing the surface light emitting device of FIG. 35. FIG. 39 is a cross-sectional view of each step of the example of a method for manufacturing the surface light emitting device of FIG. 35. FIG. 39 is a cross-sectional view of each step of the example of a method for manufacturing the surface light emitting device of FIG. 35. FIG. 39 is a cross-sectional view of each step of the example of a method for manufacturing the surface light emitting device of FIG. 35. FIG. 39 is a cross-sectional view of each step of the example of a method for manufacturing the surface light emitting device of FIG. 35. FIG. 39 is a cross-sectional view of each step of the example of a method for manufacturing the surface light emitting device of FIG. 35. FIG. 59 is a cross-sectional view of a surface light emitting device according to Example 17 of an embodiment of the present technology. FIG. 59 is a cross-sectional view of a distance measuring device including a surface light emitting device and a light receiving element according to Example 1 of an embodiment of the present technology. FIG. 59 is a cross-sectional view of a surface light emitting device array including a plurality of surface light emitting devices according to Example 1 of an embodiment of the present technology. FIG. 59 is a cross-sectional view of a surface light emitting device according to Modification 1 of Example 1 of an embodiment of the present technology. FIG. 59 is a cross-sectional view of a surface light emitting device according to Modification 2 of Example 1 of an embodiment of the present technology. FIG. 59 is a cross-sectional view of a surface light emitting device according to Modification 3 of Example 1 of an embodiment of the present technology. FIG. 59 is a cross-sectional view of a surface light emitting device according to Modification 4 of Example 1 of an embodiment of the present technology. FIG. 59 is a cross-sectional view of a surface light emitting device according to Modification 5 of Example 1 of an embodiment of the present technology. FIG. 59 is a cross-sectional view of each step of an example of a manufacturing method of the surface light emitting device of FIG. 58. FIG. 59 is a cross-sectional view of a surface light emitting device according to Modification 6 of Example 1 of an embodiment of the present technology. A diagram illustrating an example of an application of a surface light emitting device according to the present technology to a distance measuring device. FIG. 60 is a block diagram illustrating an example of a schematic configuration of a vehicle control system.FIG. 2 is an explanatory diagram showing an example of an installation position of a distance measurement device.

[0009] Preferred embodiments of the present technology will be described in detail below with reference to the accompanying drawings. Note that in this specification and the drawings, components having substantially the same functional configurations are denoted by the same reference numerals, and redundant description will be omitted. The embodiments described below illustrate typical embodiments of the present technology, and the scope of the present technology should not be interpreted narrowly. Even when it is described in this specification that a surface light emitting device, a distance measuring device, and a method for manufacturing a surface light emitting device according to the present technology have multiple effects, it is sufficient that the surface light emitting device, the distance measuring device, and the method for manufacturing a surface light emitting device according to the present technology have at least one effect. The effects described in this specification are merely examples and are not limiting, and other effects may also be present.

[0010] The description will be made in the following order: 0. Introduction 1. Surface-light-emitting device according to Example 1 of one embodiment of the present technology 2. Surface-light-emitting device according to Example 2 of one embodiment of the present technology 3. Surface-light-emitting device according to Example 3 of one embodiment of the present technology 4. Surface-light-emitting device according to Example 4 of one embodiment of the present technology 5. Surface-light-emitting device according to Example 5 of one embodiment of the present technology 6. Surface-light-emitting device according to Example 6 of one embodiment of the present technology 7. Surface-light-emitting device according to Example 7 of one embodiment of the present technology 8. Surface-light-emitting device according to Example 8 of one embodiment of the present technology 9. Surface-light-emitting device according to Example 9 of one embodiment of the present technology 10. Surface-light-emitting device according to Example 10 of one embodiment of the present technology 11. Surface-light-emitting device according to Example 11 of one embodiment of the present technology 12. Surface-light-emitting device according to Example 12 of one embodiment of the present technology 13. Surface-light-emitting device according to Example 13 of one embodiment of the present technology 14. Surface-light-emitting device according to Example 14 of one embodiment of the present technology 15. Surface-light-emitting device according to Example 15 of one embodiment of the present technology 16. Surface-light-emitting device according to Example 16 of one embodiment of the present technology 17. Surface light emitting device according to Example 17 of an embodiment of the present technology 18. Distance measuring device including a surface light emitting device and a light receiving element according to Example 1 of an embodiment of the present technology 19. Surface light emitting device array including a plurality of surface light emitting devices according to Example 1 of an embodiment of the present technology 20. Distance measuring device including a surface light emitting array having a plurality of surface light emitting devices and a light receiving element array according to Example 1 of an embodiment of the present technology 21. Modified example of the present technology 22. Application example to electronic device 23. Example of application of surface light emitting device to distance measuring device 24. Example of mounting a distance measuring device on a moving body

[0011] <0. Introduction> Among conventional surface-emitting devices (such as surface-emitting lasers), there are surface-emitting devices having a layered structure in which a plurality of layers including semiconductor layers are stacked on a substrate (see, for example, Patent Document 1).

[0012] In conventional surface-emitting devices, if the diameter of the laminated structure is small (for example, if the mesa diameter is 10 μm or less), carriers are lost due to carrier recombination on the side surfaces of the laminated structure due to the diffusion length, resulting in a decrease in luminous efficiency. This phenomenon is particularly likely to occur in materials with high electron mobility, such as As and P-based semiconductors.

[0013] Therefore, after extensive research, the inventors have succeeded in suppressing carrier recombination on the side surface of the laminated structure and suppressing a decrease in luminous efficiency by providing an appropriate band gap difference on the side surface of the laminated structure.

[0014] The inventors have developed a surface light emitting device according to the present technology as a surface light emitting device that embodies this technical idea. The surface light emitting device according to the present technology can suppress a decrease in luminous efficiency even if the diameter of the stacked structure is small.

[0015] Hereinafter, a surface light emitting device according to an embodiment of the present technology will be described in detail with reference to several examples. For convenience, the upper side in a cross-sectional view such as FIG. 1 will be referred to as "upper" and the lower side will be referred to as "lower."

[0016] <1. Surface light emitting device according to Example 1 of one embodiment of the present technology>

[0017] Hereinafter, a surface light emitting device 10 according to Example 1 of an embodiment of the present technology will be described. <Configuration of Surface Light Emitting Device> (Overall Configuration) Fig. 1 is a cross-sectional view of the surface light emitting device 10 according to Example 1 of an embodiment of the present technology. Fig. 2 is a plan view of the surface light emitting device 10 according to Example 1 of an embodiment of the present technology. Fig. 1 is a cross-sectional view taken along line 1-1 in Fig. 2.

[0018] The surface-emitting element 10 is, for example, a vertical-cavity surface-emitting laser (VCSEL). The surface-emitting element 10 is, for example, a surface-emitting VCSEL. The oscillation wavelength λ of the surface-emitting element 10 is, for example, in the SWIR band (short-wave infrared). The surface-emitting element 10 is driven by, for example, a driver (drive circuit). For example, the driver includes a power supply and a transistor (for example, a MOSFET: Metal-Oxide-Semiconductor Field-Effect Transistor) that controls the on / off of the power supply to the surface-emitting element 10.

[0019] 1 and 2, the surface light emitting device 10 includes a light emitting element portion LE including a stacked structure LS in which a plurality of constituent layers (layers) including at least a semiconductor layer are stacked. As an example, the light emitting element portion LE further includes another semiconductor layer 111 covering the side surface of the stacked structure LS. As an example, the light emitting element portion LE further includes a substrate 101 stacked with the stacked structure LS. Hereinafter, the direction (vertical direction) in which a plurality of constituent layers are stacked in the stacked structure LS will also be referred to as the "stacking direction."

[0020] The stacked structure LS is provided on the substrate 101 via an insulating mask 102, for example. The stacked structure LS is mesa-shaped, for example. The stacked structure LS is polygonal in plan view (e.g., hexagonal in plan view) (see FIG. 2). That is, here, the stacked structure LS is polygonal prism-shaped (e.g., regular hexagonal prism-shaped). The stacked structure LS is also called a "light-emitting mesa." For example, the diameter (average diameter) of the mesa is 10 μm or less.

[0021] In the laminated structure LS, for example, a buffer layer 103, a first reflecting mirror 104, a first cladding layer 105 (n-type semiconductor layer), a light-emitting layer 106, and a second cladding layer 107 (p-type semiconductor layer) are laminated in this order from the substrate 101 side (bottom side) as multiple (for example, five) constituent layers. The semiconductor layers included in each constituent layer of the laminated structure LS are made of, for example, a III-V group compound semiconductor (for example, a GaAs-based compound semiconductor: a compound semiconductor lattice-matched to GaAs).

[0022] A second reflecting mirror 108 is provided on the upper surface of the laminated structure LS (the surface opposite to the substrate 101 side, more specifically, the upper surface of the second cladding layer 107). A circumferential (for example, polygonal frame-shaped) anode electrode 109 (p-side electrode) is provided in the region around the second reflecting mirror 108 on the upper surface of the laminated structure LS.

[0023] A cathode electrode 110 (n-side electrode) is provided on the upper surface of the substrate 101 in the region surrounding the insulating mask 102 .

[0024] In the surface-emitting device 10, the light-emitting layer 106 has a double heterostructure in which it is sandwiched in the stacking direction between first and second clad layers 105 and 107 of different conductivity types, and holes and electrons can be radiatively recombined (radiatively recombined) in the light-emitting layer 106.

[0025] In the surface-emitting device 10, a resonator is configured including a light-emitting layer 106 and first and second reflecting mirrors 104, 108 that sandwich the light-emitting layer 106 in the stacking direction. The surface-emitting device 10 emits laser light to the side (upper side) of the second reflecting mirror 108 opposite to the substrate 101 side.

[0026] (Substrate) The substrate 101 is made of, for example, a Group IV element (e.g., Si or Ge). The surface orientation of the substrate 101 is, for example, (111). Note that the surface orientation of the substrate 101 is not limited to (111) and may be (100), (001), (311), etc., or may be an off-angle to (111), (100), (001), (311), etc.

[0027] The substrate 101 may be a drive substrate on which a driver is provided, or may be a wiring substrate on which wiring connected to the driver is provided.

[0028] The substrate 101 is, for example, an n-type. When the substrate 101 is a Si substrate, examples of the n-type dopant (n-type impurity) include As, Sb, and P. When the substrate 101 is a Ge substrate, examples of the n-type dopant (n-type impurity) include a Group V element (e.g., As, Sb, P, etc.).

[0029] (Insulator Mask) The insulator mask 102 is, for example, an insulating layer having an opening 102a. For example, the opening 102a is provided approximately in the center of the insulator mask 102. The insulator mask 102 is made of a dielectric material such as SiO, SiN, or SiON. For example, the shape of the opening 102a in a plan view is polygonal (for example, hexagonal) (see FIG. 2).

[0030] (Buffer layer)

[0031] The buffer layer 103 has a central portion 103a (part of the stacked structure LS) located within the opening 102a of the insulating mask 102 and in contact with the substrate 101, and a peripheral portion 103b located on the insulating mask 102 at the periphery of the opening 102a. The buffer layer 103 is, for example, made of a compound semiconductor (e.g., n-AlGaAs) having a lattice constant between that of the low-refractive index layer or high-refractive index layer (e.g., n-AlGaAs layer) of the first reflecting mirror 104, which is a constituent layer of the stacked structure LS other than the buffer layer 103, and that of the substrate 101 (a Si substrate or a Ge substrate). The lattice constant of the Si substrate is 5.431 Å, and the lattice constant of the Ge substrate is 5.658 Å. The lattice constant of AlGaAs is a value between that of GaAs (5.653 Å) and that of AlAs (5.661 Å). The lattice constant of AlGaAs increases as the Al composition increases.

[0032] (First Reflector) The first reflector 104 is, for example, a semiconductor multilayer reflector doped with n-type impurities, exhibiting low light absorption, high reflectivity, and electrical conductivity. Multilayer reflectors are also called distributed Bragg reflectors (DBRs). The first reflector 104 has a structure in which high-refractive index layers and low-refractive index layers with different refractive indices are alternately stacked with an optical thickness equal to one-quarter of the emission wavelength of the light-emitting layer 106. The low-refractive index layers are made of a compound semiconductor containing Al (e.g., AlGaAs). The high-refractive index layers are made of a compound semiconductor (e.g., AlGaAs, GaAs, etc.). The low-refractive index layers are high-Al composition layers with a higher Al composition than the high-refractive index layers. It is preferable that the refractive index difference (Al composition difference) between the high-refractive index layers and the low-refractive index layers be as large as possible. This is because high reflectivity can be obtained with a small number of pairs. The Al composition of the low refractive index layer is preferably 0.8 or more, and more preferably 0.85 or more. The Al composition of the high refractive index layer is preferably 0.2 or less, more preferably 0.15 or less, even more preferably 0.1 or less, and even more preferably 0.05 or less. Examples of n-type impurities (n-type dopants) in the first reflecting mirror 104 include Si, Se, and Ge. The reflectivity of the first reflecting mirror 104 is set slightly higher than that of the second reflecting mirror 108.

[0033] (First Cladding Layer) The first cladding layer 105 is made of, for example, an n-type compound semiconductor (for example, n-AlGaAs). The Al composition of the first cladding layer 105 is, for example, 0.3 to 0.5 (for example, 0.4). Examples of n-type impurities (n-type dopants) in n-AlGaAs include Si, Se, and Ge. The "cladding layer" is also called a "spacer layer."

[0034] (Light-Emitting Layer) The light-emitting layer 106 is made of, for example, a compound semiconductor having a band gap energy smaller than that of the first and second cladding layers 105 and 107. The light-emitting layer 106 is made of, for example, a GaAs-based compound semiconductor (e.g., GaAs, AlGaAs, GaInAs, GaInAsN, etc.). The light-emitting layer 106 may have any of a quantum well structure, a multiple quantum well structure, a quantum wire structure, and a quantum dot structure. The emission wavelength of the light-emitting layer 106 is set, for example, in the SWIR band. The light-emitting layer 106 is also called an "active layer." The light-emitting layer 106 is preferably disposed at or near the antinode of a standing wave generated in the resonator.

[0035] (Second Cladding Layer) The second cladding layer 107 is made of, for example, a p-type compound semiconductor (for example, p-AlGaAs). The Al composition of the second cladding layer 107 is, for example, 0.3 to 0.5 (for example, 0.4). Examples of p-type impurities in p-AlGaAs include Zn, Mg, Be, and C. The "cladding layer" is also called a "spacer layer."

[0036] (Second Reflecting Mirror) The second reflecting mirror 108 is, for example, a dielectric multilayer reflecting mirror that has low light absorption, high reflectivity, and insulating properties. Multilayer reflecting mirrors are also called distributed Bragg reflectors (DBRs). The second reflecting mirror 108 has a structure in which high-refractive index layers and low-refractive index layers, each having a different refractive index, are alternately stacked with an optical thickness equal to one-quarter of the emission wavelength of the light-emitting layer 106. The second reflecting mirror 108 is preferably made of a material containing at least one of SiO2, TiO2, Ta2O5, SiN, a-Si, MgF2, and CaF2. The dielectric multilayer reflecting mirror serving as the second reflecting mirror 108 may be made of, for example, SiO2 / TiO2, Ta2O5 / SiO2, or a-Si / Ta2O5. The second reflecting mirror 108 is set to have a reflectance slightly lower than that of the first reflecting mirror 104 .

[0037] (Anode Electrode) The anode electrode 109 may have a single-layer structure or a laminated structure. The anode electrode 109 is made of at least one metal (including alloys) selected from the group consisting of, for example, Au, Ag, Pd, Pt, Ni, Ti, V, W, Cr, Al, Cu, Zn, Sn, Ge, and In. When the anode electrode 109 has a laminated structure, it is made of materials such as Ti / Au, Ti / Al, Ti / Al / Au, Ti / Pt / Au, Ni / Au, Ni / Au / Pt, Ni / Pt, Pd / Pt, or Ag / Pd. The anode electrode 109 is electrically connected to the anode side of the driver.

[0038] (Cathode Electrode) The cathode electrode 110 may have a single-layer structure or a laminated structure. The cathode electrode 110 is made of at least one metal (including alloys) selected from the group consisting of, for example, Au, Ag, Pd, Pt, Ni, Ti, V, W, Cr, Al, Cu, Zn, Sn, Ge, and In. When the cathode electrode 110 has a laminated structure, it is made of materials such as Ti / Au, Ti / Al, Ti / Al / Au, Ti / Pt / Au, Ni / Au, Ni / Au / Pt, Ni / Pt, Pd / Pt, Ag / Pd, or the like. The cathode electrode 110 is electrically connected to the cathode side of the driver.

[0039] (Another Semiconductor Layer) The other semiconductor layer 111 is another semiconductor layer covering the side surface of the stacked structure LS as described above. The other semiconductor layer 111 is undoped (semi-insulating) or doped to have insulating properties. The other semiconductor layer 111 has a band gap larger than the smallest band gap among the multiple constituent layers of the stacked structure LS. In other words, there is a band gap difference such that the band gap on the outside of the side surface of the stacked structure LS is larger than the band gap on the inside. The difference between the smallest band gap and the band gap of the other semiconductor layer 111 is preferably 0.1 eV or more, more preferably 0.2 eV or more, more preferably 0.3 eV or more, more preferably 0.4 eV or more, and more preferably 0.5 eV or more.

[0040] Here, the band gap of the light emitting layer 106 is the smallest among the band gaps of the constituent layers of the stacked structure LS. Therefore, the band gap of the other semiconductor layer 111 is larger than the band gap of the light emitting layer 106. As an example, the other semiconductor layer 111 is Al x Ga 1-x As (0≦x≦1). x Ga 1-x As (0≦x≦1) is preferably undoped (semi-insulating) or doped to have insulating properties.

[0041] Al as another semiconductor layer 111 x Ga 1-x The band gap of As varies between 1.42 eV (GaAs) and 2.16 eV (AlAs) depending on the Al composition x. x Ga 1-x The band gap of As increases as the Al composition increases.

[0042] For example, when the light emitting layer 106 is made of GaAs, the other semiconductor layer 111 is made of Al x Ga 1-x As (0<x≦1) is preferred.

[0043] For example, the light-emitting layer 106 is In y Ga 1-y When it consists of As, Iny Ga 1-y The band gap of As varies between 0.32 eV (InAs) and 1.42 eV (GaAs) depending on the In composition y. x Ga 1-x As (0<x≦1) is preferred. y Ga 1-y The band gap of As increases as the In composition decreases.

[0044] For example, the light-emitting layer 106 is Al z Ga 1-z When it consists of As, Al z Ga 1-z The band gap of As varies between 1.42 eV (GaAs) and 2.16 eV (AlAs) depending on the Al composition z. x Ga 1-x It is preferable that z is As (0<z<x≦1).

[0045] More preferably, the other semiconductor layer 111 has a band gap larger than the average or median band gap of the multiple constituent layers of the stacked structure LS.

[0046] It is even more preferable that the other semiconductor layer 111 has a bandgap larger than the maximum bandgap of the multiple constituent layers of the stacked structure LS.

[0047] As an example, the other semiconductor layer 111 covers at least the side surface of the light emitting layer 106. Here, the other semiconductor layer 111 covers the side surfaces of the buffer layer 103, the first reflecting mirror 104, the first cladding layer 105, the light emitting layer 106, and the second cladding layer 107.

[0048] As an example, the other semiconductor layer 111 covers the entire periphery of the side surface of the stacked structure LS (see FIG. 2). The other semiconductor layer 111 has a polygonal frame shape (e.g., a hexagonal frame shape) in plan view that matches the polygonal (e.g., hexagonal) shape of the stacked structure LS in plan view. Note that the other semiconductor layer 111 may have discontinuous or interrupted portions in the circumferential direction of the stacked structure LS.

[0049] The other semiconductor layer 111 is located on the insulator mask 102. More specifically, one end surface (lower end surface) of the other semiconductor layer 111 is in contact with the insulator mask 102.

[0050] For example, when the substrate 101 is a wiring substrate, the surface light emitting device 10 can have the substrate 101 joined to the drive substrate by metal joining (for example, Cu--Cu joining) or bump joining.

[0051] <<Operation of Surface-Emitting Laser>> In the surface-emitting element 10, a current flows in from the anode side of the driver via the anode electrode 109, and is injected into the light-emitting layer 106 via the second cladding layer 107. At this time, the light-emitting layer 106 emits light, and the light travels back and forth between the first and second reflecting mirrors 104, 108 while being amplified by the light-emitting layer 106, and when oscillation conditions are satisfied, the light is emitted as laser light from the upper surface side of the second reflecting mirror 108. The current injected into the light-emitting layer 106 flows out to the cathode side of the driver via the first cladding layer 105, the first reflecting mirror 104, the buffer layer 103, the substrate 101, and the cathode electrode 110, in this order.

[0052] The surface light emitting device 10 has a small diameter (mesa diameter) of the laminated structure LS and is easily affected by the diffusion length during operation, but since another semiconductor layer 111 is provided on the side surface of the laminated structure LS, the loss of carriers due to carrier recombination on the side surface of the laminated structure LS is suppressed, thereby making it possible to suppress a decrease in light emission efficiency.

[0053] <<Example of a Method for Manufacturing a Surface Light Emitting Device>> An example of a method for manufacturing the surface light emitting device 10 will be described below with reference to the flowchart of Fig. 3. Here, as an example, a semiconductor manufacturing method using semiconductor manufacturing equipment is used to simultaneously produce a plurality of surface light emitting devices 10 on a single wafer that serves as the base material for the substrate 101. Next, the series of the plurality of surface light emitting devices 10 is separated by dicing (e.g., stealth dicing) to obtain a plurality of chip-shaped surface light emitting devices 10.

[0054] In the first step S1, a cathode electrode 110 is formed on a substrate 101 (see FIG. 4A). Specifically, the cathode electrode 110 is formed on an edge of the substrate 101 (a Si substrate or a Ge substrate) by, for example, a lift-off method. At this time, a film of the electrode material for the cathode electrode 110 is formed by a sputtering method or a vapor deposition method.

[0055] In the next step S2, an insulating mask 102 is formed (see FIG. 4B). Specifically, first, an insulating film (e.g., a SiO film) is formed on the entire surface to be used as the insulating mask 102. Next, an opening 102a is formed in the center of the insulating film by photolithography and etching.

[0056] In the next step S3, a buffer layer 103 is formed (see FIG. 5A ). Specifically, as an example, the buffer layer 103 is selectively grown on a substrate 101 (e.g., a Si substrate or a Ge substrate) via an insulator mask 102 by MOCVD (metal organic chemical vapor deposition). As a result, a central portion 103a of the buffer layer 103 is formed on the substrate 101, and a peripheral portion 103b is formed on the insulator mask 102. At this time, the buffer layer 103 grows to have a shape (e.g., a hexagon) in plan view that follows the shape (e.g., a hexagon) of the opening 102a of the insulator mask 102 in plan view.

[0057] In the next step S4, the first reflecting mirror 104 and the first cladding layer 105 are laminated (see FIG. 5B ). Specifically, as an example, a semiconductor multilayer reflecting mirror as the first reflecting mirror 104 and the first cladding layer 105 are epitaxially grown in this order on the buffer layer 103 by MOCVD (metal organic chemical vapor deposition).

[0058] In the next step S5, the light-emitting layer 106 and the second cladding layer 107 are laminated (see FIG. 6 ). Specifically, as an example, the light-emitting layer 106 and the second cladding layer 107 are regrown (epitaxially grown) in this order on the first cladding layer 105 by MOCVD (metal-organic chemical vapor deposition). As a result, a laminated structure LS is formed on the substrate 101 via the insulating mask 102.

[0059] In the next step S6, another semiconductor layer 111 is formed on the side surface of the stacked structure LS (see FIG. 7 ). Specifically, as an example, the another semiconductor layer 111 is epitaxially grown on the side surface of the stacked structure LS in a direction perpendicular to the side surface (horizontal direction) or in an oblique direction by MOCVD (metal organic chemical vapor deposition). At this time, the horizontal and vertical growth of the another semiconductor layer 111 is appropriately controlled by the substrate 101 having a (111) plane orientation and the film formation conditions. Because no film is deposited on the insulator mask 102, the another semiconductor layer 111 is formed substantially only on the side surface of the stacked structure LS, and the another semiconductor layer 111 can be formed as a good compound semiconductor crystal.

[0060] In the next step S7, the anode electrode 109 is formed (see FIG. 8). Specifically, the anode electrode 109 is formed in a circumferential shape (for example, a ring shape) on the laminated structure LS by, for example, a lift-off method. At this time, the electrode material of the anode electrode 109 is deposited by a sputtering method or a vapor deposition method.

[0061] In the final step S8, the second reflecting mirror 108 is formed (see FIG. 9). Specifically, first, a dielectric multilayer film, which will be the material for the second reflecting mirror 108, is deposited over the entire surface. Next, a resist pattern is formed by photolithography on the dielectric multilayer film that covers the central portion of the top surface of the stacked structure LS. Next, using the resist pattern as a mask, the dielectric multilayer film is etched by dry etching or wet etching. As a result, a dielectric multilayer film reflecting mirror is formed on the stacked structure LS as the second reflecting mirror 108, and the anode electrode 109 is exposed. The second reflecting mirror 108 can also be formed by, for example, lift-off.

[0062] The above steps S4 and S5 may be executed at the same time.

[0063] <Effects of the Surface Light Emitting Element and the Method for Manufacturing the Surface Light Emitting Element> The effects of the surface light emitting element 10 and the method for manufacturing the surface light emitting element 10 will be described below.

[0064] A surface-emitting device 10 according to one embodiment of the present technology comprises a light-emitting device portion LE including a stacked structure LS in which a plurality of constituent layers including at least a semiconductor layer are stacked, and the light-emitting device portion LE further includes another semiconductor layer 111 covering the side surface of the stacked structure LS and having a band gap larger than the smallest band gap among the semiconductor layers of the plurality of constituent layers.

[0065] In the surface light emitting device 10, even if the diameter of the laminated structure LS is small, the action of the separate semiconductor layer 111 suppresses carrier recombination on the side surface of the laminated structure LS, and thus suppresses carrier loss.

[0066] As a result, the surface light emitting device 10 can provide a surface light emitting device that can suppress a decrease in luminous efficiency even if the diameter of the stacked structure LS is small.

[0067] The stacked structure LS has the light emitting layer 106 as the constituent layer, and the separate semiconductor layer 111 covers at least the side surfaces of the light emitting layer 106. This makes it possible to effectively suppress carrier recombination on the side surfaces of the light emitting layer 106, which has a small band gap (for example, the smallest among the multiple constituent layers) and is prone to carrier recombination on the side surfaces if the separate semiconductor layer 111 is not provided.

[0068] The other semiconductor layer 111 covers the entire periphery of the side surface of the stacked structure LS, thereby making it possible to suppress the loss of carriers over the entire periphery of the side surface of the stacked structure LS, and therefore to sufficiently suppress the decrease in light emission efficiency.

[0069] Each constituent layer of the stacked structure LS is made of a semiconductor that is lattice-matched to GaAs, and another semiconductor layer 111 is made of Al x Ga 1-x As (0≦x≦1), whereby the stacked structure LS and the other semiconductor layer 111 are lattice-matched, and therefore the crystal quality of the other semiconductor layer 111 can be ensured.

[0070] The light-emitting element portion LE further includes a substrate 101 laminated with the laminated structure LS, and the surface orientation of the substrate 101 is (111). This makes it possible to appropriately control the horizontal and vertical growth of the separate semiconductor layer 111 by adjusting the film formation conditions.

[0071] The substrate 101 contains Si or Ge, which allows the substrate 101 to be used as, for example, a drive substrate or a wiring substrate.

[0072] The stacked structure LS is provided on the substrate 101 via an insulator mask 102 serving as an insulating layer having an opening 102 a, and a part of the stacked structure LS is located within the opening 102 a. This allows a part of the stacked structure LS to be selectively grown on the substrate 101.

[0073] Another semiconductor layer 111 is located on the insulator mask 102. This allows the another semiconductor layer 111 to be formed only on the side surfaces of the stacked structure LS.

[0074] The laminated structure LS includes a first reflecting mirror 104 disposed on one side (lower side) of the light-emitting layer 106, and the light-emitting element section LE further includes a second reflecting mirror 108 provided on the side of the laminated structure LS opposite to the substrate 101 side (upper side). This allows the light-emitting layer 106 and the first and second reflecting mirrors 104, 108 to form a resonator.

[0075] The laminated structure LS has a mesa, and the diameter of the mesa is 10 μm or less, which allows the surface light emitting device 10 to be miniaturized.

[0076] The difference between the smallest band gap among the semiconductor layers constituting the stacked structure LS and the band gap of the other semiconductor layer 111 is 0.1 eV or more, which makes it possible to effectively suppress carrier recombination on the side surfaces of the stacked structure LS.

[0077] The manufacturing method of the surface light emitting element 10 includes the steps of forming a laminated structure LS on a substrate 101, in which a plurality of constituent layers including at least a semiconductor layer are stacked, and forming another semiconductor layer 111 having a band gap larger than the smallest band gap among the semiconductor layers of the plurality of constituent layers, so as to cover the side surface of the laminated structure LS.

[0078] According to the method for manufacturing the surface light emitting device 10, it is possible to manufacture a surface light emitting device that can suppress a decrease in luminous efficiency even if the diameter of the stacked structure LS is small.

[0079] At least one (for example, one) selective growth is performed in the process of forming the stacked structure LS on the substrate 101. This allows an insulator (insulator mask 102) to be present on the substrate 101 below and in the vicinity of the side surface of the stacked structure LS, and makes it possible to form another semiconductor layer 111 only on the side surface of the stacked structure LS.

[0080] In the process of forming the stacked structure LS on the substrate 101, the separate semiconductor layer 111 is grown radially outward from the side surface of the stacked structure LS, thereby ensuring the crystal quality of the separate semiconductor layer 111.

[0081] <2. Surface light emitting device according to Example 2 of one embodiment of the present technology>

[0082] <Configuration of Surface Light Emitting Device> Hereinafter, a surface light emitting device 20 according to Example 2 of an embodiment of the present technology will be described. Fig. 10 is a cross-sectional view of the surface light emitting device 20 according to Example 2 of an embodiment of the present technology.

[0083] As shown in FIG. 10, the surface light emitting device 20 has a configuration generally similar to that of the surface light emitting device 10 according to the first embodiment, except that the stacked structure LS has an oxide constriction layer 112 as a constituent layer.

[0084] In the surface light emitting device 20, an oxide constriction layer 112 is provided across the second cladding layer 107 and another semiconductor layer 111. A contact layer 113 is provided between the oxide constriction layer 112 and the second reflecting mirror 108. A circumferential anode electrode 109 is provided in a region around the second reflecting mirror 108 on the upper surface of the contact layer 113. Here, another semiconductor layer 111 is provided on part of the side surface of the stacked structure LS (side surfaces of the buffer layer 103, first reflecting mirror 104, first cladding layer 105, light emitting layer 106, and second cladding layer 107).

[0085] The oxidized constriction layer 112 has a non-oxidized region 112a (e.g., AlGaAs, AlAs, etc.) and an oxidized region 112b (e.g., an oxide such as Al2O3) surrounding the non-oxidized region 112a. The oxidized region 112b has a higher resistance and a lower refractive index than the non-oxidized region 112a, and therefore the oxidized constriction layer 112 has a current and light confinement function.

[0086] The contact layer 113 is a highly doped layer (e.g., a p-GaAs layer) that has high carrier conductivity and is doped with a high concentration of p-type impurities (p-type dopants), such as Zn, Mg, Be, and C.

[0087] <<Example of a Method for Manufacturing a Surface Light Emitting Device>> An example of a method for manufacturing the surface light emitting device 20 will be described below with reference to the flowchart of Fig. 11 and the like. Here, as an example, a semiconductor manufacturing method using semiconductor manufacturing equipment is used to simultaneously produce a plurality of surface light emitting devices 20 on a single wafer that serves as the base material for the substrate 101. Next, the series of the plurality of surface light emitting devices 20 is separated by dicing (e.g., stealth dicing) to obtain a plurality of chip-shaped surface light emitting devices 20.

[0088] In the first step S11, the cathode electrode 110 is formed on the substrate 101 (see FIG. 4A). Specifically, the cathode electrode 110 is formed on the edge of the substrate 101 (Si substrate or Ge substrate) by, for example, a lift-off method. At this time, the electrode material for the cathode electrode 110 is deposited by a sputtering method or a vapor deposition method.

[0089] In the next step S12, an insulating mask 102 is formed (see FIG. 4B). Specifically, first, an insulating film (e.g., a SiO film) is formed on the entire surface to be used as the material for the insulating mask 102. Next, an opening 102a is formed in the center of the insulating film by photolithography and etching.

[0090] In the next step S13, a buffer layer 103 is formed (see FIG. 5A ). Specifically, as an example, the buffer layer 103 is selectively grown on a substrate 101 (e.g., a Si substrate or a Ge substrate) via an insulator mask 102 by MOCVD (metal organic chemical vapor deposition). As a result, a central portion 103a of the buffer layer 103 is formed on the substrate 101, and a peripheral portion 103b is formed on the insulator mask 102. At this time, the buffer layer 103 grows to have a shape (e.g., a hexagon) in plan view that follows the shape (e.g., a hexagon) of the opening 102a of the insulator mask 102 in plan view.

[0091] In the next step S14, the first reflecting mirror 104 and the first cladding layer 105 are laminated (see FIG. 5B ). Specifically, as an example, a semiconductor multilayer reflecting mirror as the first reflecting mirror 104 and the first cladding layer 105 are epitaxially grown in this order on the buffer layer 103 by MOCVD (metal organic chemical vapor deposition).

[0092] In the next step S15, the light-emitting layer 106 and the second cladding layer 107 are stacked (see FIG. 6 ). Specifically, as an example, the light-emitting layer 106 and the second cladding layer 107 are regrown (epitaxially grown) in this order on the first cladding layer 105 by MOCVD (metal-organic chemical vapor deposition).

[0093] In the next step S16, another semiconductor layer 111 is formed (see FIG. 7 ). Specifically, as an example, the another semiconductor layer 111 is epitaxially grown on the side surfaces of the buffer layer 103, the first reflecting mirror 104, the first cladding layer 105, the light-emitting layer 106, and the second cladding layer 107 by MOCVD (metal-organic chemical vapor deposition) in a direction perpendicular to the side surfaces (horizontal direction) or in an oblique direction. At this time, the horizontal and vertical growth of the another semiconductor layer 111 is appropriately controlled by the substrate 101 having a (111) plane orientation and the film formation conditions. Because no film is deposited on the insulator mask 102, the another semiconductor layer 111 is formed substantially only on the side surfaces of the stacked structure LS, and the another semiconductor layer 111 can be formed as a good compound semiconductor crystal.

[0094] In the next step S17, the oxidized layer 112S and the contact layer 113 are stacked (see FIG. 12). Specifically, the oxidized layer 112S and the contact layer 113, which are materials for the oxidized constriction layer 112, are regrown (epitaxially grown) on the second cladding layer 107.

[0095] In the next step S18, an oxidized constriction layer 112 is formed (see FIG. 13). Specifically, the oxidized layer 112S (see FIG. 12) is oxidized in a high-temperature water vapor atmosphere for a predetermined distance from the side to form the oxidized constriction layer 112. As a result, a stacked structure LS is formed on the substrate 101 via the insulating mask 102.

[0096] In the next step S19, the anode electrode 109 is formed (see FIG. 14). Specifically, the anode electrode 109 is formed in a circumferential shape (for example, a ring shape) on the laminated structure LS by, for example, a lift-off method. At this time, the electrode material of the anode electrode 109 is deposited by a sputtering method or a vapor deposition method.

[0097] In the final step S20, the second reflecting mirror 108 is formed (see FIG. 15 ). Specifically, first, a dielectric multilayer film, which will be the material for the second reflecting mirror 108, is deposited over the entire surface. Next, a resist pattern is formed by photolithography on the dielectric multilayer film, covering the central portion of the upper surface of the stacked structure LS (specifically, the upper surface of the contact layer 113). Next, using the resist pattern as a mask, the dielectric multilayer film is etched by dry etching or wet etching. As a result, a dielectric multilayer film reflecting mirror is formed on the stacked structure LS as the second reflecting mirror 108, and the anode electrode 109 is exposed. The second reflecting mirror 108 can also be formed by, for example, lift-off.

[0098] <Effects of Surface Light Emitting Device> According to the surface light emitting device 20, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to improve the light emitting efficiency due to the action of the oxidized constriction layer 112.

[0099] <3. Surface light emitting device according to Example 3 of one embodiment of the present technology>

[0100] <Configuration of Surface Light Emitting Device> Hereinafter, a surface light emitting device 30 according to Example 3 of an embodiment of the present technology will be described. Fig. 16 is a cross-sectional view of the surface light emitting device 30 according to Example 3 of an embodiment of the present technology.

[0101] As shown in Figure 16, the surface-emitting device 30 has a configuration similar to that of the surface-emitting device 10 of Example 1, except that the low refractive index layer 104b of the first reflecting mirror 104 as a multilayer film reflecting mirror is also an oxidized constriction layer in which a non-oxidized region 104b1 as a semiconductor layer is surrounded by an oxidized region 104b2.

[0102] The non-oxidized region 104b1 is made of a compound semiconductor such as AlGaAs or AlAs. The oxidized region 104b2 is made of an oxide such as Al2O3. The low refractive index layer 104b has a current and light confinement function because the oxidized region 104b2 has a higher resistance and a lower refractive index than the non-oxidized region 104b1. The Al composition of the non-oxidized region 104b1 is preferably 0.8 or more, more preferably 0.85 or more, even more preferably 0.9 or more, and even more preferably 0.95 or more.

[0103] Here, the first reflecting mirror 104 has a substantially high overall reflectivity because the difference in refractive index between the oxidized region 104b2 of the low refractive index layer 104b and the high refractive index layer 104a is greater than the difference in refractive index between the non-oxidized region 104b1 of the low refractive index layer 104b and the high refractive index layer 104a.

[0104] <<Example of a Method for Manufacturing a Surface Light Emitting Element>> Hereinafter, an example of a method for manufacturing the surface light emitting element 30 will be described with reference to the flowchart of Fig. 17 and the like. Here, as an example, a semiconductor manufacturing method using semiconductor manufacturing equipment is used to simultaneously produce a plurality of surface light emitting elements 30 on a single wafer that serves as the base material for the substrate 101. Next, the series of the plurality of surface light emitting elements 30 is separated by dicing (e.g., stealth dicing) to obtain a plurality of chip-shaped surface light emitting elements 30.

[0105] In the first step S31, the cathode electrode 110 is formed on the substrate 101 (see FIG. 4A). Specifically, the cathode electrode 110 is formed on the edge of the substrate 101 by, for example, a lift-off method. At this time, the film of the electrode material for the cathode electrode 110 is formed by a sputtering method or a vapor deposition method.

[0106] In the next step S32, the insulating mask 102 is formed (see FIG. 4B). Specifically, first, an insulating film (e.g., a SiO film) is formed on the entire surface to be used as the material for the insulating mask 102. Next, an opening 102a is formed in the center of the insulating film by photolithography and etching.

[0107] In the next step S33, a buffer layer 103 is formed (see FIG. 5A ). Specifically, as an example, the buffer layer 103 is selectively grown on a substrate 101 (e.g., a Si substrate or a Ge substrate) via an insulator mask 102 by MOCVD (metal organic chemical vapor deposition). As a result, a central portion 103a of the buffer layer 103 is formed on the substrate 101, and a peripheral portion 103b is formed on the insulator mask 102. At this time, the buffer layer 103 grows to have a planar shape (e.g., hexagonal) that follows the planar shape (e.g., hexagonal) of the opening 102a of the insulator mask 102.

[0108] In the next step S34, a semiconductor multilayer reflector DBR and a first cladding layer 105 are laminated (see FIG. 18). Specifically, as an example, the semiconductor multilayer reflector DBR, which is the material of the first reflector 104, and the first cladding layer 105 are epitaxially grown in this order on the buffer layer 103 by MOCVD (metal organic chemical vapor deposition).

[0109] In the next step S35, the peripheral portion of the low-refractive-index layer 104bS (see FIG. 18) of the semiconductor multilayer reflector DBR is oxidized (see FIG. 19). Specifically, in a high-temperature water vapor atmosphere, the low-refractive-index layer 104bS of the semiconductor multilayer reflector DBR, which is the material of the first reflector 104, is oxidized over a predetermined distance from the side surface. As a result, the first reflector 104 is formed in which low-refractive-index layers 104b, in which non-oxidized regions 104b1 are surrounded by oxidized regions 104b2, and high-refractive-index layers 104a are alternately stacked.

[0110] In the next step S36, the light-emitting layer 106 and the second cladding layer 107 are laminated (see FIG. 20 ). Specifically, as an example, the light-emitting layer 106 and the second cladding layer 107 are regrown (epitaxially grown) in this order on the first cladding layer 105 by MOCVD (metal-organic chemical vapor deposition). As a result, a laminated structure LS is formed on the substrate 101 via the insulating mask 102.

[0111] In the next step S37, another semiconductor layer 111 is formed on the side surface of the stacked structure LS (see FIG. 21 ). Specifically, as an example, the another semiconductor layer 111 is epitaxially grown on the side surface of the stacked structure LS in a direction perpendicular to the side surface (horizontal direction) or in an oblique direction by MOCVD (metal organic chemical vapor deposition). At this time, the horizontal and vertical growth of the another semiconductor layer 111 is appropriately controlled by the substrate 101 having a (111) plane orientation and the film formation conditions. Because no film is deposited on the insulator mask 102, the another semiconductor layer 111 is formed substantially only on the side surface of the stacked structure LS, and the another semiconductor layer 111 can be formed as a good compound semiconductor crystal.

[0112] In the next step S38, the anode electrode 109 is formed (see FIG. 22). Specifically, the anode electrode 109 is formed in a circumferential shape (for example, a ring shape) on the laminated structure LS (more specifically, on the upper surface of the second cladding layer 107) by, for example, a lift-off method. The electrode material of the anode electrode 109 is deposited by sputtering or vapor deposition.

[0113] In the final step S39, the second reflecting mirror 108 is formed (see FIG. 23 ). Specifically, first, a dielectric multilayer film, which will be the material for the second reflecting mirror 108, is deposited over the entire surface. Next, a resist pattern is formed on the dielectric multilayer film, covering the central portion of the upper surface of the stacked structure LS (specifically, the upper surface of the second cladding layer 107), by photolithography. Next, using the resist pattern as a mask, the dielectric multilayer film is etched by dry etching or wet etching. As a result, a dielectric multilayer film reflecting mirror is formed on the stacked structure LS as the second reflecting mirror 108, and the anode electrode 109 is exposed. The second reflecting mirror 108 can also be formed by, for example, lift-off.

[0114] The order of steps S35 and S36 may be reversed.

[0115] <Effects of the surface-emitting device> According to the surface-emitting device 30, it is possible to obtain the same effects as the surface-emitting device 10 of Example 1, and further improve efficiency because the reflectivity of the first reflecting mirror 104 is high and the first reflecting mirror 104 has a low refractive index layer 104b that also functions as an oxidation constriction layer.

[0116] <4. Surface light emitting device according to Example 4 of one embodiment of the present technology>

[0117] <Configuration of Surface Light Emitting Device> Hereinafter, a surface light emitting device 40 according to Example 4 of an embodiment of the present technology will be described. Fig. 24 is a cross-sectional view of the surface light emitting device 40 according to Example 4 of an embodiment of the present technology.

[0118] As shown in Figure 24, the surface-emitting device 40 has a configuration similar to that of the surface-emitting device 30 of Example 3, except that the side surface of the low-refractive index layer 104b, which is also an oxidized constriction layer, is exposed to the outer surface (outer surface) of another semiconductor layer 111.

[0119] <<Example of a Method for Manufacturing a Surface Light Emitting Element>> An example of a method for manufacturing the surface light emitting element 40 will be described below with reference to the flowchart of Fig. 25 and the like. Here, as an example, a semiconductor manufacturing method using semiconductor manufacturing equipment is used to simultaneously produce a plurality of surface light emitting elements 40 on a single wafer that serves as the base material for the substrate 101. Next, the series of the plurality of surface light emitting elements 40 is separated by dicing (e.g., stealth dicing) to obtain a plurality of chip-shaped surface light emitting elements 40.

[0120] In the first step S41, the cathode electrode 110 is formed on the substrate 101 (see FIG. 4A). Specifically, the cathode electrode 110 is formed on the edge of the substrate 101 by, for example, a lift-off method. At this time, the electrode material for the cathode electrode 110 is deposited by a sputtering method or a vapor deposition method.

[0121] In the next step S42, the insulating mask 102 is formed (see FIG. 4B). Specifically, first, an insulating film (e.g., a SiO film) is formed on the entire surface to be used as the material for the insulating mask 102. Next, an opening 102a is formed in the center of the insulating film by photolithography and etching.

[0122] In the next step S43, a buffer layer 103 is formed (see FIG. 5A ). Specifically, as an example, the buffer layer 103 is selectively grown on a substrate 101 (e.g., a Si substrate or a Ge substrate) via an insulator mask 102 by MOCVD (metal organic chemical vapor deposition). As a result, a central portion 103a of the buffer layer 103 is formed on the substrate 101, and a peripheral portion 103b is formed on the insulator mask 102. At this time, the buffer layer 103 grows to have a planar shape (e.g., hexagonal) that follows the planar shape (e.g., hexagonal) of the opening 102a of the insulator mask 102.

[0123] In the next step S44, the semiconductor multilayer reflector DBR and the first cladding layer 105 are laminated (see FIG. 26 ). Specifically, as an example, the semiconductor multilayer reflector DBR and the first cladding layer 105, which are materials for the first reflector 104, are epitaxially grown in this order on the buffer layer 103 by MOCVD (metal-organic chemical vapor deposition). At this time, the growth conditions for the semiconductor multilayer reflector DBR are adjusted so that the low-refractive-index layer 104bS of the semiconductor multilayer reflector DBR is formed to be slightly larger than the high-refractive-index layer 104a. As a result, the outer peripheral edge of the low-refractive-index layer 104bS of the semiconductor multilayer reflector DBR protrudes outward.

[0124] In the next step S45, the light-emitting layer 106 and the second cladding layer 107 are laminated (see FIG. 27 ). Specifically, as an example, the light-emitting layer 106 and the second cladding layer 107 are regrown (epitaxially grown) in this order on the first cladding layer 105 by MOCVD (metal-organic chemical vapor deposition). As a result, a laminated structure LS is formed on the substrate 101 via the insulating mask 102.

[0125] In the next step S46, another semiconductor layer 111 is formed on the side surface of the stacked structure LS (see FIG. 28). Specifically, as an example, the another semiconductor layer 111 is epitaxially grown on the side surface of the stacked structure LS in a direction perpendicular (horizontal) or oblique to the side surface by MOCVD (metal-organic chemical vapor deposition). The horizontal and vertical growth of the another semiconductor layer 111 is appropriately controlled by the substrate 101 having a (111) plane orientation and the film formation conditions. Here, the film thickness of the another semiconductor layer 111 is set to be equal to the amount of protrusion of the outer peripheral edge of the low-refractive-index layer 104bS. Because no film is deposited on the insulator mask 102, the another semiconductor layer 111 is formed substantially only on the side surface of the stacked structure LS, allowing the another semiconductor layer 111 to be formed as a good compound semiconductor crystal.

[0126] In the next step S47, the peripheral portion of the low-refractive-index layer 104bS of the semiconductor multilayer reflector DBR is oxidized (see FIG. 29). Specifically, in a high-temperature water vapor atmosphere, the low-refractive-index layer 104bS of the semiconductor multilayer reflector DBR, which is the material of the first reflector 104, is oxidized over a predetermined distance from the side surface. As a result, the first reflector 104 is formed in which the low-refractive-index layer 104b, in which the non-oxidized region 104b1 is surrounded by the oxidized region 104b2, and the high-refractive-index layer 104a are alternately stacked.

[0127] In the next step S48, the anode electrode 109 is formed (see FIG. 30 ). Specifically, the anode electrode 109 is formed in a circumferential shape (for example, a ring shape) on the laminated structure LS (more specifically, on the upper surface of the second cladding layer 107) by, for example, a lift-off method. The electrode material for the anode electrode 109 is deposited by sputtering or vapor deposition.

[0128] In the final step S49, the second reflecting mirror 108 is formed (see FIG. 31 ). Specifically, first, a dielectric multilayer film, which will be the material for the second reflecting mirror 108, is deposited over the entire surface. Next, a resist pattern is formed by photolithography on the dielectric multilayer film, which covers the central portion of the upper surface of the stacked structure LS (specifically, the upper surface of the second cladding layer 107). Next, using the resist pattern as a mask, the dielectric multilayer film is etched by dry etching or wet etching. As a result, a dielectric multilayer film reflecting mirror is formed as the second reflecting mirror 108 in the central portion of the upper surface of the stacked structure LS, and the anode electrode 109 is exposed. The second reflecting mirror 108 can also be formed by, for example, lift-off.

[0129] <<An example of a method for manufacturing a surface-emitting device>> According to the surface-emitting device 40, it is possible to obtain the same effect as the surface-emitting device 30 of Example 3, and since regrowth after the oxidation process is not required, crystal defects can be suppressed.

[0130] <5. Surface light emitting device according to Example 5 of an embodiment of the present technology>

[0131] Hereinafter, a surface light emitting device 50 according to Example 5 of an embodiment of the present technology will be described. Fig. 32 is a cross-sectional view of a surface light emitting device 50 according to Example 5 of an embodiment of the present technology.

[0132] As shown in FIG. 32 , the surface-emitting element 50 has the same configuration as the surface-emitting element 10 according to Example 1, except that the light-emitting element part LE includes a GOI (Germanium On Insulator) substrate as a substrate 101 laminated with the laminated structure LS.

[0133] In the surface light emitting device 50, the GOI substrate serving as the substrate 101 includes a lower Si substrate 101a, an upper Ge substrate 101c, and an intermediate insulating film 101b sandwiched between them. For example, the Si substrate 101a has a (100) plane orientation, and the Ge substrate 101c has a (111) plane orientation. The insulating film 101b is made of an insulator such as SiO, SiN, or SiON.

[0134] The surface light emitting device 50 can be manufactured by a method generally similar to the method for manufacturing the surface light emitting device 10 according to the first embodiment, except that a GOI substrate is used for the substrate 101 .

[0135] According to the surface light emitting device 50, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also possible to reduce interface defects.

[0136] <6. Surface light emitting device according to Example 6 of an embodiment of the present technology>

[0137] Hereinafter, a surface light emitting device 60 according to Example 6 of an embodiment of the present technology will be described. Fig. 33 is a cross-sectional view of a surface light emitting device 60 according to Example 6 of an embodiment of the present technology.

[0138] As shown in FIG. 33, the surface light emitting device 60 has a configuration generally similar to that of the surface light emitting device 50 according to the fifth embodiment, except that a first reflecting mirror 104 is provided in the substrate 101 .

[0139] In the surface light emitting device 60, a dielectric multilayer film reflector serving as a first reflector 104 is provided between the Si substrate 101a and the Ge substrate 101c of the substrate 101.

[0140] The surface-emitting device 60 can be manufactured by a method generally similar to that of the surface-emitting device 10 of Example 1, except that a Si substrate 101a and a Ge substrate 101c sandwiching a dielectric multilayer film reflector are used as the substrate 101.

[0141] The surface light emitting device 60 can obtain the same effects as the surface light emitting device 50 according to the fifth embodiment, and can also reduce interface defects and significantly reduce the film thickness of the GaAs-based compound semiconductor, which is not easily grown selectively. Furthermore, in the surface light emitting device 60, the insulator mask 102 is located inside the resonator, and therefore also functions as a current / light confinement region.

[0142] <7. Surface light emitting device according to Example 7 of one embodiment of the present technology>

[0143] Hereinafter, a surface light emitting device 70 according to Example 7 of an embodiment of the present technology will be described. Fig. 34 is a cross-sectional view of a surface light emitting device 70 according to Example 7 of an embodiment of the present technology.

[0144] As shown in FIG. 34, the surface light emitting device 70 has a configuration generally similar to that of the surface light emitting device 60 according to the sixth embodiment, except that the substrate 101 does not have a Si substrate 101a.

[0145] The surface-emitting device 70 can be manufactured by a method generally similar to that of the surface-emitting device 10 of Example 1, except that a Ge substrate 101c is used as the substrate 101 and a dielectric multilayer film reflector is formed as the first reflector 104 on the back surface (lower surface) of the Ge substrate 101c.

[0146] The surface-emitting device 70 can achieve the same effects as the surface-emitting device 10 according to the first embodiment, and can also significantly reduce the film thickness of the GaAs-based compound semiconductor, which is not easily grown selectively. The surface-emitting device 70 can also be configured as a back-emitting surface-emitting device that emits laser light to the back side (lower side) of the substrate 101 by making the reflectivity of the second reflecting mirror 108 slightly higher than that of the first reflecting mirror 104. In this case, the surface-emitting device 70 can also be bonded junction-down to a wiring substrate or a drive substrate. Furthermore, according to the surface-emitting device 70, the insulator mask 102 is located within the resonator, and therefore also functions as a current / light confinement region.

[0147] <8. Surface light emitting device according to Example 8 of one embodiment of the present technology>

[0148] Hereinafter, a surface light emitting device 80 according to Example 8 of an embodiment of the present technology will be described. Fig. 35 is a cross-sectional view of a surface light emitting device 80 according to Example 8 of an embodiment of the present technology.

[0149] As shown in FIG. 35, the surface light emitting device 80 has a configuration generally similar to that of the surface light emitting device 20 according to the second embodiment, except that another semiconductor layer 111 covers the entire side surface of the stacked structure LS.

[0150] In the surface-emitting device 80, in the stacked structure LS, the oxide constriction layer 112 and the contact layer 113, together with multiple other constituent layers (the buffer layer 103, the first reflector 104, the first cladding layer 105, the light-emitting layer 106, and the second cladding layer 107), form a mesa (e.g., a polygonal pillar-shaped mesa).

[0151] In the surface light emitting device 80, another semiconductor layer 111 is provided on the entire periphery of the side surface of the laminated structure LS and over the entire area in the lamination direction.

[0152] <<Example of a Method for Manufacturing a Surface Light Emitting Element>> Hereinafter, an example of a method for manufacturing a surface light emitting element 80 will be described with reference to the flowchart of Fig. 36 and the like. Here, as an example, a semiconductor manufacturing method using semiconductor manufacturing equipment is used to simultaneously produce a plurality of surface light emitting elements 80 on a single wafer that serves as the base material for the substrate 101. Next, the series of the plurality of surface light emitting elements 80 is separated by dicing (e.g., stealth dicing) to obtain a plurality of chip-shaped surface light emitting elements 80.

[0153] In the first step S51, the cathode electrode 110 is formed on the substrate 101 (see FIG. 4A). Specifically, the cathode electrode 110 is formed on the edge of the substrate 101 by, for example, a lift-off method. At this time, the electrode material for the cathode electrode 110 is deposited by a sputtering method or a vapor deposition method.

[0154] In the next step S52, the insulating mask 102 is formed (see FIG. 4B). Specifically, first, an insulating film (e.g., a SiO film) is formed on the entire surface to be used as the material for the insulating mask 102. Next, an opening 102a is formed in the center of the insulating film by photolithography and etching.

[0155] In the next step S53, a buffer layer 103 is formed (see FIG. 5A ). Specifically, as an example, the buffer layer 103 is selectively grown on a substrate 101 (e.g., a Si substrate or a Ge substrate) via an insulator mask 102 by MOCVD (metal organic chemical vapor deposition). As a result, a central portion 103a of the buffer layer 103 is formed on the substrate 101, and a peripheral portion 103b is formed on the insulator mask 102. At this time, the buffer layer 103 grows to have a planar shape (e.g., hexagonal) that follows the planar shape (e.g., hexagonal) of the opening 102a of the insulator mask 102.

[0156] In the next step S54, the first reflecting mirror 104 and the first cladding layer 105 are laminated (see FIG. 5B ). Specifically, as an example, a semiconductor multilayer reflecting mirror as the first reflecting mirror 104 and the first cladding layer 105 are epitaxially grown in this order on the buffer layer 103 by MOCVD (metal organic chemical vapor deposition).

[0157] In the next step S55, the light emitting layer 106 and the second cladding layer 107 are laminated (see FIG. 6). Specifically, as an example, the light emitting layer 106 and the second cladding layer 107 are regrown (epitaxially grown) in this order on the first cladding layer 105 by MOCVD (metal organic chemical vapor deposition).

[0158] In the next step S56, the oxidized layer 112S and the contact layer 113 are stacked (see FIG. 37). Specifically, the oxidized layer 112S and the contact layer 113, which are materials for the oxidized constriction layer 112, are regrown (epitaxially grown) on the second cladding layer 107.

[0159] In the next step S57, an oxidized constriction layer 112 is formed (see FIG. 38). Specifically, the oxidized layer 112S (see FIG. 37) is oxidized in a high-temperature water vapor atmosphere for a predetermined distance from the side to form the oxidized constriction layer 112. As a result, a stacked structure LS is formed on the substrate 101 via the insulating mask 102.

[0160] In the next step S58, another semiconductor layer 111 is formed on the side surfaces of the stacked structure LS (see FIG. 39 ). Specifically, as an example, the another semiconductor layer 111 is epitaxially grown on the side surfaces of the buffer layer 103, the first reflecting mirror 104, the first cladding layer 105, the light-emitting layer 106, the second cladding layer 107, the oxide constriction layer 112, and the contact layer 113 by MOCVD (metal-organic chemical vapor deposition) in a direction perpendicular to the side surfaces (horizontal direction) or in an oblique direction. At this time, the horizontal and vertical growth of the another semiconductor layer 111 is appropriately controlled by the substrate 101 having a (111) plane orientation and the film formation conditions. Because no film is deposited on the insulator mask 102, the another semiconductor layer 111 is formed substantially only on the side surfaces of the stacked structure LS, and the another semiconductor layer 111 can be formed as a good compound semiconductor crystal.

[0161] In the next step S59, the anode electrode 109 is formed (see FIG. 40 ). Specifically, the anode electrode 109 is formed in a circumferential shape (for example, a ring shape) on the stacked structure LS (more specifically, on the upper surface of the contact layer 113) by, for example, a lift-off method. At this time, the electrode material of the anode electrode 109 is deposited by a sputtering method or a vapor deposition method.

[0162] In the final step S60, the second reflecting mirror 108 is formed (see FIG. 41 ). Specifically, first, a dielectric multilayer film, which will be the material for the second reflecting mirror 108, is deposited over the entire surface. Next, a resist pattern is formed by photolithography on the dielectric multilayer film that covers the central portion of the upper surface of the stacked structure LS (specifically, the upper surface of the contact layer 113). Next, using the resist pattern as a mask, the dielectric multilayer film is etched by dry etching or wet etching. As a result, a dielectric multilayer film reflecting mirror is formed on the stacked structure LS as the second reflecting mirror 108, and the anode electrode 109 is exposed. The second reflecting mirror 108 can also be formed by, for example, lift-off.

[0163] <Effects of Surface Light Emitting Device> According to the surface light emitting device 80, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to improve the light emitting efficiency due to the action of the oxidized constriction layer 112.

[0164] 9. Surface light emitting device according to Example 9 of one embodiment of the present technology

[0165] Hereinafter, a surface light emitting device 90 according to Example 9 of an embodiment of the present technology will be described. Fig. 42 is a cross-sectional view of a surface light emitting device 90 according to Example 9 of an embodiment of the present technology.

[0166] As shown in FIG. 42, the surface light emitting device 90 has a configuration generally similar to that of the surface light emitting device 10 according to the first embodiment, except that the stacked structure LS includes a semiconductor multilayer film reflector as the second reflector 108.

[0167] In the surface-emitting device 90, a p-type GaAs-based semiconductor multilayer reflector (e.g., GaAs / AlAs, GaAs / AlGaAs, AlGaAs / AlGaAs, etc.) is used as the second reflector 108. The GaAs-based semiconductor multilayer reflector as the second reflector 108 forms a mesa (e.g., a polygonal pillar-shaped mesa) together with a plurality of other constituent layers (a buffer layer 103, a first reflector 104, a first cladding layer 105, a light-emitting layer 106, and a second cladding layer 107). A circumferential anode electrode 109 is provided on the second reflector 108.

[0168] Here, another semiconductor layer 111 is provided on the entire periphery of the side surface of the stacked structure LS and over the entire area in the stacking direction.

[0169] The surface-emitting device 90 can be manufactured by a method generally similar to that of the surface-emitting device 10 of Example 1, except that a semiconductor multilayer film reflector as the second reflector 108 is epitaxially grown on the second cladding layer 107, and another semiconductor layer 111 is also formed on the side surface of the second reflector 108.

[0170] According to the surface light emitting device 90, the same effects as those of the surface light emitting device 10 according to the first embodiment can be obtained.

[0171] <10. Surface light emitting device according to Example 10 of an embodiment of the present technology>

[0172] Hereinafter, a surface light emitting device 100 according to Example 10 of an embodiment of the present technology will be described. Fig. 43 is a cross-sectional view of a surface light emitting device 100 according to Example 10 of an embodiment of the present technology.

[0173] As shown in Figure 43, the surface-emitting device 100 has a configuration generally similar to that of the surface-emitting device 90 of Example 9, except that the low-refractive index layer 104b of the semiconductor multilayer film reflector serving as the first reflector 104 and the low-refractive index layer 108b of the semiconductor multilayer film reflector serving as the second reflector 108 are also oxide constriction layers.

[0174] In the first reflecting mirror 104, the low refractive index layer 104b is an oxidized constricting layer in which a non-oxidized region 104b1 is surrounded by an oxidized region 104b2. In the second reflecting mirror 108, the low refractive index layer 108b is an oxidized constricting layer in which a non-oxidized region 108b1 is surrounded by an oxidized region 108b2.

[0175] The Al composition of the non-oxidized region 104b1 and the non-oxidized region 108b1 is preferably 0.8 or more, more preferably 0.85 or more, even more preferably 0.9 or more, and still more preferably 0.95 or more.

[0176] A contact layer 113 is provided on the second reflecting mirror 108. A circumferential anode electrode 109 is provided on the contact layer 113. Note that although the case where the uppermost layer of the second reflecting mirror 108 is the low refractive index layer 108b has been described here as an example, if the uppermost layer of the second reflecting mirror 108 is the high refractive index layer 104a, for example, the contact layer 113 may not be provided.

[0177] The surface-emitting device 100 can be manufactured by a method generally similar to that of the surface-emitting device 90 of Example 9, except that the peripheral portion of the low refractive index layer of the semiconductor multilayer reflector that is the material for the first reflector 104 and the peripheral portion of the low refractive index layer of the semiconductor multilayer reflector that is the material for the second reflector 108 are oxidized.

[0178] According to the surface light emitting device 100, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to achieve even higher efficiency.

[0179] In the surface light emitting device 100, only the low refractive index layer of one of the first and second reflectors 104 and 108 may be an oxidized constriction layer.

[0180] <11. Surface light emitting device according to Example 11 of an embodiment of the present technology>

[0181] Hereinafter, a surface light emitting device 11 according to Example 11 of an embodiment of the present technology will be described. Fig. 44 is a cross-sectional view of a surface light emitting device 11 according to Example 11 of an embodiment of the present technology.

[0182] As shown in Figure 44, the surface-emitting device 11 has a configuration generally similar to that of the surface-emitting device 100 of Example 10, except that the side surface of the low refractive index layer 104b of the semiconductor multilayer film reflector serving as the first reflector 104 and the side surface of the low refractive index layer 108b of the semiconductor multilayer film reflector serving as the second reflector 108 are exposed to the outer surface (outer surface) of another semiconductor layer 111.

[0183] The surface light emitting device 11 can be manufactured by incorporating part of the manufacturing method of the surface light emitting device 40 according to the fourth embodiment into the manufacturing method of the surface light emitting device 100 according to the tenth embodiment.

[0184] According to the surface light emitting device 11, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to achieve even higher efficiency.

[0185] In the surface light emitting device 11 , only the side surface of the low refractive index layer of one of the first and second reflectors 104 and 108 may be exposed to the outer surface of the other semiconductor layer 111 .

[0186] <12. Surface light emitting device according to Example 12 of an embodiment of the present technology>

[0187] Hereinafter, a surface light emitting device 120 according to Example 12 of an embodiment of the present technology will be described. Fig. 45 is a cross-sectional view of a surface light emitting device 120 according to Example 12 of an embodiment of the present technology.

[0188] As shown in FIG. 45, the surface light emitting device 120 has a configuration generally similar to that of the surface light emitting device 90 according to the ninth embodiment, except that it has an oxide constriction layer 112 .

[0189] In the surface light emitting device 120 , an oxide constriction layer 112 is provided between the second cladding layer 107 and the second reflecting mirror 108 .

[0190] The surface-emitting device 120 can be manufactured by a method generally similar to that of the surface-emitting device 90 of Example 9, except that an oxidizable layer that will be the material for the oxidized constriction layer 112 and a semiconductor multilayer film reflector as the second reflector 108 are epitaxially grown in this order on the second cladding layer 107, and the peripheral portion of the oxidizable layer is oxidized.

[0191] According to the surface light emitting device 120, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to achieve high efficiency.

[0192] Instead of or in addition to the region between the second cladding layer 107 and the second reflecting mirror 108, the oxidized constriction layer 112 may be provided in at least one of the following regions: between the buffer layer 103 and the first reflecting mirror 104; within the first reflecting mirror 104; within the first cladding layer 105; between the first cladding layer 105 and the light-emitting layer 106; between the light-emitting layer 106 and the second cladding layer 107; within the second cladding layer 107; and within the second reflecting mirror 108.

[0193] <13. Surface light emitting device according to Example 13 of an embodiment of the present technology>

[0194] Hereinafter, a surface light emitting device 130 according to Example 13 of an embodiment of the present technology will be described. Fig. 46 is a cross-sectional view of a surface light emitting device 130 according to Example 13 of an embodiment of the present technology.

[0195] As shown in FIG. 46, the surface light emitting device 130 has a configuration generally similar to that of the surface light emitting device 10 according to the first embodiment, except that two pairs of insulating masks and buffer layers are stacked.

[0196] In the surface light emitting element 130, an insulator mask 102A and a portion of a buffer layer 103A are disposed on the buffer layer 103. The insulator mask 102A and the buffer layer 103A are also included in the stacked structure LS. The insulator mask 102A has a circular opening 102Aa that surrounds the opening 102a of the insulator mask 102 in a planar view. That is, the insulator mask 102A has a central portion that is the portion inside the opening 102Aa and a peripheral portion that is the portion outside the opening 102Aa.

[0197] The buffer layer 103A has a central portion 103a1 located on the central portion of the insulating mask 102A, an intermediate portion 103b1 around the central portion 103a1, the lower portion of which is located within the opening 102Aa, and an outer peripheral portion 103c1 around the intermediate portion 103b1, the outer peripheral portion 103c1 being located on the peripheral portion of the insulating mask 102A.

[0198] The surface-emitting device 130 can be manufactured by a method generally similar to that of the surface-emitting device 10 of Example 1, except that a multi-stage (e.g., two-stage) selective growth process is performed in which a series of steps of forming an insulator mask and selectively growing a buffer layer are performed multiple times (e.g., twice) in succession.

[0199] According to the surface-emitting device 130, it is possible to obtain the same effect as the surface-emitting device 10 of Example 1, and since the buffer layer 103A is formed on the portion of the buffer layer 103 above the insulator mask 102, which has good crystallinity, and on the insulator mask 102A, the crystallinity of the buffer layer 103A can be improved, and ultimately the occurrence of crystal defects in the entire stacked structure LS can be sufficiently suppressed.

[0200] <14. Surface light emitting device according to Example 14 of an embodiment of the present technology>

[0201] Hereinafter, a surface light emitting device 140 according to Example 14 of an embodiment of the present technology will be described. Fig. 47 is a cross-sectional view of a surface light emitting device 140 according to Example 14 of an embodiment of the present technology.

[0202] 47 , the surface light emitting device 140 has a configuration generally similar to that of the surface light emitting device 10 according to Example 1, except that an insulating mask 102 is provided on a buffer layer 103, and a semiconductor multilayer film reflector is provided as a first reflector 104 on the buffer layer 103 and the insulating mask 102. Here, the stacked structure LS does not include the buffer layer 103.

[0203] In the surface light emitting device 140, a lower portion 104p of the center of the semiconductor multilayer film reflector serving as the first reflector 104 is located within the opening 102a of the insulator mask 102 and is in contact with the buffer layer 103. Here, a cathode electrode 110 is provided on the periphery of the buffer layer 103. As a result, a lateral current path is formed within the buffer layer 103. Therefore, a semi-insulating substrate or an insulating substrate can also be used as the substrate 101.

[0204] The surface light emitting device 140 can be manufactured by a method generally similar to that of the surface light emitting device 10 according to the first embodiment, except that the insulating mask 102 and the buffer layer 103 are formed in the reverse order.

[0205] According to the surface light emitting device 140, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to reduce the series resistance since the current does not pass through the substrate 101.

[0206] <15. Surface light emitting device according to Example 15 of an embodiment of the present technology>

[0207] Hereinafter, a surface light emitting device 150 according to Example 15 of an embodiment of the present technology will be described. Fig. 48 is a cross-sectional view of a surface light emitting device 150 according to Example 15 of an embodiment of the present technology.

[0208] As shown in FIG. 48, the surface light emitting device 150 has a configuration generally similar to that of the surface light emitting device 10 of Example 1, except that a stacked structure LS and another semiconductor layer 111 are provided on the buffer layer 103.

[0209] In the surface light emitting device 150, the cathode electrode 110 is provided on the buffer layer 103 in a region around the other semiconductor layer 111. Therefore, a lateral current path is formed in the buffer layer 103.

[0210] The surface light emitting device 150 can be manufactured by a method generally similar to that of the surface light emitting device 10 of Example 1, except that a stacked structure LS and another semiconductor layer 111 are formed on the buffer layer 103.

[0211] According to the surface light emitting device 150, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to reduce the series resistance since the current does not pass through the substrate 101.

[0212] <16. Surface light emitting device according to Example 16 of an embodiment of the present technology>

[0213] Hereinafter, a surface light emitting device 160 according to Example 16 of an embodiment of the present technology will be described. Fig. 49 is a cross-sectional view of a surface light emitting device 160 according to Example 16 of an embodiment of the present technology.

[0214] As shown in Figure 49, the surface-emitting element 160 has a configuration generally similar to that of the surface-emitting element 10 of Example 1, except that an insulating mask 102 is provided on a semiconductor multilayer film reflector as a first reflector 104.

[0215] In the surface light emitting element 160, an intermediate layer 115 (e.g., an n-GaP layer) is disposed between the substrate 101 and the first reflecting mirror 104. Here, the stacked structure LS is composed of a first cladding layer 105, a light emitting layer 106, and a second cladding layer 107. A portion of the first cladding layer 105 is located within the opening 102a of the insulator mask 102 and is in contact with the first reflecting mirror 104. A cathode electrode 110 is provided on the first reflecting mirror 104 in the region surrounding the insulator mask 102. Therefore, a lateral current path is formed within the first reflecting mirror 104. Therefore, a semi-insulating substrate or an insulating substrate may be used as the substrate 101.

[0216] Furthermore, in the surface light emitting element 160, for example, GaP is used as the material for the intermediate layer 115, so when the substrate 101 is a Si substrate, the lattice constant is close to that of the Si substrate, and a relatively good film can be formed on the substrate 101. Since surface flatness is important for a reflecting mirror, the intermediate layer 115 made of GaP serves as an appropriate buffer layer. When the substrate 101 is a Ge substrate, GaAs is a suitable material for the intermediate layer 115.

[0217] The surface-emitting element 160 can be manufactured by a method generally similar to that of the surface-emitting element 10 of Example 1, except that an intermediate layer 115 and a first reflecting mirror 104 are stacked in this order on a substrate 101, an insulating mask 102 is formed on the first reflecting mirror 104, and a laminated structure LS is formed via the insulating mask 102.

[0218] According to the surface light emitting device 160, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to reduce the series resistance since the current does not pass through the substrate 101.

[0219] <17. Surface light emitting device according to Example 17 of an embodiment of the present technology>

[0220] Hereinafter, a surface light emitting device 170 according to Example 17 of an embodiment of the present technology will be described. Fig. 50 is a cross-sectional view of a surface light emitting device 170 according to Example 17 of an embodiment of the present technology.

[0221] The surface light emitting device 170 has a configuration generally similar to that of the surface light emitting device 10 according to Example 1, except that the contact portion of the substrate 101 with the cathode electrode 110, the contact portion with the insulator mask 102, and the contact portion with the buffer layer 103 are formed as a series of ion implantation regions IIA (dark black portions) to reduce resistance. Note that the range of the ion implantation regions IIA can be changed as appropriate.

[0222] In the surface-emitting device 170, the contact portions of the substrate 101 with the cathode electrode 110, the contact portions with the insulator mask 102, and the contact portions with the buffer layer 103 are made to have low resistance, so that the current passing through the buffer layer 103 flows to the cathode electrode 110 via the ion-implanted region IIA with significantly greater efficiency.

[0223] The surface-emitting element 170 can be manufactured by a method generally similar to that of the surface-emitting element 10 of Example 1, except that ions are implanted into the contact portion of the substrate 101 with the cathode electrode 110, the contact portion with the insulator mask 102, and the contact portion with the buffer layer 103.

[0224] According to the surface light emitting device 170, it is possible to obtain the same effects as the surface light emitting device 10 according to the first embodiment, and also to achieve a low resistance.

[0225] 18. Distance measuring device including a surface light emitting element and a light receiving element according to Example 1 of an embodiment of the present technology

[0226] Hereinafter, a distance measuring device including a surface light emitting element and a light receiving element according to Example 1 of an embodiment of the present technology will be described. Fig. 51 is a cross-sectional view of a distance measuring device 1 including a surface light emitting element 10 and a light receiving element 114 according to Example 1 of an embodiment of the present technology.

[0227] 51 , the distance measuring device 1 includes the surface light emitting element 10 according to Example 1 and a light receiving element 114. In the distance measuring device 1, the substrate 101 has a first region in which the stacked structure LS is arranged, and a second region around the first region in which the light receiving element 114 is provided. The side surface of the light receiving element 114 may be covered with a semiconductor layer that is substantially the same as another semiconductor layer 111.

[0228] Here, the substrate 101 is, for example, a Ge substrate or a Si substrate on which an IC including a driver (driving circuit) and a light receiving circuit is formed. The light receiving circuit includes, for example, an A / D converter, a TOF calculation unit, etc.

[0229] The light receiving element 114 is provided with its light receiving surface exposed in a hole formed in the surface of the second region of the substrate 101, for example. The light receiving element 114 is, for example, a PD (photodiode) that has sensitivity in the SWIR band and is made of a compound semiconductor such as InGaAs. Note that the light receiving element 114 may also be an APD (avalanche photodiode) that has sensitivity in the SWIR band and is made of SiGe, for example.

[0230] The distance measuring device 1 can be manufactured by a manufacturing method that is generally similar to the manufacturing method of the surface light emitting device 10 according to the first embodiment, except that an IC and a light receiving element 114 are formed on the substrate 101 .

[0231] According to the distance measuring device 1, it is possible to provide a high-performance TOF module including the surface-emitting element 10 having an oscillation wavelength in the SWIR band and the light-receiving element 114 having sensitivity in the SWIR band.

[0232] The distance measuring device 1 may have any of the surface light emitting devices of Examples 2 to 17 instead of the surface light emitting device 10 .

[0233] <19. Surface light emitting element array including a plurality of surface light emitting elements according to Example 1 of an embodiment of the present technology>

[0234] Hereinafter, a surface light emitting device array including a plurality of surface light emitting devices according to Example 1 of an embodiment of the present technology will be described. Fig. 52 is a cross-sectional view of a surface light emitting device array 2 including a plurality of surface light emitting devices 10 according to Example 1 of an embodiment of the present technology.

[0235] In the surface light emitting element array 2, as shown in FIG. 52, a plurality of surface light emitting elements 10 are arranged in a one-dimensional or two-dimensional array (for example, a staggered pattern, a matrix pattern, etc.).

[0236] For example, the plurality of surface light emitting elements 10 share the substrate 101, the cathode electrode 110, and the insulating mask 102. Each surface light emitting element 10 has an electrode layout with an independent anode and a common cathode, and can be driven independently.

[0237] According to the surface light emitting element array 2, it is possible to provide a surface light emitting element array in which the decrease in the light emitting efficiency of each surface light emitting element 10 is suppressed.

[0238] The surface light emitting element array 2 may include a plurality of any one of the surface light emitting elements of Examples 2 to 17 in place of the surface light emitting element 10 .

[0239] 20. Distance measuring device including a surface light-emitting array having a plurality of surface light-emitting elements and a light-receiving element array according to Example 1 of an embodiment of the present technology

[0240] Hereinafter, a distance measuring device including a surface light emitting element array having a plurality of surface light emitting elements and a light receiving element array according to Example 1 of an embodiment of the present technology will be described. Fig. 53 is a cross-sectional view of a distance measuring device 3 including a surface light emitting element array having a plurality of surface light emitting elements 10 and a light receiving element array according to Example 1 of an embodiment of the present technology.

[0241] 53, the distance measuring device 3 includes a surface light emitting element array SEA having a plurality of surface light emitting elements 10 according to the first embodiment, and a light receiving element array PA (e.g., an image sensor (line sensor or area sensor)) having a plurality of light receiving elements 117 (e.g., elements including photoelectric conversion units). The distance measuring device 3 further includes a semiconductor substrate SS (e.g., a Si substrate) bonded to the rear surface (lower surface) of the substrate 101. A driver and a readout circuit are provided within the semiconductor substrate SS.

[0242] The stacked structure of the plurality of surface light emitting elements 10 and the plurality of light receiving elements 117 are provided on a substrate 101 (the same substrate). The substrate 101 is, for example, a Ge substrate. Each light receiving element 117 is provided on the substrate 101 so that its light receiving surface is exposed.

[0243] The stacked structure of each surface light emitting element 10 is electrically connected to a driver through a via v1, and each light receiving element 117 is electrically connected to a readout circuit through a via v2.

[0244] According to the distance measuring device 3, it is possible to realize a distance measuring device equipped with a multi-channel light emitting section and a multi-channel light receiving section.

[0245] The distance measuring device 3 may have a plurality of any one of the surface light emitting devices according to the second to seventeenth embodiments instead of the surface light emitting device 10 .

[0246] 21. Modifications of the Present Technology The present technology is not limited to the above-described embodiment, and various modifications are possible.

[0247] For example, a surface-emitting LED (light-emitting diode) can be configured as in the surface-emitting device 10-M1 according to Modification 1 of Example 1 shown in Fig. 54. The surface-emitting device 10-M1 has the same configuration as the surface-emitting device 10 according to Example 1, except that it does not have the second reflecting mirror 108.

[0248] That is, materials that emit light at any wavelength within the wavelength range of 200 to 2500 nm can be used for the surface light emitting element.

[0249] 55, a GaAs substrate may be used as the substrate 101, and the buffer layer 103 may be omitted, as in the surface light emitting device 10-M2 according to Modification 2 of Example 1. In this case, the bottom layer of the laminated structure LS made of GaAs-based compound semiconductors can be selectively grown satisfactorily on the GaAs substrate as the substrate 101 via an insulating mask 102, and further each constituent layer made of GaAs-based compound semiconductors other than the bottom layer can be epitaxially grown satisfactorily.

[0250] For example, as in the surface emitting device 10-M3 according to the third modification of the first embodiment shown in FIG. 56, another semiconductor layer 111 may be covered with a dielectric film 123 (e.g., a SiO2 film, a SiN film, a SiON film, etc.).

[0251] For example, as in the surface light emitting device 10-M4 according to Modification 4 of Example 1 shown in FIG. 57 , the surface light emitting device 10-M4 may have an ion-implanted layer 126 as a current confinement layer. The ion-implanted layer 126 includes a non-ion-implanted region 126 a (low-resistance region) made of a compound semiconductor (e.g., AlGaAs) and an ion-implanted region 126 b (high-resistance region) surrounding the non-ion-implanted region 126 a. Here, the ion-implanted layer 126 is disposed between the second cladding layer 107 and the contact layer 113, but may be disposed at another position between the first and second reflectors 104 and 108.

[0252] 58, a hole 101d may be provided in the substrate 101 at a position corresponding to the opening 102a of the insulator mask 102. Here, the hole 101d has a tapered shape in which the diameter decreases as it approaches the back surface (lower surface) of the substrate 101, but it may have another shape.

[0253] The surface emitting device 10-M5 can be manufactured in a similar manner to the surface emitting device 10 of Example 1, except that a cathode electrode 110 and an insulating mask 102 are formed on a substrate 101 (see Figure 59A), the portion exposed in the opening 102a of the substrate 101 is etched to form a hole 101d (see Figure 59B), and a buffer layer 103 is formed (see Figure 59C).

[0254] For example, the material of the substrate 101 is not limited to group IV elements such as Ge and Si, but may also be group III-V compound semiconductors such as GaAs, InP, and GaN. Whichever material is used for the substrate 101, it is preferable that the lattice constant of the substrate 101 is the same as or similar to (lattice-matched with) the lattice constant of each constituent layer of the stacked structure LS. If the substrate 101 and each constituent layer of the stacked structure LS are not lattice-matched, it is preferable to provide a buffer layer between the substrate 101 and the stacked structure LS, the buffer layer having a lattice constant intermediate between these lattice constants. Examples of materials that are lattice-matched to an InP substrate include AlGaInP, AlGaInAs, and AlInAs.

[0255] For example, as shown in FIG. 60 , a surface-emitting device 10-M6 according to a sixth modification of the first embodiment may include a first reflecting mirror 104, a first cladding layer 105, a light-emitting layer 106, a second cladding layer 107, a tunnel junction layer 121 (hereinafter also referred to as a “TJ layer”), and a burying layer 119 made of an InP-based compound semiconductor (a compound semiconductor lattice-matched to InP). The first reflecting mirror 104 may be made of, for example, InP / AlGaInAs or AlInAs / AlGaInAs. The first cladding layer 105 may be made of, for example, n-InP. The second cladding layer 107 may be made of, for example, p-InP. The light-emitting layer 106 may be made of, for example, a GaAs-based compound semiconductor or a GaAsP-based compound semiconductor. Here, the light-emitting layer 106 may be made of, for example, an AlGaInAs / AlGaInAs multiple quantum well layer. The burying layer 119 may be made of, for example, n-InP. The second reflecting mirror 108 is, for example, a dielectric multilayer reflecting mirror.

[0256] Again, by appropriately setting the lattice constant of the buffer layer 103, a Si substrate, a Ge substrate, a GOI substrate, an SOI substrate, a GaAs substrate, a GaN substrate, an InP substrate, or the like can be used as the substrate 101. Note that when an InP substrate is used as the substrate 101, the buffer layer 103 is not essential.

[0257] The tunnel junction layer 121 is provided in a mesa shape on the second cladding layer 107. The tunnel junction layer 121 and the buried layer 119 form a buried tunnel junction (BTJ). The tunnel junction layer 121 has significantly lower resistance (very high carrier conductivity) than the surrounding buried layer 119, and serves as a current passing region. The region of the buried layer 119 surrounding the TJ layer serves as a current confinement region. If the buried layer 119 has a lower refractive index than the tunnel junction layer 121, the region of the buried layer 119 surrounding the TJ layer also serves as a light confinement region. The mesa diameter of the tunnel junction layer 121 is, for example, several μm to several tens of μm (e.g., 10 μm). Note that if the diameter (mesa diameter) of the stacked structure LS is, for example, several μm to several tens of μm, a BTJ may not be provided.

[0258] The tunnel junction layer 121 includes a stacked p-type semiconductor region 121a and an n-type semiconductor region 121b. Here, the p-type semiconductor region 121a is disposed on the substrate 101 side (below) of the n-type semiconductor region 121b. The p-type semiconductor region 121a is made of a p-type AlGaInAs-based compound semiconductor heavily doped with C (carbon), for example. The n-type semiconductor region 121b is made of an n-type AlGaInAs-based compound semiconductor heavily doped with Si, Te, or the like, for example. The film thickness (total film thickness) of the tunnel junction layer 121 is, for example, about several tens of nanometers (e.g., 10 to 70 nm). Here, the film thicknesses of the p-type semiconductor region 121a and the n-type semiconductor region 121b are both, for example, 20 nm.

[0259] For example, the other semiconductor layer 111 may be formed into a core-shell shape by adding ZnS using a sol-gel method. The other semiconductor layer 111 may include a compound semiconductor such as GaAs, AlSb (indirect bandgap of approximately 1.6 eV at 27°C, direct bandgap of approximately 2.22 eV), AlGaAs, GaP (indirect bandgap of approximately 2.26 eV at 27°C), ZnSe (bandgap of approximately 2.7 eV at 27°C), ZnO (bandgap of approximately 3.37 eV at 27°C), ZnS (bandgap of approximately 3.6 eV), or (AlIn)GaN. Even in this case, the bandgap of the other semiconductor layer 111 is preferably larger than the bandgap of the constituent layer with the smallest bandgap among the multiple constituent layers of the stacked structure LS.

[0260] The substrate 101 may be an SOI (Silicon On Insulator) substrate or a composite substrate (e.g., a QST (registered trademark) substrate) in which a Si thin film, a Ge thin film, etc. are stacked on an insulating substrate (e.g., a ceramic substrate) or a semi-insulating substrate.

[0261] In the surface-emitting devices according to the above-described embodiments and modifications, if there is a constituent layer (e.g., a semiconductor multilayer film reflector) on the light-emitting layer 106 that also functions as the second cladding layer 107, the second cladding layer 107 may be omitted.

[0262] In the surface-emitting devices according to the above-described embodiments and modifications, if there is a constituent layer (e.g., a semiconductor multilayer film reflector) below the light-emitting layer 106 that also functions as the first cladding layer 105, the first cladding layer 105 may be omitted.

[0263] At least one of the first and second reflecting mirrors 104, 108 is not limited to a semiconductor multilayer film reflecting mirror, but may be a reflecting mirror made of one or a combination of two or more materials selected from semiconductors, dielectrics, and metals.

[0264] In the surface-emitting devices according to the above-described embodiments and modifications, the conductivity types (p-type and n-type) of the semiconductor layer located above the light-emitting layer 106 and the semiconductor layer located below the light-emitting layer 106 may be reversed. In this case, however, the positional relationship between the anode electrode and the cathode electrode must also be reversed. When the substrate 101 is a p-type Si substrate or Ge substrate, for example, B (boron) can be used as the dopant (p-type impurity).

[0265] Parts of the configurations of the surface light emitting device, the surface light emitting device array, and the distance measuring device according to the above-described embodiments and modifications may be combined within a range that does not contradict each other.

[0266] In each of the above embodiments and variants, the arrangement, material, conductivity type, thickness, width, numerical value, shape, size, etc. of each layer constituting the surface-emitting element, surface-emitting element array, and distance measuring device can be changed as appropriate within the range in which it functions as a surface-emitting element.

[0267] 22. Application Examples to Electronic Devices The technology according to the present disclosure (the present technology) can be applied to various products (electronic devices). For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot, a low-power device (e.g., a smartphone, a smartwatch, a tablet, a mouse, etc.), or a wired or wireless communication device.

[0268] The surface light emitting device according to the present technology can also be applied as a light source for devices that form or display images using light (for example, printers, copiers, projectors, head-mounted displays, head-up displays, etc.).

[0269] 23. Example of Application of Surface Light Emitting Device to Distance Measuring Device An application example of the surface light emitting device 10 according to Example 1 of an embodiment of the present technology will be described below.

[0270] 61 illustrates an example of a schematic configuration of a distance measurement device 1000 (distance measuring device) including a surface light emitting element 10, as an example of an electronic device according to the present technology. The distance measurement device 1000 measures the distance to a subject S by a TOF (Time Of Flight) method. The distance measurement device 1000 includes the surface light emitting element 10. The distance measurement device 1000 includes, for example, the surface light emitting element 10, a light receiving device 125, lenses 128 and 138, a signal processing unit 145, a control unit 155, a display unit 165, and a storage unit 175.

[0271] The light receiving device 125 receives light emitted from the surface light emitting device 10 and reflected by the subject S (object). That is, the light receiving device 125 detects the light reflected by the subject S. The lens 128 is a lens, such as a collimating lens, for converting the light emitted from the surface light emitting device 10 into parallel light. The lens 138 is a lens, such as a condensing lens, for collecting the light reflected by the subject S and guiding it to the light receiving device 125.

[0272] The signal processing unit 145 is a circuit for generating a signal corresponding to the difference between the signal input from the light-receiving device 125 and the reference signal input from the control unit 155. The control unit 155 is configured to include, for example, a time-to-digital converter (TDC). The reference signal may be a signal input from the control unit 155 or an output signal from a detection unit that directly detects the output of the surface-emitting device 10. The control unit 155 is, for example, a processor that controls the surface-emitting device 10, the light-receiving device 125, the signal processing unit 145, the display unit 165, and the storage unit 175. The control unit 155 is a circuit that measures the distance to the subject S based on the signal generated by the signal processing unit 145. The control unit 155 generates a video signal for displaying information about the distance to the subject S and outputs it to the display unit 165. The display unit 165 displays the information about the distance to the subject S based on the video signal input from the control unit 155. The control unit 155 stores the information about the distance to the subject S in the storage unit 175.

[0273] In this application example, instead of the surface light emitting element 10, any of the surface light emitting elements 10-M1, 10-M2, 10-M3, 10-M4, 10-M5, 10-M6, 20, 30, 40, 50, 60, 70, 80, 90, 100, 11, 120, 130, 140, 150, 160, 170, and the surface light emitting element array 2 can also be applied to the distance measurement device 1000.

[0274] 24. Example in which distance measuring device is mounted on a moving body> FIG. 62 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving body control system to which the technology according to the present disclosure can be applied.

[0275] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 62, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0276] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0277] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0278] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, a distance measurement device 12031 is connected to the outside-vehicle information detection unit 12030. The distance measurement device 12031 includes the above-described distance measurement device 1000. The outside-vehicle information detection unit 12030 causes the distance measurement device 12031 to measure the distance to an object outside the vehicle (subject S) and acquires the distance data obtained thereby. The outside-vehicle information detection unit 12030 may perform object detection processing for people, cars, obstacles, signs, etc. based on the acquired distance data.

[0279] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0280] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0281] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0282] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0283] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 62, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0284] FIG. 63 is a diagram showing an example of the installation position of the distance measurement device 12031.

[0285] In FIG. 63, a vehicle 12100 has distance measurement devices 12101, 12102, 12103, 12104, and 12105 as a distance measurement device 12031.

[0286] Distance measuring devices 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of vehicle 12100. Distance measuring device 12101 provided on the front nose and distance measuring device 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire data ahead of vehicle 12100. Distance measuring devices 12102 and 12103 provided on the side mirrors mainly acquire data on the sides of vehicle 12100. Distance measuring device 12104 provided on the rear bumper or back door mainly acquires data behind vehicle 12100. The forward data acquired by distance measuring devices 12101 and 12105 is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, etc.

[0287] 63 shows an example of the detection ranges of the distance measuring devices 12101 to 12104. Detection range 12111 indicates the detection range of the distance measuring device 12101 provided on the front nose, detection ranges 12112 and 12113 indicate the detection ranges of the distance measuring devices 12102 and 12103 provided on the side mirrors, respectively, and detection range 12114 indicates the detection range of the distance measuring device 12104 provided on the rear bumper or back door.

[0288] For example, based on the distance data obtained from the distance measuring devices 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the detection ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0289] For example, based on the distance data obtained from the distance measuring devices 12101 to 12104, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0290] The above describes an example of a mobile object control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the distance measurement device 12031 of the above-described configuration.

[0291] The present technology may also be configured as follows: (1) A surface-emitting device including a light-emitting element portion including a stacked structure in which a plurality of layers including at least a semiconductor layer are stacked, wherein the light-emitting element portion further includes another semiconductor layer covering a side surface of the stacked structure, and the another semiconductor layer has a band gap larger than the smallest band gap among the band gaps of the semiconductor layers of the plurality of layers. (2) The surface-emitting element according to (1), wherein the stacked structure has a light-emitting layer as the layer, and the another semiconductor layer covers at least the side surface of the light-emitting layer. (3) The surface-emitting element according to (1) or (2), wherein the another semiconductor layer covers the entire periphery of the side surface. (4) The surface-emitting element according to any one of (1) to (3), wherein the another semiconductor layer includes any one of GaAs, AlSb, AlGaAs, GaP, ZnSe, ZnO, ZnS, and (AlIn)GaN. (5) The surface-emitting device according to any one of (1) to (4), wherein the light-emitting element portion further includes a substrate laminated with the laminated structure, and the surface orientation of the substrate is (111). (6) The surface-emitting device according to any one of (1) to (5), wherein the light-emitting element portion further includes a substrate laminated with the laminated structure, and the substrate includes any one of Si, Ge, GaAs, InP, and GaN. (7) The surface-emitting device according to any one of (1) to (6), wherein the light-emitting element portion further includes a substrate laminated with the laminated structure, and the laminated structure is provided on the substrate via an insulating layer having an opening, and a part of the laminated structure is located in the opening. (8) The surface-emitting device according to (7), wherein the other semiconductor layer is located on the insulating layer. (9) The surface-emitting device according to any one of (1) to (8), wherein the laminated structure has an oxide constriction layer as the layer. (10) The surface-emitting device according to any one of (1) to (9), wherein the laminated structure includes a multilayer film reflector as the layer, and the multilayer film reflector includes an oxidized constriction layer in which a non-oxidized region as the semiconductor layer is surrounded by an oxidized region. (11) The surface-emitting device according to (10), wherein a side surface of the oxidized constriction layer is exposed to an outer surface of the other semiconductor layer. (12) The surface-emitting device according to any one of (1) to (11), wherein the light-emitting element portion further includes a germanium-on-insulator (GOI) substrate laminated with the laminated structure.(13) The surface light emitting device according to any one of (1) to (12), wherein the light emitting element portion further includes: a substrate laminated with the laminate structure; and a reflector provided between the laminate structure and the substrate or within the substrate. (14) The surface light emitting element according to any one of (1) to (13), wherein the light emitting element portion further includes: a substrate laminated with the laminate structure; and a reflector provided on the side of the laminate structure opposite to the substrate. (15) The surface light emitting element according to any one of (1) to (14), wherein the laminate structure has a mesa, and wherein the diameter of the mesa is 10 μm or less. (16) The surface light emitting element according to any one of (1) to (15), wherein the difference between the minimum band gap and the band gap of the another semiconductor layer is 0.1 eV or more. (17) A distance measuring device comprising: a surface light emitting device having a light emitting element portion including a laminated structure in which a plurality of layers including at least a semiconductor layer are laminated, the light emitting element portion further including another semiconductor layer covering a side surface of the laminated structure, the other semiconductor layer having a band gap larger than the smallest band gap of the semiconductor layers; and a light receiving element, wherein the laminated structure and the light receiving element are provided on the same substrate. (18) A method for manufacturing a surface light emitting element, comprising: a step of forming, on a substrate, a laminated structure in which a plurality of layers including at least a semiconductor layer are laminated; and a step of forming another semiconductor layer having a band gap larger than the smallest band gap of the semiconductor layers of the plurality of layers so as to cover the side surface of the laminated structure. (19) The method for manufacturing a surface light emitting element according to (18), wherein the forming step performs at least one selective growth. (20) The method for manufacturing a surface light emitting element according to (18) or (19), wherein the forming step grows the other semiconductor layer from the side surface of the laminated structure radially outward of the laminated structure. (21) A surface light emitting device comprising a light emitting element portion including a laminated structure in which a plurality of layers including at least a semiconductor layer are laminated, wherein the light emitting element portion further includes another semiconductor layer covering a side surface of the laminated structure. (22) The surface light emitting device according to (21), wherein the band gap of the another semiconductor layer is larger than the band gap of the semiconductor layer. (23) The surface light emitting device according to (21) or (22), wherein the Al composition of the another semiconductor layer is larger than the Al composition of the semiconductor layer.(24) The surface-emitting device according to any one of (1) to (16) and (21) to (23), wherein the semiconductor layer and the other semiconductor layer are both made of a semiconductor lattice-matched to InP. (25) The surface-emitting device according to any one of (1) to (16) and (21) to (23), wherein the semiconductor layer and the other semiconductor layer are both made of a semiconductor lattice-matched to GaN. (26) The surface-emitting device according to any one of (1) to (16) and (21) to (23), wherein the stacked structure includes at least one multilayer film reflector as the layer. (27) The semiconductor layer is made of a semiconductor lattice-matched to GaAs, and the other semiconductor layer is Al. x Ga 1-x As (0≦x≦1). (28) A surface light emitting device according to any one of (1) to (16) and (21) to (23), which includes As (0≦x≦1). (29) An electronic device comprising the surface light emitting device according to any one of (1) to (16) and (21) to (23). (30) The surface light emitting device according to any one of (1) to (16) and (21) to (23), which has a difference between the minimum band gap and the band gap of the other semiconductor layer of 0.3 eV or more. (31) The surface light emitting device according to any one of (1) to (16) and (21) to (23), which has a difference between the minimum band gap and the band gap of the other semiconductor layer of 0.5 eV or more. (32) The surface-emitting device according to any one of (1) to (16) and (21) to (23), wherein the light-emitting element portion further includes an SOI (Silicon On Insulator) substrate laminated with the laminated structure. (33) The surface-emitting device according to any one of (1) to (16) and (21) to (23), wherein the light-emitting element portion further includes a substrate laminated with the laminated structure, the substrate having a semiconductor layer laminated on an insulating substrate or a semi-insulating substrate.

[0292] 1, 3: distance measuring device (electronic device) 10, 10-M1, 10-M2, 10-M3, 10-M4, 10-M5, 10-M6, 20, 30, 40, 50, 60, 70, 80, 90, 100, 11, 120, 130, 140, 150, 160, 170: surface light emitting element 101: substrate 102: insulator mask (insulating layer) 102a: opening 104: first reflecting mirror 104b: low refractive index layer (oxidized constriction layer) 104b1: non-oxidized region 104b2: oxidized region 106: light emitting layer 108: second reflecting mirror 111: another semiconductor layer 112: oxidized constriction layer 113: contact layer 114: light receiving element 1000: distance measuring device (electronic device) LE: light emitting element section LS: Laminated structure SEA: Surface emitting element array PA: Photodetector array

Claims

1. A surface-emitting device comprising a light-emitting element portion including a laminated structure in which a plurality of layers including at least a semiconductor layer are laminated, the light-emitting element portion further including another semiconductor layer covering a side surface of the laminated structure, the another semiconductor layer having a band gap larger than the smallest band gap among the band gaps of the semiconductor layers of the plurality of layers.

2. The surface light emitting device according to claim 1, wherein the laminated structure has a light emitting layer as the layer, and the separate semiconductor layer covers at least a side surface of the light emitting layer.

3. The surface light emitting element according to claim 1, wherein the other semiconductor layer covers the entire periphery of the side surface.

4. The surface-emitting element according to claim 1, wherein the other semiconductor layer includes any one of GaAs, AlSb, AlGaAs, GaP, ZnSe, ZnO, ZnS, and (AlIn)GaN.

5. The surface light emitting element according to claim 1, wherein the light emitting element section further includes a substrate laminated with the laminated structure, and the surface orientation of the substrate is (111).

6. The surface light emitting element according to claim 1, wherein the light emitting element portion further includes a substrate laminated with the laminated structure, and the substrate includes any one of Si, Ge, GaAs, and InP.

7. The surface-emitting element described in claim 1, wherein the light-emitting element section further includes a substrate laminated with the laminated structure, the laminated structure is provided on the substrate via an insulating layer having an opening, and a portion of the laminated structure is positioned within the opening.

8. The surface-emitting device according to claim 7, wherein the other semiconductor layer is located on the insulating layer.

9. The surface light emitting element according to claim 1, wherein the laminated structure has an oxide constriction layer as the layer.

10. The surface-emitting element according to claim 1, wherein the laminated structure includes a multilayer reflector as the layer, and the multilayer reflector includes an oxidized constriction layer in which a non-oxidized region as the semiconductor layer is surrounded by an oxidized region.

11. The surface light emitting device according to claim 10, wherein a side surface of said oxidized constriction layer is exposed to an outer surface of said another semiconductor layer.

12. The surface-emitting element according to claim 1, wherein the light-emitting element portion includes a substrate laminated with the laminated structure, and the substrate is any one of a GOI (germanium on insulator) substrate, an SOI (silicon on insulator) substrate, and a substrate in which a semiconductor layer is laminated on an insulating substrate or a semi-insulating substrate.

13. The surface-emitting device according to claim 1, wherein the light-emitting element section further includes: a substrate laminated with the laminated structure; and a reflector provided between the laminated structure and the substrate or within the substrate.

14. The surface-emitting device according to claim 1, wherein the light-emitting element section further includes: a substrate laminated with the laminated structure; and a reflector provided on the side of the laminated structure opposite to the substrate.

15. The surface light emitting device according to claim 1, wherein the laminated structure has a mesa, and the diameter of the mesa is 10 μm or less.

16. The surface light emitting device according to claim 1, wherein the difference between the minimum band gap and the band gap of the other semiconductor layer is 0.1 eV or more.

17. A distance measuring device comprising: a surface-emitting element having a light-emitting element section including a laminated structure in which a plurality of layers including at least a semiconductor layer are laminated, the light-emitting element section further including another semiconductor layer covering a side surface of the laminated structure and having a band gap larger than the smallest band gap among the plurality of semiconductor layers; and a light-receiving element, the laminated structure and the light-receiving element being provided on the same substrate.

18. A method for manufacturing a surface light emitting device, comprising: forming a laminated structure on a substrate in which a plurality of layers including at least a semiconductor layer are laminated; and forming another semiconductor layer having a band gap larger than the smallest band gap among the semiconductor layers of the plurality of layers, so as to cover a side surface of the laminated structure.

19. The method for producing a surface light emitting device according to claim 18, wherein the forming step includes at least one selective growth step.

20. The method for manufacturing a surface light emitting device according to claim 18, wherein in the forming step, the other semiconductor layer is grown radially outward from a side surface of the laminated structure.

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