Semiconductor package and electronic device

Abstract

The present technology relates to a semiconductor package and an electronic device that make it possible to make a semiconductor package more compact. The present invention comprises an imaging element chip which has first pads, a substrate on which the imaging element chip is mounted and which has second pads, a first wire interconnect which establishes a connection between a first pad and a second pad, between the first pads, or between the second pads via a metal wire, a second wire interconnect which establishes a connection between a first pad and a second pad via a metal wire, and a resin which is provided around the imaging element chip and by which to join seal glass that is provided on a light incidence plane side of the imaging element chip, wherein the highest point, which is at the greatest distance from the surface of the imaging element chip, of the first wire interconnect is provided at a position closer to the seal glass than the highest point of the second wire interconnect is, and the highest point of the first wire interconnect is encapsulated in the resin. The present technology can be applied to, for example, a semiconductor package which includes an imaging element.

Description

Semiconductor packages, electronic devices

[0001] The present technology relates to a semiconductor package and an electronic device, for example, a semiconductor package and an electronic device that can be miniaturized.

[0002] In a conventional semiconductor package in which a chip such as an image sensor is mounted on a semiconductor mounting substrate and packaged so that the sensor surface of the image sensor is protected by a sealing glass, the image sensor and the semiconductor mounting substrate are connected by wire wiring formed by wire bonding (see, for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2003-243673

[0004] In semiconductor packages, the seal glass and the imaging element are connected by resin. If the width of the resin is reduced to make the semiconductor package smaller, there is a risk that the resin will be crushed by the weight of the seal glass.

[0005] If the resin is crushed, there is a possibility that the resin may be applied to the sensor surface of the image sensor, or that the distance between the seal glass and the sensor surface may become shorter than desired.

[0006] It is desirable to make semiconductor packages smaller without crushing the resin.

[0007] The present technology has been made in view of such circumstances, and makes it possible to reduce the size of semiconductor packages.

[0008] According to one aspect of the present technology, a first semiconductor package includes an imaging element chip having a first pad, a substrate on which the imaging element chip is mounted and having a second pad, a first wire wiring that connects the first pad to the second pad, the first pads together, or the second pads together with a metal wire, a second wire wiring that connects the first pad to the second pad with a metal wire, and a resin that is provided around the imaging element chip and that bonds a seal glass that is provided on a light incident surface side of the imaging element chip, wherein the highest point of the first wire wiring, which is farthest from a surface of the imaging element chip, is provided at a position closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin.

[0009] According to one aspect of the present technology, there is provided a first electronic device comprising: an imaging element chip having a first pad; a substrate on which the imaging element chip is mounted and having a second pad; a first wire wiring that connects the first pad to the second pad, or the first pads together, or the second pads together with a metal wire; a second wire wiring that connects the first pad to the second pad with a metal wire; and a resin that is provided around the imaging element chip and that bonds a seal glass that is provided on a light incident surface side of the imaging element chip, wherein the highest point of the first wire wiring, which is farthest from a surface of the imaging element chip, is provided at a position closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is an electronic device comprising a semiconductor package encapsulated in the resin.

[0010] A second semiconductor package according to one aspect of the present technology is a semiconductor package including: an imaging element chip having a first pad; a substrate on which the imaging element chip is mounted and which has a second pad; a first wire wiring connected to either the first pad or the second pad; a second wire wiring connecting the first pad and the second pad by a metal wire; and a resin provided around the imaging element chip and bonding a seal glass provided on a light incident surface side of the imaging element chip, wherein the highest point of the first wire wiring, which is farthest from a surface of the imaging element chip, is provided at a position closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin.

[0011] A second electronic device according to one aspect of the present technology is an electronic device including: an imaging element chip having a first pad; a substrate on which the imaging element chip is mounted and having a second pad; a first wire wiring connected to either the first pad or the second pad; a second wire wiring connecting the first pad and the second pad by a metal wire; and a resin provided around the imaging element chip and bonding a seal glass provided on the light incident surface side of the imaging element chip, wherein the highest point of the first wire wiring, which is the longest distance from the surface of the imaging element chip, is provided at a position closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is an electronic device including a semiconductor package encapsulated in the resin.

[0012] According to one aspect of the present technology, a first semiconductor package includes an imaging device chip having a first pad, a substrate on which the imaging device chip is mounted and having a second pad, a first wire interconnection connecting the first pad to the second pad, the first pads together, or the second pads together with a metal wire, a second wire interconnection connecting the first pad to the second pad with the metal wire, and a resin provided around the imaging device chip and bonding a seal glass provided on a light incident surface side of the imaging device chip, wherein the highest point of the first wire interconnection, which is farthest from a surface of the imaging device chip, is located closer to the seal glass than the highest point of the second wire interconnection, and the highest point of the first wire interconnection is encapsulated in the resin.

[0013] A first electronic device according to one aspect of the present technology includes the first semiconductor package.

[0014] A second semiconductor package according to one aspect of the present technology includes an image sensor chip having a first pad, a substrate on which the image sensor chip is mounted and having a second pad, a first wire interconnection connected to either the first pad or the second pad, a second wire interconnection connecting the first pad and the second pad by a metal wire, and a resin provided around the image sensor chip and for bonding a seal glass provided on a light incident surface side of the image sensor chip, wherein the highest point of the first wire interconnection, which is farthest from a surface of the image sensor chip, is located closer to the seal glass than the highest point of the second wire interconnection, and the highest point of the first wire interconnection is encapsulated in the resin.

[0015] A second electronic device according to one aspect of the present technology includes the second semiconductor package.

[0016] 1 is a diagram illustrating a configuration of an embodiment of a semiconductor package to which the present technology is applied. FIG. 1 is a diagram illustrating an example of a planar configuration of a semiconductor package. FIG. 2 is a diagram illustrating another example of a planar configuration of a semiconductor package. FIG. 3 is a diagram illustrating another example of a planar configuration of a semiconductor package. FIG. 4 is a diagram illustrating a difference in height of wire wiring. FIG. 5 is a diagram illustrating a method of making wire wiring. FIG. 6 is a diagram illustrating a method of making wire wiring. FIG. 7 is a diagram illustrating an example of a planar configuration of a semiconductor package in a second embodiment. FIG. 8 is a diagram illustrating an example of a cross-sectional configuration of a semiconductor package in a third embodiment. FIG. 9 is a diagram illustrating an example of a planar configuration of wire wiring in the third embodiment. FIG. 10 is a diagram illustrating an example of a planar configuration of a semiconductor package in a fourth embodiment. FIG. 11 is a diagram illustrating an example of a cross-sectional configuration of a semiconductor package in a fifth embodiment. FIG. 12 is a diagram illustrating another example of a cross-sectional configuration of a semiconductor package in the fifth embodiment. FIG. 13 is a diagram illustrating an example of a cross-sectional configuration of a semiconductor package in a sixth embodiment. FIG. 14 is a diagram illustrating an example of a configuration of an electronic device. FIG. 15 is a block diagram illustrating an example of a schematic configuration of an endoscopic surgery system. FIG. 16 is a block diagram illustrating an example of the functional configuration of a camera head and a CCU. FIG. 17 is a block diagram illustrating an example of a schematic configuration of a vehicle control system. FIG. 18 is an explanatory diagram illustrating an example of installation positions of an outside vehicle information detection unit and an imaging unit.

[0017] Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described.

[0018] <Configuration Example of Semiconductor Package> Fig. 1 is a diagram showing a cross-sectional configuration example of an embodiment of a semiconductor package to which the present technology is applied, and Fig. 2 is a diagram showing a planar configuration example. The semiconductor package 11 described below houses and packages an image sensor chip 21 as an image sensor.

[0019] 1 includes an imaging device chip 21, a semiconductor mounting substrate 22, a seal glass 23, a sealing resin 24, a seal glass resin 25, and a die bond resin 26. In the semiconductor package 11, the imaging device chip 21 and the semiconductor mounting substrate 22 are connected by normal wire wiring 31 and high wire wiring 41.

[0020] Details will be described later, but the normal wire wiring 31 and the high wire wiring 41 each have a curved portion, and the curved portion of the high wire wiring 41 is formed at a higher position than the normal wire wiring, so here it is described as high wire wiring 41 to distinguish it from the normal wire wiring 31.

[0021] The imaging element chip 21 is an imaging element such as a charge coupled device (CCD) image sensor or a complementary metal oxide semiconductor (CMOS) image sensor, and has a sensor surface on which a plurality of pixels are arranged in an array.

[0022] The semiconductor mounting substrate 22 is a substrate on which the imaging element chip 21 is mounted. The semiconductor mounting substrate 22 has a configuration in which multiple layers of wiring are stacked inside. An insulating film (not shown) such as solder resist is formed on the upper surface side of the semiconductor mounting substrate 22, and pads 33 made of a nickel layer or a gold-plated layer are provided for bonding normal wire wiring 31 or high wire wiring 41. An insulating film (not shown) such as solder resist is formed on the lower surface side of the semiconductor mounting substrate 22, and a nickel layer or a gold-plated layer is provided for bonding solder balls (not shown).

[0023] The seal glass 23 is a glass substrate for protecting the sensor surface of the imaging element chip 21 and is provided on the light incident surface side of the semiconductor package 11 .

[0024] The sealing resin 24 is a resin member that is provided so as to surround the outer periphery of the side surfaces of the imaging element chip 21 and the seal glass 23, and seals the normal wire wiring 31 and the high wire wiring 41. For example, the sealing resin 24 may be an epoxy resin that begins to harden at 50°C or higher.

[0025] The seal glass resin 25 is used to mount the seal glass 23 on the imaging element chip 21. For example, the seal glass resin 25 may be a mixed resin made by mixing an acrylic resin and an epoxy resin, which is temporarily cured with an ultraviolet dose of 1 J / cm or more and starts to thermally cure at 50° C. or more, and is cured by ultraviolet rays and heat.

[0026] The die bond resin 26 is used to mount the imaging element chip 21 on the semiconductor mounting substrate 22. For example, the die bond resin 26 may be an acrylic, epoxy, or silicone resin that begins to harden at 50° C. or higher.

[0027] The solder balls (not shown) are used when mounting the semiconductor package 11 to an electronic device such as an imaging device, and the solder material may be, for example, a lead-free solder (e.g., Sn-3.0Ag-0.5Cu) with a melting point of approximately 220°C.

[0028] The normal wiring 31 connects a pad 33 provided on the semiconductor mounting substrate 22 to a pad 34 provided on the imaging element chip 21 by a metal wire 32. The metal wire 32 is, for example, a gold wire with a diameter of 25 μm.

[0029] The high wire wiring 41 connects the pad 33 provided on the semiconductor mounting substrate 22 to the pad 34 provided on the imaging element chip 21 by a metal wire 42. The metal wire 42 may be a gold wire having the same diameter as the metal wire 32, for example, 25 μm, or may be a gold wire thicker than the metal wire 32.

[0030] The normal wire wiring 31 and the high wire wiring 41 have the same basic configuration, and connect the imaging element chip 21 and the semiconductor mounting substrate 22. As will be described in detail later, the normal wire wiring 31 and the high wire wiring 41 are both formed in a linear shape with a partially curved shape, but are different in that the curved portion of the high wire wiring 41 is formed at a higher position than the curved portion of the normal wire wiring 31, in other words, at a position closer to the seal glass 23.

[0031] The high wire wiring 41, together with the seal glass resin 25, functions to support the seal glass 23. The high wire wiring 41 functions to support the seal glass 23 so that the distance between the imaging element chip 21 and the seal glass 23 does not become smaller than a certain distance, and so that the seal glass resin 25 does not get crushed or deformed, for example, in the horizontal direction, due to the weight of the seal glass 23, and does not affect the region where the imaging element of the imaging element chip 21 is provided.

[0032] Since the high wire wiring 41 has the function of supporting the seal glass 23, a metal wire 42 thicker than the normal wire wiring 31 may be used. In the following description, in order to distinguish between the high wire wiring 41 and the normal wire wiring 31, the metal wire 42 of the high wire wiring 41 is illustrated with a thicker line type than the metal wire 32 of the normal wire wiring 31. This description is for the purpose of explanation, and the present embodiment includes the metal wire 42 of the high wire wiring 41 and the metal wire 32 of the normal wire wiring 31 whether they are formed with the same thickness or different thicknesses.

[0033] As shown in FIG. 2, for example, one of the plurality of normal wires 31 is set as a high wire 41 .

[0034] 2, the imaging element chip 21 is disposed in the central region of the semiconductor mounting substrate 22. The imaging element chip 21 and the semiconductor mounting substrate 22 are connected by a plurality of normal wires 31.

[0035] In the example shown in Figure 2, the imaging element chip 21 and the semiconductor mounting substrate 22 are each formed in a rectangular shape when viewed in a plane, and pads 34 are provided on three sides of the imaging element chip 21, and pads 33 are provided on three sides of the semiconductor mounting substrate 22.

[0036] The normal wiring 31 is configured such that a pad 34 of the imaging element chip 21 is connected by a metal wire 32 to a pad 33 of the semiconductor mounting substrate 22 provided at a corresponding position.

[0037] The wire wiring 31 typically includes wires for outputting signals processed by the imaging element chip 21 to a downstream control unit provided on the semiconductor mounting substrate 22, wires for supplying power supply voltage, and grounded wires.

[0038] 2 shows an example in which one of the three sides on which normal wire wiring 31 is provided is provided as a high wire wiring 41, and one of the multiple normal wire wirings 31 provided on that side is provided as a high wire wiring 41. For the sake of explanation, the high wire wiring 41 is illustrated surrounded by a square so as to be distinguishable from the normal wire wiring 31, and the explanation will continue. In the example shown in FIG. 2, the normal wire wiring 31 located approximately in the center of the left side in the drawing is formed of the high wire wiring 41.

[0039] The high wire wiring 41 has the function of holding the seal glass 23. The applicant has confirmed that the seal glass 23 can be held by providing one high wire wiring 41. Holding the seal glass 23 means that the position of the seal glass 23 is maintained in a state where the amount of deformation of the seal glass resin 25 is small, the distance between the seal glass 23 and the imaging element chip 21 in the vertical direction is maintained at a desired distance or more, and the width of the seal glass resin 25 in the planar direction does not exceed a desired width.

[0040] The seal glass 23 is held in place by the seal glass resin 25. However, if the width of the seal glass resin 25 in the planar direction is narrowed to miniaturize the semiconductor package 11, in other words, if the amount of seal glass resin 25 applied is reduced, the seal glass resin 25 may not be strong enough to hold the seal glass 23 and may deform, potentially resulting in an inability to hold the seal glass 23. To prevent this, the high wire wiring 41 is provided. By providing the high wire wiring 41, the seal glass 23 can be held not only by the seal glass resin 25 but also by the high wire wiring 41, preventing deformation of the seal glass resin 25 and enabling the seal glass 23 to be held in the appropriate position.

[0041] Although the seal glass 23 can be held appropriately with only one high wire 41, there is a possibility that the seal glass 23 may tilt if there is only one high wire 41. As shown in FIG. 3, three high wires 41 may be provided. In the example shown in FIG. 3, the high wire 41-1 is provided on the top edge of the image sensor chip 21 in the figure, the high wire 41-2 is provided on the left edge of the image sensor chip 21 in the figure, and the high wire 41-3 is provided on the bottom edge of the image sensor chip 21 in the figure. In this way, by providing the high wire 41 in three locations, the seal glass 23 can be held more reliably and prevented from tilting.

[0042] Although not shown, the high wires 41 may be provided on two opposing sides of the imaging element chip 21, in other words, in two locations.

[0043] As shown in Fig. 4, a configuration in which high wire wiring 41 is provided on four sides may also be used. Referring to Fig. 4, high wire wiring 41 is arranged on each of the four sides of the image sensor chip 21. In the example shown in Fig. 4, high wire wiring 41-1 is arranged on the top side of the image sensor chip 21 in the figure, high wire wiring 41-2 is arranged on the left side of the image sensor chip 21 in the figure, high wire wiring 41-3 is arranged on the bottom side of the image sensor chip 21 in the figure, and high wire wiring 41-4 is arranged on the right side of the image sensor chip 21 in the figure.

[0044] The side where the high wire wiring 41-4 is provided is not provided with the normal wire wiring 31. In this way, it is also possible to arrange the high wire wiring 41 on the side where the normal wire wiring 31 is not provided.

[0045] In the above embodiment, an example has been shown in which one high wire wiring 41 is arranged on one side, but two or more high wire wirings 41 may be arranged on one side.

[0046] <Comparison between normal wire wiring 31 and high wire wiring 41> Fig. 5 is a diagram for explaining the difference in height between the normal wire wiring 31 and the high wire wiring 41. The left diagram in Fig. 5 is an enlarged cross-sectional view of the high wire wiring 41, and the right diagram in Fig. 5 is an enlarged cross-sectional view of the normal wire wiring 31. The sealing resin 24 (Fig. 1) is not shown in Fig. 5. As shown in Fig. 5, the present technology can also be applied to a semiconductor package 11 that does not have the sealing resin 24.

[0047] Referring to the right diagram in Fig. 5, one end of the metal wire 32 of the normal wiring 31 is connected to a pad 34 provided on the imaging device chip 21, and the other end is connected to a pad 33 provided on the semiconductor mounting substrate 22. The metal wire 32 of the normal wiring 31 is a linear wire, and is formed in a shape with a curved portion when viewed from the side. The curved portion of the metal wire 32 is located outside the seal glass resin 25. A configuration in which the curved portion of the metal wire 32 is enclosed in the sealing resin 24, which is not shown in Fig. 5, is also possible.

[0048] 5, one end of the metal wire 42 of the high wire wiring 41 is connected to the pad 34 provided on the imaging device chip 21, and the other end is connected to the pad 33 provided on the semiconductor mounting substrate 22. The metal wire 42 of the high wire wiring 41 is a linear wire, and is formed in a shape with a curved portion when viewed from the side. The curved portion of the metal wire 42 is located within the seal glass resin 25 and is enclosed within the seal glass resin 25.

[0049] The position of the highest point of the curved portion of the normal wire wiring 31 is designated as position P1, and the position of the highest point of the curved portion of the high wire wiring 41 is designated as position P2. The height of the highest point can be, for example, based on the interface between the imaging device chip 21 and the sealing glass resin 25. The highest point can be the position that is the longest distance from the reference position. The difference between position P1 and position P2 is difference a. In other words, the highest point of the curved portion of the high wire wiring 41 is located at a position that is higher than the position of the highest point of the curved portion of the normal wire wiring 31 by difference a.

[0050] 5 shows an example in which the curved portion of the normal wire wiring 31 is located outside the seal glass resin 25, but it may be encapsulated in the seal glass resin 25. Even if the curved portion of the normal wire wiring 31 is encapsulated in the seal glass resin 25, the normal wire wiring 31 and the high wire wiring 41 are each formed so as to satisfy the relationship that the highest point of the curved portion of the high wire wiring 41 is located at a position higher than the highest point of the curved portion of the normal wire wiring 31 by the difference a.

[0051] The high wire wiring 41 is formed so that its highest point is higher than that of the normal wire wiring 31. The curved portion of the high wire wiring 41, in other words, the metal wire 42 within a predetermined range including the highest point of the high wire wiring 41, is formed to a height such that a portion of the metal wire 42 is in partial contact with the seal glass 23 or is located a predetermined distance away from the seal glass 23. The distance b between the curved portion (highest point) of the high wire wiring 41 and the seal glass 23 is, for example, a length that is approximately the same as or less than the thickness of the metal wire 42 of the high wire wiring 41.

[0052] Whether or not the high wire wiring 41 comes into contact with the seal glass 23 depends on the size (weight) of the seal glass 23, the width (amount) of the seal glass resin 25, and the material of the seal glass resin 25. By providing the high wire wiring 41, the seal glass 23 can be held not only by the seal glass resin 25 but also by the high wire wiring 41.

[0053] The high wire wiring 41 may come into contact with the seal glass 23, but the normal wire wiring 31 is formed with a height and shape that prevents it from coming into contact with the seal glass 23. If the normal wire wiring 31 comes into contact with the seal glass 23, noise may be carried in the signal via the normal wire wiring 31. To prevent this, the normal wire wiring 31 is configured not to come into contact with the seal glass 23. Furthermore, by providing the high wire wiring 41, the seal glass resin 25 can be fixed at a desired position, making it possible to more reliably prevent the normal wire wiring 31 from coming into contact with the seal glass 23.

[0054] The normal wire wiring 31 is configured to prevent noise from being carried, and is therefore used as a wire for outputting signals processed by the imaging device chip 21 to a downstream control unit provided on the semiconductor mounting substrate 22, a wire for supplying power supply voltage, a grounded wire, etc. The high wire wiring 41 may come into contact with the seal glass 23, and is therefore provided as a wire for supplying power supply voltage, a grounded wire, or a dummy wiring. A dummy wiring is a line that does not supply a signal or power supply voltage. Furthermore, when the high wire wiring 41 is provided as a dummy wiring, the pads 33 and 34 connected to the dummy wiring are also provided as dummy pads to which no signal or power supply voltage is supplied.

[0055] When the high wire wiring 41 is used as a dummy wiring, it is also possible to configure such that both the normal wire wiring 31 and the high wire wiring 41 are connected to one pad 33 .

[0056] The seal glass resin 25 has the function of sealing the imaging element chip 21 and the function of holding the seal glass 23. By providing the high wire wiring 41, the function of holding the seal glass 23 can also be imparted to the high wire wiring 41, so the seal glass resin 25 itself may have a weaker function of holding the seal glass 23. For example, the seal glass resin 25 can be made of a material specialized for the function of sealing the imaging element chip 21 or a material with high thermal conductivity that releases heat generated inside the semiconductor package 11 to the outside, thereby expanding the options for materials for the seal glass resin 25.

[0057] <Regarding How the Normal Wire Lines 31 and the High Wire Lines 41 Are Formed> A method for forming the normal wire lines 31 and the high wire lines 41 will now be described with reference to FIG.

[0058] The normal wire wiring 31 can be formed by a bonding method called reverse bonding, as shown in A of Fig. 6. When forming the normal wire wiring 31 by reverse bonding, a gold wire of a predetermined thickness is discharged from a nozzle, and the tip is melted by a spark to form a ball on the pad 33 of the semiconductor mounting substrate 22 (a first bond is created).

[0059] When the ball is pressed onto the pad 33, a loop (corresponding to a curved portion) is formed so that the gold wire does not come into contact with the imaging element chip 21. A gold wire is pressed onto a pad 34 of the imaging element chip 21 and cut (a second bond is created).

[0060] When a normal wire wiring 31 is formed by reverse bonding, it is possible to form a normal wire wiring 31 having a metal wire 32 with a loop (curved portion) at a height c from the sensor surface (front surface) of the imaging element chip 21, as shown in A of Figure 6.

[0061] The high wire wiring 41 can be formed by bonding using a method called normal bonding, as shown in B of Fig. 6. When forming the high wire wiring 41 using normal bonding, a gold wire of a predetermined thickness is discharged from a nozzle, and the tip is melted by a spark to form a ball on the pad 34 of the image sensor chip 21 (a first bond is created).

[0062] When the ball is pressed against the pad 34, a loop (corresponding to the curved portion) is formed so that the gold wire does not come into contact with the imaging element chip 21. At this time, the gold wire is pulled up, so that the loop (curved portion) can be processed to be located at a height d from the surface of the imaging element chip 21.

[0063] After the loop is formed, a gold wire is pressure-bonded to the pad 33 of the semiconductor mounting substrate 22 and cut (a second bond is formed). When the high wire wiring 41 is formed using a normal bond, it is possible to form the high wire wiring 41 having the metal wire 32 such that the loop (curved portion) is at a height d (height d > height c) from the surface of the image sensor chip 21, as shown in FIG. 6B.

[0064] In this way, by selectively using reverse bonding and normal bonding when forming the wire wiring, the normal wire wiring 31 and the high wire wiring 41 can be formed, respectively.

[0065] The formation method illustrated here is one example, and the normal wire wiring 31 and the high wire wiring 41 may be formed by other methods. For example, the normal wire wiring 31 may be formed with a normal bond to have a height c, and the high wire wiring 41 may be formed with a reverse bond to have a height d. For example, both the normal wire wiring 31 and the high wire wiring 41 may be formed with either a reverse bond or a normal bond, and the heights of the loops may be different during formation.

[0066] The shape of the high wire wiring 41 may be, for example, a shape as shown in Fig. 7. The shape of the high wire wiring 41 shown in Fig. 7 is horizontal (flat) at its highest point. In the shape of the high wire wiring 41 shown in Fig. 7, the metal wire 42 drawn out from the pad 33 side changes from a straight shape to a curved shape, and the curved portion extends horizontally from the position where it reaches its highest point while maintaining the position of the highest point, then becomes curved near the pad 34 of the imaging element chip 21 and is connected to the pad 34.

[0067] A part or all of the curved shape of the image pickup element chip 21 near the pads 34 is enclosed in a seal glass resin 25 (not shown in FIG. 7).

[0068] For example, by applying a normal bond, it is possible to form various loop shapes, and as shown in Figure 7, it is also possible to form a high wire wiring 41 whose highest point is a straight line and has a straight line that is parallel to the surface of the semiconductor mounting substrate 22.

[0069] Second Embodiment Fig. 8 shows an example of a planar configuration of a semiconductor package 11b in a second embodiment, and Fig. 9 shows an example of a cross-sectional configuration of the semiconductor package 11b taken along line A-A' in Fig. 8. The same parts as those in the semiconductor package 11 in the first embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted where appropriate.

[0070] 8 and 9, the semiconductor package 11b has high wire wiring 41b provided on each of two sides of the image sensor chip 21. High wire wiring 41b-1 and high wire wiring 41b-2 are provided on the upper side of the image sensor chip 21 in the figure, and high wire wiring 41b-1' and high wire wiring 41b-2' are provided on the lower side of the image sensor chip 21 in the figure.

[0071] The high wire wiring 41b-1 provided on the upper side of the image sensor chip 21 in the drawing includes pads 61-1 and 61-2 provided on the image sensor chip 21 and a metal wire 42b-1 wired between the pads 61-1 and 61-2. The high wire wiring 41b-2 includes pads 61-3 and 61-3 provided on the image sensor chip 21 and a metal wire 42b-2 wired between the pads 61-3 and 61-4.

[0072] The pads 61-1 and 61-4 are provided at both ends of one side of the imaging element chip 21, and the pads 61-2 and 61-3 are provided approximately in the center of one side of the imaging element chip 21. As shown in Fig. 8, the pads 61-2 and 61-3 may be formed as a single pad, with the metal wires 42b-1 and 42b-2 connected to both ends of the pad, respectively. In this case, the single pad formed by including the pads 61-2 and 61-3 may be formed larger than the pads 61-1 and 61-2.

[0073] 9, the pads 61-2 and 61-3 may be formed as separate pads, and the metal wires 42b-1 and 42b-2 may be connected to the respective pads. In this case, the pads 61-2 and 61-3 may be formed to have approximately the same size as the pads 61-1 and 61-2.

[0074] Pads 61-1 to 61-4 are all provided on the imaging element chip 21. In the semiconductor package 11b according to the second embodiment, pads 61 provided on the imaging element chip 21 are connected to each other by metal wires 42b to form high wire interconnections 41b.

[0075] 9, the metal wires 42b-1 and 42b-2 of the high wire wirings 41b-1 and 41b-2 are formed in a straight line parallel to the surface of the imaging element chip 21, with the highest point at that point. The metal wire 42b is formed in a shape that straddles a plurality of normal wire wirings 31 so as not to come into contact with the normal wire wirings 31.

[0076] The high wire wiring 41b is enclosed in the seal glass resin 25. The high wire wiring 41b having such a shape can be formed by applying the normal bond described with reference to FIG.

[0077] Similarly, pads 61-1' to 61-4' are provided on the lower side of the image pickup device chip 21. A high wire wiring 41b-1' including a metal wire 42b-1' connecting the pad 61-1' and the pad 61-2', and a high wire wiring 41b-2' including a metal wire 42b-2' connecting the pad 61-3' and the pad 61-4' are provided.

[0078] In the example shown in Figure 8, high wire wiring 41b is arranged on each of two sides of the imaging element chip 21, but it is also possible to configure the imaging element chip 21 so that high wire wiring 41b is arranged on each of three or four sides.

[0079] In the example shown in Figure 8, high wire wiring 41b-1 and high wire wiring 41b-2 are arranged on the upper side of the imaging element chip 21, and high wire wiring 41b-1' and high wire wiring 41b-2' are arranged on the lower side, but it is also possible to configure it so that two of these four high wire wirings 41b, for example, high wire wiring 41b-1 and high wire wiring 41b-2' are arranged.

[0080] The high wire wiring 41b-1 and the high wire wiring 41b-2 may be provided as one high wire wiring 41b, in other words, a configuration may be provided in which a high wire wiring 41b is provided that is made up of a metal wire 42b that connects the pad 61-1 and the pad 61-4.

[0081] Here, an example is shown in which two wires, 41b-1 and 41b-2, are formed on one side, but two or more wires 41b may be formed on one side.

[0082] As in the first embodiment, in the second embodiment, the sealing glass 23 can be held by the high wire wiring 41b, the deformation amount of the sealing glass resin 25 can be kept within a predetermined range, and the semiconductor package 11 can be made smaller.

[0083] Furthermore, noise can be suppressed by connecting the high wire 41b to a reference power supply voltage, for example, ground (GND). Connecting each of the pads 61-1 to 61-4 to GND forms a GND loop that connects the GNDs together, thereby achieving the effect of suppressing noise.

[0084] <Third embodiment> Fig. 10 shows an example of a planar configuration of a semiconductor package 11c according to a third embodiment, and Fig. 11 is an enlarged view of a portion of the high wire wiring 41c-1 shown in Fig. 10. The same parts as those in the semiconductor package 11 according to the first embodiment are given the same reference numerals, and descriptions thereof will be omitted as appropriate.

[0085] 10, high wire wiring 41c is provided at each of two corners of the image sensor chip 21. The high wire wiring 41c-1 provided at the upper right corner of the image sensor chip 21 in the drawing includes metal wires 42c-1 and 42c-2 that are wired to an L-shaped pad 71-1 provided on the image sensor chip 21.

[0086] 11, the pad 71-1 is provided at a corner of the imaging element chip 21 and is formed in an L-shape to match the shape of that corner. A metal wire 42c-1 is connected to the horizontal side of the pad 71-1, and a metal wire 42c-2 is connected to the horizontal side of the pad 71-2.

[0087] The pad 71-1 of the high wire wiring 41c-1 is integrally formed in an L-shape, and the metal wire 42c is formed by arranging two separated metal wires 42c in an L-shape.

[0088] In the semiconductor package 11c of the third embodiment, metal wires 42c are connected to pads 71 ​​provided on the imaging device chip 21 to form high wire interconnections 41c.

[0089] Although not shown, the metal wires 42c-1 and 42c-2 of the high wire wiring 41c-1 in the third embodiment are formed in a straight line parallel to the sensor surface (front surface) of the image sensor chip 21, similar to the metal wires 42b-1 and 42b-2 shown in Figure 9, with this line being the highest point. The high wire wiring 41c is also enclosed in the seal glass resin 25. The high wire wiring 41c having such a shape can be formed, for example, by applying the normal bond described with reference to Figure 7.

[0090] Similarly, an L-shaped pad 71-2 is provided in the lower left corner of the image pickup element chip 21 in the figure, and a high wire wiring 41c-2 is provided, which includes a metal wire 42c-1' connecting one end of the L-shaped pad 71-2 to the center, and a metal wire 42c-2' connecting the other end of the pad 71-2 to the center.

[0091] In the example shown in Figure 10, high wire wiring 41c is arranged at each of two corners of the imaging element chip 21, but it is also possible to configure the imaging element chip 21 so that high wire wiring 41c is arranged at each of three or four corners.

[0092] As in the first embodiment, in the third embodiment, the sealing glass 23 can be held by the high wire wiring 41c, the deformation amount of the sealing glass resin 25 can be kept within a predetermined range, and the semiconductor package 11 can be made smaller.

[0093] 12 is a diagram showing an example of a planar configuration of a semiconductor package 11d according to a fourth embodiment. The same components as those in the semiconductor package 11 according to the first embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted as appropriate.

[0094] 12 is an enlarged view of a corner of the semiconductor package 11d. The high wire wiring 41d included in the semiconductor package 11d shown in FIG.

[0095] 12, pads 33d-1 and 33d-2 are provided at the corners of the semiconductor mounting substrate 22. The pads 33d-1 and 33d-2 are connected by a metal wire 42d, thereby forming a high wire wiring 41.

[0096] Although not shown, the high wire wiring 41d, like the metal wires 42b-1 and 42b-2 shown in Fig. 9, is formed in a straight line parallel to the sensor surface (surface) of the image sensor chip 21, with this line being the highest point. Furthermore, a portion of the high wire wiring 41d (metal wire 42d), specifically, the high wire wiring 41d (metal wire 42d) located on the image sensor chip 21, is enclosed in the seal glass resin 25. The high wire wiring 41d having such a shape can be formed, for example, by applying the normal bond described with reference to Fig. 7.

[0097] The high wires 41 d can be arranged in one, two, three, or four corners of the semiconductor mounting substrate 22 .

[0098] As in the first embodiment, in the fourth embodiment, the sealing glass 23 can be held by the high wire wiring 41d, the deformation amount of the sealing glass resin 25 can be kept within a predetermined range, and the semiconductor package 11 can be made smaller.

[0099] 13 is a diagram showing an example of a cross-sectional configuration of a semiconductor package 11e according to a fifth embodiment. The same components as those in the semiconductor package 11 according to the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0100] 13 is formed of a metal wire 42e having a linear shape extending perpendicularly from the pad 34. The high wire 41e is connected to one pad 34 provided on the imaging element chip 21.

[0101] While the first to third embodiments have shown configuration examples in which the high wire wiring 41 is connected to two pads, the high wire wiring 41e in the fourth embodiment is connected to one pad 34. Therefore, although shown in Fig. 13, it is also possible to configure the semiconductor mounting substrate 22 so that the pad 33 to which the metal wire 42e of the high wire wiring 41 is connected is not provided.

[0102] 14, the high wire wiring 41e can be configured to have a curved shape and include a metal wire 42e' formed in a spring shape. By forming the metal wire 42e' in a spring shape, the high wire wiring 41e' can absorb the weight of the seal glass resin 25 and hold it more securely.

[0103] The semiconductor package 11e may have one or more high wire wirings 41e (41e'), and may have a plurality of high wire wirings 41e. A single semiconductor package 11e may have a configuration in which the high wire wirings 41e and the high wire wirings 41e' are mixed.

[0104] As in the first embodiment, in the fifth embodiment, the seal glass 23 can be held by the high wire wiring 41e, 41e', the deformation amount of the seal glass resin 25 can be kept within a predetermined range, and the semiconductor package 11 can be made smaller.

[0105] 15 is a diagram showing an example of a cross-sectional configuration of a semiconductor package 11f according to a sixth embodiment. The same parts as those in the semiconductor package 11 according to the first embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted as appropriate.

[0106] A high wire 41f included in a semiconductor package 11f shown in FIG. 15 has a shape similar to that of the high wire 41 in the first embodiment shown in FIG. 1, cut halfway.

[0107] 15A is connected to the pad 34 provided on the imaging element chip 21, but is not connected to the pad 33 on the semiconductor mounting substrate 22. Like the metal wire 42 in the first embodiment, the metal wire 42f has a curved portion, and the curved portion is formed at a height that contacts the sealing glass resin 25 or contacts the sealing glass resin 25 via the sealing glass resin 25.

[0108] The curved portion of the metal wire 42f is encapsulated in the seal glass resin 25. One end of the metal wire 42f is connected to the pad 34, and the other end is in a floating state outside the seal glass resin 25 without being connected to a pad or the like. This portion is encapsulated in the seal resin 24 when the sealing resin 24 is provided.

[0109] 15B, the metal wire 42f' of the high wire wiring 41f' is connected to the pad 33 provided on the semiconductor mounting substrate 22, but is not connected to the pad 34 of the imaging element chip 21. Like the metal wire 42 of the first embodiment, the metal wire 42f' has a curved portion, and the curved portion is formed at a height that contacts the sealing glass resin 25 or contacts the sealing glass resin 25 via the sealing glass resin 25.

[0110] The curved portion of the metal wire 42f' is enclosed in the seal glass resin 25. One end of the metal wire 42f' is connected to the pad 33, and the other end is in a floating state within the seal glass resin 25 without being connected to a pad or the like.

[0111] 15 has been described using an example in which the high wire wiring 41 shown in FIG. 1 is cut in the middle, but it is also possible to apply the normal bond described with reference to FIG. 7 to a high wire wiring 41 in which the highest point is linear as the sixth embodiment. The part with the highest point may be curved or linear, as long as it is located below the seal glass 23 and is enclosed in the seal glass resin 25.

[0112] As in the first embodiment, in the sixth embodiment, the seal glass 23 can be held by the high wire wiring 41f, 41f', the deformation amount of the seal glass resin 25 can be kept within a predetermined range, and the semiconductor package 11 can be made smaller.

[0113] <Application Examples to Electronic Devices> The present technology is applicable to general electronic devices that use an imaging element in an image capture unit (photoelectric conversion unit), such as imaging devices such as digital still cameras and video cameras, portable terminal devices with imaging functions, copiers that use an imaging element in an image reading unit, etc. The imaging element may be formed as a single chip, or may be in the form of a module having an imaging function in which the imaging unit and a signal processing unit or an optical system are packaged together.

[0114] FIG. 16 is a block diagram showing an example of the configuration of an imaging device as an electronic device to which the present technology is applied.

[0115] 16 includes an optical unit 1001 including a lens group and the like, an image sensor (image capturing device) 1002, and a DSP (Digital Signal Processor) circuit 1003, which is a camera signal processing circuit. The image sensor 1000 also includes a frame memory 1004, a display unit 1005, a recording unit 1006, an operation unit 1007, and a power supply unit 1008. The DSP circuit 1003, frame memory 1004, display unit 1005, recording unit 1006, operation unit 1007, and power supply unit 1008 are interconnected via a bus line 1009.

[0116] The optical unit 1001 takes in incident light (image light) from a subject and forms an image on the imaging surface of the image sensor 1002. The image sensor 1002 converts the amount of incident light formed on the imaging surface by the optical unit 1001 into an electrical signal on a pixel-by-pixel basis and outputs the signal as a pixel signal.

[0117] The display unit 1005 is configured with a thin display such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display, and displays moving images or still images captured by the imaging element 1002. The recording unit 1006 records the moving images or still images captured by the imaging element 1002 on a recording medium such as a hard disk or semiconductor memory.

[0118] An operation unit 1007, under user operation, issues operation commands for various functions of the image sensor 1000. A power supply unit 1008 appropriately supplies various types of power to the DSP circuit 1003, frame memory 1004, display unit 1005, recording unit 1006, and operation unit 1007 as operating power sources.

[0119] The semiconductor package 11 including the imaging element chip 21 described above can be applied to a part of the imaging device shown in FIG.

[0120] <Application Example to Endoscopic Surgery System> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0121] FIG. 17 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0122] 17 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0123] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0124] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0125] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0126] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0127] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0128] The light source device 11203 is composed of a light source such as an LED (light emitting diode), and supplies irradiation light to the endoscope 11100 when photographing the surgical site, etc.

[0129] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0130] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0131] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0132] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0133] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow-band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissue (autofluorescence observation), or by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0134] FIG. 18 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0135] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0136] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0137] The imaging unit 11402 may include one imaging element (a so-called single-chip type) or multiple imaging elements (a so-called multi-chip type). When the imaging unit 11402 is configured as a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to a 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is configured as a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0138] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0139] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0140] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0141] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0142] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0143] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0144] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0145] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0146] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102 .

[0147] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0148] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0149] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.

[0150] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0151] <Application to a Mobile Body> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0152] FIG. 19 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0153] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 19, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0154] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0155] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0156] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0157] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0158] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0159] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0160] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0161] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12030 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0162] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 19, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0163] FIG. 20 is a diagram showing an example of the installation position of the imaging unit 12031.

[0164] In FIG. 20, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0165] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0166] 20 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0167] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0168] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0169] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0170] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0171] The effects described in this specification are merely examples and are not limiting, and other effects may also be present.

[0172] It should be noted that the embodiments of the present technology are not limited to the above-described embodiments, and various modifications are possible within the scope of the present technology.

[0173] The present technology can also be configured as follows: (1) A semiconductor package comprising: an imaging element chip having a first pad; a substrate on which the imaging element chip is mounted and having a second pad; a first wire wiring connecting the first pad to the second pad, between the first pads, or between the second pads via a metal wire; a second wire wiring connecting the first pad to the second pad via a metal wire; and a resin provided around the imaging element chip and bonding a seal glass provided on the light incident surface side of the imaging element chip, wherein the highest point of the first wire wiring, which is farthest from the surface of the imaging element chip, is located closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin. (2) The semiconductor package according to (1), wherein the highest point of the first wire wiring is located at a curved portion of the metal wire of the first wire wiring. (3) The semiconductor package according to (1), wherein the highest point of the first wire wiring is linear. (4) The semiconductor package according to any one of (1) to (3), wherein two or more of the first wire wirings are included. (5) The semiconductor package according to any one of (1) to (4), wherein the first wire wirings are provided on at least two sides of the imaging element chip. (6) The semiconductor package according to any one of (1) to (5), wherein the first wire wirings are connected to two first pads provided on one side of the imaging element chip so as to straddle the second wire wirings. (7) The semiconductor package according to (6), wherein two or more of the first wire wirings are formed on one side of the imaging element chip. (8) The semiconductor package according to any one of (1) to (4), wherein the first wire wirings are provided on at least two corners of the imaging element chip. (9) The semiconductor package according to (8), wherein the first pads to which the first wire wirings are connected are formed in an L shape.(10) The semiconductor package according to (9), further comprising: the metal wire connecting one end of the L-shaped first pad to approximately the center, and the metal wire connecting the other end of the L-shaped first pad to approximately the center. (11) The semiconductor package according to any of (1) to (10), wherein a first bond of the first wire wiring is formed on the first pad, and a first bond of the second wire wiring is formed on the second pad. (12) The semiconductor package according to any of (1) to (11), wherein a distance between the highest point of the first wire wiring and the seal glass is equal to or less than a thickness of the metal wire of the first wire wiring. (13) An electronic device comprising: an imaging element chip having a first pad; a substrate on which the imaging element chip is mounted and having a second pad; a first wire wiring connecting the first pad to the second pad, the first pads together, or the second pads together with a metal wire; a second wire wiring connecting the first pad to the second pad with a metal wire; and a resin provided around the imaging element chip and bonding a seal glass provided on the light incident surface side of the imaging element chip, wherein the highest point of the first wire wiring, which is farthest from the surface of the imaging element chip, is located closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin. (14) A semiconductor package comprising: an imaging element chip having a first pad; a substrate on which the imaging element chip is mounted and having a second pad; a first wire wiring connected to either the first pad or the second pad; a second wire wiring connecting the first pad and the second pad by a metal wire; and a resin provided around the imaging element chip and adhering a seal glass provided on the light incident surface side of the imaging element chip, wherein the highest point of the first wire wiring, which is farthest from the surface of the imaging element chip, is located closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin.(15) The semiconductor package according to (14), wherein the highest point of the first wire wiring is located at a curved portion of the metal wire of the first wire wiring. (16) The semiconductor package according to (14), wherein the highest point of the first wire wiring is a linear portion parallel to a surface of the imaging element chip. (17) The semiconductor package according to (14), wherein the first wire wiring is formed in a linear shape in a vertical direction from the first pad. (18) The semiconductor package according to (14), wherein the first wire wiring is formed in a spring shape in a vertical direction from the first pad. (19) An electronic device comprising: an imaging element chip having a first pad; a substrate on which the imaging element chip is mounted and having a second pad; a first wire wiring connected to either the first pad or the second pad; a second wire wiring connecting the first pad and the second pad by a metal wire; and a resin provided around the imaging element chip and adhering a seal glass provided on the light incident surface side of the imaging element chip, wherein the highest point of the first wire wiring, which is the longest distance from the surface of the imaging element chip, is provided at a position closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin.

[0174] REFERENCE SIGNS LIST 11 semiconductor package, 21 imaging element chip, 22 semiconductor mounting substrate, 23 seal glass, 24 sealing resin, 25 seal glass resin, 26 die bond resin, 31 normal wire wiring, 32 metal wire, 33 pad, 34 pad, 41 high wire wiring, 42 metal wire, 61 pad, 71 pad

Claims

1. A semiconductor package comprising: an image sensor chip having a first pad; a substrate on which the image sensor chip is mounted and having a second pad; a first wire wiring connecting the first pad to the second pad, or between the first pads, or between the second pads, with a metal wire; a second wire wiring connecting the first pad to the second pad with a metal wire; and a resin provided around the image sensor chip and bonding a seal glass provided on the light incident surface side of the image sensor chip, wherein the highest point of the first wire wiring, which is the longest distance from the surface of the image sensor chip, is located closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin.

2. The semiconductor package according to claim 1, wherein the highest point of the first wire interconnect is located at a curved portion of the metal wire of the first wire interconnect.

3. The semiconductor package according to claim 1, wherein the highest point of the first wire is in the shape of a straight line.

4. The semiconductor package according to claim 1, comprising two or more of the first wire interconnections.

5. The semiconductor package according to claim 1, wherein the first wire wiring is provided on at least two sides of the image pickup device chip.

6. The semiconductor package according to claim 1, wherein the first wire wiring is connected to two of the first pads provided on one side of the imaging element chip so as to straddle the second wire wiring.

7. The semiconductor package according to claim 6, wherein two or more of the first wires are formed on one side of the imaging element chip.

8. The semiconductor package according to claim 1, wherein the first wire wiring is provided at least at two corners of the image pickup device chip.

9. The semiconductor package according to claim 8, wherein the first pad to which the first wire is connected is formed in an L-shape.

10. The semiconductor package according to claim 9, further comprising: a metal wire connecting one end of said first pad formed in an L-shape to approximately the center thereof; and a metal wire connecting the other end of said first pad to approximately the center thereof.

11. The semiconductor package according to claim 1, wherein a first bond of the first wire wiring is formed on the first pad, and a first bond of the second wire wiring is formed on the second pad.

12. The semiconductor package according to claim 1, wherein the distance between the highest point of the first wire wiring and the sealing glass is equal to or less than the thickness of the metal wire of the first wire wiring.

13. An electronic device comprising: an image sensor chip having a first pad; a substrate on which the image sensor chip is mounted and having a second pad; a first wire wiring connecting the first pad to the second pad, or between the first pads, or between the second pads, with a metal wire; a second wire wiring connecting the first pad to the second pad with a metal wire; and a resin provided around the image sensor chip and bonding a seal glass provided on the light incident surface side of the image sensor chip, wherein the highest point of the first wire wiring, which is the longest distance from the surface of the image sensor chip, is provided at a position closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin.

14. A semiconductor package comprising: an image sensor chip having a first pad; a substrate on which the image sensor chip is mounted and having a second pad; a first wire wiring connected to either the first pad or the second pad; a second wire wiring connecting the first pad and the second pad by a metal wire; and a resin provided around the image sensor chip and bonding a seal glass provided on the light incident surface side of the image sensor chip, wherein the highest point of the first wire wiring, which is the longest distance from the surface of the image sensor chip, is provided at a position closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin.

15. The semiconductor package of claim 14, wherein the highest point of the first wire trace is located at a curved portion of the metal wire of the first wire trace.

16. The semiconductor package according to claim 14, wherein the highest point of the first wire is a straight line portion parallel to a surface of the image sensor chip.

17. The semiconductor package according to claim 14, wherein the first wire is formed in a straight line extending vertically from the first pad.

18. The semiconductor package according to claim 14, wherein the first wire is formed in a spring shape extending vertically from the first pad.

19. An electronic device comprising: an image sensor chip having a first pad; a substrate on which the image sensor chip is mounted and having a second pad; a first wire wiring connected to either the first pad or the second pad; a second wire wiring connecting the first pad and the second pad by a metal wire; and a resin provided around the image sensor chip and bonding a seal glass provided on the light incident surface side of the image sensor chip, wherein the highest point of the first wire wiring, which is the longest distance from the surface of the image sensor chip, is provided at a position closer to the seal glass than the highest point of the second wire wiring, and the highest point of the first wire wiring is encapsulated in the resin.

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