Data transmission method and device, and system

Direct data transmission between computing devices through the CXL interface and processing chip is solved, and the problem of low data transmission efficiency in RDMA technology is achieved and efficient data transmission is achieved.

WO2025138694A1PCT designated stage expired Publication Date: 2025-07-03XFUSION DIGITAL TECH CO LTD
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Patent Information

Application Number
PCT/CN2024/103376
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-26
Filing Date
2024-07-03
Publication Date
2025-07-03

AI Technical Summary

Technical Problem

Data transmission efficiency between computing devices is low, and existing RDMA technology requires network semantic conversion of data, resulting in a longer transmission time.

Method used

By using the Computation Quick Link (CXL) interface and processing chip, the storage information of the target data is directly obtained and data is transmitted between computing devices based on the stored information, avoiding network semantic conversion.

Benefits of technology

The data transmission efficiency between computing devices is improved, the overhead of computing devices is reduced, and the data is copied in parallel to further improve the transmission speed.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided in the embodiments of the present application are a data transmission method and device, and a system. The method is applied to a data transmission device, which comprises a processing chip, a first CXL interface and a second CXL interface, wherein the processing chip is connected to both the first CXL interface and the second CXL interface, the first CXL interface is configured to connect to a first device, and the second CXL interface is configured to connect to a second device; and the method comprises: in response to a request for transmitting target data from the first device to the second device, the processing chip acquiring, from the first device and by means of the first CXL interface, first storage information of the target data, and acquiring, from the second device and by means of the second CXL interface, second storage information for storing the target data; and transmitting the target data in the first device to the second device on the basis of the first storage information and the second storage information. The method can improve the data transmission efficiency.
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Description

Data transmission method, device and system

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on December 26, 2023, with application number 202311805734.2 and application name “Data transmission method, device and system”, all contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of the present application relate to the field of computing device technology, and in particular to a data transmission method, device, and system. Background Art

[0003] Data can be transferred between computing devices. For example, a computing device can be a server.

[0004] Currently, computing devices can transmit data using Remote Direct Memory Access (RDMA) technology. When using RDMA, data must be transmitted in the form of network packets. The sending computing device must generate the network packets, and the receiving computing device must parse the network packets to complete the data transmission, resulting in low data transmission efficiency.

[0005] Summary of the Invention

[0006] The embodiments of the present application provide a data transmission method, device, and system to solve the technical problem of low data transmission efficiency.

[0007] In a first aspect, embodiments of the present application provide a data transmission method, applied to a data transmission device. The data transmission device includes a processing chip, a first Compute Express Link (CXL) interface, and a second CXL interface. The processing chip is connected to both the first CXL interface and the second CXL interface. The first CXL interface is used to connect to a first device, and the second CXL interface is used to connect to a second device. The method further includes:

[0008] In response to a request from the first device to transmit target data to the second device, the processing chip obtains first storage information of the target data from the first device through the first CXL interface, and obtains second storage information to be used to store the target data from the second device through the second CXL interface;

[0009] The target data in the first device is transferred to the second device according to the first storage information and the second storage information.

[0010] In the above solution, the first device can transmit target data to the second device through the data transmission device. During the transmission of the target data, there is no need to perform network semantic conversion on the target data, thereby improving data transmission efficiency.

[0011] In one possible implementation, the data transmission device includes one or more memories; and transmitting the target data in the first device to the second device according to the first storage information and the second storage information includes:

[0012] acquiring the target data in the first device through the first CXL interface according to the first storage information, and storing the target data in the memory;

[0013] The target data in the memory is stored in the second device through the second CXL interface according to the second storage information.

[0014] In the above solution, the data transmission device can obtain target data from the first device and can write the target data to the second device, thereby achieving the purpose of transmitting the target data from the first device to the second device.

[0015] In one possible implementation, the first storage information includes a storage address of a first storage space, and the number of the first storage space may be one or more. Acquiring the target data from the first device through the first CXL interface according to the first storage information includes:

[0016] Determining M copy threads according to a first amount of the memory and a second amount of the first storage space, where M is a minimum value of the first amount and the second amount;

[0017] Determine a storage address of a first storage space corresponding to each copy thread;

[0018] Through the first CXL interface, the M copy threads copy data in parallel according to the storage address of the corresponding first storage space, and store the copied data in the memory until the target data is stored in the memory.

[0019] In the above solution, by using M copy threads to copy data according to the storage addresses of the corresponding first storage spaces, the copy efficiency of the target data can be improved, thereby further improving the transmission efficiency of the target data.

[0020] In a possible implementation, for any copy thread, copying data according to a storage address of a corresponding first storage space by the copy thread includes:

[0021] Determining whether data corresponding to the storage address of the first storage space exists in the cache of the first device;

[0022] If yes, copying the data from the cache of the first device through the copy thread according to the storage address of the corresponding first storage space;

[0023] If not, data is copied from the memory of the first device through the copy thread according to the storage address of the corresponding first storage space.

[0024] In the above solution, if the cache of the first device includes data corresponding to the storage address of the first storage space, the processing chip of the data transmission device preferentially copies the data from the cache of the first device, further improving data transmission efficiency.

[0025] In a possible implementation, storing the target data in the memory includes:

[0026] Determine a memory corresponding to each copy thread in one or more memories;

[0027] The data copied by each copy thread is stored in the corresponding memory.

[0028] In the above solution, the data copied by each copy thread can be stored in the corresponding memory, so as to achieve the purpose of the data storage device copying the target data from the first device.

[0029] In a possible implementation, before transmitting the target data in the first device to the second device according to the first storage information and the second storage information, the method further includes:

[0030] determining a first space capacity of a storage space occupied by the target data in the first device according to the first storage information;

[0031] determining, according to the second storage information, a second space capacity of the storage space allocated by the second device for the target data;

[0032] It is determined whether the first space capacity and the second space capacity are the same.

[0033] In the above solution, if the first space capacity and the second space capacity are equal, it can be determined that the second device meets the storage requirements of the target data, and the data transmission device can transmit the target data from the first device to the second device.

[0034] In a possible implementation, before transmitting the target data in the first device to the second device according to the first storage information and the second storage information, the method further includes:

[0035] determining a first space capacity of a storage space occupied by the target data in the first device according to the first storage information;

[0036] determining a third space capacity of a memory in the data transmission device;

[0037] It is determined whether the third space capacity is greater than or equal to the first space capacity.

[0038] In the above solution, if the third space capacity is greater than or equal to the first space capacity, it can be determined that the storage space in the data transmission device is sufficient to store the target data, and the data transmission device can be used to transmit the target data.

[0039] In one possible implementation, the second storage information includes a storage address of a second storage space, and the number of the second storage space may be one or more. Storing the target data in the memory to the second device through the second CXL interface according to the second storage information includes:

[0040] Determining a mapping relationship between the target data and a storage address of the second storage space;

[0041] According to the mapping relationship, the target data is stored in the second storage space through the second CXL interface.

[0042] In the above solution, the target data in the memory can be stored in the second device, thereby achieving the purpose of transmitting the target data to the second device.

[0043] In a second aspect, an embodiment of the present application provides a data transmission device, including a processing chip and at least two CXL interfaces, wherein the processing chip is connected to each CXL interface, and the at least two CXL interfaces include a first CXL interface and a second CXL interface, wherein:

[0044] The first CXL interface is used to connect to a first device, the second CXL interface is used to connect to a second device, and the first device is to send target data to the second device;

[0045] The processing chip is used to obtain a first storage address of the target data in the first device and a second storage address in the second device where the target data is to be stored, and to transfer the target data in the first device to the second device according to the first storage address and the second storage address.

[0046] In the above solution, the first device can transmit target data to the second device through the data transmission device. During the transmission of the target data, there is no need to perform network semantic conversion on the target data, thereby improving data transmission efficiency.

[0047] In a third aspect, an embodiment of the present application provides a computing system, including a first device, a second device, and a data transmission device, wherein:

[0048] The data transmission device includes a processing chip, a first CXL interface, and a second CXL interface. The processing chip is connected to both the first CXL interface and the second CXL interface. The first CXL interface is connected to the first device, and the second CXL interface is connected to the second device.

[0049] The processing chip is configured to obtain first storage information of target data from the first device via the first CXL interface, and obtain second storage information to store the target data from the second device via the second CXL interface;

[0050] The target data in the first device is transferred to the second device according to the first storage information and the second storage information.

[0051] In the above solution, the first device can transmit target data to the second device through the data transmission device. During the transmission of the target data, there is no need to perform network semantic conversion on the target data, thereby improving data transmission efficiency.

[0052] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processing chip, they are used to implement the method as described in any one of the first aspects.

[0053] In the above solution, the first device can transmit target data to the second device through the data transmission device. During the transmission of the target data, there is no need to perform network semantic conversion on the target data, thereby improving data transmission efficiency.

[0054] The data transmission method, device, and system provided by the embodiments of the present application can obtain first storage information of target data from a first device via a first CXL interface, and obtain second storage information of target data to be stored from a second device via a second CXL interface. Based on the first and second storage information, the target data in the first device can be transmitted to the second device. This method eliminates the need for network semantic conversion of the target data, thereby improving data transmission efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0056] FIG1 is a schematic diagram of an application scenario provided by an embodiment of the present application;

[0057] FIG2 is a schematic diagram of data transmission provided in an embodiment of the present application;

[0058] FIG3 is another schematic diagram of data transmission provided in an embodiment of the present application;

[0059] FIG4 is a schematic structural diagram of a data transmission device provided in an embodiment of the present application;

[0060] FIG5 is a flow chart of a data transmission method provided in an embodiment of the present application;

[0061] FIG6 is a flow chart of another data transmission method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0062] Exemplary embodiments are described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numbers in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible implementations consistent with the present invention. Rather, they are merely examples of apparatuses and methods consistent with certain aspects of the present invention, as detailed in the appended claims.

[0063] The embodiments of the present application relate to the Compute Express Link (CXL) technology. To facilitate understanding, the CXL technology is first explained.

[0064] CXL: Refers to a high-speed serial protocol. CXL technology allows for fast, reliable data transfer between different components within a computer system. CXL technology aims to address issues such as memory capacity, memory bandwidth, and input / output latency.

[0065] The CXL protocol consists of three sub-protocols: CXL.io, CXL.cache, and CXL.memory.

[0066] CXL.io protocol: Essentially an extension of the high-speed serial computer expansion bus standard (Peripheral Component Interconnect Express, PCIE) protocol, CXL.io protocol is used for device discovery, configuration, register access, and interrupts.

[0067] CXL.cache protocol: This protocol defines how CXL devices access the compute device's memory. The CXL.cache protocol allows CXL devices to access the compute device's memory using a request / response mechanism.

[0068] CXL.memory protocol: This protocol is used to support the computing device processor to access the memory of the CXL device.

[0069] CXL devices can be Type 1 devices, Type 2 devices, and Type 3 devices.

[0070] Type 1 devices: Support the CXL.io and CXL.cache protocols. Type 1 devices may include a processing chip that accesses the computing device's memory. For example, a Type 1 device may be a network interface controller (NIC) or a smart network interface card (Smart NIC).

[0071] Type 2 devices: Support the CXL.io, CXL.cache, and CXL.memory protocols. Type 2 devices may include a processing chip and memory. A Type 2 device can access the memory of a computing device through the processing chip, and the computing device can also access the memory of a Type 2 device. For example, a Type 2 device may be a graphics processing unit (GPU) card, an application-specific integrated circuit (ASIC) card, a field programmable gate array (FPGA) card, or a neural network processor (NPU) card.

[0072] Type 3 devices: Support the CXL.io and CXL.memory protocols. Type 3 devices may include a controller chip and memory. Computing devices can access the memory of Type 3 devices. For example, a Type 3 device can be a memory expansion device.

[0073] For ease of understanding, the application scenarios involved in the embodiments of the present application are described below in conjunction with Figure 1.

[0074] Figure 1 is a schematic diagram of an application scenario provided by an embodiment of the present application. Referring to Figure 1, computing device 1 can perform data transmission with computing device 2. For example, the computing device can be a server.

[0075] Illustratively, computing device 1 may send data to be transmitted to computing device 2 , or computing device 1 may obtain data to be transmitted from computing device 2 .

[0076] The embodiments of the present application do not limit the specific type of computing device. For example, the computing device may be a server, a desktop computer, a tablet computer, or an artificial intelligence device. The server may be, for example, a graphics processing unit (GPU) server or an artificial intelligence (AI) server.

[0077] It should be noted that the number of computing devices may be two or more. FIG1 is merely an example of two computing devices, and does not constitute a limitation on the technical solution provided in the embodiments of the present application.

[0078] In the related art, data transmission between computing devices can be performed using RDMA technology. The following describes a method for transmitting data between computing devices in the related art with reference to FIG2 .

[0079] FIG2 is a schematic diagram of data transmission provided by an embodiment of the present application. Referring to FIG2 , computing device 1 may include memory 1 and network card 1, and computing device 2 may include memory 2 and network card 2. Computing devices 1 and 2 may communicate via the network card.

[0080] Currently, when transmitting data using RDMA technology, the network card of the data sending device can obtain the data to be transmitted from the memory of the data sending device, generate a network message based on the data to be transmitted, and send the network message to the network card of the data receiving device. The network message can include the data to be transmitted.

[0081] Accordingly, the data receiving device can receive the network message through the network card. The network card of the data receiving device can parse the network message to obtain the data to be transmitted from the network message.

[0082] For example, assume that computing device 1 shown in FIG2 is a data transmitting device and computing device 2 is a data receiving device. Network card 1 of computing device 1 can retrieve data to be transmitted from memory 1, generate a network message based on the data to be transmitted, and send the network message to network card 2 of computing device 2. The network message can include the data to be transmitted. Network card 2 can receive the network message and parse it to obtain the data to be transmitted.

[0083] During the data transmission process, the data to be transmitted needs to be transmitted in the form of network messages. The computing device needs to perform network semantic conversion on the data to be transmitted, which takes a long time and results in low data transmission efficiency.

[0084] In view of this, an embodiment of the present application provides a data transmission method to improve data transmission efficiency.

[0085] Figure 3 is another data transmission diagram provided by an embodiment of the present application. Referring to Figure 3 , computing device 1 may include memory 1 and a CXL interface. Computing device 2 may include memory 2 and a CXL interface. The data transmission device may include two CXL interfaces. Computing device 1 may be connected to the data transmission device via one CXL interface of the data transmission device, and computing device 2 may be connected to the data transmission device via another CXL interface of the data transmission device.

[0086] It is understandable that the CXL interface of the computing device 1 may be the CXL interface of the central processing unit of the computing device 1 , and the CXL interface of the computing device 2 may be the CXL interface of the central processing unit of the computing device 2 .

[0087] It should be noted that the number of CXL interfaces included in computing device 1 and computing device 2 can be one or more (a plurality can be two or more). The number of CXL interfaces included in the data transmission device can be two or more. Figure 3 only uses the example of computing device 1 / computing device 2 including one CXL interface and the data transmission device including two CXL interfaces as an example, and does not constitute a limitation on the technical solutions provided in the embodiments of the present application.

[0088] If the data transmission device includes multiple CXL interfaces, the data transmission device can connect to a computing device via each CXL interface. In other words, the data transmission device can connect to multiple computing devices. Any two or more of the multiple computing devices can transmit data via the data transmission device.

[0089] For example, assume that a data transmission device is connected to computing device 1, computing device 2, computing device 3, ..., and computing device n via multiple CXL interfaces, where n is an integer greater than or equal to 4. Computing device 1 can simultaneously transmit data to be transmitted to computing device 2, computing device 3, ..., and computing device n via the data transmission device; or computing device 1 can simultaneously transmit data 1 to be transmitted to computing device 2 via the data transmission device, while computing device 3 can simultaneously transmit data 2 to be transmitted to computing device 4 via the data transmission device.

[0090] Assuming that computing device 1 is a data sending device and computing device 2 is a data receiving device in Figure 3, the data transmission device can obtain the data to be transmitted from memory 1 of computing device 1 through the CXL interface, and write the data to be transmitted to computing device 2 through the CXL interface.

[0091] In the data transmission method provided in the embodiments of the present application, a data transmission device can complete data transmission between computing device 1 and computing device 2, without requiring the central processing units (CPUs) of computing devices 1 and 2 to participate in the data transmission, thereby reducing the computing device overhead. Furthermore, the data transmission device can complete data transmission between computing device 1 and computing device 2 using the CXL protocol and a CXL interface. This data transmission process eliminates the need for network semantic conversion of the transmitted data, thereby improving data transmission efficiency.

[0092] The following specific embodiments are used to describe the technical solutions of the embodiments of the present application in detail. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0093] Figure 4 is a schematic diagram of the structure of a data transmission device provided in an embodiment of the present application. Referring to Figure 4, the data transmission device may include a processing chip and two CXL interfaces, and the processing chip is connected to both CXL interfaces.

[0094] As shown in FIG4 , the data transmission device can access the memory of the data transmitting device via a processing chip to obtain data to be transmitted from the memory of the data transmitting device. The data transmission device can also write the data to be transmitted to the data receiving device to achieve data transmission between the data transmitting device and the data receiving device. For example, both the data transmitting device and the data receiving device can be the computing device shown in FIG1 .

[0095] The data transmission device shown in FIG4 may include a processing chip and may access the memory of a computing device through the processing chip. In other words, the data transmission device has the ability to access the memory of a computing device. Therefore, the data transmission device may be a Type 1 device.

[0096] It should be noted that the specific structure of the data transmission device is not limited in the embodiments of the present application. The data transmission device can be any electronic device having a structure similar to that shown in Figure 4. The data transmission device can include more or fewer components than shown, or combine or separate certain components, or arrange the components differently. The components shown in the figure can be implemented in hardware, software, or a combination of software and hardware.

[0097] Below, in conjunction with Figure 5, the data transmission method provided in the embodiment of the present application is described.

[0098] FIG5 is a flow chart of a data transmission method provided in an embodiment of the present application. The method may be performed by the data transmission device shown in FIG4 , or by a processing chip provided within the data transmission device. The following description will be based on an example in which the method is performed by a processing chip provided within the data transmission device. Referring to FIG5 , the method may include:

[0099] S501: In response to a request from a first device to transmit target data to a second device, the processing chip obtains first storage information of the target data from the first device via a first CXL interface, and obtains second storage information of the target data to be stored from the second device via a second CXL interface.

[0100] In this embodiment, the data transmission device may include a processing chip, a first CXL interface and a second CXL interface. The first CXL interface is connected to the first device, and the second CXL interface is connected to the second device.

[0101] The first device may be a data sending device for sending target data.

[0102] The second device may be a data receiving device for receiving target data.

[0103] Exemplarily, the first device may be a server for sending target data, such as the computing device 1 in FIG3 . The second device may be a server for receiving target data, such as the computing device 2 in FIG3 .

[0104] The first storage information may be a storage address of the target data in the first device. The storage address of the target data in the first device may be a physical address in a memory of the first device.

[0105] The second storage information may be a storage address of a storage space of the second device where the target data is to be stored. The storage address of the storage space of the second device where the target data is to be stored may be a physical address in a memory of the second device.

[0106] In this embodiment, the first device or the second device may request the processing chip to transmit target data. For example, the first device may send first storage information to the processing chip according to the CXL.io protocol to request the processing chip to transmit the target data; or the second device may send second storage information to the processing chip according to the CXL.io protocol to request the processing chip to transmit the target data.

[0107] It should be noted that before the processing chip obtains the first storage information and the second storage information, if the first device needs to transmit target data to the second device, the first device can determine the first storage information and request the data transmission device to transmit the target data. Furthermore, the first device can communicate with the second device to enable the second device to determine the amount of storage space required to store the target data. For example, the first device can communicate with the second device via a network. The second device can determine the second storage information based on the amount of storage space required to store the target data and request the data transmission device to transmit the target data.

[0108] In this embodiment, after determining the first storage information, the first device may send the first storage information to the processing chip via the first CXL interface according to the CXL.io protocol, so that the processing chip can obtain the first storage information. After determining the second storage information, the second device may send the second storage information to the processing chip via the second CXL interface according to the CXL.io protocol, so that the processing chip can obtain the second storage information.

[0109] In other embodiments, after determining the second storage information, the second device may further send the second storage information to the first device via the network. After determining the first storage information and receiving the second storage information sent by the second device, the first device may send the first storage information and the second storage information to the processing chip via the first CXL interface according to the CXL.io protocol, so that the processing chip can obtain the first storage information and the second storage information.

[0110] In yet another embodiment, after determining the first storage information, the first device may send the first storage information to the second device via a network. After determining the second storage information and receiving the first storage information sent by the first device, the second device may send the first storage information and the second storage information to the processing chip via a second CXL interface according to the CXL.io protocol, so that the processing chip can obtain the first storage information and the second storage information.

[0111] S502: Transfer target data in the first device to the second device according to the first storage information and the second storage information.

[0112] In this embodiment, the processing chip can read the target data from the first device according to the first storage information; the processing chip can also write the target data to the second device according to the second storage information to achieve the purpose of transmitting the target data in the first device to the second device.

[0113] Optionally, the data transmission device includes a memory, which may be one or more memories. The memory may be provided on the processing chip; alternatively, the memory may be provided independently of the processing chip and may be connected to the processing chip. For example, the memory may be a register, a cache, or a double data rate synchronous dynamic random access memory (DDR).

[0114] In this embodiment, the processing chip can obtain target data from the first device through the first CXL interface according to the first storage information and store the target data in the memory; and store the target data in the memory to the second device through the second CXL interface according to the second storage information.

[0115] Specifically, the processing chip can access the first device via the first CXL interface according to the CXL.cache protocol, read target data from the first device based on the first storage information, and store the target data in the memory. The processing chip can also access the second device via the second CXL interface according to the CXL.cache protocol, and store the target data stored in the memory to the second device based on the second storage information.

[0116] Optionally, after the processing chip stores the target data in the second device, the transmission status of the target data can be set to a completed state. For example, the status of the target data having completed transmission can be stored in a register of the processing chip. The first device and the second device can read the transmission status of the target data stored in the register by polling. Of course, the processing chip can also send an interrupt message to the first device and the second device. The interrupt message can be used to instruct the first device and the second device to obtain the transmission status of the target data from the data transmission device. After receiving the interrupt message, the first device and the second device can obtain the transmission status of the target data from the data transmission device, for example, obtaining the transmission status of the target data from the register.

[0117] Optionally, after the processing chip completes the task of transmitting the target data, it may continue to execute S501 - S502 to transmit other target data.

[0118] In the data transmission method provided in this embodiment, a processing chip of a data transmission device can obtain first storage information of target data from a first device via a first CXL interface, and obtain second storage information of target data to be stored from a second device via a second CXL interface. Based on the first and second storage information, the target data in the first device can be transmitted to the second device. This method eliminates the need for network semantic conversion of the target data, thereby improving data transmission efficiency.

[0119] Based on any of the above embodiments, the first storage information may include a storage address of at least one first storage space. The processing chip of the data transmission device may copy data from the first device via at least one copy thread. The data transmission method provided in the embodiment of the present application is further described below in conjunction with FIG6 .

[0120] FIG6 is a flow chart of another data transmission method provided in an embodiment of the present application. The method may be performed by the data transmission device shown in FIG4 , or by a processing chip provided within the data transmission device. The following description will be based on an example in which the method is performed by a processing chip provided within the data transmission device. Referring to FIG6 , the method may include:

[0121] S601 : Acquire first storage information of target data from a first device via a first CXL interface, and acquire second storage information of target data to be stored from a second device via a second CXL interface.

[0122] It should be noted that the specific implementation of S601 can be found in S501 and will not be repeated here.

[0123] Optionally, after the processing chip obtains the first storage information and the second storage information, it may also determine whether the transmission requirements of the target data are met based on the first storage information and the second storage information.

[0124] In this embodiment, whether the target data transmission requirement is met is determined in at least the following two situations:

[0125] Case 1: Determine whether the capacity of the storage space occupied by the target data in the first device is the same as the capacity of the storage space allocated for the target data in the second device.

[0126] In this case, the processing chip can determine the first space capacity of the storage space occupied by the target data in the first device based on the first storage information; determine the second space capacity of the storage space allocated by the second device for the target data based on the second storage information; and determine whether the first space capacity and the second space capacity are the same.

[0127] Specifically, the first storage information may include the storage address of the first storage space. The number of the first storage spaces may be one or more. The processing chip may determine the capacity of the first space based on the storage addresses of the one or more first storage spaces. The second storage information may include the storage address of the second storage space, and the number of the second storage spaces may be one or more. The processing chip may determine the capacity of the second space based on the storage address of the second storage space. If the capacity of the first space is the same as the capacity of the second space, the processing chip determines that it can start copying data from the first device. If the capacity of the first space is different from the capacity of the second space, the processing chip may terminate the data transmission.

[0128] In this case, if the first space capacity and the second space capacity are equal, it can be determined that the storage space allocated by the second device for the target data can be used to store the target data. In other words, the second device meets the storage requirements of the target data, and the data transmission device can transfer the target data from the first device to the second device.

[0129] Case 2: Determine whether the capacity of the memory in the data transmission device is greater than or equal to the capacity of the storage space occupied by the target data in the first device.

[0130] In this case, the processing chip can determine the first space capacity of the storage space occupied by the target data in the first device based on the first storage information; determine the third space capacity of the memory in the data transmission device; and determine whether the third space capacity is greater than or equal to the first space capacity.

[0131] Specifically, the first storage information may include a storage address of the first storage space. The number of the first storage spaces may be one or more. The processing chip may determine the capacity of the first storage space based on the storage addresses of the one or more first storage spaces. If the capacity of the first storage space is greater than the capacity of the third storage space of the memory, the processing chip may terminate the data transmission.

[0132] In this case, if the third space capacity is greater than or equal to the first space capacity, it can be determined that the storage space in the data transmission device is sufficient to store the target data. In other words, the data transmission device meets the transmission requirements of the target data.

[0133] It should be noted that, during the specific implementation process, the processing chip can determine whether the transmission requirements of the target data are met according to the method shown in any of the above cases, or a combination of the methods shown in the above two cases.

[0134] Optionally, if the target data transmission requirements are met, the processing chip may set the target data transmission status to ready and may also send an interrupt message to the first device and the second device. The interrupt message may be used to instruct the first device and the second device to obtain the target data transmission status from the data transmission device.

[0135] Optionally, after receiving the interruption information, the first device / second device may obtain the target data transmission status from the data transmission device. If the target data transmission status is ready, the first device / second device may send a target data transmission request to the processing chip to request the processing chip to start transmitting the target data.

[0136] S602: Determine M copy threads according to the first amount of memory and the second amount of the first storage space, where M is the minimum value of the first amount and the second amount.

[0137] In this embodiment, the data transmission device may include one or more memories. For example, the memory may be a register disposed on a processing chip. The one or more memories may be used to store target data.

[0138] In this embodiment, the first storage information includes the storage address of the first storage space, and the number of the first storage space may be one or more.

[0139] When the number of the first storage space is one, the first storage information includes a storage address of the first storage space. The first storage space may be a memory space in the first device for storing target data.

[0140] The storage address of the first storage space may be a physical address of a memory space in the first device for storing target data.

[0141] When there are multiple first storage spaces, the first storage information includes storage addresses of multiple first storage spaces. The first storage space may be a memory space in the first device for storing part of the target data.

[0142] The storage address of the first storage space may be a physical address of a memory space in the first device used to store part of the target data.

[0143] The storage address of the first storage space can be represented by the first address of the first storage space and the length of the first storage space; or, the storage address of the first storage space can be represented by the first address of the first storage space and the end address of the first storage space.

[0144] In this embodiment, if the number of the first storage space is one, the target data may be stored in a continuous storage space in the memory of the first device. If the number of the first storage space is multiple, the target data may be stored in multiple discontinuous storage spaces in the memory of the first device. Multiple means two or more.

[0145] In this embodiment, for any copy thread, the processing chip can copy target data in a continuous storage space through the copy thread, and can store the copied target data in the memory corresponding to the copy thread. In other words, the memory and the copy thread correspond to each other.

[0146] For example, assuming that the first number of memories in the data transmission device is 3 and the second number of first storage spaces is 2, the processing chip may determine that the number of copy threads is 2.

[0147] S603: Determine the storage address of the first storage space corresponding to each copy thread.

[0148] In this embodiment, if M is equal to the second number of first storage spaces, the processing chip may determine a storage address in the first storage space for each copy thread and copy the target data through a single parallel copy operation. If M is less than the second number of first storage spaces, the processing chip may determine one or more storage addresses in the first storage space for each copy thread and copy the target data through multiple parallel copy operations. The multiple times may be two or more times.

[0149] For example, assuming that M is equal to 2 and the second number is also equal to 2, the processing chip can determine a storage address of the first storage space for each copy thread. assuming that M is equal to 2 and the second number is equal to 3, the processing chip can determine a storage address of the first storage space for one copy thread and two storage addresses of the first storage space for another copy thread.

[0150] S604 : Using the first CXL interface, use M copy threads in parallel to copy data according to the storage address of the corresponding first storage space, and store the copied data in the memory until the target data is stored in the memory.

[0151] In this embodiment, if M is greater than 1, data is copied in parallel by M copy threads according to the storage address of the corresponding first storage space, which can improve the copy efficiency of the target data and further improve the transmission efficiency of the target data.

[0152] It should be noted that the method in which the processing chip copies data through each copy thread is the same. Below, taking any copy thread as an example, the process of the processing chip copying data through each copy thread is described.

[0153] In this embodiment, for any copy thread, when the copy thread copies data according to the storage address of the corresponding first storage space, it can be determined whether the data corresponding to the storage address of the first storage space exists in the cache of the first device; if so, the copy thread copies the data from the cache of the first device according to the storage address of the corresponding first storage space; if not, the copy thread copies the data from the memory of the first device according to the storage address of the corresponding first storage space. For example, the cache of the first device can be the CPU cache of the first device.

[0154] Specifically, the processing chip can first query the storage address of the first storage space in the cache of the first device. If the cache of the first device includes the storage address of the first storage space, the processing chip can copy the data corresponding to the storage address of the first storage space from the cache of the first device; if the cache of the first device does not include the storage address of the first storage space, the processing chip can copy the data corresponding to the storage address of the first storage space from the memory of the first device.

[0155] It should be understood that if the cache of the first device includes the storage address of the first storage space, the data corresponding to the storage address of the first storage space included in the cache of the first device is the same as the data corresponding to the storage address of the first storage space included in the memory of the first device.

[0156] In this embodiment, if the cache of the first device includes data corresponding to the storage address of the first storage space, the processing chip of the data transmission device preferentially copies the data from the cache of the first device, further improving data transmission efficiency.

[0157] In this embodiment, the processing chip may copy data from the storage address of the first storage space through the read semantics of the CXL.cache protocol.

[0158] In this embodiment, during a parallel data copying process, one copy thread may correspond to one memory. For any copy thread, the processing chip may store the data copied from the first storage space into the corresponding memory through the copy thread.

[0159] In an example, M is equal to the second number of the first storage space, and the processing chip can store the target data in the memory by copying the data once in parallel through M copy threads.

[0160] In another example, M is less than the second number of the first storage spaces, and the processing chip can perform multiple parallel copy processes through M copy threads, and can store the target data in the memory after the multiple parallel copy processes. The multiple times can be two or more times. For example, M is equal to 2, and the second number is equal to 3, that is, the processing chip has two memories, such as a first memory and a second memory. Then, the processing chip can use two copy threads to copy the data of the corresponding two first storage spaces to the first memory and the second memory respectively for the first time, and the processing chip can use one copy thread to copy the data of the remaining first storage space to the first memory or the second memory for the second time, thereby achieving the purpose of storing the target data in the memory.

[0161] S605 : Store the target data in the memory to the second device through the second CXL interface according to the second storage information.

[0162] In this embodiment, the second storage information may include a storage address of the second storage space, and the number of the second storage space may be one or more.

[0163] When the number of the second storage space is one, the second storage information includes a storage address of the second storage space. The second storage space may be a memory space in the second device for storing target data.

[0164] The storage address of the second storage space may be a physical address of a memory space in the second device for storing target data.

[0165] When there are multiple second storage spaces, the second storage information includes storage addresses of multiple second storage spaces. The second storage space may be a memory space in the second device for storing part of the target data.

[0166] The storage address of the second storage space can be represented by the first address of the second storage space and the length of the second storage space; or, the storage address of the second storage space can be represented by the first address of the second storage space and the end address of the second storage space.

[0167] In this embodiment, if the number of the second storage space is one, the target data may be stored in a continuous storage space in the memory of the second device. If the number of the second storage space is multiple, the target data may be stored in multiple discontinuous storage spaces in the memory of the second device. Multiple means two or more.

[0168] In this embodiment, the processing chip may store the target data in the memory to the second device through the write semantics of the CXL.cache protocol.

[0169] In this embodiment, the processing chip may determine a mapping relationship between target data and a storage address of the second storage space; and store the target data in the second storage space through the second CXL interface according to the mapping relationship.

[0170] It should be noted that the processing chip can determine the mapping relationship between the target data and the storage address of the second storage space according to the first storage information and the second storage information.

[0171] Specifically, if the first storage information includes a storage address of a first storage space, the processing chip can determine the number of second storage spaces; the target data can be divided into one or more copies (multiple copies are two or more copies) according to the number of second storage spaces, and the number of second storage spaces is the same as the number of copies of the target data; and the mapping relationship between each copy of the target data and the storage address of the second storage space can be determined in sequence according to the storage order of the second storage space and the order of each copy of the target data.

[0172] For example, assume that the first storage information includes a storage address of a first storage space, and the capacity of the first storage space is 5MB (i.e., the size of the target data is 5MB). Assume that the second storage information includes the storage addresses of two second storage spaces, the size of the first second storage space is 2MB, and the size of the second second storage space is 3MB. The processing chip can divide the target data into two parts, the size of the first part of the target data can be 2MB, and the size of the second part of the target data can be 3MB. The processing chip can determine that the first part of the target data corresponds to the storage address of the first second storage space, and the second part of the target data corresponds to the storage address of the second second storage space.

[0173] If the first storage information includes storage addresses of multiple first storage spaces, the processing chip can determine the storage order of the multiple first storage spaces and the number of second storage spaces; according to the storage order of the multiple first storage spaces, the target data stored in the multiple first storage spaces can be divided into one or more copies in sequence, and the number of second storage spaces is the same as the number of copies of the target data; and the mapping relationship between each copy of the target data and the storage address of the second storage space can be determined in sequence according to the storage order of the second storage space and the order of each copy of the target data.

[0174] For example, assume that the first storage information includes the storage addresses of two first storage spaces, the size of the first first storage space is 2 MB, and the size of the second second storage space is 2 MB. Assume that the second storage information includes the storage address of one second storage space. The processing chip can, based on the storage order of the two first storage spaces, concatenate the target data stored in the two first storage spaces into one target data, and can determine that the one target data corresponds to the storage address of the second storage space.

[0175] Assume that the first storage information includes the storage addresses of two first storage spaces, the size of the first first storage space is 2MB, and the size of the second second storage space is 2MB. Assume that the second storage information includes the storage addresses of two second storage spaces. The size of the first second storage space is 3MB, and the size of the second second storage space is 1MB. The processing chip can divide the target data into two parts based on the storage order of the two first storage spaces. The size of the first part of the target data can be 3MB, and the size of the second part of the target data can be 1MB. The processing chip can determine that the first part of the target data corresponds to the storage address of the first second storage space, and the second part of the target data corresponds to the storage address of the second second storage space.

[0176] Optionally, after determining the mapping relationship, the processing chip may store the target data in the CPU cache of the second device through the second CXL interface according to the mapping relationship.

[0177] Optionally, after the processing chip stores the target data in the second device, the transmission status of the target data can be set to a completed state. For example, the status of the target data having completed transmission can be stored in a register of the processing chip. The first device and the second device can read the transmission status of the target data stored in the register by polling. Of course, the processing chip can also send an interrupt message to the first device and the second device. The interrupt message can be used to instruct the first device and the second device to obtain the transmission status of the target data from the data transmission device. After receiving the interrupt message, the first device and the second device can obtain the transmission status of the target data from the data transmission device, for example, obtaining the transmission status of the target data from the register.

[0178] In the data transmission method provided in this embodiment, the processing chip can obtain first storage information of target data from a first device via a first CXL interface, and obtain second storage information of target data to be stored from a second device via a second CXL interface; M copy threads can be determined based on the first amount of memory and the second amount of first storage space; the storage address of the first storage space corresponding to each copy thread can be determined; the M copy threads can be used in parallel via the first CXL interface to copy data according to the corresponding storage address of the first storage space, and the copied data can be stored in the memory until the target data is stored in the memory; and the target data in the memory can be transferred to the second device via the second CXL interface based on the second storage information. In the above method, network semantic conversion of the target data is not required, thereby improving data transmission efficiency.

[0179] The embodiment of the present application further provides a data transmission device, including a processing chip and at least two CXL interfaces, wherein the at least two CXL interfaces include a first CXL interface and a second CXL interface, wherein:

[0180] The first CXL interface is used to connect to a first device, the second CXL interface is used to connect to a second device, and the first device is to send target data to the second device;

[0181] The processing chip is used to obtain a first storage address of the target data in the first device and a second storage address in the second device where the target data is to be stored, and to transfer the target data in the first device to the second device according to the first storage address and the second storage address.

[0182] The data transmission device provided in this embodiment can be used to execute the data transmission method shown in the above method embodiment. Its implementation principle and technical effects are similar and will not be described in detail here.

[0183] The embodiment of the present application further provides a computing system, including a first device, a second device, and a data transmission device, wherein:

[0184] The data transmission device includes a processing chip, a first CXL interface, and a second CXL interface, wherein the processing chip is connected to both the first CXL interface and the second CXL interface, the first CXL interface is connected to the first device, and the second CXL interface is connected to the second device;

[0185] The processing chip is configured to obtain first storage information of target data from the first device via the first CXL interface, and obtain second storage information to store the target data from the second device via the second CXL interface;

[0186] The processing chip is used to transmit the target data in the first device to the second device according to the first storage information and the second storage information.

[0187] The computing system provided in this embodiment can be used to execute the data transmission method shown in the above method embodiment. Its implementation principle and technical effects are similar and will not be described in detail here.

[0188] An embodiment of the present application also provides a computer-readable storage medium, in which computer execution instructions are stored. When the computer execution instructions are executed by a processing chip, they can be used to execute the data transmission method shown in the above method embodiment. The implementation principle and technical effects are similar and will not be repeated here.

[0189] All or part of the steps of the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a readable memory. When the program is executed, it performs the steps of the above-mentioned method embodiments; and the aforementioned memory (storage medium) includes: read-only memory (ROM), RAM, flash memory, hard disk, solid-state drive, magnetic tape, floppy disk, optical disc, and any combination thereof.

[0190] The present application embodiment is described with reference to the flow chart and / or block diagram of the method, device (system), and computer program product according to the embodiment of the present application. It should be understood that each process and / or box in the flow chart and / or block diagram and the combination of the process and / or box in the flow chart and / or block diagram can be realized by computer program instructions. These computer program instructions can be provided to the processing unit of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable terminal device to produce a machine, so that the instruction executed by the processing unit of the computer or other programmable terminal device produces a device for realizing the function specified in one process or multiple processes and / or one box or multiple boxes of the flow chart.

[0191] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0192] These computer program instructions can also be loaded onto a computer or other programmable terminal device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0193] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the embodiments of the present application are intended to include such modifications and variations.

[0194] In the embodiments of the present application, the terms "include", "comprise" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. The term "or" and its variations may refer to "and / or". In the embodiments of the present application, the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. In the embodiments of the present application, "multiple" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated before and after are in an "or" relationship.

[0195] Those skilled in the art will readily conceive of other embodiments of the present application after considering the invention disclosed in the specification and practice. The embodiments of the present application are intended to cover any variations, uses, or adaptations of the embodiments of the present application, which follow the general principles of the embodiments of the present application and include common knowledge or customary technical means in the art that are not disclosed in the embodiments of the present application.

Claims

1. A data transmission method, characterized in that, Applied to a data transmission device, the data transmission device includes a processing chip, a first Compute Express Link (CXL) interface, and a second CXL interface. The processing chip is connected to both the first CXL interface and the second CXL interface. The first CXL interface is used to connect to a first device, and the second CXL interface is used to connect to a second device. The method further includes: In response to a request from the first device to transmit target data to the second device, the processing chip obtains first storage information of the target data from the first device through the first CXL interface, and obtains second storage information for storing the target data from the second device through the second CXL interface; According to the first storage information and the second storage information, transmit the target data in the first device to the second device.

2. The method according to claim 1, wherein The data transmission device includes a memory, and the number of memories is one or more; the step of transmitting the target data in the first device to the second device according to the first storage information and the second storage information includes: According to the first storage information, obtain the target data in the first device through the first CXL interface and store the target data in the memory; According to the second storage information, store the target data in the memory in the second device through the second CXL interface.

3. The method according to claim 2, wherein The first storage information includes storage addresses of first storage spaces, and the number of the first storage spaces can be one or more; the step of obtaining the target data in the first device through the first CXL interface according to the first storage information includes: Determine M copy threads according to the first number of the memories and a second number of the first storage spaces, where M is the minimum value of the first number and the second number; Determine the storage addresses of the first storage spaces corresponding to each copy thread; Through the first CXL interface, parallelly copy data according to the storage addresses of the corresponding first storage spaces through the M copy threads and store the copied data in the memory correspondingly until the target data is stored in the memory.

4. The method according to claim 3, characterized in that For any one of the copy threads; the step of copying data according to the storage address of the corresponding first storage space through the copy thread includes: Determine whether there is data corresponding to the storage address of the first storage space in the cache of the first device; If so, copy the data from the cache of the first device through the copy thread according to the storage address of the corresponding first storage space; If not, copy the data from the memory of the first device through the copy thread according to the storage address of the corresponding first storage space.

5. The method according to any one of claims 2 to 4, characterized in that, The step of storing the target data in the memory includes: Determine the memory corresponding to each copy thread in one or more memories; Store the data copied by each copy thread in the corresponding memory.

6. The method according to any one of claims 1-5, characterized in that, Before transmitting the target data in the first device to the second device according to the first storage information and the second storage information, it further includes: Determine a first space capacity of the storage space occupied by the target data in the first device according to the first storage information; Determine a second space capacity of the storage space allocated by the second device for the target data according to the second storage information; Determine whether the first space capacity is the same as the second space capacity.

7. The method according to any one of claims 1-6, characterized in that, Before transferring the target data in the first device to the second device according to the first storage information and the second storage information, it further includes: Determine a first space capacity of the storage space occupied by the target data in the first device according to the first storage information; Determine a third space capacity of the memory in the data transfer device; Determine whether the third space capacity is greater than or equal to the first space capacity.

8. The method according to any one of claims 2-7, characterized in that The second storage information includes a storage address of a second storage space, and the number of the second storage spaces can be one or more; storing the target data in the memory to the second device through the second CXL interface according to the second storage information includes: Determine a mapping relationship between the target data and the storage address of the second storage space; Store the target data to the second storage space through the second CXL interface according to the mapping relationship.

9. A data transmission device, characterized in that, It includes a processing chip and at least two CXL interfaces, the processing chip is connected to each CXL interface, and the at least two CXL interfaces include a first CXL interface and a second CXL interface, wherein, The first CXL interface is used to connect to a first device, the second CXL interface is used to connect to a second device, and the first device is to send target data to the second device; The processing chip is used to obtain a first storage address of the target data in the first device and a second storage address in the second device where the target data is to be stored, and transfer the target data in the first device to the second device according to the first storage address and the second storage address.

10. A computing system, characterized in that, It includes a first device, a second device and a data transfer device, wherein, The data transfer device includes a processing chip, a first CXL interface and a second CXL interface, the processing chip is connected to the first CXL interface and the second CXL interface, the first CXL interface is connected to the first device, and the second CXL interface is connected to the second device; The processing chip is used to obtain first storage information of the target data from the first device through the first CXL interface and second storage information of the target data to be stored from the second device through the second CXL interface; The processing chip is used to transfer the target data in the first device to the second device according to the first storage information and the second storage information.

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