Wiring board and mounting structure using same
The wiring substrate's innovative printing groove design addresses the challenge of unclear printed images by reducing contrast differences, ensuring clear recognition of IDs and alignment marks through controlled laser irradiation.
Patent Information
- Application Number
- PCT/JP2024/044837
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-25
- Filing Date
- 2024-12-18
- Publication Date
- 2025-07-03
AI Technical Summary
In recent years, the expansion of the formation region of the wiring conductor on laminated wiring boards has made it difficult to print clear IDs and alignment marks, leading to variations in contrast and unclear printed images due to the need to print across regions with and without a conductor layer.
A wiring substrate design featuring a printing groove with varying depths and surface roughness in regions with and without a conductor layer, reducing contrast differences and improving recognition of printed parts through controlled laser irradiation.
The design ensures clear recognition of printed IDs and alignment marks by minimizing contrast variations, enhancing the visibility of printed images.
Smart Images

Figure JP2024044837_03072025_PF_FP_ABST
Abstract
Description
Wiring board and mounting structure using same
[0001] The present disclosure relates to a wiring board and a mounting structure using the same.
[0002] Conventionally, alignment marks or IDs indicating product numbers or the like are printed on wiring boards as described in Patent Document 1. Such printing is formed by grooves. The printing is recognized, for example, by capturing an image of reflected light emitted from a device.
[0003] Patent No. 4590272
[0004] The wiring board according to the present disclosure includes a first insulating layer having a first surface, a first conductor layer located on the first surface, a second insulating layer located so as to cover the first surface and the first conductor layer, and having a second surface facing the first surface and a third surface opposite the second surface, and a printing groove recessed from the third surface toward the second surface. When viewed from above, the printing groove has a first region where the printing groove and the first conductor layer overlap and a second region where the printing groove and the first conductor layer do not overlap. The printing groove has a first bottom in the first region and a second bottom in the second region. The depth from the third surface to the first bottom is smaller than the depth from the third surface to the second bottom.
[0005] A mounting structure according to the present disclosure includes the above-described wiring board and an electronic component located in a mounting area of the wiring board.
[0006] Fig. 5A is a plan view of a wiring board according to an embodiment of the present disclosure; Fig. 5B is an explanatory diagram for explaining a printing groove formed in a printing portion in a wiring board according to an embodiment of the present disclosure; Fig. 5C is an enlarged cross-sectional view showing an example of the printing groove shown in Fig. 2; Fig. 5D is a cross-sectional view for explaining region X shown in Fig. 3A; Fig. 5E is an explanatory diagram for explaining another embodiment of the printing groove; Fig. 5F is a cross-sectional view showing an example of the printing groove shown in Fig. 4; Fig. 5G is an enlarged explanatory diagram for explaining region Y shown in Fig. 5A;
[0007] In recent years, in wiring boards in which conductor layers and insulating layers are stacked one on top of the other, the area where wiring conductors are formed has expanded, making it difficult to print only on insulating layer areas where no conductor layers are located below. As a result, it is sometimes necessary to print across both insulating layer areas where conductor layers are located below and insulating layer areas where no conductor layers are located. However, when printed in this manner, variations in the contrast of the print occur. As a result, the image of the print may be unclear, such as missing parts. Therefore, there is a demand for wiring boards that allow printed areas such as IDs and alignment marks to be clearly recognized.
[0008] The wiring board according to the present disclosure has a configuration as described in the section on means for solving the above problems, so that printed portions such as IDs and alignment marks can be clearly recognized.
[0009] A wiring board according to an embodiment of the present disclosure will be described with reference to FIGS. 1 to 3B. FIG. 1 is a plan view of a wiring board 10 according to an embodiment of the present disclosure. The wiring board 10 shown in FIG. 1 has a printed portion 10A, such as an ID and an alignment mark. Although not shown in FIG. 1, the wiring board 10 includes, for example, a core layer and a build-up layer.
[0010] The core layer is located approximately at the center in the thickness direction of the wiring board 10. The core layer includes a core insulating layer and a core conductor layer. The core insulating layer is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more. The thickness of the core insulating layer is not particularly limited and may be, for example, 0.04 mm or more and 10.0 mm or less.
[0011] The core insulating layer may contain a reinforcing material. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, the core insulating layer may have dispersed therein an inorganic insulating filler such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.
[0012] The core conductor layer is located on the surface of the core insulating layer. The core conductor layer is not particularly limited as long as it is made of a conductive material. Examples of conductive materials include metals such as copper. The thickness of the core conductor layer is not particularly limited, and is, for example, 10 μm or more and 50 μm or less.
[0013] A through-hole conductor is located in the core insulating layer to electrically connect the upper and lower surfaces of the core insulating layer. The through-hole conductor is located in a through-hole that penetrates the upper and lower surfaces of the core insulating layer. The through-hole conductor is formed of a metal such as copper, similar to the core conductor layer. The through-hole conductor may be formed only on the inner wall surface, or may fill the through-hole. The through-hole conductor is connected to the core conductor layer on the surface of the core insulating layer.
[0014] The build-up layer is located on one or both sides of the core layer, and has a structure in which at least one build-up insulating layer and at least one build-up conductor layer are laminated.
[0015] Like the core insulating layer, the build-up insulating layer is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more.
[0016] The build-up insulating layers may be made of the same resin or different resins. The build-up insulating layers and the core insulating layers may be made of the same resin or different resins. The thickness of the build-up insulating layers is not particularly limited and may be, for example, 5 μm or more and 100 μm or less. The build-up insulating layers may have the same thickness or different thicknesses.
[0017] The build-up insulating layer may contain a reinforcing material. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, the build-up insulating layer may have dispersed therein an inorganic insulating filler such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.
[0018] The conductor layer for build-up is not limited as long as it is a conductor such as a metal, etc. Specifically, the conductor layer for build-up is formed of a metal foil such as a copper foil, or a metal plating such as copper plating.
[0019] Via-hole conductors are located in the build-up insulating layer to electrically connect the upper and lower surfaces of the build-up insulating layer. The via-hole conductors are located in via holes that penetrate the upper and lower surfaces of the build-up insulating layer. The via-hole conductors are formed, for example, by metal plating such as copper plating. The via-hole conductors are connected to build-up conductor layers located on both sides of the build-up insulating layer. The via-hole conductors may fill the via holes, or may be located only on the inner surfaces of the via holes.
[0020] As shown in FIGS. 2, 3A, and 3B, in wiring board 10 according to one embodiment, the build-up insulating layer located on the top surface of the build-up insulating layers corresponds to "second insulating layer 2," and the build-up insulating layer located below second insulating layer 2 corresponds to "first insulating layer 1." Furthermore, among the build-up conductor layers, the build-up conductor layer located on first surface 1a of first insulating layer 1 corresponds to "first conductor layer 3." FIG. 2 is an explanatory diagram illustrating print grooves 4 formed in print section 10A in wiring board 10 according to one embodiment of the present disclosure. FIG. 3A is an enlarged cross-sectional view showing an example of print groove 4 shown in FIG. 2. FIG. 3B is an enlarged explanatory diagram illustrating region X shown in FIG. 3A.
[0021] That is, the first conductor layer 3 is located on the first surface 1a of the first insulating layer 1, and the second insulating layer 2 is located so as to cover the first surface 1a and the first conductor layer 3. The second insulating layer 2 has a second surface 2a facing the first surface 1a of the first insulating layer 1 and a third surface 2b located on the opposite side of the second surface 2a. As shown in FIG. 3A , for example, the surface roughness of the first conductor layer 3 on the second surface 2a side may be greater than the surface roughness of the third surface 2b side. This allows the first conductor layer 3 to be firmly connected to the first insulating layer 1 on the second surface 2a side. For example, a skin layer composed only of resin without any inorganic insulating filler may be located on the first insulating layer side between the first insulating layer 1 and the second insulating layer 2. This further improves adhesion between the first insulating layer 1 and the second insulating layer 2.
[0022] In this specification, "first surface 1a of first insulating layer 1" refers to the surface of both surfaces of first insulating layer 1 that is farther from the core layer, i.e., the upper surface of first insulating layer 1. "second surface 2a of second insulating layer 2" refers to the surface of both surfaces of second insulating layer 2 that is closer to the core layer, i.e., the lower surface of second insulating layer 2. "third surface 2b of second insulating layer 2" refers to the surface of both surfaces of second insulating layer 2 that is farther from the core layer, i.e., the upper surface of second insulating layer 2.
[0023] Printing grooves 4 that form the printing section 10A are located in the second insulating layer 2. The printing grooves 4 are recessed from the third surface 2b toward the second surface 2a of the second insulating layer 2. Any number of alphabets and numbers are formed in the printing section 10A by the printing grooves 4.
[0024] In plan view, the printing groove 4 has a first region A1 where the first conductor layer 3 is located and a second region A2 where the first conductor layer 3 is not located. The first region A1 has a first bottom 41, and the second region A2 has a second bottom 42. In the printing groove 4, the first region A1 and the second region A2 have different depths. Specifically, the depth D1 from the third surface 2 b of the second insulating layer 2 to the first bottom 41 is smaller than the depth D2 from the third surface 2 b of the second insulating layer 2 to the second bottom 42.
[0025] The second region A2, where the first conductor layer 3 is not located, has weaker contrast than the first region A1, where the first conductor layer 3 is located. As a result, the printing in the second region A2 becomes unclear, and the recognition of the printed portion 10A becomes poor. By making the depth D1 smaller than the depth D2, i.e., by deepening the second region A2, where the first conductor layer 3 is not located, the difference (variation) in the contrast strength between the first region A1 and the second region A2 is reduced. As a result, the recognition of the printed portion 10A is improved.
[0026] The surface roughness of the first bottom portion 41 and the second bottom portion 42 is not limited. For example, the surface roughness of the first bottom portion 41 may be greater than the surface roughness of the second bottom portion 42. By increasing the surface roughness of the first bottom portion 41 in the first region A1, where contrast is strong, light is diffusely reflected when recognizing the printed portion 10A. This weakens the contrast and reduces the difference in contrast strength between the first region A1 and the second region A2. As a result, the recognizability of the printed portion 10A is further improved.
[0027] The surface roughness of the first bottom 41 may be in the range of 0.5 μm to 1.5 μm, and more preferably in the range of 0.8 μm to 1.2 μm. The surface roughness of the second bottom 42 may be in the range of 0.4 μm to 1.0 μm, and more preferably in the range of 0.5 μm to 0.9 μm. The difference between the surface roughness of the first bottom 41 and the surface roughness of the second bottom 42 is not limited and may be, for example, 0.07 μm to 0.6 μm.
[0028] In the wiring substrate 10, the printing groove 4 has a first side surface 4a in the first region A1 and a second side surface 4b in the second region A2. The first angle θ1 between the third surface 2b of the second insulating layer 2 and the first side surface 4a and the second angle θ2 between the third surface 2b of the second insulating layer 2 and the second side surface 4b are not limited. For example, the first angle θ1 may be larger than the second angle θ2.
[0029] The first region A1, where the first conductor layer 3 is located, has a greater effect of depth on contrast. Therefore, the amount of change in thickness of the second insulating layer 2 located on the first conductor layer 3 becomes gentler, thereby reducing the difference in contrast strength between the first region A1 and the second region A2. As a result, the recognizability of the printed portion 10A is further improved.
[0030] The first angle θ1 may be, for example, in the range of 140° to 165°, and more preferably in the range of 150° to 155°. The second angle θ2 may be, for example, in the range of 125° to 160°, and more preferably in the range of 130° to 150°. The difference between the first angle θ1 and the second angle θ2 is not limited and may be, for example, in the range of 8° to 21°.
[0031] The method for forming the printing grooves 4 is not limited. For example, they may be formed as follows: First, a first conductor layer 3 is formed on the first surface 1a of the first insulating layer 1. The first conductor layer 3 is formed, for example, by a semi-additive method or a subtractive method. Next, a second insulating layer 2 is formed so as to cover the first surface 1a of the first insulating layer 1 and the first conductor layer 3. In the second insulating layer 2, the surface facing the first surface 1a is the second surface 2a, and the surface opposite the second surface 2a is the third surface 2b.
[0032] Next, a laser is irradiated onto the third surface 2b of the second insulating layer 2 in the area where the print section 10A is to be formed, thereby forming the print grooves 4. The type of laser is not limited, and may be, for example, CO 2 Examples of lasers that can be used include a laser and a UV laser. When irradiating the third surface 2b with a laser to form the marking grooves 4, the portion corresponding to the first region A1 where the first conductor layer 3 is located can be irradiated with the laser less frequently, with a lower output, or with a faster scan speed, for example. Furthermore, the presence of the first conductor layer 3 allows the heat of the laser to easily escape. As a result, the energy of the laser used to perforate the second insulating layer 2 is reduced, and the first region A1 becomes shallower.
[0033] On the other hand, for the portion corresponding to the second region A2 where the first conductor layer 3 is not located, for example, the number of laser irradiations can be increased, the output can be increased, or the scanning speed can be slowed. Furthermore, since the first conductor layer 3 is not located, the heat of the laser is less likely to escape. As a result, the energy of the laser drilling the second insulating layer 2 is not reduced, and the second region A2 becomes deeper.
[0034] Increasing the laser irradiation time increases the surface roughness. On the other hand, shortening the laser irradiation time decreases the surface roughness. That is, for example, by increasing the irradiation time for the first region A1 and shortening the irradiation time for the second region A2, the surface roughness of the first bottom portion 41 becomes greater than the surface roughness of the second bottom portion 42.
[0035] Next, a wiring board according to another embodiment of the present disclosure will be described with reference to FIGS. 4 to 5B. In the wiring board according to the other embodiment, the same components as those in the wiring board 10 according to the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted. FIG. 4 is an explanatory diagram for explaining another embodiment of the printing groove 4. FIG. 5A is a cross-sectional view showing an example of the printing groove 4 shown in FIG. 4. FIG. 5B is an enlarged explanatory diagram for explaining region Y shown in FIG. 5A.
[0036] In the wiring board 10 according to one embodiment, the depth of the printing grooves 4 (depth from the third surface 2 b of the second insulating layer 2) is deeper in the second region A2 than in the first region A1, but the bottom of the printing grooves 4 is substantially parallel to the third surface 2 b near the boundary between the first region A1 and the second region A2. On the other hand, in the wiring board according to another embodiment, the depth of the printing grooves 4 (depth from the third surface 2 b of the second insulating layer 2) gradually increases from the first region A1 toward the second region A2, as shown in FIG.
[0037] If the depth of the printing groove 4 gradually increases from the first region A1 toward the second region A2, cracks are less likely to occur at the bottom of the printing groove 4. In other words, if the depth gradually increases, steps are less likely to exist at the bottom of the printing groove 4, and stress is less likely to concentrate at the corners of the steps. As a result, cracks are less likely to occur. Furthermore, the gradual change in thickness of the second insulating layer 2 located on the first conductor layer 3 reduces the difference in contrast between the first region A1 and the second region A2. As a result, the visibility of the printing section 10A is further improved.
[0038] Next, a mounting structure according to the present disclosure will be described. The mounting structure according to one embodiment includes a wiring board 10 according to one embodiment and an electronic component located in a mounting area of the wiring board 10. The wiring board 10 and the electronic component are connected via, for example, solder, between conductors (pads) located on the surface of the wiring board 10 and electrodes of the electronic component. The pads may be exposed through openings in a solder resist located on the surface of the wiring board 10. Examples of electronic components include semiconductor integrated circuit elements and optoelectronic elements. In the mounting structure according to one embodiment, electronic components may be located on both surfaces of the wiring board 10, or electronic components may be located on one surface and, for example, a motherboard may be located on the other surface.
[0039] The embodiments of the present disclosure have been described above. However, the invention according to the present disclosure is not limited to the above-described embodiments, and various modifications and improvements are possible within the scope of the present disclosure as shown in (1) to (6) below.
[0040] (1) A wiring board according to the present disclosure includes a first insulating layer having a first surface, a first conductor layer located on the first surface, a second insulating layer positioned to cover the first surface and the first conductor layer, and having a second surface facing the first surface and a third surface opposite the second surface, and a printing groove recessed from the third surface toward the second surface. When viewed from above, the printing groove has a first region where the printing groove and the first conductor layer overlap and a second region where the printing groove and the first conductor layer do not overlap. The printing groove has a first bottom in the first region and a second bottom in the second region. The depth from the third surface to the first bottom is smaller than the depth from the third surface to the second bottom. (2) In the wiring board described in (1) above, the printing groove has a first side surface in the first region and a second side surface in the second region, and the first angle formed between the first side surface and the third surface is larger than the second angle formed between the second side surface and the third surface. (3) In the wiring board described in (2) above, the difference between the first angle and the second angle is 8° or more and 21° or less. (4) In the wiring board described in any of (1) to (3) above, the surface roughness of the first bottom is larger than the surface roughness of the second bottom. (5) In the wiring board described in any of (1) to (4) above, the depth of the printing groove from the third surface gradually increases from the first region toward the second region. (6) A mounting structure according to the present disclosure includes the wiring board described in any of (1) to (5) above and an electronic component located in a mounting region of the wiring board.
[0041] 1 First insulating layer 1a First surface 2 Second insulating layer 2a Second surface 2b Third surface 3 First conductor layer 4 Print groove 41 First bottom 42 Second bottom 4a First side 4b Second side 10 Wiring board 10A Printing part A1 First area A2 Second area θ1 First angle θ2 Second angle
Claims
1. A wiring board including: a first insulating layer having a first surface; a first conductor layer located on the first surface; a second insulating layer located so as to cover the first surface and the first conductor layer and having a second surface facing the first surface and a third surface on the opposite side of the second surface; and a printing groove recessed from the third surface toward the second surface. When viewed in a plan view, the printing groove has a first region where the printing groove and the first conductor layer overlap and a second region where the printing groove and the first conductor layer do not overlap. The printing groove has a first bottom portion in the first region and a second bottom portion in the second region. The depth from the third surface to the first bottom portion is smaller than the depth from the third surface to the second bottom portion.
2. The wiring board according to claim 1, wherein the printing groove has a first side surface in the first region and a second side surface in the second region, and a first angle formed between the first side surface and the third surface is larger than a second angle formed between the second side surface and the third surface.
3. The wiring board according to claim 2, wherein a difference between the first angle and the second angle is 8° or more and 21° or less.
4. The wiring board according to any one of claims 1 to 3, wherein a surface roughness of the first bottom portion is larger than a surface roughness of the second bottom portion.
5. The wiring board according to any one of claims 1 to 4, wherein a depth of the printing groove from the third surface gradually increases from the first region toward the second region.
6. A mounting structure including the wiring board according to any one of claims 1 to 5 and an electronic component located in a mounting region of the wiring board.
Citation Information
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