Stacked doping source structure, related high-quality emitter and preparation method therefor

Abstract

The present invention provides a stacked doping source structure, a related high-quality emitter and a preparation method therefor. The stacked doping source structure comprises a nanometer silicon oxide layer, a doped silicon oxide layer, and a doping source layer that are stacked on the front surface of a crystalline silicon substrate; the doped silicon oxide layer is doped with boron or phosphorus atoms; the material of the doping source layer is selected from among one of boron / phosphorus-doped amorphous silicon, carbon-doped boron / phosphorus-doped amorphous silicon, nitrogen-doped boron / phosphorus-doped amorphous silicon, and carbon-nitrogen co-doped boron / phosphorus-doped amorphous silicon. According to the present invention, a front doping source is composed of nanometer silicon oxide, doped silicon oxide, and boron / phosphorus-doped amorphous silicon, so that the doping source structure has both a strong laser absorption capability and high boron / phosphorus concentration, thereby being conducive to reducing the laser power and illumination time required by the laser doped selective emitter technology, reducing surface recombination without losing a junction depth and sheet resistance, improving the passivation effect, and thus further prompting the improvement of the cell efficiency.

Description

A stacked doping source structure, related high-quality emitter and preparation method thereof Technical Field

[0001] The present invention relates to the technical field of photovoltaic cells, and in particular to a stacked doping source structure, a related high-quality emitter and a preparation method thereof. Background Art

[0002] Laser technology plays a crucial role in crystalline silicon solar cells. During the cell manufacturing process, its primary applications include laser doping, laser ablation, and laser scribing. Laser-processed selective emitter (SE) technology has been widely recognized in the industry for its ability to further reduce cell production costs and improve conversion efficiency. Laser SE technology utilizes the selective heating properties of lasers for selective doping, forming heavily doped regions at the contact point between the electrode grid lines and the silicon wafer. This increases the doping concentration in the electrode contact area, reduces contact resistance, and, by optimizing laser parameters, achieves higher photoelectric conversion efficiency.

[0003] Currently, laser doping is primarily used for boron diffusion in tunneling oxide passivated contact (TOPCon) cell technology. The most common boron diffusion technique in the industry is thermal diffusion, where boron tribromide (BBr3) and boron trichloride (BCl3) are passed through a high-temperature diffusion furnace to form borosilicate glass (BSG). The byproduct of BBr3 diffusion, B2O3, has a high boiling point and remains liquid throughout the diffusion process. Its viscosity increases with decreasing temperature, making it highly corrosive to quartz devices and prone to adhesion or even damage during the opening and closing of quartz furnace doors. While BCl3 can prevent door adhesion, it also produces highly corrosive byproducts such as HCl or Cl2, severely impacting the lifespan of equipment and pipelines. Furthermore, the boron concentration in the BSG boron source formed by thermal diffusion is very low, and boron has a low solid solubility in silicon. Therefore, laser doping of the boron atoms into the silicon substrate requires a higher-power laser. However, if the laser power is too high, it is easy to cause suede damage in the laser irradiation area, thereby affecting the subsequent passivation process. Therefore, it is difficult to use BSG as a boron source to achieve selective doping using laser.

[0004] To address these issues, patent documents CN116130539A and CN116994945A disclose processes for depositing source layers using CVD technology, which, to a certain extent, address the laser-selective doping problem. However, these technologies still generate boron defects during the process, leading to increased recombination. Furthermore, surface boron concentrations are difficult to reduce. These factors affect the passivation effect in non-laser regions, making further improvements in solar cell efficiency difficult. Summary of the Invention

[0005] In view of the shortcomings of the existing technology, the technical problem to be solved by the present invention is how to improve the absorption capacity of the doping source to the laser, while reducing the concentration of diffused elements on the emitter surface and improving the emitter passivation effect.

[0006] To solve the above problems, the first aspect of the present invention provides a stacked doping source structure, comprising a nano-silicon oxide layer, a doped silicon oxide layer and a doping source layer stacked on the front side of a crystalline silicon substrate, wherein the doped silicon oxide layer is doped with boron or phosphorus atoms, and the material of the doping source layer is selected from one of boron-doped / phosphorus amorphous silicon, carbon-doped boron-doped / phosphorus amorphous silicon, nitrogen-doped boron-doped / phosphorus amorphous silicon, and carbon-nitrogen co-doped boron-doped / phosphorus amorphous silicon.

[0007] The present invention uses nano-silicon oxide, doped silicon oxide, and boron / phosphorus-doped amorphous silicon to form a front doping source. The doping source structure takes into account strong laser absorption ability and high boron / phosphorus concentration, which is beneficial to reducing the laser power and illumination time required for laser SE technology. At the same time, it can reduce surface recombination without sacrificing junction depth and square resistance, improve the passivation effect, and thus promote the improvement of battery efficiency.

[0008] Furthermore, the thickness of the nano-silicon oxide layer is 1 to 3 nm, the thickness of the doped silicon oxide layer is 1 to 100 nm, and the thickness of the doping source layer is 10 to 500 nm. The ultra-thin nano-silicon oxide layer regulates the boron / phosphorus activation concentration in the non-laser region, improving the passivation effect. The presence of doped silicon oxide can reduce the boron / phosphorus activation concentration in the non-laser region, optimize boron diffusion, and enhance the passivation effect. Boron / phosphorus-doped amorphous silicon has a strong absorption capacity for laser light, allowing for effective doping under low-power laser conditions.

[0009] Furthermore, the boron doping concentration in the doping source layer is 5E17-5E19 cm -3 , phosphorus doping concentration is 5E17~1E20cm -3 The concentration of boron / phosphorus atoms in the doping source layer is very high, and it can be effectively doped under low-power laser. The addition of atoms such as C and N into the doping source layer can further enhance the passivation effect.

[0010] Furthermore, the stacked dopant source structure further includes a silicide layer disposed on the dopant source layer. The silicide layer is made of a material selected from silicon nitride, silicon carbide, silicon carbonitride, and silicon oxide, and has a thickness of 10 to 300 nm. The provision of the silicide layer can further reduce defects and provide a certain hydrogenation effect.

[0011] A second aspect of the present invention provides a method for preparing a high-quality emitter using the above-mentioned stacked doping source structure, comprising the following steps:

[0012] S1, preparing a nano-silicon oxide layer on the front surface of a crystalline silicon substrate;

[0013] S2, performing plasma treatment on the nano silicon oxide layer;

[0014] S3, depositing a doped silicon oxide layer on the surface of the nano silicon oxide layer;

[0015] S4, depositing a doping source layer on the surface of the doped silicon oxide layer;

[0016] S5. Laser processing is performed on the electrode region to diffuse boron or phosphorus into the crystalline silicon substrate;

[0017] S6. Performing high-temperature annealing to cause secondary diffusion of boron or phosphorus in the laser-treated area and diffusion of boron or phosphorus in the non-laser-treated area;

[0018] S7. Remove the remaining stacked doping source structure, and form a selective emitter structure on the front side of the crystalline silicon substrate.

[0019] Furthermore, before step S5, the method further includes depositing a silicide layer on the surface of the doping source layer.

[0020] Furthermore, chemical vapor deposition (CVD) is used to prepare the doped silicon oxide layer, doped source layer, and silicide layer. Using CVD to deposit the source layer avoids the use of conventional BBr3 thermal diffusion furnaces, saving production costs and ensuring uniform deposition, resulting in highly uniform emitter square resistance.

[0021] Furthermore, in step S1, the nano-silicon oxide layer is prepared by a method selected from a wet chemical method, a high-temperature oxidation method, an ozone oxidation method, and a plasma-assisted oxidation method. The silicon oxide prepared by the above method has good growth quality, strong barrier capability to dopants, and excellent interface chemical passivation.

[0022] Furthermore, in step S2, the plasma is selected from one or more of H2, Ar, N2O, C2O, and NH3. The nano-silicon oxide layer is subjected to plasma treatment to eliminate some interface point defects and further improve the passivation quality.

[0023] Furthermore, in step S5, the source layer is surface treated with a laser. The stacked doping source structure of the present invention has a much greater light absorption capacity than BSG, and can achieve more effective diffusion under the same laser power and irradiation time. Therefore, lower power and shorter irradiation time are used to achieve the same doping effect as a conventional BSG source layer, which is beneficial to reducing laser damage to the texture surface and laser process costs.

[0024] Furthermore, in step S6, the high temperature annealing treatment temperature is 800-1200° C., and the doping atoms are diffused into the substrate by the high temperature.

[0025] Furthermore, step S7 specifically includes: etching the doped source layer with an inorganic alkaline solution, etching the doped silicon oxide layer and the nano-silicon oxide layer with hydrofluoric acid, and then etching the crystalline silicon substrate surface with an organic alkaline solution or alternately etching the crystalline silicon substrate surface with hydrofluoric acid and nitric acid. The stacked structure can be combined with different etching solutions to improve the selective etching ratio, control the etching depth, and accurately remove the source layer.

[0026] A third aspect of the present invention provides a high-quality emitter, produced using the aforementioned method. The selective emitter produced using the process of the present invention effectively reduces the contact resistance between the emitter and the metal electrode, while also reducing recombination in the region outside the electrode. The emitter formed in the non-laser region after annealing exhibits excellent passivation properties.

[0027] Furthermore, the high-quality emitter contains carbon and / or nitrogen. Carbon and nitrogen atoms can inhibit the activation of boron, reduce the surface boron concentration, thereby reducing surface recombination and improving the passivation effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] FIG1 is a schematic structural diagram of a stacked doping source structure according to a specific embodiment of the present invention.

[0029] FIG2 is a schematic structural diagram of a stacked doping source structure according to another specific embodiment of the present invention.

[0030] FIG3 is a schematic flow chart of a method for preparing a selective emitter in a specific embodiment of the present invention.

[0031] FIG4 is a comparison diagram of the absorption spectra of Example 1 of the present invention and Comparative Example 1.

[0032] FIG5 is a graph showing the selective emitter boron diffusion curve in Example 5 of the present invention.

[0033] FIG6 is a graph showing selective emitter boron diffusion curves in Example 11 of the present invention and Comparative Example 6.

[0034] Description of reference numerals:

[0035] 1-crystalline silicon substrate, 2-nanometer silicon oxide layer, 3-doped silicon oxide layer, 4-doped source layer, 5-silicide layer, 6-laser processed area, 7-non-laser processed area. DETAILED DESCRIPTION

[0036] To make the above-mentioned objects, features, and advantages of the present invention more clearly understood, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. It should be noted that the following embodiments are only intended to illustrate the implementation methods and typical parameters of the present invention, and are not intended to limit the parameter ranges described in the present invention. Reasonable variations derived therefrom are still within the scope of protection of the claims of the present invention.

[0037] It should be noted that the endpoints of the ranges and any values ​​disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoints of each range, the endpoints of each range and individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be considered to be specifically disclosed herein.

[0038] A specific embodiment of the present invention provides a stacked dopant source structure, the typical structure of which is shown in Figure 1. It includes a nano-silicon oxide layer 2, a doped silicon oxide layer 3, and a dopant source layer 4 stacked sequentially on the front surface of a crystalline silicon substrate 1. This stacked dopant source structure is suitable for silicon wafers with different surface morphologies, including textured surfaces, alkaline polished surfaces, and acid polished surfaces.

[0039] In a specific embodiment, the thickness of the nano-silicon oxide layer 2 is 1 to 3 nm. The ultra-thin nano-silicon oxide layer 2 can adjust the boron / phosphorus activation concentration in the non-laser area and enhance the passivation effect.

[0040] In a specific embodiment, the doped silicon oxide layer 3 has a thickness of 1 to 100 nm and is doped with boron or phosphorus atoms. The doped silicon oxide layer 3 serves to prevent excessive etching and reduce the concentration of boron / phosphorus diffusion. The inclusion of oxygen in the doped silicon oxide optimizes boron / phosphorus diffusion, reducing surface recombination without sacrificing boron / phosphorus diffusion junction depth and sheet resistance, thereby improving the passivation effect. Furthermore, as the oxygen content increases, the surface boron concentration decreases rapidly, and the sheet resistance increases accordingly.

[0041] In a specific embodiment, the doping source layer 4 is a boron / phosphorus doped amorphous silicon with a thickness of 10 to 500 nm and a boron doping concentration of 5E17 to 5E19 cm -3 , phosphorus doping concentration is 5E17~1E20cm -3 The doping source layer 4 has a high boron / phosphorus concentration and has a strong laser absorption capability. Preferably, the doping source layer 4 is also doped with carbon and / or nitrogen elements, with a content of 5at% to 25at%, to enhance the passivation effect by doping C and N atoms.

[0042] The above-mentioned doping source structure takes into account strong laser absorption ability and high boron / phosphorus concentration, which is beneficial to reducing the laser power and illumination time required for laser SE technology. At the same time, this multi-layer doping source structure is beneficial to reducing the surface boron / phosphorus concentration, reducing defects, improving the emitter passivation effect, and promoting the improvement of battery efficiency.

[0043] A specific embodiment of the present invention also provides another stacked doping source structure, which adds an outer silicide layer 5 on the basis of the above embodiment. The typical structure is shown in Figure 2, including a nano-silicon oxide layer 2, a doped silicon oxide layer 3, a doping source layer 4 and a silicide layer 5 stacked in sequence on the front of the crystalline silicon substrate 1.

[0044] In a specific embodiment, the material of the silicide layer 5 is selected from silicon nitride, silicon carbide, silicon carbonitride, and silicon oxide, and the thickness of the silicide layer 5 is 10 to 300 nm. Adding the silicide layer 5 can further reduce defects and play a certain role in hydrogenation.

[0045] A specific embodiment of the present invention further provides a method for preparing a selective emitter using the above-mentioned stacked doping source structure. Taking an n-type crystalline silicon substrate as an example, a typical process flow is shown in FIG3 , comprising the following steps:

[0046] (1) Prepare an n-type silicon wafer, clean and texture the front side, and use it as the crystalline silicon substrate 1.

[0047] (2) A nano-silicon oxide layer 2 is prepared on the front surface of the crystalline silicon substrate 1. The nano-silicon oxide layer 2 is prepared by a wet chemical method, a high-temperature oxidation method, an ozone oxidation method, a plasma-assisted oxidation method, or the like.

[0048] (3) Plasma treatment is performed on the nano-silicon oxide layer 2. The plasma is selected from one or more of H2, Ar, N2O, C2O, and NH3. The plasma treatment method is preferably PECVD. This step can eliminate some interface point defects and further improve the passivation quality.

[0049] (4) depositing a doped silicon oxide layer 3 on the surface of the plasma-treated nano-silicon oxide layer 2, and adopting chemical vapor deposition technology to prepare the doped silicon oxide layer 3, including APCVD, LPCVD, PECVD, HWCVD, etc.

[0050] (5) Depositing a doping source layer 4 on the surface of the doped silicon oxide layer 3 , and preparing the doping source layer 4 by chemical vapor deposition technology, including APCVD, LPCVD, PECVD, HWCVD, etc.

[0051] (6) Depositing a silicide layer 5 on the surface of the doping source layer 4. The silicide layer 5 is prepared using chemical vapor deposition techniques, including APCVD, LPCVD, PECVD, HWCVD, etc. After completing this step, a stacked doping source structure comprising the nano-silicon oxide layer 2, the doped silicon oxide layer 3, the doping source layer 4, and the silicide layer 5 is obtained.

[0052] (7) Laser treatment is performed on the designed electrode area to diffuse the boron / phosphorus of the doping source structure into the crystalline silicon substrate 1. A nanosecond pulsed laser with a wavelength of 532nm or 325nm is used, with a laser power of 20 to 500W and a scanning rate of 10 to 120m / s. This step achieves the same doping effect as a conventional BSG source layer using lower power and shorter illumination time, which helps reduce laser damage to the texture surface and laser process costs.

[0053] (8) Perform a high-temperature annealing treatment to cause boron / phosphorus secondary diffusion in the laser-treated area 6 and boron / phosphorus diffusion in the non-laser-treated area 7. The high-temperature annealing treatment is typically performed at a temperature of 800-1200°C, preferably 950-1050°C, for 10-300 minutes in an atmosphere of nitrogen and oxygen.

[0054] (9) Removing the remaining dopant source structure. A wet etching process is used, and the etching solution is selected from HF, HNO3, inorganic alkali solution, organic alkali solution, etc. The specific steps are: using inorganic alkali solution to etch away the dopant source layer 4, using hydrofluoric acid to etch away the doped silicon oxide layer 3 and the nano-silicon oxide layer 2, and then using organic alkali solution to etch the surface of the crystalline silicon substrate 1. Micro-etching the surface of the crystalline silicon substrate 1 can also be accomplished by alternately etching with hydrofluoric acid and nitric acid.

[0055] After completing the above steps, a laser-processed region 6 and a non-laser-processed region 7 with different doping concentrations are formed on the front surface of the crystalline silicon substrate 1, as shown in Figure 3, resulting in a selective emitter structure. In a specific embodiment, the sheet resistance of the laser-processed region 6 of the selective emitter structure prepared using the above method is adjustable from tens to several hundred Ω / sq, while the sheet resistance of the non-laser-processed region 7 is adjustable from tens to several thousand Ω / sq. SIMS testing of the prepared emitter can measure the doping concentrations of elements such as boron, oxygen, and carbon in the emitter, as well as their diffusion within the silicon substrate.

[0056] The above method is also applicable to preparing laser-doped phosphorus emitters on p-type silicon wafers.

[0057] The technical solutions and technical effects of the present invention will be further described below through specific embodiments.

[0058] Example 1

[0059] After cleaning the n-type quartz substrate, the silicon oxide dielectric layer was treated with N2O / H2 plasma using PECVD. A 10nm thick doped silicon oxide film (with an oxygen content of 15at%) and a 50nm thick carbon-doped boron-doped amorphous silicon film (with a carbon content of 5at%) were then deposited.

[0060] Comparative Example 1

[0061] After cleaning the n-type quartz substrate, a 50nm borosilicate glass (BSG) film was deposited on the silicon wafer surface in a BBr3 diffusion furnace.

[0062] The light absorption spectra of the samples prepared in Example 1 and Comparative Example 2 were tested, and the results are shown in Figure 4. As can be seen from the absorption spectra in Figure 4, the carbon-doped boron-doped amorphous silicon deposited by PECVD has a much greater light absorption capacity than BSG, thus having a better laser doping effect.

[0063] Example 2

[0064] Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 50W, scanning rate is 30m / s) to carry out boron propulsion treatment. Clean and etch to remove the source layer.

[0065] Example 3

[0066] Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m / s) to carry out boron propulsion treatment. Clean and etch to remove the source layer.

[0067] Comparative Example 2

[0068] Prepare an n-type crystalline silicon substrate, clean it, and texturize it. Place the substrate in a BBr3 diffusion furnace and deposit a 50nm thick borosilicate glass (BSG) film. Use a 325nm nanosecond pulsed laser (50W laser power, 30m / s scan rate) to introduce boron. Clean and etch away the source layer.

[0069] Comparative Example 3

[0070] Prepare an n-type crystalline silicon substrate, clean it, and texturize it. Place the substrate in a BBr3 diffusion furnace and deposit a 50nm thick borosilicate glass (BSG) film. Use a 325nm nanosecond pulsed laser (25W laser power, 15m / s scan rate) to introduce boron. Clean and etch away the source layer.

[0071] The square resistance and junction depth of the laser-processed area of ​​the samples prepared in Example 2-3 and Comparative Example 2-3 were tested, and the results are shown in Table 1 below.

[0072] Table 1 Square resistance and junction depth of laser-processed area of ​​samples

[0073] It can be seen from the test results in Table 1 that under the same laser conditions, nano-silicon oxide / boron-doped silicon oxide / carbon-doped boron-doped amorphous silicon boron source can be more effectively doped; under low laser power conditions, BSG boron source is difficult to dope, while nano-silicon oxide / boron-doped silicon oxide / carbon-doped boron-doped amorphous silicon boron source can still achieve good doping effect.

[0074] Example 4

[0075] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 15at%) and a 50nm boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Perform annealing treatment at a high temperature of 1000°C for 240 minutes to form a pn junction. Then use KOH solution, HF, and TMAH to selectively etch the boron source layer. After etching, perform SIMS testing on the sample, and it can be measured that the silicon substrate is doped with boron, oxygen, and carbon elements. Use ALD aluminum oxide and plate-type PECVD silicon nitride to passivate the surface of the silicon substrate.

[0076] Example 5

[0077] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a silicon oxide dielectric layer of about 1.5 nm on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 5at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then use KOH solution, HF, and TMAH to selectively etch the boron source layer. After etching, perform SIMS testing on the sample, and it can be measured that the silicon substrate is doped with boron, oxygen, and carbon elements. Use ALD aluminum oxide and plate-type PECVD silicon nitride to passivate the surface of the silicon substrate. The boron diffusion curve of the selective emitter prepared in this embodiment is shown in Figure 5, and its square resistance is 244Ω / Sq.

[0078] Example 6

[0079] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then use KOH solution, HF, and TMAH to selectively etch the boron source layer. After etching, perform SIMS testing on the sample, and it can be measured that the silicon substrate is doped with boron, oxygen, and carbon elements. Use ALD aluminum oxide and plate-type PECVD silicon nitride to passivate the surface of the silicon substrate.

[0080] Example 7

[0081] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 25at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then use KOH solution, HF, and TMAH to selectively etch the boron source layer. After etching, perform SIMS testing on the sample, and it can be measured that the silicon substrate is doped with boron, oxygen, and carbon elements. Use ALD aluminum oxide and plate-type PECVD silicon nitride to passivate the surface of the silicon substrate.

[0082] Example 8

[0083] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 15at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then use KOH solution, HF, and TMAH to selectively etch the boron source layer. After etching, perform SIMS testing on the sample, and it can be determined that the silicon substrate is doped with boron, oxygen, and carbon elements. Use ALD aluminum oxide and plate-type PECVD silicon nitride to passivate the surface of the silicon substrate.

[0084] Example 9

[0085] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 25at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then use KOH solution, HF, and TMAH to selectively etch the boron source layer. After etching, perform SIMS testing on the sample, and it can be measured that the silicon substrate is doped with boron, oxygen, and carbon elements. Use ALD aluminum oxide and plate-type PECVD silicon nitride to passivate the surface of the silicon substrate.

[0086] Example 10

[0087] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 15at%), a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 15at%) and a 70nm silicon nitride film. Perform annealing at 1000°C for 240 minutes to form a pn junction. Then use KOH solution, HF and TMAH to selectively etch the boron source layer. After etching, perform SIMS testing on the sample, and it can be measured that the silicon substrate is doped with boron, oxygen and carbon elements. Use ALD aluminum oxide and plate-type PECVD silicon nitride to passivate the surface.

[0088] Comparative Example 4

[0089] Prepare an n-type crystalline silicon substrate, clean it, and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm thick silicon oxide dielectric layer on its surface. Then, deposit a 50nm thick boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Anneal it at 1000°C for 240 minutes to form a pn junction. Then, selectively etch the boron source layer with a KOH solution. After etching, passivate the surface using ALD aluminum oxide and plate-type PECVD silicon nitride.

[0090] Comparative Example 5

[0091] Prepare an n-type crystalline silicon substrate, clean it, and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 50nm boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Perform an annealing treatment at 1000°C for 240 minutes to form a pn junction. Then use KOH solution to selectively etch the boron source layer. After etching, use ALD aluminum oxide and plate-type PECVD silicon nitride to passivate the surface.

[0092] The emitter square resistance, junction depth and current density (J) of the emitter passivation sheets prepared in Examples 4-10 and Comparative Examples 4-5 were tested. 0,s ), and the results are shown in Table 2 below.

[0093] Table 2 Key parameters of emitter in non-laser treated area of ​​passivation film

[0094] The test results in Table 2 show that plasma treatment of the nano-silicon oxide layer and the addition of a boron-doped silicon oxide layer between the silicon oxide and the boron-doped amorphous silicon effectively suppress boron diffusion and defects on the silicon substrate surface in the non-lasing area, significantly enhancing the passivation of the boron emitter in this non-lasing area. Introducing carbon atoms into the boron-doped amorphous silicon further suppresses boron diffusion and improves the passivation effect. Adding a silicon nitride capping layer to the outermost layer further reduces defects and enhances the passivation effect.

[0095] Example 11

[0096] Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a silicon oxide dielectric layer of about 1.5 nm on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 10nm boron-doped silicon oxide film (oxygen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 25at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m / s) to carry out boron advancement treatment, followed by a high temperature annealing treatment of 1000°C for 240 minutes to form a heavily doped structure. KOH solution and HF are then used alternately to selectively etch the boron source layer.

[0097] Comparative Example 6

[0098] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a BBr3 diffusion furnace to deposit a 50nm thick BSG layer on the front side. Use a nanosecond pulsed laser with a wavelength of 325nm (laser power of 25W, scan rate of 15m / s) to carry out boron propulsion treatment, followed by a high-temperature annealing treatment at 1000℃ for 240min to form a heavily doped structure. Then, alternately use HF to selectively etch the boron source layer.

[0099] Boron diffusion curves and square resistances were measured using ECV and four-probe techniques on the emitters prepared in Example 11 and Comparative Example 6, with the results shown in Figure 6. These test results demonstrate that, compared to borosilicate glass, the laminated doping source structure of the present invention achieves higher boron concentrations and junction depths under the same laser and annealing conditions, resulting in more efficient doping.

[0100] Example 12

[0101] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm thick silicon oxide dielectric layer on the front side. Use PECVD to treat the silicon oxide dielectric layer with N2O / H2 plasma. Then, deposit a 10nm boron-doped silicon oxide film (oxygen content of 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content of 15at%). Use a nanosecond pulsed laser with a wavelength of 325nm (laser power of 25W, scanning rate of 15m / s) to carry out boron driving treatment on the designed electrode area. The entire structure is annealed at 1000°C for 240 minutes to form a selective emitter structure. Subsequently, KOH solution, HF, and TMAH are used to selectively etch the boron source layer. After etching, the surface is passivated with aluminum oxide and silicon nitride. Metal electrodes are printed on the electrode area using screen printing and then sintered in a belt furnace.

[0102] Comparative Example 7

[0103] An n-type crystalline silicon substrate is prepared, with the front surface textured, the back surface polished, and then subjected to standard RCA cleaning. A boron emitter is formed on the silicon wafer using BBr3 thermal diffusion. After etching away the boron source layer, the surface is passivated using aluminum oxide and silicon nitride. Metal electrodes are then screen-printed in the electrode area and sintered in a belt furnace.

[0104] The performance of the selective emitter prepared in Example 12 and the conventional boron emitter prepared in Comparative Example 7 were tested. The test contents included the overall current density (J 0,total ), the current density in the electrode contact area (J 0,met ) and contact resistivity (ρ c,met), the diffusion resistance of the non-electrode contact area (R sq ) and current density (J 0,pass ), and the results are shown in Table 3 below.

[0105] Table 3 Performance comparison of selective emitter and conventional boron emitter

[0106] From the test results in Table 3, it can be seen that the overall passivation performance, the passivation performance of the electrode contact area and the passivation performance of the non-electrode contact area of ​​the selective emitter structure prepared in Example 12 are significantly better than those of the boron emitter prepared by the conventional method.

[0107] Example 13

[0108] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on the front side. Use PECVD to treat the silicon oxide dielectric layer with N2O / H2 plasma. Then deposit a 5nm boron-doped silicon oxide film (oxygen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 15at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power of 25W, scanning rate of 15m / s) to carry out boron driving treatment on the designed electrode area. The entire substrate is annealed at a high temperature of 1000°C for 240 minutes to form a selective emitter structure. Subsequently, KOH solution, HF, and TMAH are used to selectively etch the boron source layer. Use 110°C nitric acid to treat the back side of the silicon wafer for 15 minutes to grow about 1.5nm of silicon oxide on the back side of the silicon wafer. An 80nm thick phosphorus-doped amorphous silicon layer is deposited on the backside of the silicon wafer using tubular PECVD, followed by annealing at 840°C for 30 minutes to form the TOPCon structure. The front side is passivated with aluminum oxide and silicon nitride. Electrodes are screen-printed on both sides, followed by belt furnace sintering.

[0109] Comparative Example 8

[0110] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Use the BBr3 thermal diffusion method to form a boron emitter on the front side of the crystalline silicon substrate. After RCA cleaning, use 110°C nitric acid treatment for 15 minutes to grow about 1.5nm of silicon oxide on the back side of the silicon wafer. Use tubular PECVD to deposit a 60nm phosphorus-doped amorphous silicon layer on the back side of the silicon wafer, and anneal at 840°C for 30 minutes to form a TOPCon structure. Passivate the front side with aluminum oxide and silicon nitride. Screen print electrodes on both sides and perform belt furnace sintering.

[0111] The key parameters of the TOPCon batteries prepared in Example 13 and Comparative Example 8 were tested, including the open circuit voltage (Voc ), short-circuit current (J sc ), fill factor (FF) and power conversion efficiency (PCE), and the results are shown in Table 4 below.

[0112] Table 4 Comparison of key parameters of TOPCon batteries of Example 13 and Comparative Example 8

[0113] The test results in Table 4 prove that the selective emitter prepared by the method shown in this patent significantly improves the open circuit voltage and fill factor of the battery. The efficiency of the prepared TOPCon battery can be increased by about 0.3% compared to the battery without a selective emitter.

[0114] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A stacked doping source structure, characterized in that, It includes a nano - silicon oxide layer, a doped silicon oxide layer, and a doped source layer stacked on the front surface of a crystalline silicon substrate. Boron or phosphorus atoms are doped in the doped silicon oxide layer, and the material of the doped source layer is selected from one of boron / phosphorus - doped amorphous silicon, carbon - doped boron / phosphorus - doped amorphous silicon, nitrogen - doped boron / phosphorus - doped amorphous silicon, and carbon - nitrogen co - doped boron / phosphorus - doped amorphous silicon.

2. The stacked doping source structure according to claim 1, wherein The thickness of the nano - silicon oxide layer is 1 - 3 nm, the thickness of the doped silicon oxide layer is 1 - 100 nm, and the thickness of the doped source layer is 10 - 500 nm.

3. The stacked doping source structure according to claim 1, characterized in that, The boron doping concentration in the doping source layer is 5E17 - 5E19 cm -3 , and the phosphorus doping concentration is 5E17 - 1E20 cm -3 .

4. The stacked doping source structure according to any one of claims 1-3, characterized in that, It further includes a silicide layer disposed on the doped source layer. The material of the silicide layer is selected from one of silicon nitride, silicon carbide, silicon carbonitride, and silicon oxide, and the thickness of the silicide layer is 10 - 300 nm.

5. A method for preparing a high-quality emitter using the stacked doping source structure according to any one of claims 1-4, characterized in that, It includes the following steps: S1. Prepare a nano - silicon oxide layer on the front surface of the crystalline silicon substrate; S2. Perform plasma treatment on the nano - silicon oxide layer; S3. Deposit a doped silicon oxide layer on the surface of the nano - silicon oxide layer; S4. Deposit a doped source layer on the surface of the doped silicon oxide layer; S5. Perform laser treatment on the electrode region to diffuse boron or phosphorus into the crystalline silicon substrate; S6. Perform high - temperature annealing treatment to cause secondary diffusion of boron or phosphorus in the laser - treated region and diffusion of boron or phosphorus in the non - laser - treated region; S7. Remove the remaining stacked doped source structure to form a selective emitter structure on the front surface of the crystalline silicon substrate.

6. The method for preparing a high-quality emitter according to claim 5, wherein Before the step S5, a silicide layer is further deposited on the surface of the doped source layer.

7. The method for preparing a high-quality emitter according to claim 6, wherein The doped silicon oxide layer, the doped source layer, and the silicide layer are prepared by chemical vapor deposition technology.

8. The method for preparing a high-quality emitter according to claim 5, characterized in that, In the step S1, the preparation method of the nano - silicon oxide layer is selected from one of wet chemical method, high - temperature oxidation method, ozone oxidation method, and plasma - assisted oxidation method.

9. The method for preparing a high-quality emitter according to claim 5, characterized in that, In the step S2, the plasma is selected from one or more of H2, Ar, N2O, C2O, and NH3.

10. The preparation method of the high-quality emitter according to claim 5, characterized in that, The step S7 specifically includes: etching and removing the doped source layer with an inorganic alkali solution, etching and removing the doped silicon oxide layer and the nano - silicon oxide layer with hydrofluoric acid, and then etching the surface of the crystalline silicon substrate with an organic alkali solution or etching the surface of the crystalline silicon substrate with alternating hydrofluoric acid and nitric acid.

11. A high-quality emitter, characterized in that, It is obtained by the preparation method according to any one of claims 5 - 10.

12. The high-quality emitter according to claim 11, wherein The high - quality emitter contains carbon and / or nitrogen elements.

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