Multi-level isolated buck type DC / DC converter

Abstract

Provided in the present invention is a multi-level isolated buck type DC / DC converter, comprising two transformers, wherein a primary side of each transformer is provided with a single winding, and a secondary side thereof is provided with two windings; the primary sides of the two transformers are connected in series and are then connected to an LLC resonant circuit, so as to implement isolation and voltage regulation; the other side of the LLC resonant circuit is connected to a flying-capacitor-clamped five-level half-bridge switch network, so as to reduce voltage stress; and the secondary sides of the two transformers are each sequentially connected to a rectifier bridge and a buck circuit, output ends of the two buck circuits are in interleaved parallel connection, and the buck circuits are responsible for closed-loop voltage stabilization regulation, thereby realizing high-gain buck of the converter. Compared with conventional LLC converters, the present invention can significantly reduce voltage stress, can achieve a wider input voltage range and high-gain buck, and can significantly reduce switching loss and improve the efficiency of the converter.

Description

A multi-level isolated step-down DC / DC converter Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a multi-level isolated step-down DC / DC converter. Background Art

[0002] For traditional DC / DC single-stage and two-stage buck converters, excessively high switching voltage stress will lead to increased converter losses and further reduced efficiency. At the same time, in order to improve efficiency, the input voltage range is narrowed, and it cannot be used in situations with a wide voltage input range. Due to the above-mentioned shortcomings of traditional DC / DC buck converters, it is necessary to improve the converter topology architecture to simultaneously achieve the converter's wide input voltage range, low voltage stress, high gain buck and high efficiency characteristics.

[0003] Wide-input-range, high-gain step-down DC / DC converter topologies are divided into isolated and non-isolated topologies. For traditional non-isolated DC / DC converters that step down high voltages, achieving a higher voltage step-down gain requires a lower duty cycle. However, an excessively low duty cycle affects the response speed of the DC / DC converter and increases output noise, making system operation unstable and negatively impacting signal quality. More importantly, it can lead to extremely high switching voltage stress, increasing converter losses and reducing power supply efficiency. Compared with non-isolated converters, isolated DC / DC converters offer high conversion efficiency. Using an isolated design can improve equipment safety and reliability. Furthermore, isolated converters are highly integrated, helping customers efficiently convert and manage converters from power to point-of-load, achieving long product life, low cost, and intelligence. However, isolated converters also face challenges that need to be addressed, such as high voltage stress, a narrow input voltage range, and low efficiency.

[0004] In order to overcome the above-mentioned shortcomings of the converter, further reduce voltage stress and reduce losses, a variety of voltage stress reduction technologies such as flying capacitor clamping, diode clamping, and switched capacitor and diode mixed clamping have emerged to optimize the converter topology. Summary of the Invention

[0005] The present invention provides a multi-level isolated step-down DC / DC converter, which realizes high efficiency while achieving high step-down gain of the converter, and has low voltage stress and a wide input voltage range.

[0006] The technical solution for achieving the objectives of the present invention is: a multi-level isolated step-down DC / DC converter, including two transformers T1 and T2, wherein the primary sides of the transformers T1 and T2 are single-winding and the secondary sides are dual-winding. The primary sides of the two transformers are connected in series and then connected to an LLC resonant circuit. The other side of the LLC resonant circuit is connected to a flying capacitor clamped five-level half-bridge switch network. The secondary sides of the two transformers are each connected in sequence to a rectifier bridge and a buck circuit, and the output ends of the two buck circuits are staggered in parallel.

[0007] The flying capacitor clamped five-level half-bridge switch network includes switch tubes S1, S2, S3, S1', S2', S3' with reverse parallel diodes, a first flying capacitor C1 and a second flying capacitor C2. The switch tubes S1, S2, S3, S3', S2', and S1' are connected in series to form a bridge arm, and the drain of S1 is connected to the input power supply V in The positive terminal of S1' is connected to the input power supply V in One end of the first flying capacitor C1 is connected to the connection point of the switch tubes S2 and S3, and the other end is connected to the connection point of the switch tubes S2' and S3'; one end of the second flying capacitor C2 is connected to the connection point of the switch tubes S1 and S2, and the other end is connected to the connection point of the switch tubes S1' and S2';

[0008] The LLC resonant circuit includes a first resonant inductor L r , the first resonant capacitor C r , the first excitation inductor L m1 , the second excitation inductor L m2 , the first resonant inductor L r One end is connected to the connection point of the switch tubes S3 and S3', and the first resonant inductor L r The other end is connected to the first resonant capacitor C r The positive electrode of the first resonant capacitor C r The negative electrode is connected to the primary side of the first transformer T1, and the first excitation inductor L m1 In parallel with the primary side of the first transformer T1, one end of the primary side of the second transformer T2 is connected to the other end of the primary side of the first transformer T1, and the second excitation inductor L m2 It is connected in parallel with the primary side of the second transformer T2, and the other end of the primary side of the second transformer T2 is connected to the source of the switch tube S1';

[0009] The rectifier bridge connected to the secondary side of the transformer T1 includes a first diode D1, a second diode D2 and a first output capacitor C3. The secondary side of the first transformer T1 is composed of two windings connected in series. The negative electrode of the first output capacitor C3 is connected to the common end of the two windings of the secondary side of the first transformer T1. The positive electrodes of the first diode D1 and the second diode D2 are respectively connected to the other ends of the two windings of the secondary side of the first transformer T1. The negative electrode of the first diode D1, the negative electrode of the second diode D2, and the positive electrode of the first output capacitor C3 are connected;

[0010] The first Buck circuit includes switches S4 and S6 with anti-parallel diodes, a first output filter inductor L1, and an output filter capacitor Co. The drain of the switch S4 is connected to the cathode of the first diode D1, the cathode of the second diode D2, and the anode of the first output capacitor C3. The source of the switch S4 is connected to the drain of the switch S6 and one end of the first output filter inductor L1. The other end of the first output filter inductor L1 is connected to the anode of the output filter capacitor Co and the anode of the output power supply Vo. The cathode of the first output capacitor C3, the source of the switch S6, and the output filter capacitor C o The negative pole of the output power supply V o The common end of the negative poles of the two connected windings is connected to the common end of the two secondary windings of the first transformer T1;

[0011] The rectifier bridge connected to the secondary side of the transformer T2 includes a third diode D3, a fourth diode D4, and a second output capacitor C4. The secondary side of the second transformer T2 is composed of two windings connected in series. The negative electrode of the second output capacitor C4 is connected to the common end of the two windings of the secondary side of the second transformer T2. The positive electrodes of the third diode D3 and the fourth diode D4 are respectively connected to the other ends of the two windings of the secondary side of the second transformer T2. The negative electrode of the third diode D3, the negative electrode of the fourth diode D4, and the positive electrode of the second output capacitor C4 are connected;

[0012] The second Buck circuit includes switches S5 and S7 with anti-parallel diodes, and a second output filter inductor L2. The drain of the switch S5 is connected to the cathode of the third diode D3, the cathode of the fourth diode D4, and the anode of the second output capacitor C4. The source of the switch S5 is connected to the drain of the switch S7 and one end of the second output filter inductor L2. The other end of the second output filter inductor L2 is connected to the other end of the first output filter inductor L1. The cathode of the second output capacitor C4, the source of the switch S7, and the output filter capacitor C o The negative pole of the output power supply V o The common end of the negative poles of the two connected poles is connected to the common end of the two secondary windings of the second transformer T2.

[0013] Furthermore, the gates of the switching transistors S1, S2, S3, S1', S2', and S3' receive external control drive signals to control the converter to operate in a frequency modulation mode. Half a switching cycle includes five working states, as follows:

[0014] Mode 1: Switches S1, S2, and S3 are turned on, i Lr (-)>i Lm1 / Lm2 (-), creating ZVS conditions for the converter;

[0015] Mode 2: Switches S1, S2, and S3 are turned on, i Lr (+)>i Lm1 / Lm2 (-), converter ZVS is turned on;

[0016] Mode 3: Switches S1, S2, and S3 are turned on, i Lr (+)>i Lm1 / Lm2 (+), creating ZCS shutdown conditions for the converter;

[0017] Mode 4: Switches S1, S2, and S3 are turned on, i Lr (+)=i Lm1 / Lm2 (+), the converter secondary side is ZCS shut down;

[0018] Mode 5: Switches S1, S2, and S3 are ready to turn off, and S1', S2', and S3' are ready to turn on. Lr (+)=i Lm1 / Lm2 (+), creating the ZVS start-up conditions for the converter.

[0019] Furthermore, the gates of the switching transistors S1, S2, S3, S1', S2', and S3' receive external control drive signals to control the converter to operate in a phase-shift mode. Half a switching cycle includes four working states, as follows:

[0020] Mode 1: Switch S1 is ready to turn on, switch S1' is ready to turn off, switches S2' and S3 are turned on, i Lr (+)>i Lm1 / Lm2 (-), creating ZVS conditions for the converter;

[0021] Mode 2: Switches S1, S2', and S3 are turned on, i Lr (+)>i Lm1 / Lm2 (-), converter ZVS is turned on;

[0022] Mode 3: Switches S1, S2', and S3 are turned on, i Lr (+)=i Lm1 / Lm2 (-), the converter secondary side ZCS is turned off;

[0023] Mode 4: Switch S3' is ready to turn on, switch S3 is ready to turn off, switches S1 and S2' are turned on, i Lr (-) Lm1 / Lm2 (+), creating the ZVS start-up conditions for the converter.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] Compared to the traditional LLC+Buck cascaded buck converter, this design replaces the half-bridge switching network of the preceding LLC resonant converter with a five-level half-bridge switching network based on flying capacitor clamping. This significantly reduces voltage stress, by 0.5 to 0.75 times compared to the traditional LLC converter. This allows for a wider input voltage range and high-gain buck, significantly reducing switching losses and improving converter efficiency. This design combines the high efficiency and power density of the traditional LLC resonant converter with the good dynamic performance, precise voltage regulation, and low ripple of the Buck circuit. Based on these advantages, this converter can be used in applications requiring a wide input range, low voltage stress, and high-gain buck. It can achieve high buck gain at an appropriate duty cycle, significantly reducing converter losses and achieving high conversion efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0027] FIG1 is a schematic diagram of a topological structure of a multi-level isolated step-down DC / DC converter provided by an embodiment of the present disclosure;

[0028] 2(a) to (e) are operating mode diagrams of a multi-level isolated step-down DC / DC converter in a frequency modulation mode provided by an embodiment of the present disclosure;

[0029] FIG3 (a) to (d) are operating mode diagrams of a multi-level isolated step-down DC / DC converter in a phase-shift mode provided by an embodiment of the present disclosure;

[0030] FIG4 is a schematic diagram of the topological structure of a converter in which the front-stage five-level switching network is expanded to a 2n-order converter;

[0031] FIG5 is a schematic diagram of the topological structure of a converter in which the rear stage is extended to m-phase interleaved parallel connection;

[0032] FIG6 is a schematic diagram of a converter topology structure in which the front-stage five-level switching network is expanded to 2n stages and the back-stage is expanded to m-phase interleaved parallel.​ DETAILED DESCRIPTION

[0033] Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present invention. It should be understood that the drawings and embodiments of the present invention are for illustrative purposes only and are not intended to limit the scope of protection of the present invention.

[0034] The technical solution of the present invention is described in detail below with reference to specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0035] FIG1 is a multi-level isolated step-down DC / DC converter provided by an embodiment of the present disclosure. As shown in FIG1 , the converter includes two transformers T1 and T2. The primary sides of the transformers T1 and T2 are single-winding and the secondary sides are dual-winding. The primary sides of the two transformers are connected in series to an LLC resonant circuit. The other side of the LLC resonant circuit is connected to a flying capacitor clamped five-level half-bridge switch network. The secondary sides of the two transformers are each connected in sequence to a rectifier bridge and a buck circuit. The output ends of the two buck circuits are staggered in parallel.

[0036] The flying capacitor clamped five-level half-bridge switch network includes switch tubes S1, S2, S3, S1', S2', S3' with anti-parallel diodes, a first flying capacitor C1 and a second flying capacitor C2. The switch tubes S1, S2, S3, S3', S2', and S1' are connected in series to form a bridge arm. The drain of S1 is connected to the input power supply V in The positive terminal of S1' is connected to the input power supply V in One end of the first flying capacitor C1 is connected to the connection point of the switch tubes S2 and S3, and the other end is connected to the connection point of the switch tubes S2' and S3'; one end of the second flying capacitor C2 is connected to the connection point of the switch tubes S1 and S2, and the other end is connected to the connection point of the switch tubes S1' and S2';

[0037] The LLC resonant circuit includes a first resonant inductor L r , the first resonant capacitor C r , the first excitation inductor L m1 , the second excitation inductor L m2 , the first resonant inductor L r One end is connected to the connection point of the switch tubes S3 and S3', and the first resonant inductor L r The other end is connected to the first resonant capacitor C r The positive electrode of the first resonant capacitor C rThe negative electrode is connected to the primary side of the first transformer T1, and the first excitation inductor L m1 In parallel with the primary side of the first transformer T1, one end of the primary side of the second transformer T2 is connected to the other end of the primary side of the first transformer T1, and the second excitation inductor L m2 It is connected in parallel with the primary side of the second transformer T2, and the other end of the primary side of the second transformer T2 is connected to the source of the switch tube S1';

[0038] The rectifier bridge connected to the secondary side of the transformer T1 includes a first diode D1, a second diode D2, and a first output capacitor C3. The secondary side of the first transformer T1 is composed of two windings connected in series. The cathode of the first output capacitor C3 is connected to the common end of the two windings of the secondary side of the first transformer T1. The anodes of the first diode D1 and the second diode D2 are respectively connected to the other ends of the two windings of the secondary side of the first transformer T1. The cathode of the first diode D1, the cathode of the second diode D2, and the positive electrode of the first output capacitor C3 are connected.

[0039] The first Buck circuit includes switches S4 and S6 with anti-parallel diodes, a first output filter inductor L1, and an output filter capacitor Co. The drain of the switch S4 is connected to the cathode of the first diode D1, the cathode of the second diode D2, and the anode of the first output capacitor C3. The source of the switch S4 is connected to the drain of the switch S6 and one end of the first output filter inductor L1. The other end of the first output filter inductor L1 is connected to the anode of the output filter capacitor Co and the anode of the output power supply Vo. The cathode of the first output capacitor C3, the source of the switch S6, and the output filter capacitor C o The negative pole of the output power supply V o The common end of the negative poles of the two connected windings is connected to the common end of the two secondary windings of the first transformer T1;

[0040] The rectifier bridge connected to the secondary side of the transformer T2 includes a third diode D3, a fourth diode D4, and a second output capacitor C4. The secondary side of the second transformer T2 is composed of two windings connected in series. The cathode of the second output capacitor C4 is connected to the common end of the two windings of the secondary side of the second transformer T2. The anodes of the third diode D3 and the fourth diode D4 are respectively connected to the other ends of the two windings of the secondary side of the second transformer T2. The cathode of the third diode D3, the cathode of the fourth diode D4, and the positive electrode of the second output capacitor C4 are connected.

[0041] The second Buck circuit includes switches S5 and S7 with anti-parallel diodes, and a second output filter inductor L2. The drain of the switch S5 is connected to the cathode of the third diode D3, the cathode of the fourth diode D4, and the anode of the second output capacitor C4. The source of the switch S5 is connected to the drain of the switch S7 and one end of the second output filter inductor L2. The other end of the second output filter inductor L2 is connected to the other end of the first output filter inductor L1. The cathode of the second output capacitor C4, the source of the switch S7, and the output filter capacitor Co The negative pole of the output power supply V o The common end of the negative poles of the two connected poles is connected to the common end of the two secondary windings of the second transformer T2.

[0042] The multi-level isolated step-down DC / DC converter of this embodiment receives an external control drive signal to turn on and off the switches S1, S2, S3, S1', S2', and S3', thereby controlling the output voltage of the converter. The converter can operate in a frequency modulation mode and a phase shift mode, as follows:

[0043] When the converter operates in frequency modulation mode, half a switching cycle includes five operating states, as follows:

[0044] Mode 1: As shown in Figure 2(a), switches S1, S2, and S3 are turned on, i Lr (-)>i Lm1 / Lm2 (-), creating ZVS conditions for the converter;

[0045] Mode 2: As shown in Figure 2(b), switches S1, S2, and S3 are turned on, i Lr (+)>i Lm1 / Lm2 (-), converter ZVS is turned on;

[0046] Mode 3: As shown in Figure 2(c), switches S1, S2, and S3 are turned on, i Lr (+)>i Lm1 / Lm2 (+), creating ZCS shutdown conditions for the converter;

[0047] Mode 4: As shown in Figure 2(d), switches S1, S2, and S3 are turned on, i Lr (+)=i Lm1 / Lm2 (+), the converter secondary side is ZCS shut down;

[0048] Mode 5: As shown in Figure 2(e), the switches S1, S2, and S3 are ready to turn off, and S1', S2', and S3' are ready to turn on. Lr (+)=i Lm1 / Lm2 (+), creating ZVS conditions for the converter;

[0049] When the converter operates in phase-shift mode, half a switching cycle includes four operating states, as follows:

[0050] Mode 1: As shown in Figure 3(a), the switch tube S1 is ready to turn on, the switch tube S1' is ready to turn off, the switch tubes S2' and S3 are turned on, i Lr (+)>i Lm1 / Lm2 (-), creating ZVS conditions for the converter;

[0051] Mode 2: As shown in Figure 3(b), switches S1, S2', and S3 are turned on, i Lr (+)>i Lm1 / Lm2 (-), converter ZVS is turned on;

[0052] Mode 3: As shown in Figure 3(c), switches S1, S2', and S3 are turned on, i Lr (+)=i Lm1 / Lm2 (-), the converter secondary side ZCS is turned off;

[0053] Mode 4: As shown in Figure 3(d), the switch tube S3' is ready to turn on, the switch tube S3 is ready to turn off, the switches S1 and S2' are turned on, i Lr (-) Lm1 / Lm2 (+), creating the ZVS start-up conditions for the converter.

[0054] Through analysis and derivation, the voltage gain M of the converter is obtained as:

[0055] Where D is the duty cycle of the Buck circuit, K is the inductance ratio, and f n is the normalized frequency, Q is the quality factor;

[0056] The voltage stress of the converter is:

[0057] Compared to the traditional LLC+Buck cascaded buck converter, this design replaces the half-bridge switching network of the preceding LLC resonant converter with a five-level half-bridge switching network based on flying capacitor clamping. This significantly reduces voltage stress, by 0.5 to 0.75 times compared to the traditional LLC converter. This allows for a wider input voltage range and high-gain buck, significantly reducing switching losses and improving converter efficiency. This design combines the high efficiency and power density of the traditional LLC resonant converter with the good dynamic performance, precise voltage regulation, and low ripple of the Buck circuit. Based on these advantages, this converter can be used in applications requiring a wide input range, low voltage stress, and high-gain buck. It can achieve high buck gain at an appropriate duty cycle, significantly reducing converter losses and achieving high conversion efficiency.

[0058] In practical applications, when a higher voltage drop gain is required based on site requirements, the converter can be expanded. There are three converter expansion methods:

[0059] 1. The five-level switching network in the front stage of the proposed converter topology is expanded to 2n stages, adding 2n flying capacitors. The number of switches is then increased to 2n, transforming it into a flying capacitor-clamped 2n+1-level switching network, as shown in Figure 4.

[0060] At this time, the voltage stress of the converter is:​

[0061] 2. The proposed converter topology is expanded to an m-phase interleaved parallel stage, as shown in Figure 5.

[0062] 3. The five-level switching network in the front stage of the proposed converter topology is expanded to 2n stages, and the back stage is expanded to m-phase interleaved parallel, as shown in Figure 6.

[0063] At this time, the voltage stress of the converter is:

Claims

1. A multi-level isolated buck DC / DC converter, characterized in that It includes two transformers T1 and T2. The primary sides of the transformers T1 and T2 are single windings, and the secondary sides are double windings. The primary sides of the two transformers are connected in series and then connected to an LLC resonant circuit. The other side of the LLC resonant circuit is connected to a flying capacitor clamped five-level half-bridge switching network. The secondary sides of the two transformers are sequentially connected to a rectifier bridge and a BUCK circuit, and the output terminals of the two BUCK circuits are connected in parallel in a staggered manner. The flying capacitor clamped five-level half-bridge switching network includes switching tubes S1, S2, S3, S1', S2', S3' with anti-parallel diodes, a first flying capacitor C1 and a second flying capacitor C2. The switching tubes S1, S2, S3, S3', S2', S1' are connected in series in turn to form a bridge arm. The drain of S1 is connected to the positive pole of the input power supply V in , and the source of S1' is connected to the negative pole of the input power supply V in . One end of the first flying capacitor C1 is connected to the connection point of the switching tubes S2 and S3, and the other end is connected to the connection point of the switching tubes S2' and S3'. One end of the second flying capacitor C2 is connected to the connection point of the switching tubes S1 and S2, and the other end is connected to the connection point of the switching tubes S1' and S2'; The LLC resonant circuit includes a first resonant inductor L r , a first resonant capacitor C r , a first excitation inductor L m1 , a second excitation inductor L m2 . One end of the first resonant inductor L r is connected to the connection point of the switching transistors S3 and S3'. The other end of the first resonant inductor L r is connected to the positive electrode of the first resonant capacitor C r . The negative electrode of the first resonant capacitor C r is connected to one end of the primary side of the first transformer T1. The first excitation inductor L m1 is connected in parallel with the primary side of the first transformer T1. One end of the primary side of the second transformer T2 is connected to the other end of the primary side of the first transformer T1. The second excitation inductor L m2 is connected in parallel with the primary side of the second transformer T2. The other end of the primary side of the second transformer T2 is connected to the source electrode of the switching transistor S1'; The rectifier bridge connected to the secondary side of the transformer T1 includes a first diode D1, a second diode D2, and a first output capacitor C3. The secondary side of the first transformer T1 is two windings connected in series. The negative electrode of the first output capacitor C3 is connected to the common end of the two windings of the secondary side of the first transformer T1. The positive electrodes of the first diode D1 and the second diode D2 are respectively connected to the other ends of the two windings of the secondary side of the first transformer T1. The negative electrode of the first diode D1, the negative electrode of the second diode D2, and the positive electrode of the first output capacitor C3 are connected together. The first Buck circuit includes switching transistors S4 and S6 with anti-parallel diodes, a first output filter inductor L1, and an output filter capacitor Co. The drain of switching transistor S4 is connected to the negative electrode of the first diode D1, the negative electrode of the second diode D2, and the positive electrode of the first output capacitor C3. The source of switching transistor S4 is connected to the drain of switching transistor S6 and one end of the first output filter inductor L1. The other end of the first output filter inductor L1 is connected to the positive electrode of the output filter capacitor Co and the positive electrode of the output power supply Vo. The common terminal after connecting the negative electrode of the first output capacitor C3, the source of switching transistor S6, the negative electrode of the output filter capacitor C o and the negative electrode of the output power supply V o is connected to the common terminal of the two windings on the secondary side of the first transformer T1; The rectifier bridge connected to the secondary side of the transformer T2 includes a third diode D3, a fourth diode D4, and a second output capacitor C4. The secondary side of the second transformer T2 is two windings connected in series. The negative electrode of the second output capacitor C4 is connected to the common end of the two windings of the secondary side of the second transformer T2. The positive electrodes of the third diode D3 and the fourth diode D4 are respectively connected to the other ends of the two windings of the secondary side of the second transformer T2. The negative electrode of the third diode D3, the negative electrode of the fourth diode D4, and the positive electrode of the second output capacitor C4 are connected together. The second Buck circuit includes switching transistors S5, S7 with anti-parallel diodes, and a second output filter inductor L2. The drain of the switching transistor S5 is connected to the negative electrodes of the third diode D3, the fourth diode D4, and the positive electrode of the second output capacitor C4. The source of the switching transistor S5 is connected to the drain of the switching transistor S7 and one end of the second output filter inductor L2. The other end of the second output filter inductor L2 is connected to the other end of the first output filter inductor L1. The common terminal after connecting the negative electrode of the second output capacitor C4, the source of the switching transistor S7, the negative electrode of the output filter capacitor C o and the negative electrode of the output power supply V o is connected to the common terminal of the two windings on the secondary side of the second transformer T2.

2. The multi-level isolated buck DC / DC converter according to claim 1, wherein The gates of the switching tubes S1, S2, S3, S1', S2', and S3' receive external control drive signals to control the converter to operate in the frequency modulation mode. There are 5 working states in half a switching cycle, which are specifically as follows: Mode 1: Switching transistors S1, S2, and S3 are turned on, and i Lr (-) > i Lm1 / Lm2 (-), creating the ZVS turn-on condition for the converter; Mode 2: Switching transistors S1, S2, and S3 are turned on, and i Lr (+) > i Lm1 / Lm2 (-), and the converter turns on with ZVS; Mode 3: Switching transistors S1, S2, and S3 are turned on, and i Lr (+) > i Lm1 / Lm2 (+), creating the ZCS turn-off condition for the converter; Mode 4: Switching transistors S1, S2, and S3 are turned on, i Lr (+) = i Lm1 / Lm2 (+), and the secondary side of the converter turns off with ZCS; Mode 5: The switching transistors S1, S2, and S3 are ready to turn off, and S1', S2', and S3' are ready to turn on, i Lr (+) = i Lm1 / Lm2 (+), creating the ZVS turn-on condition for the converter.

3. The multi-level isolated buck DC / DC converter according to claim 1, characterized in that The gates of the switching tubes S1, S2, S3, S1', S2', and S3' receive external control drive signals to control the converter to operate in the phase shift mode. There are 4 working states in half a switching cycle, which are specifically as follows: Mode 1: The switch tube S1 is ready to conduct, the switch tube S1' is ready to turn off, the switch tubes S2' and S3 are conducting, i Lr (+)>i Lm1 / Lm2 (-), creating the ZVS turn-on condition for the converter; Mode 2: Switching transistors S1, S2’, and S3 are turned on, and i Lr (+) > i Lm1 / Lm2 (-), and the converter turns on with ZVS; Mode 3: Switching transistors S1, S2’, and S3 are turned on, and i Lr (+) = i Lm1 / Lm2 (-), and the secondary side of the converter is turned off with ZCS; Mode 4: The switching transistor S3' is ready to conduct, the switching transistor S3 is ready to turn off, the switching transistors S1 and S2' are conducting, i Lr (-)<i Lm1 / Lm2 (+), creating the ZVS turn-on condition for the converter.

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