Control circuit for single-mode dual-current path buck-boost converter, and method

Abstract

A control circuit for a single-mode dual-current path buck-boost converter, and a method are provided. The method comprises: during an inductor (L) charging phase, controlling a first switch (S1), a fourth switch (S4), and a fifth switch (S5) to be closed, and controlling a second switch (S2), a third switch (S3), and a sixth switch (S6) to be opened, thereby discharging a first capacitor (C1) and a second capacitor (C2) and increasing inductor (L) current; during an inductor (L) discharging phase, controlling the first switch (S1), the fourth switch (S4), and the fifth switch (S5) to be opened, and controlling the second switch (S2), the third switch (S3), and the sixth switch (S6) to be closed, thereby charging the first capacitor (C1) and the second capacitor (C2) and decreasing inductor (L) current. In the case that inductor (L) current is decreased, the number of switches used is reduced, and the use of a high-voltage-rated switch is prevented, so that the problem of relatively high inductor (L) current and the problem of switches being high-voltage-rated can be both considered, thereby improving the overall efficiency of a chip while achieving chip cost reduction.

Description

Control circuit and method for single-mode dual-current path buck-boost converter Technical Field

[0001] The present application relates to the technical field of converter control, and in particular to a control circuit and method for a single-mode dual-current path buck-boost converter. Background Art

[0002] With the development of mobile electronics, lithium-ion batteries are widely used in mobile devices due to their high energy and power density. However, over time, the voltage of a lithium-ion battery decreases from an initial 4.2V to 2.5V. Most mobile devices require a power supply voltage around 3.4V. To maximize battery life, buck-boost DC-DC converters, which combine both step-down and step-up functions, are widely used.

[0003] A traditional single-mode buck-boost converter cascades a conventional boost and buck converters. Therefore, in the power path, as shown in Figure 1, there are always two switches in series with the inductor. In contrast, a pure boost or buck converter only has one switch in series with the inductor. Furthermore, the inductor current is always higher than the output load current, resulting in significant conduction losses in the conventional buck-boost converter. To reduce inductor losses, an inductor with a low direct current resistance (DCR) must be selected. However, a smaller DCR results in a larger inductor, which not only increases chip size but also costs.

[0004] On this basis, in order to reduce the inductor current, the relevant technology has proposed a new topology for the single-mode buck-boost converter. As shown in Figure 2, this structure introduces eight switches and two flying capacitors. Compared with the traditional single-mode buck-boost converter, the inductor current of this structure is greatly reduced during operation, which reduces the converter's requirements for inductor size. Therefore, a small-volume and high-DCR inductor can be used to reduce conduction losses. Although this structure can reduce conduction losses by reducing the inductor current, some switches in this structure require high-voltage switches, which in turn increases the conduction losses at the switches, resulting in reduced overall chip efficiency and increased costs.

[0005] In summary, the single-mode buck-boost converter of the related art cannot take into account both the high withstand voltage problem of the switch and the high inductor current problem, resulting in low overall chip efficiency and high cost. Summary of the Invention

[0006] The present application provides a control circuit and method for a single-mode dual-current path buck-boost converter, which realizes the boost and buck functions by optimizing the structural relationship between the flying capacitor and the switch. Compared with the topological structure in the related art, it can reduce the number of switches used and avoid the use of high-voltage switches while reducing the inductor current, thereby taking into account the problem of high inductor current and the high voltage resistance of the switch, thereby reducing chip cost while improving the overall efficiency of the chip.

[0007] In a first aspect, the present application provides a control circuit for a single-mode dual-current path buck-boost converter, the circuit comprising a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a first capacitor, a second capacitor, and an inductor, wherein the first capacitor and the second capacitor are flying capacitors, wherein:

[0008] The first end of the first switch and the first end of the second switch are connected to the voltage input end, the second end of the second switch is connected to the first end of the first capacitor, and the second end of the first switch is connected to the second end of the first capacitor;

[0009] A first end of the third switch is connected to the second end of the first capacitor, and a second end of the third switch is grounded;

[0010] The first end of the inductor is connected to the first end of the first capacitor, the second end of the inductor is connected to the first end of the fourth switch, and the second end of the fourth switch is connected to the voltage output end;

[0011] The first end of the second capacitor is connected to the second end of the inductor, the second end of the second capacitor is connected to the first end of the fifth switch, and the second end of the fifth switch is grounded;

[0012] A first end of the sixth switch is connected to the second end of the second capacitor, and a second end of the sixth switch is connected to the second end of the fourth switch.

[0013] Optionally, the control circuit further includes an output capacitor and an output resistor, wherein:

[0014] A first terminal of the output capacitor is connected to the voltage output terminal, and a second terminal of the output capacitor is grounded;

[0015] A first end of the output resistor is connected to the voltage output end, and a second end of the output resistor is grounded.

[0016] Optionally, the circuit is controlled to further include a third capacitor and a seventh switch, wherein:

[0017] A first end of the third capacitor is connected to the voltage input end, a second end of the third capacitor is connected to the first end of the seventh switch, and a second end of the seventh switch is connected to the first end of the inductor.

[0018] Optionally, the control circuit further includes a fourth capacitor and an eighth switch, wherein:

[0019] The first end of the eighth switch is connected to the second end of the inductor, the second end of the eighth switch is connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is connected to the second end of the fourth switch.

[0020] Optionally, the control circuit further includes a third capacitor, a fourth capacitor, a seventh switch, and an eighth switch, wherein:

[0021] The first end of the third capacitor is connected to the voltage input end, the second end of the third capacitor is connected to the first end of the seventh switch, and the second end of the seventh switch is connected to the first end of the inductor;

[0022] The first end of the eighth switch is connected to the second end of the inductor, the second end of the eighth switch is connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is connected to the second end of the fourth switch.

[0023] In a second aspect, the present application provides a control method for a single-mode dual-current path buck-boost converter, the method comprising:

[0024] During an inductor charging period, controlling the first switch, the fourth switch, and the fifth switch to be closed, and controlling the second switch, the third switch, and the sixth switch to be open, so as to discharge the first capacitor and the second capacitor and increase the inductor current;

[0025] During the inductor discharge period, the first switch, the fourth switch, and the fifth switch are controlled to be open, and the second switch, the third switch, and the sixth switch are controlled to be closed, so that the first capacitor and the second capacitor are charged and the inductor current is reduced.

[0026] By adopting the above technical solution, the structural relationship between the flying capacitor and the switch is optimized to achieve the boost and buck functions. Compared with the topology structure in the related technology, the number of switches used can be reduced and the use of high-voltage switches can be avoided while reducing the inductor current. This can take into account the problem of high inductor current and the high voltage resistance of the switch, thereby improving the overall efficiency of the chip.

[0027] Optionally, the method includes:

[0028] During the inductor charging period, the seventh switch is controlled to be closed, so that the second end of the third capacitor generates a first supply voltage, where a voltage value of the first supply voltage is twice a voltage value of the voltage input end.

[0029] Optionally, the method includes:

[0030] During the inductor discharge period, the eighth switch is controlled to be closed, so that the first end of the fourth capacitor generates a second supply voltage, and a voltage value of the second supply voltage is twice a voltage value of the voltage output end.

[0031] In summary, the beneficial effects brought about by the technical solution of this application include:

[0032] 1. By optimizing the structural relationship between the flying capacitor and the switch, both step-up and step-down functions are achieved. Compared with the topology used in related technologies, this can reduce the number of switches used while reducing the inductor current and avoid the use of high-voltage switches. This balances the high inductor current and the high voltage resistance of the switches, reducing chip costs while improving overall chip efficiency.

[0033] 2. By leveraging the energy storage properties of flying capacitors, a circuit capable of outputting twice the output voltage and / or the output voltage is designed to drive the MOS transistor used as a switch. This eliminates the need for a separate, independent boost circuit, effectively reducing system cost and complexity. This also enhances the versatility of the control circuit for a single-mode, dual-current-path buck-boost converter, enabling it to be used not only for standard buck-boost conversion but also to conveniently power the drive circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] FIG1 is a schematic structural diagram of a conventional single-mode buck-boost converter provided by the related art;

[0035] FIG2 is a schematic diagram of a novel topology of a single-mode buck-boost converter provided by the related art;

[0036] 3 is a schematic structural diagram of a control circuit of a single-mode dual-current path buck-boost converter provided in an embodiment of the present application;

[0037] FIG4 is a schematic diagram showing the principle of an inductive charging period provided by an embodiment of the present application;

[0038] FIG5 is a schematic diagram showing the principle of an inductive discharge period provided by an embodiment of the present application;

[0039] FIG6 is a waveform diagram of an inductance state provided by an embodiment of the present application;

[0040] 7 is a schematic structural diagram of a control circuit of another single-mode dual-current path buck-boost converter provided in an embodiment of the present application;

[0041] FIG8 is a schematic diagram showing the principle of providing voltage during an inductive charging period according to an embodiment of the present application;

[0042] FIG9 is a schematic diagram showing the principle of providing a voltage during an inductive discharge period according to an embodiment of the present application.

[0043] Explanation of Reference Numerals: L, inductor; C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; S1, first switch; S2, second switch; S3, third switch; S4, fourth switch; S5, fifth switch; S6, sixth switch; S7, seventh switch; S8, eighth switch; Cout, output capacitor; Rout, output resistor; DETAILED DESCRIPTION

[0044] In order to enable people skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the drawings in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments.

[0045] In the description of the embodiments of this application, words such as "exemplary," "for example," or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary," "for example," or "for example" in the embodiments of this application should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary," "for example," or "for example" is intended to present the relevant concepts in a concrete manner.

[0046] In the description of the embodiments of the present application, the term "multiple" means two or more. For example, multiple systems refer to two or more systems, and multiple screen terminals refer to two or more screen terminals. In addition, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized.

[0047] First, referring to FIG. 1 and FIG. 2 , the current of the inductor L in the related art is further analyzed.

[0048] The circuit structure of a conventional single-mode buck-boost converter is shown in FIG1 . The circuit structure includes four switches, an inductor L, and a capacitor.

[0049] Balancing the inductor L yields:

[0050] ;

[0051] ;

[0052] in, is the duty cycle, is the power supply voltage, is the output voltage, 1 is the voltage conversion ratio of the conventional single-mode buck-boost converter circuit structure shown in FIG. 1 .

[0053] Therefore, the average current of the inductor L is:

[0054] ;

[0055] in , is the average current of the inductor L of the conventional single-mode buck-boost converter circuit structure shown in FIG1 , is the load current.

[0056] It can be seen from this that the average current of the inductor L is always greater than the load current. Since the conduction loss is proportional to the square of the inductor L current, an inductor L current higher than the load current will cause unnecessary losses, thereby reducing the overall efficiency of the system.

[0057] On this basis, FIG2 shows a new topology of a single-mode buck-boost converter.

[0058] When the inductor L is in the magnetizing state, the voltage at the input end of the inductor L is 3 - , the voltage at the output end of the inductor L is , so the voltage across the inductor L during magnetization is 3 - .

[0059] When the inductor L is in the demagnetized state, the voltage at the input end of the inductor L is 0, and the voltage at the output end of the inductor L is , so the voltage across the inductor L during magnetization is .

[0060] Balancing the inductor L yields:

[0061] ;

[0062] ;

[0063] in, is the duty cycle, is the power supply voltage, is the output voltage, The voltage conversion ratio of the novel topology of the single-mode buck-boost converter shown in FIG2 is shown.

[0064] Therefore, the average current of the inductor L is:

[0065] ;

[0066] in , is the average current of the inductor L of the novel topology of the single-mode buck-boost converter shown in FIG2 , is the load current. The average current of the inductor L can be obtained within the range of The range is .

[0067] Compared with a traditional single-mode buck-boost DC-DC converter, this structure significantly reduces the current in the inductor L, significantly reducing the system's requirements for the size of the inductor L. Higher efficiency can be achieved with a small-sized and high-DCR inductor L.

[0068] However, because this structure uses eight switches and they must withstand high voltages, practical applications require high-voltage switches, which increases conduction and switching losses. For the chip as a whole, while reducing the current in the inductor L and enabling the use of an inductor L with a high DCR, which reduces conduction losses, the use of high-voltage switches increases conduction losses, reducing overall system efficiency.

[0069] To address the above-mentioned issues, an embodiment of the present application provides a control circuit and method for a single-mode dual-current path buck-boost converter, which reduces the current of the inductor L under all operating conditions while reducing the conduction loss of the switch, and can solve the voltage reduction problem, thereby improving the efficiency of the chip.

[0070] At the same time, since the present application does not require the use of a high-voltage switch and can use a small-volume, high-DCR resistor, the chip area can be reduced and the chip cost can be lowered.

[0071] Please refer to FIG3 , which is a schematic diagram of a control circuit of a single-mode dual-current path buck-boost converter according to an embodiment of the present application. The control circuit of the single-mode dual-current path buck-boost converter includes a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a fifth switch S5, a sixth switch S6, a first capacitor C1, a second capacitor C2, and an inductor L. The first capacitor C1 and the second capacitor C2 are flying capacitors, wherein:

[0072] The first end of the first switch S1 and the first end of the second switch S2 are connected to the voltage input terminal, the second end of the second switch S2 is connected to the first end of the first capacitor C1, and the second end of the first switch S1 is connected to the second end of the first capacitor C1; the first end of the third switch S3 is connected to the second end of the first capacitor C1, and the second end of the third switch S3 is grounded; the first end of the inductor L is connected to the first end of the first capacitor C1, the second end of the inductor L is connected to the first end of the fourth switch S4, and the second end of the fourth switch S4 is connected to the voltage output terminal; the first end of the second capacitor C2 is connected to the second end of the inductor L, the second end of the second capacitor C2 is connected to the first end of the fifth switch S5, and the second end of the fifth switch S5 is grounded; the first end of the sixth switch S6 is connected to the second end of the second capacitor C2, and the second end of the sixth switch S6 is connected to the second end of the fourth switch S4.

[0073] A flying capacitor is a capacitor connected between at least two switching nodes in a switching power supply or converter to store and transfer energy. In the present embodiment, this means that the energy storage function of the flying capacitor enables voltage isolation and conversion before and after the PWM waveform changes, which results in switching.

[0074] By controlling the on / off states of the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, and the sixth switch S6, a dual current path is formed around the inductor L. By controlling the ratio of the charging time to the discharging time of the inductor L within a cycle, the input voltage is stepped up or down, so that the output voltage meets the power voltage requirements of mobile devices.

[0075] The specific working principle is as follows: during the charging period of the inductor L, the first switch S1, the fourth switch S4, and the fifth switch S5 are controlled to be closed, and the second switch S2, the third switch S3, and the sixth switch S6 are controlled to be open, so that the first capacitor C1 and the second capacitor C2 are discharged, and the current of the inductor L increases;

[0076] During the discharge period of the inductor L, the first switch S1 , the fourth switch S4 and the fifth switch S5 are controlled to be open, and the second switch S2 , the third switch S3 and the sixth switch S6 are controlled to be closed, so that the first capacitor C1 and the second capacitor C2 are charged and the current of the inductor L is reduced.

[0077] The working cycle of the inductor L is divided into a charging period of the inductor L and a discharging period of the inductor L, so as to explain in detail the switching control principles of the inductor L in the dual current paths.

[0078] Please refer to FIG4 , which is a schematic diagram of the principle of an inductor L during a charging period provided in an embodiment of the present application.

[0079] During the charging period of the inductor L, the first switch S1, the fourth switch S4, and the fifth switch S5 are controlled to be closed, and the second switch S2, the third switch S3, and the sixth switch S6 are controlled to be open. This forms a branch circuit: voltage input - first switch S1 - first capacitor C1 - inductor L - fourth switch S4 - voltage output, and a branch circuit: second capacitor C2 - fourth switch S4 - voltage output.

[0080] For the first end of the inductor L, the first capacitor C1 is discharged. Since the discharge direction of the first capacitor C1 is from the first end of the first capacitor C1 to the first end of the inductor L, the voltage at the first end of the inductor L (i.e., the left side of the inductor L) is the input voltage plus the discharge voltage of the first capacitor C1. The voltage of the discharge voltage of the first capacitor C1 is equal to the voltage of the input voltage. Therefore, the voltage at the first end of the inductor L is twice the input voltage 2 .

[0081] For the second end of the inductor L, the second capacitor C2 discharges, and the discharge direction is from the first end of the second capacitor C2 to the output end. The voltage magnitude of the first end of the second capacitor C2 during discharge is equal to the voltage magnitude of the output end, and the voltage magnitude of the second end of the second capacitor C2 during discharge is zero. Therefore, the voltage of the second end of the inductor L is the output voltage. .

[0082] Comparing the voltage at the first end and the voltage at the second end of the inductor L, the voltage at the first end is greater than the voltage at the second end, the inductor L is magnetized, and the current of the inductor L increases.

[0083] Please refer to FIG5 , which is a schematic diagram showing the principle of an inductor L during a discharge period provided in an embodiment of the present application.

[0084] During the discharge period of the inductor L, the second switch S2, the third switch S3, and the sixth switch S6 are controlled to be open and closed, and the first switch S1, the fourth switch S4, and the fifth switch S5 are controlled to be open. This forms a branch circuit of voltage input-second switch S2-first capacitor C1, and a branch circuit of inductor L-second capacitor C2-sixth switch S6-voltage output.

[0085] For the first end of the inductor L, the first capacitor C1 is charged, and the input voltage is charged for the first capacitor C1 through the second switch S2, and the voltage of the first end of the inductor L is pulled to the input voltage ,

[0086] For the second end of the inductor L, the second capacitor C2 is charged, and the voltage at the second end of the second capacitor C2 is equal to the voltage at the output end. Therefore, the voltage at the first end of the second capacitor C2 (i.e., the second end of the inductor L) is twice the output voltage 2. .

[0087] Comparing the voltage at the first end and the voltage at the second end of the inductor L, the voltage at the first end is smaller than the voltage at the second end, the inductor L is demagnetized, and the current of the inductor L decreases.

[0088] To analyze the complete working cycle of the inductor L, first perform volt-second balance on the inductor L and obtain:

[0089] ;

[0090] ;

[0091] in, is the duty cycle, is the output voltage, is the input voltage, The voltage conversion ratio of the control circuit of a single-mode dual-current path buck-boost converter provided in the embodiment of the present application shown in FIG3 . , .

[0092] Please refer to FIG6, which is a waveform diagram of an inductor L state provided in an embodiment of the present application. is the current of inductor L, V1 is the voltage at the first end of inductor L, V2 is the voltage at the second end of inductor L, is the duration of the charging phase of the inductor L, The duration of the battery discharge phase.

[0093] During the discharge phase of the inductor L, the two current paths of the inductor L and the second capacitor C2 simultaneously replenish charge to the output terminal, and the inductor L circuit is reduced. Therefore, the average current of the inductor L is:

[0094] ;

[0095] in, The average current of the inductor L of the control circuit of a single-mode dual-current path buck-boost converter provided in an embodiment of the present application. The average current of the inductor L can be obtained within the range of The range is .

[0096] The average current of the inductor L in the circuit structure of the traditional single-mode buck-boost converter is The average current of the inductor L of the control circuit of the single-mode dual-current path buck-boost converter provided in the embodiment of the present application is In comparison, the average current of the inductor L in the embodiment of the present application is 1 / 3 of the current of the inductor L in the traditional structure. If the inductor L with the same DCR is selected, the loss on the inductor L (I L 2 The DCR) of the traditional structure is only 1 / 9, so the inductor L with smaller DCR can be used to achieve higher efficiency.

[0097] At the same time, compared with the new topology of the single-mode buck-boost converter, the range of the average current of the inductor L is the same. However, the new topology of the single-mode buck-boost converter requires eight switches, and all eight switches need to have high voltage resistance. For example, the two switches directly connected to the inductor L in Figure 2 have voltage resistances of 2V and 10V, respectively. IN with 3V IN -V OUT The control circuit of the single-mode dual-current path buck-boost converter proposed in this application uses fewer switches (6), and the withstand voltage of each switch is V IN or V OUT , which can avoid the voltage withstand problem of the switch. Compared with ordinary switches, high-voltage switches have larger conduction losses and switching losses, resulting in reduced overall chip efficiency. Therefore, the control circuit of the single-mode dual-current path buck-boost converter proposed in this application not only saves costs but also improves efficiency.

[0098] In the embodiment of the present application, the circuit further includes an output capacitor Cout and an output resistor Rout, wherein:

[0099] A first terminal of the output capacitor Cout is connected to the voltage output terminal, and a second terminal of the output capacitor Cout is grounded;

[0100] A first end of the output resistor Rout is connected to the voltage output end, and a second end of the output resistor Rout is grounded.

[0101] In order to ensure the integrity of the circuit structure and the stability of the output voltage, an output resistor Rout and an output capacitor Cout are set at the output end to form an RC and are connected in parallel to the ground.

[0102] In actual operation, the output voltage will produce a certain amount of ripple due to frequent switching. Adding output capacitor Cout can absorb this ripple, making the output voltage more stable. The first end of output resistor Rout is also connected to the voltage output terminal, and the second end is grounded.

[0103] In another embodiment of the present application, please refer to FIG7 , which is a structural diagram of a control circuit of another single-mode dual-current path buck-boost converter provided in an embodiment of the present application.

[0104] A first end of the third capacitor C3 is connected to the voltage input terminal, a second end of the third capacitor C3 is connected to a first end of a seventh switch S7, and a second end of the seventh switch S7 is connected to a first end of the inductor L;

[0105] A first end of the eighth switch S8 is connected to the second end of the inductor L, a second end of the eighth switch S8 is connected to the first end of the fourth capacitor C4, and a second end of the fourth capacitor C4 is connected to the second end of the fourth switch S4.

[0106] When using MOS tubes as switches in practice, the driver of the MOS tube may require a higher voltage. Therefore, based on the original application, the characteristics of the flying capacitor and the working principle of the circuit are used to design a circuit that can output 2V. IN and / or 2V OUT The circuit is used to power the MOS transistor driver. This power supply method eliminates the need for a separate boost circuit, effectively reducing system cost and complexity. It also enhances the versatility of the control circuit of the single-mode dual-current path buck-boost converter, enabling it to be used not only for standard buck-boost conversion but also to conveniently power the driver circuit.

[0107] Specifically, for ease of description, the loop formed by the third capacitor C3 and the seventh switch S7 is referred to as a first loop, and the loop formed by the fourth capacitor C4 and the eighth switch S8 is referred to as a second loop.

[0108] During the charging period of the inductor L, the seventh switch S7 is closed, the first loop starts to work, and the voltage across the third capacitor C3 is the input voltage plus the voltage of the first capacitor C1. The voltage of the first capacitor C1 is equal to the input voltage, so the third capacitor C3 can obtain a voltage of 2V. IN voltage, thereby providing 2V during the inductor L charging period within one cycle IN voltage.

[0109] During the discharge period of the inductor L, the eighth switch S8 is closed, the second loop starts to work, and the voltage across the fourth capacitor C4 is the output voltage plus the voltage of the second capacitor C2. The voltage of the second capacitor C2 is equal to the output voltage, so the fourth capacitor C4 can obtain a voltage of 2V. OUT voltage, thereby providing 2V during the discharge period of the inductor L in one cycle OUT voltage.

[0110] In summary, when the first circuit and the second circuit are connected to the circuit at the same time, the first circuit can be controlled to work and the second circuit can be controlled to not work during the charging period of the inductor L in one cycle to provide 2V IN The voltage of the inductor L is controlled during the discharge period of a cycle to control the second circuit to work and the first circuit to stop working, so as to provide 2V OUT voltage.

[0111] Optionally, when the first loop or the second loop is connected to the circuit alone, it can provide a corresponding voltage during the charging or discharging period of the inductor L and provide a voltage during the remaining period of a cycle, as described below.

[0112] Please refer to Figure 8, which is a schematic diagram illustrating the principle of providing a voltage during the charging period of an inductor L according to an embodiment of the present application. The detailed connection relationship is as follows: the first end of the third capacitor C3 is connected to the voltage input terminal, the second end of the third capacitor C3 is connected to the first end of the seventh switch S7, and the second end of the seventh switch S7 is connected to the first end of the inductor L.

[0113] During the charging period of the inductor L, the seventh switch S7 is controlled to be closed, so that the second end of the third capacitor C3 generates a first supply voltage, and the voltage value of the first supply voltage is twice the voltage value of the voltage input end.

[0114] At the first end of the inductor L, the first switch S1 and the seventh switch S7 are closed, the second switch S2 and the third switch S3 are open, and the voltage applied to the third capacitor C3 is the input voltage of the voltage input terminal and the voltage of the first capacitor C1. At the same time, the withstand voltage of the seventh switch S7 is 2V. IN -V IN =V IN The function of the third capacitor C3 is the same as that of the output capacitor Cout, both of which are voltage stabilization functions. Thus, the first circuit can provide a first supply voltage having a voltage value twice that of the voltage input terminal.

[0115] During the discharge period of the inductor L, the seventh switch S7 is turned off and does not provide additional voltage.

[0116] Please refer to Figure 9, which is a schematic diagram illustrating the principle of providing a voltage during the discharge period of an inductor L according to an embodiment of the present application. The detailed connection relationship is as follows: the first end of the eighth switch S8 is connected to the second end of the inductor L, the second end of the eighth switch S8 is connected to the first end of the fourth capacitor C4, and the second end of the fourth capacitor C4 is connected to the second end of the fourth switch S4.

[0117] During the discharge period of the inductor L, the eighth switch S8 is controlled to be closed, so that the first end of the fourth capacitor C4 generates a second supply voltage, and the voltage value of the second supply voltage is twice the voltage value of the voltage output end.

[0118] At the second end of the inductor L, the fourth switch S4 and the fifth switch S5 are disconnected, the sixth switch S6 and the eighth switch S8 are closed, and the voltage applied to the fourth capacitor C4 is the voltage of the second end of the inductor L and the voltage of the second capacitor C2. At the same time, the withstand voltage of the eighth switch S8 is 2V. OUT -V OUT =V OUT The fourth capacitor C4 has the same function as the output capacitor Cout, both of which are voltage stabilization functions. Thus, the second circuit can provide a second supply voltage having a voltage value twice that of the voltage input terminal.

[0119] During the charging period of the inductor L, the eighth switch S8 is turned off and does not provide additional voltage.

[0120] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0121] The above are merely exemplary embodiments of the present disclosure and are not intended to limit the scope of the present disclosure. That is, any equivalent changes and modifications made in accordance with the teachings of the present disclosure are still within the scope of the present disclosure. After considering the disclosure of the specification and the truth of practice, those skilled in the art will easily think of other embodiments of the present disclosure. This application is intended to cover any variations, uses or adaptive changes of the present disclosure, which follow the general principles of the present disclosure and include common knowledge or customary technical means in the field of the present technology that are not recorded in the present disclosure.

Claims

1. A control circuit for a buck-boost converter with a single-mode dual-current path, characterized in that, The circuit includes a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a first capacitor, a second capacitor, and an inductor. The first capacitor and the second capacitor are flying capacitors, where: The first terminal of the first switch and the first terminal of the second switch are connected to a voltage input terminal. The second terminal of the second switch is connected to the first terminal of the first capacitor. The second terminal of the first switch is connected to the second terminal of the first capacitor. The first terminal of the third switch is connected to the second terminal of the first capacitor. The second terminal of the third switch is grounded. The first terminal of the inductor is connected to the first terminal of the first capacitor. The second terminal of the inductor is connected to the first terminal of the fourth switch. The second terminal of the fourth switch is connected to a voltage output terminal. The first terminal of the second capacitor is connected to the second terminal of the inductor. The second terminal of the second capacitor is connected to the first terminal of the fifth switch. The second terminal of the fifth switch is grounded. The first terminal of the sixth switch is connected to the second terminal of the second capacitor. The second terminal of the sixth switch is connected to the second terminal of the fourth switch.

2. The control circuit of the buck-boost converter with a single-mode dual-current path according to claim 1, characterized in that, The control circuit further includes an output capacitor and an output resistor, where: The first terminal of the output capacitor is connected to the voltage output terminal. The second terminal of the output capacitor is grounded. The first terminal of the output resistor is connected to the voltage output terminal. The second terminal of the output resistor is grounded.

3. The control circuit of the buck-boost converter with a single-mode dual-current path according to claim 1, characterized in that, The control circuit further includes a third capacitor and a seventh switch, where: The first terminal of the third capacitor is connected to the voltage input terminal. The second terminal of the third capacitor is connected to the first terminal of the seventh switch. The second terminal of the seventh switch is connected to the first terminal of the inductor.

4. The control circuit of the buck-boost converter with a single-mode dual-current path according to claim 1, wherein The control circuit further includes a fourth capacitor and an eighth switch, where: The first terminal of the eighth switch is connected to the second terminal of the inductor. The second terminal of the eighth switch is connected to the first terminal of the fourth capacitor. The second terminal of the fourth capacitor is connected to the second terminal of the fourth switch.

5. The control circuit of the buck-boost converter with a single-mode dual-current path according to claim 1, characterized in that, The control circuit further includes a third capacitor, a fourth capacitor, a seventh switch, and an eighth switch, where: The first terminal of the third capacitor is connected to the voltage input terminal. The second terminal of the third capacitor is connected to the first terminal of the seventh switch. The second terminal of the seventh switch is connected to the first terminal of the inductor. The first terminal of the eighth switch is connected to the second terminal of the inductor. The second terminal of the eighth switch is connected to the first terminal of the fourth capacitor. The second terminal of the fourth capacitor is connected to the second terminal of the fourth switch.

6. A control method for a buck-boost converter with a single-mode dual-current path, applied to the circuit described in any one of claims 1-5, characterized in that, The method includes: During the inductor charging period, control the first switch, the fourth switch, and the fifth switch to be closed, and control the second switch, the third switch, and the sixth switch to be open, so that the first capacitor and the second capacitor discharge, and the inductor current increases. During the inductor discharging period, control the first switch, the fourth switch, and the fifth switch to be open, and control the second switch, the third switch, and the sixth switch to be closed, so that the first capacitor and the second capacitor charge, and the inductor current decreases.

7. The control method of the buck-boost converter with a single-mode dual-current path according to claim 6, characterized in that, The method includes: During the inductive charging period, control the seventh switch to close so that a first supply voltage is generated at the second terminal of the third capacitor, and the voltage value of the first supply voltage is twice the voltage value of the voltage input terminal.

8. The control method of the buck-boost converter with a single-mode dual-current path according to claim 6, characterized in that, The method includes: During the inductive discharging period, control the eighth switch to close so that a second supply voltage is generated at the first terminal of the fourth capacitor, and the voltage value of the second supply voltage is twice the voltage value of the voltage output terminal.

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