Fine-polishing method, method for preparing mask substrate, and method for preparing semiconductor device

Abstract

Provided in the present invention are a fine-polishing method, a method for preparing a mask substrate, and a method for preparing a semiconductor device. The fine-polishing method comprises: applying a preset voltage to a substrate, such that the surface of the substrate has a positive potential; alternatively, forming a conductive film layer on the surface of the substrate, and applying a preset voltage to the conductive film layer, such that the surface of the conductive film layer has a positive potential. That is, by means of the conductivity of material, positive charges gather on the surface of the substrate or the conductive film layer. Moreover, on the basis of a protruding structure on the surface of the substrate, the surface of the conductive film layer also has a protruding structure, such that a large number of positive charges gather densely at the protruding structure on the surface of the substrate or the conductive film layer, thereby facilitating the accurate capture of electron beams and realizing targeted bombardment of the electron beams. During bombardment of the electron beams, the kinetic energy of high-energy electrons is converted into heat energy and mechanical energy, which act on the protruding structure, so as to realize atomic-level polishing of the substrate or the conductive film layer. Compared with other fine-polishing devices, an electron-beam polishing device is relatively low-costing, thereby facilitating a reduction in preparation cost.

Description

Fine polishing method, mask base plate and method for preparing semiconductor device Technical Field

[0001] The present invention relates to the technical field of integrated circuit manufacturing, and in particular to a fine polishing method, a mask base plate and a method for preparing a semiconductor device. Background Art

[0002] With the continuous advancement of semiconductor technology, photolithography has evolved through the evolution of ultraviolet (UV), deep ultraviolet (DUV), and extreme ultraviolet (EUV). EUV lithography, which uses extreme ultraviolet light with a wavelength of 10nm to 14nm, can extend photolithography to feature sizes below 32nm. Because most materials have a high absorption rate for EUV light with a wavelength of 13.5nm, EUV lithography utilizes a reflective lithography system, and the EUV mask blank is also a reflective mask blank.

[0003] Referring to Figure 1, existing EUV photomasks utilize multiple Mo / Si Bragg reflectors 101 (e.g., more than 50 layers) stacked on a mask substrate 100 to enhance reflectivity through destructive interference. Furthermore, a capping layer 102 and several absorption layers 103 are stacked on the Mo / Si Bragg reflectors 101. The capping layer 102 is typically made of ruthenium (Ru) to protect and prevent oxidation of the Mo / Si Bragg reflectors 101. The absorption layers 103 are typically made of Ta-based materials (e.g., TaBO, TaN, TaBN) or Cr-based materials (e.g., CrN, CrON) to absorb EUV radiation. In other EUV photomasks, a hard mask layer is further deposited on the absorption layer 103 to enhance lithographic patterning. Therefore, EUV photomasks place very high demands on the flatness of the mask substrate 100. As shown in Figures 1 and 2, if defects such as protrusions P and / or pits T are present on the surface of the mask substrate 100, they will not only gradually become prominent on the surface of each film layer on the mask substrate 100, but will also increase in size as the number of film layers increases, and may even cause the defect position to shift, seriously affecting EUV lithography performance. However, existing precision polishing processes are not only expensive but also difficult to meet the flatness requirements of EUV mask blanks.

[0004] Therefore, a new fine polishing method is urgently needed to improve the flatness of the substrate. Summary of the Invention

[0005] The object of the present invention is to provide a fine polishing method, a mask base plate and a method for preparing a semiconductor device, so as to solve the problem of how to improve the flatness of a substrate.

[0006] In order to solve the above technical problems, the present invention provides a fine polishing method, comprising:

[0007] providing a substrate;

[0008] Applying a preset voltage to the substrate so that the surface of the substrate is at a positive potential; or forming a conductive film layer on the surface of the substrate and applying a preset voltage to the conductive film layer so that the surface of the conductive film layer is at a positive potential;

[0009] At least the surface of the conductive film layer is polished using an electron beam polishing process.

[0010] Optionally, in the fine polishing method, before applying a preset voltage to the substrate so that the substrate surface assumes a positive potential; or before forming a conductive film layer on the substrate surface and applying a preset voltage to the conductive film layer so that the conductive film layer surface assumes a positive potential, the fine polishing method further comprises:

[0011] A carbon spin coating process is performed on the surface of the substrate to fill the pits on the surface of the substrate.

[0012] Optionally, in the fine polishing method, when the substrate is a conductor, a preset voltage is applied to the substrate so that the surface of the substrate has a positive potential; when the substrate is an insulator or a semiconductor, a conductive film layer is formed on the surface of the substrate, and a preset voltage is applied to the conductive film layer so that the surface of the conductive film layer has a positive potential;

[0013] Furthermore, the process of forming a conductive film layer on the surface of the substrate includes:

[0014] The conductive film layer is formed on the surface of the substrate by a metal ion implantation process to make the substrate surface conductive; or the conductive film layer is formed on the surface of the substrate by a thin film deposition process.

[0015] Optionally, in the fine polishing method, in the process of polishing at least the surface of the conductive film layer by using an electron beam polishing process, protruding structures on the surface of the conductive film layer are removed by using an electron beam in a targeted manner.

[0016] Optionally, in the fine polishing method, a scanning electron microscope is used to perform the electron beam polishing process.

[0017] Based on the same inventive concept, the present invention also provides a method for preparing a mask blank, comprising:

[0018] Step 1: providing a substrate;

[0019] Step 2: forming at least one Bragg reflection layer on the surface of the substrate;

[0020] Step 3: applying a preset voltage to the Bragg reflective layer, and making at least the surface of the Bragg reflective layer located on the top layer have a positive potential;

[0021] Step 4: polishing the surface of the Bragg reflector layer located on the top layer using an electron beam polishing process;

[0022] Step 5: forming a plurality of Bragg reflective layers on the top Bragg reflective layer, and repeating steps 3 to 4 until the flatness of the surface of the top Bragg reflective layer meets a preset requirement.

[0023] Optionally, in the method for preparing the mask blank, before performing step 2, a carbon spin coating process is performed on the surface of the substrate to fill pits on the surface of the substrate.

[0024] Optionally, in the method for preparing the mask blank, during the execution of step 4, an electron beam is used to remove protruding structures on the surface of the Bragg reflective layer located on the top layer in a targeted manner.

[0025] Optionally, in the method for preparing the mask blank, after performing step 5 and after the number of the formed Bragg reflective layers meets a preset requirement, the method for preparing the mask blank further includes:

[0026] forming a capping layer, a plurality of absorption layers and a hard mask layer in sequence on the Bragg reflection layer located on the top layer; and forming a back conductive layer on the bottom surface of the substrate;

[0027] At least one patterning process is performed on the Bragg reflection layer, the capping layer, the absorption layer, and the hard mask layer on the surface of the substrate to form a mask blank.

[0028] Based on the same inventive concept, the present invention also provides a method for preparing a semiconductor device, including the fine polishing method.

[0029] In summary, the present invention provides a fine polishing method, a mask blank, and a method for manufacturing a semiconductor device. Compared to the prior art, the present invention applies a preset voltage to the substrate to impart a positive potential to the substrate surface; or forms a conductive film layer on the substrate surface and applies a preset voltage to the conductive film layer to impart a positive potential to the conductive film layer surface. The present invention utilizes the conductivity of the substrate or the conductive film layer material to concentrate positive charges on the substrate or the conductive film layer surface. Furthermore, based on the raised topography of the substrate surface, the conductive film layer also has a raised topography. Consequently, a large amount of positive charge is densely concentrated on the raised structures on the substrate or the conductive film layer surface, enabling precise capture of the electron beam during electron beam polishing for targeted bombardment. During the electron beam bombardment process, the kinetic energy of the high-energy electrons is converted into thermal and mechanical energy, which acts on the raised structures, achieving atomic-level precision polishing of the substrate or the conductive film layer. Furthermore, compared to other fine polishing equipment used in existing processes, electron beam polishing equipment is less expensive, thus reducing manufacturing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Those skilled in the art will appreciate that the drawings are provided for a better understanding of the present invention, but do not constitute any limitation on the scope of the present invention.

[0031] FIG. 1 shows a protruding defect of a mask blank in the prior art.

[0032] FIG. 2 shows a pit defect on a mask blank in the prior art.

[0033] FIG3 is a flow chart of a fine polishing method according to an embodiment of the present invention.

[0034] FIG4 is a schematic structural diagram of a substrate in an embodiment of the present invention.

[0035] FIG5 is a schematic structural diagram of forming a repair layer in an embodiment of the present invention.

[0036] FIG6 is a schematic structural diagram of applying a preset voltage to a conductive substrate in an embodiment of the present invention.

[0037] FIG. 7 is a schematic structural diagram of a conductive film layer formed on a substrate surface according to an embodiment of the present invention.

[0038] FIG8 is a schematic structural diagram of a conductive film layer formed on a substrate surface in an embodiment of the present invention.

[0039] FIG9 is a schematic diagram of another structure of forming a conductive film layer on a substrate surface according to an embodiment of the present invention.

[0040] FIG10 is a schematic structural diagram of an electron beam polishing process for a conductive substrate according to an embodiment of the present invention.

[0041] FIG11 is a schematic structural diagram of a conductive substrate after electron beam polishing in an embodiment of the present invention.

[0042] FIG12 is a schematic structural diagram of an electron beam polishing conductive film layer in an embodiment of the present invention.

[0043] FIG13 is a schematic diagram of the structure of the conductive film layer after electron beam polishing in an embodiment of the present invention.

[0044] FIG14 is a flow chart of a method for preparing a mask blank according to an embodiment of the present invention.

[0045] FIG15 is a schematic diagram of the structure of the Bragg reflector layer after electron beam polishing in an embodiment of the present invention.

[0046] FIG16 is a schematic diagram of the structure of the electron beam polishing Bragg reflection layer in an embodiment of the present invention.

[0047] FIG17 is a schematic structural diagram of a Bragg reflector layer that meets the flatness requirements in an embodiment of the present invention.

[0048] FIG18 is a schematic structural diagram of a mask base in an embodiment of the present invention.

[0049] And, in the accompanying drawings:

[0050] 100 - mask substrate; 101 - Mo / Si Bragg reflection layer; 102 - cover layer; 103 - absorption layer;

[0051] 200 - substrate; 201 - repair layer; 202 - conductive film layer; 203 - Bragg reflection layer; 204 - cover layer; 205 - absorption layer; 206 - hard mask layer; 207 - back conductive layer;

[0052] T-pit; P-protruding structure on the substrate surface; W-protruding structure on the conductive film layer. DETAILED DESCRIPTION

[0053] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different focuses and sometimes use different scales.

[0054] As used in the present invention, the singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second" and "third" may explicitly or implicitly include one or at least two of the features, and the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. In addition, as used in the present invention, "one element is disposed on another element" generally only indicates that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements may be direct or indirect through an intermediate element. It should not be understood as indicating or implying a spatial positional relationship between the two elements. That is, one element can be in any orientation, such as inside, outside, above, below, or to one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0055] Referring to FIG3 , this embodiment provides a fine polishing method, comprising:

[0056] Step 1 S10: providing a substrate;

[0057] Step 2 S11: applying a preset voltage to the substrate so that the surface of the substrate is at a positive potential; or forming a conductive film layer on the surface of the substrate and applying a preset voltage to the conductive film layer so that the surface of the conductive film layer is at a positive potential;

[0058] Step three S12: polishing at least the surface of the substrate or the conductive film layer using an electron beam polishing process.

[0059] It is understood that the fine polishing method is to apply a preset voltage to the substrate so that the surface of the substrate has a positive potential; or to form a conductive film layer on the surface of the substrate and apply a preset voltage to the conductive film layer so that the surface of the conductive film layer has a positive potential. Among them, the fine polishing method utilizes the conductive properties of the material to cause positive charges to converge on the surface of the substrate or the conductive film layer. And based on the raised morphology of the substrate surface, the surface of the conductive film layer also has a raised morphology, then a large amount of positive charges will densely converge on the raised structures on the surface of the substrate or the conductive film layer, thereby accurately capturing the electron beam during the electron beam polishing process, so as to use the electron beam for targeted bombardment. And during the bombardment of the electron beam, the kinetic energy of the high-energy electrons is converted into heat energy and mechanical energy, and acts on the raised structures to achieve atomic-level precision polishing of the substrate or the conductive film layer. And compared with other fine polishing equipment in existing processes, the cost of electron beam polishing equipment is lower, which helps to reduce production costs.

[0060] The fine polishing method provided in this embodiment is described in detail below with reference to Figures 3 to 13 .

[0061] Specifically, the fine polishing method includes:

[0062] Step 1 S10: Please refer to FIG. 4 and FIG. 5 , a substrate 200 is provided.

[0063] The substrate 200 referred to in this embodiment is a semiconductor structure, mask blank, or other plate to be finely polished. This embodiment does not limit the specific material of the substrate 200. It can be a quartz glass substrate, soda lime substrate, borosilicate substrate, aluminum silicate substrate, silicon substrate, or silicon carbide substrate used as a mask blank base plate; or any substrate known to those skilled in the art for supporting semiconductor integrated circuit components, including a bare die, a wafer processed by an epitaxial growth process, a circuit layer with devices formed thereon, or other semiconductor thin film. For example, a gallium nitride film, a silicon-on-insulator (SOI) substrate, a bulk silicon substrate, a germanium substrate, a silicon-germanium substrate, an indium phosphide (InP) substrate, a gallium arsenide (GaAs) substrate, or a germanium-on-insulator substrate.

[0064] Furthermore, during the actual process, the surface of the substrate 200 generally accumulates defects such as contaminants, pits T, and protrusions P, which seriously affect the surface flatness and roughness of the substrate 200. Preferably, when the surface roughness of the substrate 200 is severe, the substrate 200 can be first rough-polished using a process such as chemical mechanical polishing, followed by the fine polishing method provided in this embodiment. Of course, the fine polishing method can also be performed directly on the substrate 200. Furthermore, preferably, before fine polishing the substrate 200, the surface of the substrate 200 can be cleaned using a process such as wet cleaning to at least remove contaminants from the surface of the substrate 200. However, after cleaning, the surface of the substrate 200 still contains two types of defects: pits T and protrusions P. It should be noted that the pits T referred to in this embodiment include, but are not limited to, deeply depressed grooves, slight scratches, and cracks; and the protrusions P are not limited to tiny particles that are higher than the surface of the substrate 200, but can also be areas with large inclined surfaces.

[0065] Step 2 S11: Please refer to Figures 5 to 9, apply a preset voltage to the substrate 200 so that the surface of the substrate 200 has a positive potential; or, form a conductive film layer 202 on the surface of the substrate 200, and apply a preset voltage to the conductive film layer 202 so that the surface of the conductive film layer 202 has a positive potential.

[0066] Preferably, referring to FIG5 , after cleaning and drying the surface of the substrate 200, and before executing the step 2 S11, the fine polishing method further includes: performing a carbon spin coating process (Spin on Carbon, SOC) on the surface of the substrate 200 to fill the pits T on the surface of the substrate 200. Specifically, the carbon spin coating process uses a polymer solution with a high carbon content as a coating material under high temperature conditions to coat a repair layer 201 on the surface of the substrate 200, and uses the spin-coated repair layer 201 to perform deep gap filling on the surface of the substrate 200 to repair the pits T, improve the flatness of the surface of the substrate 200, and reduce its roughness. Among them, this embodiment does not limit the specific process parameters of the carbon spin coating process, nor does it limit the specific material and thickness of the repair layer 201. Exemplarily, the thickness range of the repair layer 201 is: 10nm~100nm, and 170 is performed. o Soft bake at 350°C or above o C hard bake.

[0067] Furthermore, the substrate 200 provided in this embodiment can be a conductor, a semiconductor, or an insulator. Referring to FIG6 , when the substrate 200 is a conductor, for example, the material of the substrate 200 is metal, a preset voltage can be directly applied to the substrate 200 to attract positive charges to the surface of the substrate 200, so that the surface of the substrate 200 has a positive potential. According to the principle of tip discharge, charges are easily accumulated at the tip position, so the surface of the protruding structure P of the substrate 200 will densely gather a large amount of positive charges, forming a strong potential, thereby making it easier for the protruding structure P on the surface of the substrate 200 to capture the electron beam, which is conducive to achieving targeted bombardment of the electron beam and achieving precise polishing.

[0068] Referring to Figures 7 to 9, in actual processes, the substrate 200 used as the bottom plate of a semiconductor device or a mask base plate device is generally a semiconductor or an insulator with poor electrical conductivity. Since the surface of the substrate 200 is not charged at all, if the substrate 200 is directly subjected to electron beam polishing, the electron beam is difficult to achieve targeted bombardment, so the protruding structures P on the surface of the substrate 200 cannot be removed in a targeted manner, resulting in limited overall polishing effect. If a voltage is directly applied to the surface of the substrate 200 to meet the targeted bombardment of the electron beam, due to the poor electrical conductivity of the substrate 200, even if a sufficiently large bias voltage is applied, it is difficult to cause sufficient positive charges to accumulate on the protruding structures P. Moreover, a large bias voltage can easily damage the substrate 200 and induce new defects in the substrate 200. Therefore, in order to balance the polishing effect and avoid the formation of new defects, the fine polishing method provided in this embodiment performs a conductive treatment on the surface of the substrate 200. That is, the conductive film layer 202 is formed on the surface of the substrate 200 by a metal ion implantation process to make the surface of the substrate 200 conductive; or, the conductive film layer 202 is formed on the surface of the substrate 200 by a thin film deposition process.

[0069] Specifically, as shown in FIG7 , a metal ion implantation process is used to implant metal ions onto the surface of the substrate 200, so that the metal ions are implanted and diffused within the repair layer 201 and within a certain depth within the surface of the substrate 200. As a result, the portions of the substrate 200 and the repair layer 201 doped with the metal ions have excellent conductivity, serving as the conductive film layer 202, enabling high-precision, rapid polishing in conjunction with an electron beam in a subsequent polishing process. Alternatively, as shown in FIG8 , a thin film deposition process is used to deposit a single layer of the conductive film layer 202 onto the surface of the substrate 200. Exemplarily, a silicon layer and a molybdenum layer are sequentially deposited onto the surface of the substrate 200 using processes such as chemical vapor deposition, atomic layer deposition, or plasma sputtering deposition to form a Bragg reflector layer serving as the conductive film layer 202. It should be noted that the silicon layer in the Bragg reflector layer can replace the repair layer 201 formed by the carbon spin coating process shown in FIG5 , similarly serving to fill and repair the pits T on the surface of the substrate 200, thereby optimizing the flatness of the substrate 200 surface. Furthermore, the Bragg reflector layer formed by the combination of the silicon layer and the molybdenum layer has good conductivity. Using it as the conductive film layer 202 can not only improve the effect of electron beam polishing and achieve high-precision polishing, but also streamline the process flow. That is, the Bragg reflector layer not only serves as the conductive film layer 202, but also serves as the reflective film layer in the EUV mask base. Of course, to ensure sufficient repair of the surface of the substrate 200, as shown in FIG9 , a repair layer 201 can be first spin-coated on the surface of the substrate 200, and then a Bragg reflector layer can be formed on the repair layer 201 to serve as the conductive film layer 202. It should be noted that this embodiment does not limit the conductive film layer 202 formed to a film layer structure to be formed on the surface of the substrate 200, or a film layer structure that does not affect the function of the substrate 200, so as to be combined with the substrate 200 into a whole as the bottom plate of the device.

[0070] Furthermore, because the conductive film layer 202 formed on the surface of the substrate 200 has excellent conductivity, applying the preset voltage to the conductive film layer 202 via an external circuit can attract positive charges to the surface of the conductive film layer 202, causing the surface of the conductive film layer 202 to assume a positive potential. Furthermore, because the surface of the substrate 200 has protruding structures P, the top surface of the conductive film layer 202 formed on the surface of the substrate 200 also has a protruding morphology. According to the principle of tip discharge, when the surface of the conductive film layer 202 assumes a positive potential, a large amount of positive charges will densely gather on the protruding structures W on the surface of the conductive film layer 202. In other words, compared to the other flat surfaces of the conductive film layer 202, the number of positive charges on the protruding structures W on the surface of the conductive film layer 202 is relatively large, resulting in a stronger potential on the protruding structures W on the surface of the conductive film layer 202, making it easier to capture electron beams.

[0071] Furthermore, this embodiment does not limit the specific value of the preset voltage, and can be set based on factors such as the conductivity of the substrate 200 or the conductive film layer 202. For example, the preset voltage of 100V to 1KV is applied to the substrate 200 or the conductive film layer 202 having better conductivity.

[0072] Step 3 S12: Referring to FIG. 10 to FIG. 13 , an electron beam polishing process is used to polish at least the surface of the substrate 200 or the conductive film layer 202 .

[0073] Preferably, a scanning electron microscope (SEM) is used to perform the electron beam polishing process. During the polishing process, the SEM can provide several electron beams, some of which are used to achieve high-resolution observation to facilitate monitoring of the polishing effect during the polishing process; the remaining electron beams are used to target and remove the protruding structures P on the surface of the substrate 200 with better conductivity, or the protruding structures W on the surface of the conductive film layer 202, thereby achieving the polishing function. As shown in Figures 10 and 12, given that the protruding structures P on the surface of the substrate 200 with better conductivity or the protruding structures W on the surface of the conductive film layer 202 have a large amount of positive charge, when the high-energy electron beam bombards the protruding structures, a large number of electrons are attracted to the surface of the protruding structures and collide with the protruding structures. Since high-speed electrons have wave properties, when high-energy electrons propagate into the protruding structures, they undergo elastic collisions with atoms within the protruding structures, triggering a series of multi-stage collisions. During the collision process, some atoms will be knocked out of the protruding structure, so that the protruding structure can be removed at the atomic level by mechanical force; and the collision of electrons will also be transferred in the form of heat energy, that is, the kinetic energy of the electrons is converted into heat energy, and when a large number of electrons gather, the heat generated by the conversion is high, enough to melt and / or vaporize the protruding structure, so as to use heat energy to polish the surface of the substrate 200 or the conductive film layer 202 with better conductivity.

[0074] 11 and 13 , the surface of the substrate 200 or the conductive film layer 202 after being polished by the electron beam polishing process has good flatness and roughness. It should be noted that when the conductive film layer 202 is formed on the surface of the substrate 200, and based on the different protrusion levels of the protruding structures P on the surface of the substrate 200, the thickness of the conductive film layer 202 removed by the electron beam varies. In order to ensure the overall flatness of the surface of the polished structure, only a portion of the thickness of the conductive film layer 202 is removed from some areas during the polishing process, while some areas may be polished and expose the substrate 200. However, polishing the conductive film layer 202 and polishing the substrate 200 are based on the same principle, both utilizing the mechanical energy and thermal energy converted from high-energy electrons to remove the corresponding materials.

[0075] Furthermore, during the polishing process, the SEM can adaptively and automatically adjust the process parameters such as the energy, power, irradiation angle and polishing time of the electron beam according to the protrusion structure with different protrusion degrees. This embodiment does not specifically limit this. Preferably, the electron beam polishing process is carried out in a vacuum environment to prevent the elements in the external environment from contaminating or oxidizing the surface of the substrate 200 and the conductive film layer 202. For example, an electron source with a negative pressure range of -10KV to 500KV is used, and the vacuum pressure is less than or equal to 10 -6 It should be noted that, in other embodiments, other devices such as an electron gun may be used to provide the electron beam for polishing.

[0076] In summary, the fine polishing method provided in this embodiment utilizes a carbon spin coating process or other deposition process to form a repair layer 201 on the surface of the substrate 200 to fill and repair the pit T defects on the surface of the substrate 200. Furthermore, a preset voltage is applied to the conductive substrate 200 to impart a positive potential to the surface of the substrate 200. Alternatively, the surface of the substrate 200 with poor conductivity is first subjected to a conductive treatment, i.e., a conductive film layer 202 is formed within or on the surface of the substrate 200 to optimize the conductive properties of the substrate 200 surface. The surface of the conductive film layer 202 is then imparted with a positive potential by applying a preset voltage provided by an external circuit. Because the surface of the protruding structures of the substrate 200 or the conductive film layer 202 with good conductivity densely accumulates a large amount of positive charge, it is easy to capture the electron beam. Therefore, during the electron beam polishing process, a large number of high-energy electrons can be targeted to bombard the protruding structures, achieving atomic-level, high-precision polishing of the substrate 200 or the conductive film layer 202.

[0077] Based on the same inventive concept, this embodiment also provides a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device includes the aforementioned fine polishing method. That is, during the integrated circuit manufacturing process, the fine polishing method can be used to polish the semiconductor device in its entirety or in part. Furthermore, during the manufacturing process of the semiconductor device, the substrate 200 can be polished on either a single side or a double side, which is not specifically limited in this embodiment. Furthermore, the fine polishing method provided in this embodiment can be applied to other device manufacturing fields, which is not specifically limited in this embodiment.

[0078] Based on the same inventive concept, this embodiment also provides a method for preparing a mask blank. This method utilizes the aforementioned fine polishing method to optimize the flatness and roughness of the structure, thereby improving the performance of the mask blank. Specifically, referring to Figures 4-5, 8-9, and 12-18, the method for preparing the mask blank includes:

[0079] Step 1 S20: Please refer to FIG. 4 and FIG. 5 , a substrate 200 is provided.

[0080] Based on the application requirements of the mask blank, the substrate 200 is made of a material with a low thermal expansion coefficient, preferably quartz. Furthermore, because the lithography precision of the mask blank is as high as tens of nanometers or even several nanometers, the flatness and roughness requirements of the substrate 200 are very high. Preferably, before performing step 2 ( S21 ), the substrate 200 is first rough-polished using a process such as chemical mechanical polishing, and then the surface of the substrate 200 is cleaned using a wet cleaning process to at least remove contaminant particles on the surface of the substrate 200. After cleaning and drying the substrate 200, a carbon spin coating process is used to form a repair layer 201 on the surface of the substrate 200 to fill the pits T on the surface of the substrate 200, thereby repairing the deep gaps in the substrate 200.

[0081] Step 2 S21 : Please refer to FIG. 8 and FIG. 9 , at least one Bragg reflection layer is formed on the surface of the substrate 200 .

[0082] It should be noted that this embodiment does not limit the specific type of the mask blank. Exemplarily, the mask blank is an EUV mask blank. The EUV mask blank is a reflective mask blank, so in order to enhance the reflection effect of the EUV mask blank, it is necessary to form dozens of layers of the Bragg reflection layer on the surface of the substrate 200, and each layer of the Bragg reflection layer includes a stacked silicon layer and a molybdenum layer. Since the wavelength of EUV is extremely short, only about 13.5nm, in order to utilize the principle of destructive interference to enhance the reflection effect, the thickness of each layer of the Bragg reflection layer is preferably one-quarter of the wavelength of light, that is, the thickness range is: 3nm~4nm. Among them, this embodiment does not limit the specific process of forming the Bragg reflection layer, and the optional processes include: chemical vapor deposition process, atomic layer deposition process or plasma sputtering deposition process, etc.

[0083] Furthermore, the Bragg reflector layer has a certain degree of conductivity, so the at least one Bragg reflector layer formed on the surface of the substrate 200 is equivalent to the conductive film layer 202 formed in the above-mentioned fine polishing method. It can be seen that the method for preparing the mask blank provided in this embodiment cleverly utilizes the required film layer structure in conjunction with subsequent electron beam polishing, streamlining the process flow and improving preparation efficiency.

[0084] Step 3 S22: Please refer to FIG. 8 and FIG. 9 , a predetermined voltage is applied to the Bragg reflective layer, and at least the surface of the Bragg reflective layer located on the top layer is at a positive potential.

[0085] Specifically, a preset voltage is applied to the Bragg reflector formed on the surface of the substrate 200 via an external circuit, causing a large amount of positive charge to accumulate on the surface of the top Bragg reflector. Given that the substrate 200 surface has a protruding structure P, the top surface of the Bragg reflector deposited on the substrate 200 also has a protruding morphology. Based on the principle of tip discharge, the positive charges on the surface of the Bragg reflector are densely concentrated at the protruding morphology locations on the top surface of the Bragg reflector. The potential at the protruding morphology locations on the top surface of the Bragg reflector is higher than that of other flat areas on the top surface of the Bragg reflector, making it easier to capture electron beams. Furthermore, this embodiment does not limit the specific value of the preset voltage, and it can be set based on factors such as the conductive properties of the Bragg reflector.

[0086] Step 4 S23: Referring to FIG. 12 , FIG. 13 , FIG. 15 and FIG. 16 , the surface of the Bragg reflector layer on the top layer is polished using an electron beam polishing process.

[0087] According to the polishing principle of the above-mentioned fine polishing method, a high-energy electron beam targets the protruding features on the surface of the Bragg reflector layer, utilizing the mechanical and thermal energy converted from its own kinetic energy to polish the surface of the Bragg reflector layer. This allows for atomic-level polishing accuracy and high polishing efficiency. This embodiment does not limit the process parameters for the electron beam polishing; adaptive dynamic adjustments can be made during the polishing process based on the degree of protrusion on the surface of the Bragg reflector layer. Furthermore, preferably, a scanning electron microscope (SEM) is used to monitor and polish the Bragg reflector layer 203.

[0088] It should be noted that the surface of the Bragg reflector layer 203 after polishing may meet the flatness requirements of the mask blank, as shown in FIG13 , or may not meet the flatness requirements of the mask blank, as shown in FIG15 . That is, the surface of the Bragg reflector layer still has a certain degree of protrusion. Continuing to perform high-energy electron beam polishing may cause new damage to the Bragg reflector layer. Therefore, the method for preparing the mask blank provided in this embodiment utilizes the film structure of dozens of layers of Bragg reflectors on the surface of the substrate 200 to perform progressive electron beam polishing on different layers of the Bragg reflectors. This ensures the film structure quality while meeting the high flatness requirements of the mask blank (see the description of step 5 S24 below for details).

[0089] Step 5 S24: Referring to FIG. 12 , FIG. 15 , FIG. 16 and FIG. 17 , a plurality of layers of the Bragg reflector 203 are formed on the top Bragg reflector 203 , and steps 3 S22 to 4 S23 are repeatedly performed until the flatness of the surface of the top Bragg reflector 203 meets the preset requirements.

[0090] For example, if 50 layers of the Bragg reflector layer 203 are to be deposited on the substrate 200, after depositing one layer of the Bragg reflector layer 203 in step 2 ( S21 ), targeted bombardment is performed on the protruding structures on the surface of the first layer of the Bragg reflector layer 203 to polish the first layer of the Bragg reflector layer 203. Due to the high flatness requirement of the mask blank, electron beam polishing of only the first layer of the Bragg reflector layer 203 is difficult to achieve the required flatness of the mask blank. Therefore, after polishing the first layer of the Bragg reflector layer 203, several more layers of the Bragg reflector layer 203 are deposited, for example, five layers of the Bragg reflector layer 203 are deposited. Then, the preset voltage is applied to the sixth layer of the Bragg reflector layer 203 located on the top surface, so that the top surface of the sixth layer of the Bragg reflector layer 203 assumes a positive potential. Subsequently, the top surface of the sixth layer of the Bragg reflector layer 203 is again polished using an electron beam. This process is repeated, and electron beam polishing is performed once every five layers of the Bragg reflective layer 203 are formed, until the flatness of the surface of the Bragg reflective layer 203 at the top layer meets the preset requirements.

[0091] As shown in FIG17 , assuming that the surface of the 26th Bragg reflector layer 203 meets the flatness requirements of the mask blank when depositing the 26th Bragg reflector layer 203, the remaining Bragg reflector layers 203 are deposited on the surface of the 26th Bragg reflector layer 203. If the surface of the 50th Bragg reflector layer 203 meets the flatness requirements of the mask blank when depositing the 50th Bragg reflector layer 203, the deposition of all Bragg reflector layers 203 is completed, and the formation of other film structures is continued. Furthermore, if the top surface of the Bragg reflector layer 203 is highly protruding, the energy of the electron beam can be adaptively increased, and / or the number of electron beam polishing operations can be increased, thereby reducing the number of Bragg reflector layers 203 between polishing processes to improve polishing effects and efficiency. This avoids the situation where the surface flatness of the top Bragg reflector layer 203 still does not meet the preset requirements after all Bragg reflector layers 203 are deposited. In this regard, this embodiment does not limit the number of the Bragg reflective layers 203 deposited between two adjacent polishing processes. Polishing can be performed every three layers or every ten layers, and can be adaptively adjusted according to the protrusion of the surface of the Bragg reflective layer 203.

[0092] Referring to Figure 18 , the surface of the top Bragg reflector layer 203 has a relatively high degree of flatness due to repeated electron beam polishing processes. After forming a predetermined number of layers of the Bragg reflector layer 203, the mask blank preparation method further includes: sequentially forming a capping layer 204, a plurality of absorption layers 205, and a hard mask layer 206 on the top Bragg reflector layer 203; and forming a back conductive layer 207 on the bottom surface of the substrate 200. The capping layer 204 protects the Bragg reflector layer 203 from oxidation, which could affect its reflective properties. The absorption layer 205 absorbs the photolithography beam. The hard mask layer 206 enhances the photolithography patterning effect. Finally, the back conductive layer 207 provides electrical conductivity to prevent static electricity or electromagnetic interference from affecting the photolithography effect. Subsequently, at least one patterning process is performed on the Bragg reflector 203, the cover layer 204, the absorption layer 205, and the hard mask layer 206 on the surface of the substrate 200 to form the mask blank. It should be noted that this embodiment does not specifically limit the specific material, thickness, formation process, and patterning process of the cover layer 204, the absorption layer 205, the hard mask layer 206, and the back conductive layer 207.

[0093] In summary, the fine polishing method, mask blank, and semiconductor device preparation method provided in this embodiment utilize a carbon spin coating process or other deposition process to form a repair layer 201 on the surface of the substrate 200 to fill and repair the pit T defects on the surface of the substrate 200. Furthermore, a predetermined voltage is directly applied to the surface of the substrate 200 with relatively good conductivity to impart a positive charge to the surface of the substrate 200. Alternatively, for a substrate 200 with relatively poor conductivity, a conductive film layer 202 is first formed on the surface of the repair layer 201, and then a predetermined voltage is applied to the conductive film layer 202 to utilize the conductive properties of the conductive film layer 202 to cause positive charges to accumulate on the surface of the conductive film layer 202. Furthermore, because the protruding structures on the surface of the substrate 200 or the conductive film layer 202 with relatively good conductivity can densely accumulate a large amount of positive charges, and these accumulated positive charges are easily captured by the electron beam, the large amount of positive charges facilitates targeted bombardment of the protruding structures by the high-energy electron beam, thereby achieving rapid and precise polishing of the protruding structures. In the process of preparing the mask blank, the method provided in this embodiment optimizes the flatness of the mask blank by repeatedly depositing and polishing the Bragg reflector layer 203. Preferably, the process of repeatedly depositing and polishing the conductive film layer 202 can also be applied to the preparation of other mask blanks or semiconductor devices.

[0094] Furthermore, it should be recognized that although the present invention has been disclosed above with reference to preferred embodiments, the above embodiments are not intended to limit the present invention. Any person skilled in the art can utilize the above disclosed technical content to make many possible changes and modifications to the technical solution of the present invention, or modify it into equivalent embodiments with equivalent variations, without departing from the scope of the technical solution of the present invention. Therefore, any simple modifications, equivalent variations, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the technical solution of the present invention, shall still fall within the scope of protection of the technical solution of the present invention.

Claims

1. A fine polishing method, characterized in that, Comprising: Providing a substrate; Applying a preset voltage to the substrate to make the surface of the substrate have a positive potential; Or, forming a conductive film layer on the surface of the substrate and applying a preset voltage to the conductive film layer to make the surface of the conductive film layer have a positive potential; Using an electron beam polishing process to polish at least the surface of the substrate or the conductive film layer.

2. The fine polishing method according to claim 1, characterized in that, Before applying a preset voltage to the substrate to make the surface of the substrate have a positive potential; or, forming a conductive film layer on the surface of the substrate and applying a preset voltage to the conductive film layer to make the surface of the conductive film layer have a positive potential, the fine polishing method further includes: Performing a carbon spin coating process on the surface of the substrate to fill the pits on the surface of the substrate.

3. The fine polishing method according to claim 1 or 2, characterized in that When the substrate is a conductor, applying a preset voltage to the substrate to make the surface of the substrate have a positive potential; when the substrate is an insulator or a semiconductor, forming a conductive film layer on the surface of the substrate and applying a preset voltage to the conductive film layer to make the surface of the conductive film layer have a positive potential; And, the process of forming a conductive film layer on the surface of the substrate includes: Using a metal ion implantation process to form the conductive film layer inside the surface of the substrate to make the surface of the substrate conductive; Or, using a thin film deposition process to form the conductive film layer on the surface of the substrate.

4. The fine polishing method according to claim 1 or 2, characterized in that, During the process of using an electron beam polishing process to polish at least the surface of the conductive film layer, using electron beam targeting to remove the protruding structures on the surface of the conductive film layer.

5. The fine polishing method according to claim 1 or 2, characterized in that, Performing the electron beam polishing process using a scanning electron microscope.

6. A method for preparing a mask substrate, characterized in that, Comprising: Step 1: Providing a substrate; Step 2: Forming at least one layer of Bragg reflection layer on the surface of the substrate; Step 3: Applying a preset voltage to the Bragg reflection layer and at least making the surface of the top layer Bragg reflection layer have a positive potential; Step 4: Using an electron beam polishing process to polish the surface of the top layer Bragg reflection layer; Step 5: Forming several layers of the Bragg reflection layer on the top layer Bragg reflection layer and repeating Steps 3 to 4 until the flatness of the surface of the top layer Bragg reflection layer meets the preset requirements.

7. The method for preparing a mask substrate according to claim 6, wherein, Before performing Step 2, performing a carbon spin coating process on the surface of the substrate to fill the pits on the surface of the substrate.

8. The method for preparing a mask substrate according to claim 6 or 7, characterized in that, During the process of performing Step 4, using electron beam targeting to remove the protruding structures on the surface of the top layer Bragg reflection layer.

9. The method for preparing a mask substrate according to claim 6 or 7, characterized in that After performing Step 5 and when the number of layers of the formed Bragg reflection layer meets the preset requirements, the method for preparing the mask substrate further includes: Successively forming a covering layer, several absorption layers and a hard mask layer on the top layer Bragg reflection layer; and, forming a back conductive layer on the bottom surface of the substrate; Performing at least one patterning process on the Bragg reflection layer, the covering layer, the absorption layer and the hard mask layer on the surface of the substrate to form a mask substrate.

10. A method for manufacturing a semiconductor device, characterized in that, Including the fine polishing method according to any one of claims 1 to 5.

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