Multi purpose channel for optical metrology

Abstract

An integrated metrology system that includes a metrology channel configured to perform optical measurements of metrology sites of a wafer; a pattern recognition imaging channel (PRIC) that is configured to (i) generate, during a metrology session, navigation image information for navigating in relation to the metrology sites, and (ii) acquire PRIC metrology information for wafer edge region portions during at least a portion of a wafer alignment session; a sample movement unit configured to rotate the wafer during a wafer alignment session; and a processing circuit configured to process at least the PRIC metrology information to provide metrology results regarding the wafer edge region portions.

Description

MULTI PURPOSE CHANNEL FOR OPTICAL METROLOGYCROSS REFERENCE

[0001] This application claims priority from US provisional patent serial number 63 / 623,266 filing date 1 / 21 / 2024 which is incorporated herein in its entirety.BACKGROUND

[0002] Modem semiconductor manufacturing heavily relies on stringent and frequent metrology for process control. Specifically, optical metrology solutions offer fast and accurate feedback on the fabricated structures and are used throughout the manufacturing process. Of specific interest to the current invention are Optical Critical Dimensions (OCD) metrology solutions, by which broadband spectral scatterometry is used to characterize dimensional properties of the measured nanostructures. Process control tools utilizing OCD technology exist in the fabrication plant (‘fab’) either as stand-alone (SA) tools, or as integrated metrology (IM) tools which are attached to a specific process tool for which they provide process control (examples of such tools are illustrated in PCT patent application publication number W02008149372, US patent 7255748, PCT patent application number PCT / IB2021 / 050608, and US patent 6657736, all incorporated herein by reference).

[0003] A semiconductor wafer (wafer) holds a large number of chips (commonly called ‘dies’). These are supposed to have identical structure and attributes, but due to process imperfections have some variations in various dimensional and material characteristics. OCD solutions provide characterization for a few specific locations on the measured wafer, by which important insight on the process attributes across the wafer can be attained. However, these methods are unsuitable to characterize a crucial region on the wafer, namely - the wafer edge. The last few millimeters at the wafer circumference are of specific importance - not only since these hold a large number of dies but also since imperfections in these regions can lead to detrimental misprocess faults. Examples are peal-offs of deposited layers, emergence of localized defects which can later in the process extend throughout the wafer (or spread particulate defects across the wafer) and more. Consequently, extremely stringent and thorough characterization of the edge region is required. Unfortunately, the standard OCD measurement channels only provide highly localized information and are inappropriate for aerial characterization as needed for the wafer edge.BRIEF DESCRIPTION OF THE DRAWINGS

[0004] The subject matter regarded as the invention is particularly pointed out and distinctly claimed in the concluding portion of the specification. The invention, however, both as to organization and method of operation, together with objects, features, and advantages thereof, may best be understood by reference to the following detailed description when read with the accompanying drawings in which:

[0005] FIG. 1 illustrates an example of an integrated metrology system;

[0006] FIG. 2 illustrates an example of an integrated metrology system;

[0007] FIG. 3 illustrates an example of an integrated metrology system;

[0008] FIG. 4 illustrates an example of a wafer;

[0009] FIG. 5 illustrates an example of an integrated metrology system; and

[0010] FIG. 6 illustrates an example of a method.DETAILED DESCRIPTION OF THE DRAWINGS

[0011] According to an embodiment, there is provided an integrated metrology system that is compact (for example about a size of a wafer) and uses at least a portion of the alignment process of the wafer to acquire pattern recognition imaging channel (PRIC) metrology information that is processed to provide metrology results - thereby speeding the generation of metrology results.

[0012] According to an embodiment the PRIC metrology information - alone or in combination with additional information (for example optical measurements of metrology sites generated by a metrology channel) - is used to provide metrology results.

[0013] The acquisition rate of PRIC metrology information well exceeds the acquisition rate of the optical measurements of metrology sites - in terms of covered wafer area per second - and allows to cover the entire edge region at a fraction (even less than 1 percent) than the coverage of the entire edge region by the metrology channel.

[0014] According to an embodiment, the PRIC metrology information is converted using a mapping and may be verified to increase the accuracy of the PRIC metrology information.

[0015] According to an embodiment, the PRIC is also used for generating, during a metrology session, navigation image information for navigating in relation to themetrology sites - and this dual functionality allows to use a compact and low cost integrated metrology system.

[0016] Figure 1 illustrates an example of an integrated metrology system 70, that includes: a. A metrology channel 71 configured to perform optical measurements of metrology sites of a wafer. b. A pattern recognition imaging channel (PRIC) 72 that is configured to (i) generate, during a metrology session, navigation image information for navigating in relation to the metrology sites, and (ii) acquire PRIC metrology information for wafer edge region portions during at least a portion of a wafer alignment session. c. A sample movement unit 73 configured to rotate the wafer during a wafer alignment session. d. A processing circuit 74 configured to process at least the PRIC metrology information to provide metrology results regarding the wafer edge region portions. e. An interfacing element 75 for connecting the integrated metrology system 70 to a wafer processing or evaluation system. The interfacing element may include a mechanical element and / or a magnetic element for mechanically coupling the integrated metrology system to the wafer processing or evaluation system - and may include screws, locks, bolts, fasteners, hooks, magnetic element, interlocking elements, and the like.

[0017] Figure 2 illustrates an example of wafer processing or evaluation system - such as processing system 90 that includes an interface 92 (that includes a robot 91 for transferring wafer 100 between the wafer processing or evaluation system and the integrated metrology system 10) and a process tool 93 such as a polisher - especially an EG polisher.

[0018] In figure 2 the integrated metrology system 10 is illustrated as including optical head 13, optical layer 11, and sample moving unit 13 such as a rotation and z-axis mechanical stage. In figure 2 the optical head is movable along the x-axis and the y-axis.

[0019] According to an embodiment, the optical measurements are optical critical dimensions (OCD) measurements.

[0020] According to an embodiment, the optical measurements involve illuminating the wafer with broadband radiation.

[0021] According to an embodiment, each measurement site has a width and a length of a few tens of microns. A few may range between one and ten.

[0022] According to an embodiment, the PRIC and the metrology channel share at least one optical component.

[0023] According to an embodiment, the sample movement unit is further configured to introduce relative movement between the wafer and at least one channel of the PRIC and the metrology channel.

[0024] According to an embodiment, at least some of the metrology sites are located within the wafer edge region portions.

[0025] According to an embodiment, there may be any relationship between the number of metrology sites that are located within the wafer edge region portions and the number of metrology sites located outside the wafer edge region.

[0026] According to an embodiment, the processing circuit is configured to verify the PRIC metrology information using the optical metrology measurements generated by the metrology channel in relation to one or more of the measurement sites.

[0027] According to an embodiment, the processing circuit is configured to apply a mapping between the PRIC metrology information to metrology results.

[0028] According to an embodiment, the mapping is generated by a machine learning process.

[0029] According to an embodiment, the integrated metrology system is configured to provide, to a training process of the machine learning process, (a) training PRIC metrology information about one or more edge region portions of a training sample - the training PRIC metrology information is PRIC metrology information used for training and may be related to measurement sites of known dimensions and shape), and (b) metrology results (such as OPD results) in relation to one or more training measurement sites of the training sample.

[0030] According to an embodiment, the PRIC metrology information is obtained solely during the wafer alignment session.

[0031] According to an embodiment, the PRIC metrology information is obtained in part during the wafer alignment session, and in part not during the wafer alignment session.

[0032] According to an embodiment, one or more of the measurement sites are located outside each of the one or more edge region portions.

[0033] According to an embodiment, the integrated metrology system includes an optical head shared by the PRIC and the metrology channel.

[0034] According to an embodiment, the integrated metrology system includes an optical head movement unit configured to linearly move the optical head in relation to the wafer.

[0035] According to an embodiment, the sample movement unit is also configured to move the wafer, during the metrology session, in relation to the optical head.

[0036] According to an embodiment, the optical head is configured to direct radiation from an illumination portion of an optical layer towards a region of the sample located within a temporary field of view of the optical head and receives returned radiation that was returned from the sample, and direct the returned radiation towards a collection portion of the optical layer.

[0037] According to an embodiment, the optical head is configured to move along the X-axis and the Y -axis and is capable of covering the entire wafer (or any portion of the wafer). The sample moving unit is a rotation and z-axis mechanical stage (z-axis movement may be used for focusing or any other measurement related purpose). The rotation of the wafer occurs during alignment. Such as configuration provides an integrated metrology system with a minimal footprint (about the size of the wafer size - for example having a wide and length that are about the diameter of the wafer) and may be provide a desired orientation of measurement sites (for example normal illumination, an oriented illumination - or the same orientation for all the different locations that are evaluated). The optical head may include reflecting and / or deflecting elements and may also include additional optical components such as a beam splitter, an objective lens or another lens. The optical components are located within an optical layer - which is a region that includes the other optical components.

[0038] An example of an optical layer and an optical head is illustrated in US patent 5764365 of Finarov which is incorporated herein by reference. An optical head is moved along an x-axis and a y-axis, while maintaining in optical communication with an illumination portion of an optical system (such as an optical layer) and in optical communication with a collection portion of the optical system (such as an optical layer).

[0039] Figure 3 illustrates an example wafer 100 having a notch 102 and a wafer edge region 101, and of parts of an integrated metrology system that includes illuminationsource 20, first deflection mirror 31, second deflection mirror 32, an optical head 13 that includes deflector 33 including first deflection element 33-1 and second deflection element 33-2, movement elements such as carriages 41 and 44 movable along Y-axis thereby moving frame 42 along the Y-axis, deflector 33 is movable along X-axis rails of frame 42 - so that the movement of the frame and the movement of the deflector 33 in relation to the frame provide a seaming of the deflector 22 along the X-axis and the Y- axis - while remaining in optical communication with the illumination source and the collection unit 50. The collection unit includes a splitting optics such as a pinhole mirror 51 for providing some of the collected light to metrology unit sensor 52 and some of the collected light to the PRIC sensor 53.

[0040] In figure 3 the PRIC and the metrology charnel share most optical components (light source, reflecting mirror, deflector 33) - but have separate sensors.

[0041] According to an embodiment, the optical head is fixed, and the sample is moved in relation to the optical head while maintaining in optical communication with an illumination portion of an optical system and in optical communication with a collection portion of the optical system.

[0042] According to an embodiment, the integrated metrology system includes components such as an R-Theta stage to move wafer and a static optical head. In that case the wafer is moved along one axis with range of about R-radius and the wafer is rotated to cover entire wafer. This integrated metrology system has a bigger footprint along one axis (about one and a half of a diameter of the wafer) and due to the rotation there is an arbitrary orientation of measurement sites relative to the optics (as there is a need to rotate wafer to cover entire wafer), but the optical head static. Since normal incidence optics is used, orientation of sites is less critical (however polarization, aberrations could affect). The optical head may be a spectrophotometer (polarized). See, for example, the optical head is illustrated in US patent 7289215 of Spady et al which is incorporated herein by reference. According to an embodiment, another optical head - such as a PRIC optical head or another metrology optical head is added to the integrated metrology system.

[0001] According to an embodiment, the metrology results are indicative of transitions between edges of different wafer layer at the wafer edge region portions.

[0002] According to an embodiment, the metrology results are indicative of at least one of macro-defects and layer peel-offs.

[0003] According to an embodiment, metrology results are indicative of cracks.

[0004] According to an embodiment, the integrated metrology system includes a PRIC optical head that comprises one or more PRIC optical components and a metrology channel optical head that includes one or more metrology channel optical components. See, for example, PRIC optical head 17 and metrology channel optical head 18 of figure 5.

[0005] According to an embodiment, the PRIC and the metrology channel do not share any optical component.

[0006] Figure 4 is an example of the edge region 101 of the wafer 100.

[0007] Figure 5 illustrates an example of an integrated metrology system with a PRIC optical head 17 and a metrology channel optical head 18. The different optical heads may be mechanically coupled to each other or may be moved independently from each other. The different optical heads may be located at the same height or located at different heights.

[0008] According to an embodiment there is provided an integrated metrology system with enhanced metrology capabilities that involves fusing information from an OCD channel with image-based data, unique quantitative interpretation is enabled. One example is the capability to quantitatively measure layer thickness variations across the entire wafer rim, using a simple imaging apparatus. Such capability is not possible with any other technique.

[0009] According to an embodiment there is provided an integrated metrology system that is simple tom implement as is used integration - it based on utilizing existing hardware ingredients to provide high-quality edge metrology.

[0010] The integrated metrology system provides a new approach for characterizing the wafer edge region, integrating information from both the OCD module and an imaging channel. Specifically, the imaging channel can be based on the existing infrastructure used for navigation purposes in the OCD platform.

[0011] According to an embodiment, the integrated metrology system includes an optical layer creating light and guiding it to and from the optical head (OH). The optical head focuses light onto the wafer, and collects the reflected light, which is then used for metrology, commonly by sending reflection from a specific location (of few tens of microns extent) to a spectrometer. The same optical path is used for imaging, allowing accurate navigation across the wafer.

[0012] Figure 6 illustrates method 200 for integrated metrology.

[0013] According to an embodiment, method 200 includes step 210 of acquiring, by the PRIC, metrology information for wafer edge region portions during at least a portion of a wafer alignment session.

[0014] According to an embodiment, step 210 includes step 212 of rotating the wafer, by a sample movement unit of the integrated metrology system, during a wafer alignment session.

[0015] According to an embodiment method 200 includes step 220 of performing, by a metrology channel of an integrated metrology system, optical measurements of metrology sites of a wafer.

[0016] According to an embodiment, step 220 includes step 222 of generating, by a pattern recognition imaging channel (PRIC) of the integrated metrology system and during a metrology session, navigation image information for navigating in relation to the metrology sites.

[0017] According to an embodiment, steps 210 and 220 are followed by step 230 of processing, by a processing circuit of the integrated metrology system, at least the PRIC metrology information to provide metrology results regarding the wafer edge region portions.

[0018] According to an embodiment, the optical measurements are optical critical dimensions (OCD) measurements.

[0019] According to an embodiment, steps 210 and / or 220 include illuminating the wafer with broadband radiation.

[0020] According to an embodiment, each measurement site has a width and a length of a few tens of microns.

[0021] According to an embodiment, the PRIC and the metrology channel share at least one optical component.

[0022] According to an embodiment, method 200 also includes step 240 of introducing, by the sample movement unit, a relative movement between the wafer and at least one channel of the PRIC and the metrology channel during at least one of steps 210 and 220.

[0023] According to an embodiment, at least some of the metrology sites are located within the wafer edge region portions.

[0024] According to an embodiment, step 230 includes verifying the PRIC metrology information using the optical metrology measurements generated by the metrology channel in relation to one or more of the measurement sites.

[0025] According to an embodiment, step 230 includes applying a mapping between the PRIC metrology information to metrology results.

[0026] According to an embodiment, the mapping is generated by a machine learning process.

[0027] According to an embodiment, the method includes providing to a training process of the machine learning process, (a) training PRIC metrology information about one or more edge region portions of a training sample, and (b) metrology results in relation to one or more training measurement sites of the training sample.

[0028] According to an embodiment, method 200 include obtaining the PRIC metrology information solely during the wafer alignment session.

[0029] According to an embodiment, method 200 includes obtaining the PRIC metrology information in part during the wafer alignment session, and in part not during the wafer alignment session.

[0030] According to an embodiment, one or more of the measurement sites are located outside each of the one or more edge region portions.

[0031] According to an embodiment, the integrated metrology system includes an optical head shared by the PRIC and the metrology channel.

[0032] According to an embodiment, steps 210 and 220 use the optical head.

[0033] According to an embodiment, steps 210 and 220 include linearly moving, by an optical head movement unit, optical head in relation to the wafer.

[0034] According to an embodiment, method 200 includes moving, by the sample movement, the wafer, during the metrology session, in relation to the optical head.

[0035] According to an embodiment, step 210 and / or step 220 include directing, by the optical head, radiation from an illumination portion of an optical layer towards a region of the sample located within a temporary field of view of the optical head.

[0036] According to an embodiment, step 210 and / or step 220 include receiving, by the optical head, returned radiation that was returned from the sample, and directing the returned radiation towards a collection portion of the optical layer.

[0037] According to an embodiment, the optical head is fixed and the method includes moving the sample in relation to the optical head while maintaining in opticalcommunication with an illumination portion of an optical system and in optical communication with a collection portion of the optical system.

[0038] According to an embodiment, the metrology results are indicative of transitions between edges of different wafer layer at the wafer edge region portions.

[0039] According to an embodiment, the metrology results are indicative of at least one of macro-defects and layer peel-offs.

[0040] According to an embodiment, metrology results are indicative of cracks.

[0041] According to an embodiment, the integrated metrology system includes a PRIC optical head that includes one or more PRIC optical components and a metrology channel optical head that includes one or more metrology channel optical components. See, for example PRIC optical head 17 and metrology channel optical head 18 of figure 5.

[0042] According to an embodiment, there is provided a method that includes (i) mounting a wafer on a sample movement unit, (ii) aligning the wafer to the optical layer, whereas the alignment is commonly done by placing an optical head above the wafer edge and rotating the wafer, every wafer has a notch carved at its rim in a well- defined location, by optically identifying the passage of this notch below the OH during wafer rotation, the wafer can be aligned, (iii) using the alignment process for a concurrent goal of collecting metrology information - reducing any penalty to the overall required metrology time. During wafer rotations, multiple images are taken and stored for analysis.

[0043] According to an embodiment the alignment includes searching a notch formed at the edge of the wafer.

[0044] According to an embodiment the notch is searched by using the PRIC.

[0045] According to an embodiment the notch is searched by a dedicated notch detection unit that illuminated the edge region of the wafer on one side and detects the illuminated radiation when the notch intersects with the radiation. When the notch does not intersect with the radiation the wafer blocks the radiation. The dedicated notch detection unit may include one or more light emitted diodes for illumination and one or more photodiode for sensing the emitted illumination that passes throught he notch.

[0046] According to an embodiment the integrated metrology system may use an existing pattern-recognition imaging channel (PRIC) that is commonly used for suchgoals as navigation and auto-focus purposes during metrology sessions - for providing PRIC metrology information.

[0047] According to an embodiment, the PRIC may be hardware and / or software adjusted and / or modified, or may maintain the same.

[0048] Several examples for such hardware improvements are: a. Modifying the PRIC to have a multiple wavelength range and / or flexible wavelength range: images taken at different spectral bandwidths offer different sensitivities to the underlying structure characteristics. Flexible spectral range can be implemented either by using an illumination source with adjustable wavelengths span or using a multi-colored camera (e.g. RGB). A highly useful implementation involves using an LED source integrating multiple LED modules of different spectral bandwidths, which can be selectively used. This flexibility can be beneficial for the standard use of the imaging channel, but is of especially high benefit when using this channel for metrology. b. Including a high frequency camera: as explained below, when using the camera for wafer edge characterization, it is desirable that multiple images are taken at short acquisitions. Faster acquisitions allow faster coverage and reduced image smearing in the rotation (circumferential) direction. Cameras with dedicated electronics are required to allow such acquisition. c. Using illumination and / or collection element for applying advanced imaging approaches such as advanced acquisition techniques, polarization-sensitive (and full polarization-characterization) imaging, patterned-illumination imaging and even interferometric and digital holography imaging. While such methods are not necessary for the standard functionality of this channel, they could be beneficial in raising sensitivities to the measured structural characteristics. By simple exchange of the standard cameras with such advanced capabilities, the metrology functions of the camera can be significantly improved.

[0049] According to an embodiment, the wafer rotation during alignment is controlled according to PRIC metrology needs. For example - the proposed measurement sequence involves using wafer rotation during the wafer alignment stage for concurrent metrology. The wafer alignment stage involves wafer rotation, which is generally done at fast speed and high accelerations. The attained spatial resolution can significantly differ between the radial and circumferential directions, as images are taken during wafer rotation causing smearing in the circumferential direction. In order to optimize the involved metrology, it may be preferable to control the wafer rotation speed and acceleration, and synchronize it with the camera acquisition, so as to reduced image smearing and improve the attained resolution.

[0050] According to an embodiment, the measurement sequence, by which metrology information is acquired for the wafer edge region include: (a) during a single wafer rotation, the collected images cover a radial extent from the wafer rim determined by the optical field of view (FOV). If more extended span is required, additional wafer rotations can be used, with the OH moved to a different radial location.

[0051] According to an embodiment, combined information from all acquired images can be expressed as an integrated image I(r, 9, C) corresponding to radial position r, angular position 9 and spectral range (or image color) C.

[0052] According to an embodiment, and in addition to image acquisition, multiple OCD measurements are obtained. This can either be done concurrently with the image acquisition, or at a dedicated step. Standard interpretation of these measurements provide dimensional information on the measured layers at the (few) locations where they are obtained. The corresponding set of interpreted characteristics (typically layers’ thickness) can be expressed by Pm(R, 0) with Pmthe mthparameter (e.g. the thickness of the mthlayer) and ( / ?, 0) the radial and angular coordinates of the OCD acquisitions.

[0053] According to an embodiment, since at least some of this acquisition is concurrent with the wafer alignment process, this information is obtained at minimal penalty to the overall tool throughput.

[0054] According to an embodiment, the integrated metrology system is configured to apply a dedicated interpretation approach by combining information from the OCD metrology and the PRIC.

[0055] According to an embodiment, The availability of both OCD and image-based information allows for quantitative interpretation of the (exhaustive) image data.

[0056] The basic principle for doing so will be described for a single dimensional parameter Po, while extending the same principle to additional parameters can be done using standard algorithmic approaches. Correspondingly, the interpreted parameter can be expressed as a vector Poof length N (with N the number of OCD measurements) with different entries corresponding to different locations. The measured image at the same locations can be expressed as a matrix M of dimensions (IV, M) with M the number of different colors used.

[0057] ‘Train’ step: A machine-learning algorithm uses the measured Poand M to derive an ‘interpreter’. This interpreter can then relate any other measured image location with the corresponding dimensional parameter. Today, numerous algorithmic approaches are available for such a procedure, including built-in validation and testing protocols.

[0058] According to an embodiment, there is provided an ‘interpretation’ step: the obtained interpreter is implemented on the entire imaged dataset l(r, 9, C), providing full characterization of the edge layers attributes.

[0059] According to an embodiment, information from previous measured wafers is used for a more extensive database of the relation between image information and structural parameters. Such information can also reduce the number of required reference points of the measured wafer.

[0060] Beyond the dimensional characterization capabilities, the acquired images can be further used for several other metrology and inspection goals, such as: a. Layer-to-layer transition: towards the wafer edge, deposited layers are designed to thin down at a specified rate and order, in order to verify proper layer adhesion. The measured images can be used to identify the transition between layers, by which process control can be implemented. b. Identification of macro-defects and layer peel-offs. c. Cracks at the wafer edge, occasionally appearing due to accidental wafer mishandling.

[0061] The acquired images can be stored in a dedicated database. This information can provides invaluable insight when fabrication failure occurs down the line - when imaged can be retrieved and analyzed for potential failure causes.

[0062] According to an embodiment, the proposed integrated metrology provides a fast and exhaustive characterization of the wafer edge with no \ minimal additional required hardware and throughput penalty.

[0063] According to an embodiment, the proposed integrated metrology provides dimensional characterization of the wafer edge region using data fusion from the OCD channel together with the image information.

[0064] Wafer edge and wafer edge regions are used in an interchangeable manner. The wafer edge region may have a radial width (distance from the wafer edge) that may range between 0. 1 and 2 cm or between 0.5 and 4 centimeters, or more.

[0065] In the foregoing detailed description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, and components have not been described in detail so as not to obscure the present invention.

[0066] It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.

[0067] Because the illustrated embodiments of the present invention may for the most part, be implemented using electronic components and circuits known to those skilled in the art, details will not be explained in any greater extent than that considered necessary as illustrated above, for the understanding and appreciation of the underlying concepts of the present invention and in order not to obfuscate or distract from the teachings of the present invention.

[0068] Any reference in the specification to a method should be applied mutatis mutandis to a system capable of executing the method and should be applied mutatis mutandis to a non-transitory computer readable medium that stores instructions that once executed by a computer result in the execution of the method.

[0069] Any reference in the specification to a system should be applied mutatis mutandis to a method that can be executed by the system and should be applied mutatis mutandis to a non-transitory computer readable medium that stores instructions that once executed by a computer result in the execution of the method.

[0070] The mentioned above text may refer to a sample . A sample - especially a semiconductor sample - is merely an example of a sample.

[0071] The mentioned above text may refer to a light emitting diode (LED). This is merely an example of an illumination source.

[0072] The mentioned above text refers to a wavelength. Any reference to a wavelength should be applied mutatis mutandis to a range of wavelengths. Additionally or alternatively - any reference to a wavelength may be applied mutatis mutandis to any other property of the illumination and / or collection - such as , polarization, angular content of illumination or / and collection beams , and the like.

[0073] Any reference to the term “comprising” or “having” should be interpreted also as referring to “consisting” of “essentially consisting of’. For example - a method that comprises certain steps can include additional steps, can be limited to the certain steps or may include additional steps that do not materially affect the basic and novel characteristics of the method - respectively.

[0074] In the foregoing specification, the invention has been described with reference to specific examples of embodiments of the invention. It will, however, be evident that various modifications and changes may be made therein without departing from the broader spirit and scope of the invention as set forth in the appended claims.

[0075] Moreover, the terms “front,” “back,” “top,” “bottom,” “over,” “under” and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions. It is understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in other orientations than those illustrated or otherwise described herein.

[0076] Those skilled in the art will recognize that the boundaries between logic blocks are merely illustrative and that alternative embodiments may merge logic blocks or circuit elements or impose an alternate decomposition of functionality upon various logic blocks or circuit elements. Thus, it is to be understood that the architecturesdepicted herein are merely exemplary, and that in fact many other architectures may be implemented which achieve the same functionality.

[0077] Any arrangement of components to achieve the same functionality is effectively "associated" such that the desired functionality is achieved. Hence, any two components herein combined to achieve a particular functionality may be seen as "associated with" each other such that the desired functionality is achieved, irrespective of architectures or intermedial components. Likewise, any two components so associated can also be viewed as being "operably connected," or "operably coupled," to each other to achieve the desired functionality.

[0078] Furthermore, those skilled in the art will recognize that boundaries between the above described operations merely illustrative. The multiple operations may be combined into a single operation, a single operation may be distributed in additional operations and operations may be executed at least partially overlapping in time. Moreover, alternative embodiments may include multiple instances of a particular operation, and the order of operations may be altered in various other embodiments.

[0079] However, other modifications, variations and alternatives are also possible. The specifications and drawings are, accordingly, to be regarded in an illustrative rather than in a restrictive sense.

[0080] In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word ‘comprising’ does not exclude the presence of other elements or steps then those listed in a claim. Furthermore, the terms “a” or “an,” as used herein, are defined as one or more than one. Also, the use of introductory phrases such as “at least one” and “one or more” in the claims should not be construed to imply that the introduction of another claim element by the indefinite articles "a" or "an" limits any particular claim containing such introduced claim element to inventions containing only one such element, even when the same claim includes the introductory phrases "one or more" or "at least one" and indefinite articles such as "a" or "an." The same holds true for the use of definite articles. Unless stated otherwise, terms such as “first" and “second” are used to arbitrarily distinguish between the elements such terms describe. Thus, these terms are not necessarily intended to indicate temporal or other prioritization of such elements. The mere fact that certain measures are recited in mutually different claims does not indicate that a combination of these measures cannot be used to advantage.

[0081] While certain features of the invention have been illustrated and described herein, many modifications, substitutions, changes, and equivalents will now occur to those of ordinary skill in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the invention.

Claims

WE CLAIM1. An integrated metrology system, comprising: a metrology channel configured to perform optical measurements of metrology sites of a wafer; a pattern recognition imaging channel (PRIC) that is configured to (i) generate, during a metrology session, navigation image information for navigating in relation to the metrology sites, and (ii) acquire PRIC metrology information for wafer edge region portions during at least a portion of a wafer alignment session; a sample movement unit configured to rotate the wafer during a wafer alignment session; and a processing circuit configured to process at least the PRIC metrology information to provide metrology results regarding the wafer edge region portions.

2. The integrated metrology system according to claim 1, wherein the optical measurements are optical critical dimensions (OCD) measurements.

3. The integrated metrology system according to claim 1, wherein the optical measurements involve illuminating the wafer with broadband radiation.

4. The integrated metrology system according to claim 1, wherein each measurement site has a width and a length of a few tens of microns.

5. The integrated metrology system according to claim 1 , wherein the PRIC and the metrology channel share at least one optical component.

6. The integrated metrology system according to claim 1, wherein the sample movement unit is further configured to introduce relative movement between the wafer and at least one channel of the PRIC and the metrology channel.

7. The integrated metrology system according to claim 1, wherein at least some of the metrology sites are located within the wafer edge region portions.

8. The integrated metrology system according to claim 7, wherein the processing circuit is configured to verify the PRIC metrology information using the optical metrology measurements generated by the metrology channel in relation to one or more of the measurement sites.

9. The integrated metrology system according to claim 1, wherein the processing circuit is configured to apply a mapping between the PRIC metrology information to metrology results.

10. The integrated metrology system according to claim 9, wherein the mapping is generated by a machine learning process.

11. The integrated metrology system according to claim 10, configured to provide to a training process of the machine learning process, (a) training PRIC metrology information about one or more edge region portions of a training sample, and (b) metrology results in relation to one or more training measurement sites of the training sample.

12. The integrated metrology system according to claim 1, wherein the PRIC metrology information is obtained solely during the wafer alignment session.

13. The integrated metrology system according to claim 1, wherein the PRIC metrology information is obtained in part during the wafer alignment session, and in part not during the wafer alignment session.

14. The integrated metrology system according to claim 1, wherein one or more of the measurement sites are located outside each of the one or more edge region portions.

15. The integrated metrology system according to claim 1, further comprising an optical head shared by the PRIC and the metrology channel.

16. The integrated metrology system according to claim 15, further comprising an optical head movement unit configured to linearly move the optical head in relation to the wafer.

17. The integrated metrology system according to claim 16, wherein the sample movement unit is also configured to move the wafer, during the metrology session, in relation to the optical head.

18. The integrated metrology system according to claim 15, wherein the optical head is configured to direct radiation from an illumination portion of an optical layer towards a region of the sample located within a temporary field of view of the optical head, and receive returned radiation that was returned from the sample, and direct the returned radiation towards a collection portion of the optical layer.

19. The integrated metrology system according to claim 1, the metrology results are indicative of transitions between edges of different wafer layer at the wafer edge region portions.

20. The integrated metrology system according to claim 1, the metrology results are indicative of at least one of macro-defects and layer peel-offs.

21. The integrated metrology system according to claim 1, the metrology results are indicative of cracks.

22. The integrated metrology system according to claim 1 , comprising a PRIC optical head that comprises one or more PRIC optical components and a metrology channel optical head that comprises one or more metrology channel optical components.

23. The integrated metrology system according to claim 1 , wherein the PRIC and the metrology channel do not share any optical component.

24. A method for integrated metrology, comprising: performing, by a metrology channel of an integrated metrology system, optical measurements of metrology sites of a wafer; generating, by a pattern recognition imaging channel (PRIC) of the integrated metrology system and during a metrology session, navigation image information for navigating in relation to the metrology sites; acquiring, by the PRIC, metrology information for wafer edge region portions during at least a portion of a wafer alignment session; rotating the wafer, by a sample movement unit of the integrated metrology system, during a wafer alignment session; and processing, by a processing circuit of the integrated metrology system, at least the PRIC metrology information to provide metrology results regarding the wafer edge region portions.

25. A non-transitory computer readable medium for integrated metrology, the non- transitory computer readable medium stores instructions executed by a computerized device to: control a performing, by a metrology channel of an integrated metrology system, optical measurements of metrology sites of a wafer; control a generation, by a pattern recognition imaging channel (PRIC) of the integrated metrology system and during a metrology session, navigation image information for navigating in relation to the metrology sites; control an acquisition, by the PRIC, metrology information for wafer edge region portions during at least a portion of a wafer alignment session; control a rotation of the wafer, by a sample movement unit of the integrated metrology system, during a wafer alignment session; andcontrol a processing, by a processing circuit of the integrated metrology system, at least the PRIC metrology information to provide metrology results regarding the wafer edge region portions.

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