Semiconductor device and semiconductor chip

Abstract

[Abstract] [Problem] To provide a novel semiconductor device and the like. [Solution] This semiconductor device comprises a board and a semiconductor chip provided in the vertical direction of the board, wherein the semiconductor chip includes a processor or a memory, a communication coil performs magnetic field coupling communication with another communication coil provided at a location away from the board and the semiconductor chip, the communication coil transmits information inputted from the semiconductor chip or outputs received information to the semiconductor chip, the communication coil comprises a winding at least partially formed inside the board, and the central axis direction of the winding is different from the vertical direction. [Selected drawing] FIG. 2

Description

Semiconductor device and semiconductor chip

[0001] The present disclosure relates to a semiconductor device and a semiconductor chip.

[0002] 2. Description of the Related Art Information processing devices including a semiconductor chip and a communication coil are known.

[0003] Patent No. 7193142

[0004] Although the information processing device that communicates using coils described in Patent Document 1 is very useful, further improvements are required.

[0005] One aspect of the present disclosure is a semiconductor device comprising a substrate and a semiconductor chip arranged vertically on the substrate, the semiconductor chip having a processor or memory, the communication coil performing magnetic field coupling communication with another communication coil arranged at a position away from the substrate and the semiconductor chip, the communication coil transmitting information input from the semiconductor chip or outputting received information to the semiconductor chip, the communication coil having a winding at least partially formed inside the substrate, and the central axis direction of the winding being in a direction different from the vertical direction.

[0006] According to the present disclosure, a new semiconductor device and the like can be provided.

[0007] 1 is a diagram illustrating communication between two semiconductor devices according to embodiment 1; FIG. 2 is a side view illustrating a semiconductor device according to embodiment 1; FIG. 3 is a perspective view illustrating a communication coil according to embodiment 1; FIG. 4 is a plan view illustrating a communication coil according to embodiment 1; FIG. 5 is a block diagram illustrating a semiconductor chip according to embodiment 1; FIG. 6 is a side view in the Z direction illustrating a communication coil according to embodiment 1; FIG. 7 is a side view in the X direction illustrating a communication coil according to embodiment 1; FIG. 8 is a side view illustrating a semiconductor device according to embodiment 1; FIG. 9 is a side view illustrating a semiconductor device according to embodiment 1; FIG. 10 is a perspective view illustrating a configuration of a semiconductor device according to embodiment 1; FIG. 11 is a perspective view illustrating a configuration of a semiconductor device according to embodiment 2; FIG. 12 is a perspective view illustrating a configuration of a semiconductor device according to embodiment 3; FIG. 13 is a perspective view illustrating a configuration of a semiconductor device according to embodiment 4; FIG. 14 is a side view illustrating a semiconductor device according to embodiment 5

[0008] 1 is a diagram showing communication between two semiconductor devices according to a first embodiment. In the first embodiment, communication is performed between a semiconductor device 100 and a semiconductor device 200. The semiconductor device 100 includes a communication coil 150, a conversion circuit 160, and a processor 180. The processor 180 further includes a memory 181. The semiconductor device 200 includes a communication coil 250, a conversion circuit 260, and a processor 280. The processor 280 further includes a memory 281. The semiconductor device 100 and the semiconductor device 200 are separate devices, and are located apart from each other. Furthermore, the communication coil 150 and the communication coil 250 are located apart from each other within a communicable range.

[0009] The processors 180 and 280 perform arithmetic processing based on input information and are, for example, CPUs. The conversion circuits 160 and 260 include, for example, some or all of an amplifier circuit, a buffer circuit, a pulse edge shaping circuit, and a comparator. The memories 181 and 281 record the input information and output the recorded information.

[0010] The operation when transmitting a signal from semiconductor device 100 to semiconductor device 200 will be described. Processor 180 outputs a digital signal representing information that has undergone arithmetic processing to conversion circuit 160. Conversion circuit 160 performs waveform conversion processing, such as signal amplification and pulse waveform shaping, on the digital signal (pulse train) represented by two voltage values, High and Low, output from processor 180, and applies a voltage corresponding to the waveform-shaped pulse to communication coil 150.

[0011] When a current flows through communication coil 150, a voltage based on the current is induced in communication coil 250 by magnetic field coupling (inductive coupling or electromagnetic induction).

[0012] Conversion circuit 260 converts the waveform of the voltage induced in communication coil 250 into a digital signal (pulse train) represented by a binary voltage, and outputs the digital signal to processor 280. Processor 280 performs arithmetic processing on the information represented by the input signal.

[0013] In this way, the communication coil 150 transmits a signal input from the processor 180, and the communication coil 250 outputs a received signal to the processor 280. As a result, a signal is transmitted from the semiconductor device 100 to the semiconductor device 200, which is provided at a distance from the semiconductor device 100, by magnetic field coupling communication (communication by inductive coupling or electromagnetic induction). A similar operation is performed when transmitting a signal from the semiconductor device 200 to the semiconductor device 100. Three or more semiconductor devices may be provided, and communication may be performed with a plurality of other semiconductor devices. There are no particular limitations on the device that communicates with the semiconductor device 100 or the semiconductor device 200, as long as it is equipped with a communication coil.

[0014] 2 is a side view showing the semiconductor device of embodiment 1. The semiconductor device 10 includes a semiconductor chip 1 and a substrate 2. The substrate 2 includes a base substrate 3 and an interposer 4.

[0015] The base substrate 3 has multiple layers of an insulator or a semiconductor, and has wiring formed therein. The wiring of the base substrate 3 includes vias such as TSVs and TGVs.

[0016] The interposer 4 has multiple layers of an insulator or a semiconductor, and wiring is formed inside. The interposer 4 may be a rewiring layer, and the wiring of the interposer 4 includes vias such as TSVs and TGVs. The interposer 4 is provided above the base substrate 3, and the wiring of the base substrate 3 and the wiring of the interposer 4 are electrically connected.

[0017] The semiconductor device 10 is an integrated device in which a semiconductor chip 1 and a substrate 2 are integrated, and is provided on an external motherboard 90 of the semiconductor device 10. The motherboard 90 is electrically connected to the semiconductor device 10, and for example, a plurality of conductive balls 91 (solder balls) may be provided between the semiconductor device 10 and the motherboard 90. In this way, the motherboard 90 is electrically connected to the semiconductor chip 1.

[0018] Fig. 3 is a perspective view showing the communication coil of embodiment 1. The communication coil 5 has a continuous spiral winding. Each winding of the communication coil 5 has the same shape, and although shown in Fig. 3 as a square, it may have any shape, such as a circle. The central axis of the communication coil 5, which passes through the center of the winding, is aligned with the X-axis, which is one of the horizontal directions.

[0019] 4 is a plan view showing the communication coil 5 of the first embodiment. The communication coil 5 may have a shape in which windings are formed on the same YZ plane. This shape results in a communication coil 5 with a large number of turns. In a shape in which the shape or size of the winding changes midway, the central axis is the direction normal to the center of the plane formed by a specific turn of winding, such as the outermost periphery or the point where the area surrounded by the winding is the largest.

[0020] 5 is a block diagram showing the semiconductor chip of the first embodiment. The semiconductor chip 1 is thin and disposed with its thickness in the vertical direction (Y direction), and its upper and lower surfaces extending horizontally (along the XZ plane). The semiconductor chip 1 includes a conversion circuit 6 and a processor 8. The processor 8 includes a memory 81. The semiconductor chip 1 is disposed above the interposer 4. The semiconductor chip 1 is electrically connected to the interposer 4. The semiconductor chip 1 may include either the processor 8 or the memory 81.

[0021] A portion of the communication coil 5 is formed within the semiconductor chip 1. When the communication coil 5 has two or more windings, it is desirable that a portion of each winding be formed within the semiconductor chip 1.

[0022] It is desirable that the start and end points of the communication coil 5 are provided on the semiconductor chip 1. This reduces the distance between each component of the semiconductor chip 1 and the start and end points of the communication coil compared to when the communication coil is formed on the substrate 2, allowing the wiring connecting the two to be shortened or omitted.

[0023] A part of the communication coil 5 is formed inside the substrate 2. The communication coil 5 has a winding formed in the part inside the semiconductor chip 1 and the part inside the substrate 2.

[0024] Fig. 6 is a side view in the Z direction showing the communication coil of embodiment 1. Fig. 7 is a side view in the X direction showing the communication coil of embodiment 1. In Fig. 6, the communication coils 5 overlap in the Z direction, and in Fig. 7, the communication coils 5 overlap in the X direction. The central axis of the communication coils 5 is aligned along the X direction, which is one of the horizontal directions.

[0025] Wiring 35 is provided within the base substrate 3 for communication and power supply between the interposer 4 and the motherboard 90 or the like outside the semiconductor device 10. Wiring 45 is formed within the interposer 4 for communication and power supply between the semiconductor chip 1 and the motherboard 90 or the like outside the semiconductor device 10. It is desirable that the wiring 35 and the wiring 45 are not connected to the communication coil 5.

[0026] 6, the wiring 35 and the wiring 45 are provided on the XY plane inside one communication coil 5 (closer to the center of the base substrate 3 and the interposer 4). Also, as shown in Fig. 7, the wiring 35 and the wiring 45 are provided at positions that at least partially overlap on the YZ plane with an area 52 surrounded by the outermost periphery of one communication coil 5. When there are multiple wirings 35 and multiple wirings 45, it is desirable that all of the wirings 45 be arranged in this manner.

[0027] In this case, since there is no wiring outside the communication coil 5 that blocks communication in the direction along the YZ plane including the communication coil 5, it is suitable for communication in the direction along the YZ plane.

[0028] The wiring 35 and the wiring 45 may be provided outside the range 52 surrounded by the outermost periphery of one communication coil 5 in the direction along the YZ plane. In this case, the communication coil 5 is suitable for communicating with another communication coil provided in a direction not blocked by the wiring 45. Therefore, the other semiconductor device and communication coil to communicate with are provided in a direction not blocked by the wiring 35 and the wiring 45.

[0029] 8 is a side view showing the semiconductor device of embodiment 1. Wiring 55 connecting the semiconductor chip 1 and the communication coil 5 may be further formed in the base substrate 3 or the interposer 4. The wiring 55, like the wiring 35 and the wiring 45, is provided inside one communication coil 5 on the XY plane, or in a position that at least partially overlaps on the YZ plane with an area 52 surrounded by the outermost periphery of one communication coil 5.

[0030] It is desirable that the outermost periphery of the communication coil 5 is close to the outer edge of the semiconductor device 1. It is desirable that the outermost periphery of the communication coil 5 is provided above the center of the semiconductor chip 1 in the Y direction. It is desirable that the outermost periphery of the communication coil 5 is provided below the center of the substrate 2 in the Y direction.

[0031] 9 is a side view showing the semiconductor device of embodiment 1. The semiconductor chip 1 may have a terminal 11 on its lower surface facing the interposer 4. The base substrate 3 may have a terminal 31 on its upper surface facing the interposer 4. The interposer 4 may have a terminal 41 on its upper surface facing the base substrate 3, and may have a terminal 42 on its lower surface. The terminals 11, 31, 41, and 42 may be part of a communication coil.

[0032] One or more of the terminals 41 and 42 are connected to the wiring 45. One or more of the terminals 31 are connected to the wiring 35.

[0033] The substrate 2 may include either the base substrate 3 or the interposer 4. The semiconductor chip 1 may be disposed in the vertical direction (Y direction) of the substrate 2.

[0034] 10 is a perspective view showing the configuration of the semiconductor device of embodiment 1. The positional relationship between the semiconductor device 10 and the communication coil 5 will be described in more detail.

[0035] The communication coil 5 includes the following: (1) intra-chip wiring 511H, 512H, 513H (2) intra-chip vias 511V, 512V, 513V, 514V (3) intra-interposer vias 541V, 542V, 543V, 544V (4) intra-base substrate vias 531V, 532V, 533V, 534V (5) intra-base substrate wiring 531H, 532H. The central axis passing through the center 50 of the communication coil 5 is aligned along the X direction.

[0036] The intra-chip wirings 511H, 512H, and 513H are wirings formed within the semiconductor chip 1. It is desirable that the intra-chip wirings 511H, 512H, and 513H are formed in the same layer of the semiconductor chip 1.

[0037] The intra-chip vias 511V, 512V, 513V, and 514V are vias formed within the semiconductor chip 1.

[0038] The intra-interposer vias 541V, 542V, 543V, and 544V are vias formed in the interposer 4.

[0039] The intra-base substrate vias 531V, 532V, 533V, and 534V are vias formed in the base substrate 3.

[0040] The base substrate internal wirings 531H and 532H are wirings formed inside the base substrate 3. It is desirable that the base substrate internal wirings 531H and 532H are formed in the same layer of the base substrate 3.

[0041] In the communication coil 5, the wiring and vias (1) to (5) described above are connected in the following order: intra-chip wiring 511H → intra-chip via 511V → intra-interposer via 541V → intra-base substrate via 531V → intra-base substrate wiring 1 (KB) → intra-base substrate via 533V → intra-interposer via 543V → intra-chip via 513V → intra-chip wiring 512H → intra-chip via 512V → intra-interposer via 542V → intra-base substrate via VH2 → intra-base substrate wiring 532H → intra-base substrate via 534V → intra-interposer via 544V → intra-chip via 514V → intra-chip wiring 513H. In this way, the communication coil 5 has two or more windings, and passes from inside the semiconductor chip 1 through inside the substrate 2, further through inside the semiconductor chip 1, and further through inside the substrate.

[0042] Although the communication coil 5 has been described as having a central axis passing through the center 50 of the winding along the horizontal direction, in order to accommodate various directivity requirements, the central axis may be approximately horizontal, specifically within a range of less than 30 degrees from the horizontal direction. Furthermore, the central axis may be in a direction different from the vertical direction (Y direction).

[0043] According to the first embodiment, the communication coil 5 is oriented in a direction different from the vertical direction (Y direction), making it possible to provide a semiconductor device 10 that can meet various directivity requirements. Furthermore, since the communication coil 5 is configured with windings formed in portions inside the semiconductor chip 1 and inside the substrate 2, it is possible to configure a large winding and also to form the communication coil 5 in a position along the edge of the semiconductor device 10.

[0044] 11 is a perspective view showing the configuration of a semiconductor device of embodiment 2. As shown in Fig. 11, a semiconductor device 10 of embodiment 2 includes communication coils 5a and 5b corresponding to the communication coil 5 of embodiment 1.

[0045] The central axis passing through the center 50a of the communication coil 5a is aligned along the X direction, which is one of the horizontal directions, and the central axis passing through the center 50b of the communication coil 5b is aligned along the Z direction, which is one of the horizontal directions.

[0046] Although the example in which the central axes of communication coil 5a and communication coil 5b differ by 90 degrees has been described, in order to accommodate various directivity requirements, the difference between the central axes of communication coil 5a and communication coil 5b may be in the range of 30 degrees or more. According to the second embodiment, the communication axis directions of the two communication coils 5 are different from each other, so that a semiconductor device that meets various directivity requirements can be provided compared to the case in which there is only one communication coil.

[0047] 12 is a perspective view showing the configuration of a semiconductor device according to embodiment 3. A semiconductor device 10 according to embodiment 3 includes communication coils 5a and 5b similar to the communication coil 5 according to embodiment 1.

[0048] The central axis of communication coil 5a is aligned with the X direction, which is one of the horizontal directions. The central axis of communication coil 5b is aligned with the X direction, which is one of the horizontal directions. Communication coils 5a and 5b are preferably formed at positions separated from each other, and the center of substrate 2 is preferably located between communication coils 5a and 5b in the XZ plane.

[0049] Although the example in which the central axes of the communication coils 5a and 5b are in the same direction has been described, taking into consideration factors such as manufacturing convenience, the communication coils 5a and 5b may be in approximately the same direction, and the difference in the direction of the central axes may be within a range of less than 30 degrees. According to the third embodiment, the communication axis directions of the two communication coils 5 are in the same direction, making it possible to provide a semiconductor device that meets the demand for directivity in a specific direction.

[0050] 13 is a perspective view showing the configuration of a semiconductor device according to embodiment 4. The semiconductor device 10 according to embodiment 4 includes four communication coils 5a, 5b, 5c, and 5d formed near the four side surfaces, as well as a communication coil 5e formed near the top surface and a communication coil 5f formed near the bottom surface.

[0051] The center of the semiconductor device 10 and the center of the substrate 2 are located between communication coils 5a and 5b, whose central axes point in the X direction, between communication coils 5c and 5d, whose central axes point in the Z direction, and between communication coils 5e and 5f, whose central axes point in the Y direction.

[0052] According to this embodiment, the semiconductor device 10 includes a communication coil whose central axis points in the Y direction, thereby meeting the demand for vertical directivity. The central axes of the communication coils 5e and 5f may be approximately aligned with the Y direction, taking into account manufacturing convenience. Therefore, the direction of the central axes of the communication coils 5e and 5f may be less than 30 degrees different from the Y direction. Furthermore, the communication coils 5a, 5b, 5c, and 5d may be oriented in a direction different from the Y direction, as long as the difference from the Y direction is 30 degrees or more.

[0053] 14 is a side view showing a semiconductor device according to a fifth embodiment. The communication coil 5 does not pass through the semiconductor chip 1, and all of the windings are formed in a portion formed inside the substrate 2. The central axis of the windings is the X-axis direction, but may be any direction other than the vertical direction. A portion of the windings of the communication coil 5 is formed on the base substrate 3, and the other portion is formed on the interposer 4. Furthermore, in the semiconductor device 10 according to the fifth embodiment, all of the windings of the communication coil 5 may be formed on the base substrate 3, in which case the interposer 4 may be omitted. All of the windings of the communication coil 5 may be formed on the interposer 4.

[0054] According to the fifth embodiment, all of the windings of the communication coil 5 are formed on the substrate 2, which makes it easier to manufacture than when some or all of the communication coil 5 is formed on the semiconductor chip 1.

[0055] The present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the present disclosure. Furthermore, the means disclosed in the above-described embodiments may be combined as appropriate within the scope of feasibility. While the present disclosure has been described based on the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents.

[0056] REFERENCE SIGNS LIST 1 semiconductor chip 2 substrate 3 base substrate 4 interposer 5, 150, 250 communication coil 6, 160, 260 conversion circuit 8, 180, 280 processor 81, 181, 281 memory 10, 100, 200 semiconductor device 11, 31, 41, 42 terminal 45, 55, 56, 57 wiring 5a, 5b, 5c, 5d, 5e, 5f communication coil 90 motherboard 91 ball

Claims

1. A semiconductor device comprising a substrate and a semiconductor chip provided in the vertical direction of the substrate, wherein the semiconductor chip has a processor or a memory, and the communication coil performs magnetic field coupling communication with another communication coil provided at a position separated from the substrate and the semiconductor chip, and the communication coil transmits information input from the semiconductor chip or outputs information received to the semiconductor chip, and at least a part of the communication coil is formed inside the substrate and the winding is configured, and the central axis direction of the winding is a direction different from the vertical direction.

2. The semiconductor device according to claim 1, wherein the communication coil is configured by windings formed in the semiconductor chip and in the substrate.

3. The semiconductor device according to claim 1, wherein the communication coil includes vias formed inside the substrate.

4. The semiconductor device according to claim 1, wherein the central axis direction is a direction less than 30 degrees from the horizontal direction.

5. The semiconductor device according to claim 1, comprising a plurality of the communication coils, and the central axis directions of the plurality of communication coils are different from each other.

6. The semiconductor device according to claim 5, comprising a plurality of the communication coils, wherein the central axis direction of at least one of the plurality of communication coils is substantially vertical and the central direction of at least one of the plurality of communication coils is different from the vertical direction.

7. The semiconductor device according to claim 1, comprising a plurality of the communication coils, and the central directions of the plurality of communication coils are substantially the same.

8. The semiconductor device according to claim 1, wherein the communication coil has two or more windings, and the windings pass from inside the semiconductor chip through the substrate, then through the semiconductor chip again, and then through the substrate again.

9. The semiconductor device according to claim 1, wherein all of the windings of the communication coil are formed in the part formed inside the substrate.

Images