Semiconductor device and method for manufacturing semiconductor device

Abstract

This semiconductor device includes a wiring part, a semiconductor element, and a conductive bonding material interposed between the wiring part and the semiconductor element. The semiconductor element has a plurality of electrodes. The plurality of electrodes include an electrode base part, a plurality of electrode columnar parts connected to the electrode base part, and a first metal layer. The first metal layer is interposed between the electrode columnar part and the conductive bonding material, and the barrier property to the conductive bonding material is superior to that of the electrode columnar part. The electrode columnar part has a first surface, and a first side surface connected to the first surface. The first metal layer has a first portion covering the first surface, and a second portion connected to the first portion and covering at least a portion of the first side surface.

Description

Semiconductor device and method for manufacturing the same

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.

[0002] Various configurations have been proposed for semiconductor devices including semiconductor elements. Patent Document 1 discloses an example of a conventional semiconductor device. The semiconductor device disclosed in this document includes leads, a semiconductor element, and a sealing resin. The semiconductor element is supported by the leads. The sealing resin covers a portion of the leads and the semiconductor element.

[0003] In the semiconductor device described in Patent Document 1, a semiconductor element is mounted on leads by flip-chip mounting. The leads have a main surface facing one side in the thickness direction. The semiconductor element has a plurality of electrodes provided on the side opposite the main surface, and the plurality of electrodes are joined to the main surface of the leads via a bonding layer made of, for example, solder. The leads are electrically connected to the interior of the semiconductor element via the bonding layer and the plurality of electrodes, and serve as wiring in the semiconductor device.

[0004] However, in the above-described configuration in which the semiconductor element is flip-chip mounted, when the bonding layer interposed between the leads and the multiple electrodes is melted by heat treatment, the leads or the semiconductor element may be deformed by heat. If the leads or the semiconductor element are deformed, the distance between the semiconductor element and the leads may differ from the predetermined distance, which may lead to poor bonding in the bonding layer.

[0005] Japanese Patent Application Laid-Open No. 2020-77694

[0006] [Summary] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above-mentioned circumstances, an object of the present disclosure is to provide a semiconductor device suitable for improving the bonding reliability of semiconductor elements mounted by flip-chip bonding.

[0007] A semiconductor device provided by a first aspect of the present disclosure includes a wiring section having a wiring main surface facing one side in a thickness direction, a semiconductor element located on one side of the wiring section in the thickness direction, and a conductive bonding material interposed between the wiring section and the semiconductor element in the thickness direction. The semiconductor element has a plurality of electrodes located on the other side in the thickness direction. The plurality of electrodes include an electrode base, a plurality of electrode pillars each connected to the electrode base and protruding to the other side in the thickness direction, and a first metal layer. The first metal layer is interposed between the electrode pillars and the conductive bonding material and has a better barrier property against the conductive bonding material than the electrode pillars. The electrode pillars have a first surface facing the other side in the thickness direction and a first side surface connected to the first surface and extending to one side in the thickness direction. The first metal layer has a first portion covering the first surface and a second portion connected to the first portion and covering at least a portion of the first side surface.

[0008] A method for manufacturing a semiconductor device provided by a second aspect of the present disclosure includes the steps of forming a plurality of electrode pillars on an electrode base, forming a first metal layer that covers each of the plurality of electrode pillars and a portion of the electrode base that surrounds the electrode pillars when viewed in the thickness direction, and forming a conductive bonding material on the first metal layer.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view (transmitted through the encapsulating resin) showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 3 is a plan view (transmitted through the semiconductor element and the encapsulating resin) showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 4 is a bottom view showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 5 is a front view showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 6 is a rear view showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 7 is a right side view showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 8 is a left side view showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 3. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 3. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 3. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 3. FIG. 13 is a partial enlarged view (near the electrodes) of FIG. 11. FIG. 14 is a partial enlarged view (near the electrodes) of FIG. 11. 15 is a cross-sectional view similar to FIG. 13 , illustrating a case where the distance between the semiconductor element and the wiring portion decreases. FIG. 16 is a cross-sectional view similar to FIG. 14 , illustrating a case where the distance between the semiconductor element and the wiring portion increases. FIG. 17 is a cross-sectional view similar to FIG. 18 , illustrating a step of an example of a manufacturing method for a semiconductor device according to an embodiment of the present disclosure. FIG. 18 is a cross-sectional view similar to FIG. 17 . FIG. 19 is a cross-sectional view similar to FIG. 18 . FIG. 20 is a cross-sectional view similar to FIG. 19 . FIG. 21 is a cross-sectional view similar to FIG. 20 . FIG. 22 is a cross-sectional view similar to FIG. 21 . FIG. 23 is a cross-sectional view similar to FIG. 22 . FIG. 24 is a cross-sectional view similar to FIG. 23 . FIG. 25 is a cross-sectional view similar to FIG. 24 . FIG. 26 is a cross-sectional view similar to FIG. 13 , illustrating a semiconductor device according to a first modification of the first embodiment. FIG. 27 is a cross-sectional view similar to FIG. 13 , illustrating a semiconductor device according to a second modification of the first embodiment. FIG. 28 is a cross-sectional view similar to FIG. 13 , illustrating a semiconductor device according to a third modification of the first embodiment. Fig. 29 is a cross-sectional view similar to Fig. 13 , showing a semiconductor device according to a fourth modified example of the first embodiment. Fig. 30 is a cross-sectional view similar to Fig. 13 , showing a semiconductor device according to a second embodiment of the present disclosure. Fig. 31 is a cross-sectional view similar to Fig. 30 , showing a case where the distance between the semiconductor element and the wiring portion is reduced.Fig. 32 is a cross-sectional view similar to Fig. 30 , showing a case where the distance between the semiconductor element and the wiring portion increases. Fig. 33 is a cross-sectional view similar to Fig. 13 , showing a semiconductor device according to a third embodiment of the present disclosure. Fig. 34 is a cross-sectional view similar to Fig. 33 , showing a case where the distance between the semiconductor element and the wiring portion decreases. Fig. 35 is a cross-sectional view similar to Fig. 33 , showing a case where the distance between the semiconductor element and the wiring portion increases.

[0011] DETAILED DESCRIPTION Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0012] In the following, identical or similar components are denoted by the same reference numerals, and redundant explanations will be omitted. Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not intended to necessarily assign any order to their objects.

[0013] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on (an) object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on (an) object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on (an) object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on (an) object B" includes "a certain object A is in contact with a certain object B and is located on (an) object B" and "a certain object A is located on (an) object B with another object interposed between the certain object A and the certain object B." Unless otherwise specified, the phrase "object A overlaps object B when viewed in a certain direction" includes "object A overlaps the entire object B" and "object A overlaps a part of object B." The phrase "object A (its material) contains material C" includes "object A (its material) is made of material C" and "object A (its material) is mainly composed of material C." In the present disclosure, the phrase "a surface A faces direction B (on one side or the other side of direction B)" is not limited to the case where surface A is at an angle of 90° to direction B, but also includes the case where surface A is tilted with respect to direction B.

[0014] First Embodiment: A semiconductor device according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 14 . The semiconductor device A10 of this embodiment includes a wiring portion 10, terminal portions 21 to 27, a semiconductor element 30, a conductive bonding material 40, and a sealing resin 50. As shown in FIG. 1 , the semiconductor device A10 is packaged in a QFN (Quad For Non-Lead Package) format. The specific configuration of the semiconductor element 30 is not particularly limited, and the semiconductor element 30 is, for example, a flip-chip LSI (Large Scale Integration). In this embodiment, the semiconductor element 30 is, for example, a flip-chip LSI incorporating a switching circuit 321 and a control circuit 322 (each of which will be described in detail later). In the semiconductor device A10, the switching circuit 321 converts DC power (voltage) into AC power (voltage). The semiconductor device A10 is used, for example, as one element constituting a DC / DC converter circuit.

[0015] FIG. 1 is a perspective view showing the semiconductor device A10. FIG. 2 is a plan view showing the semiconductor device A10. FIG. 3 is a plan view showing the semiconductor device A10. FIG. 4 is a bottom view showing the semiconductor device A10. FIG. 5 is a front view showing the semiconductor device A10. FIG. 6 is a rear view showing the semiconductor device A10. FIG. 7 is a right side view showing the semiconductor device A10. FIG. 8 is a left side view showing the semiconductor device A10. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 3. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 3. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 3. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 3. FIG. 13 is a partially enlarged view of FIG. 11. For ease of understanding, FIG. 2 shows the semiconductor element 30 and the sealing resin 50 in a see-through manner. For ease of understanding, FIG. 3 shows the semiconductor element 30 and the sealing resin 50 in a see-through manner. In these figures, the semiconductor element 30 and the sealing resin 50 are shown by imaginary lines (two-dot chain lines).

[0016] In the description of the semiconductor device A10, the thickness direction (direction in a plan view) of the wiring portion 10 is an example of the "thickness direction" of the present disclosure and is referred to as the "thickness direction z." The direction perpendicular to the thickness direction z (the up-down direction in FIG. 2 ) is referred to as the "first direction x." The direction perpendicular to both the thickness direction z and the first direction x (the left-right direction in FIG. 2 ) is referred to as the "second direction y." As shown in FIGS. 1 and 2 , the semiconductor device A10 has an elongated rectangular shape when viewed in the thickness direction z.

[0017] As shown in FIGS. 3 and 9 to 12 , the wiring portion 10 supports the semiconductor element 30. At least a portion of the wiring portion 10 is covered with a sealing resin 50. In this embodiment, the wiring portion 10 includes a wiring base 10A and a second metal layer 10B. The wiring base 10A has a wiring main surface 11 and a wiring back surface 13. The wiring main surface 11 faces the z1 side in the thickness direction z and faces the semiconductor element 30. The wiring back surface 13 faces the side opposite the wiring main surface 11 (the z2 side in the thickness direction z). The wiring main surface 11 and the wiring back surface 13 are covered with a sealing resin 50.

[0018] 13 and 14, the second metal layer 10B is located on the z1 side in the thickness direction z with respect to the wiring base 10A. In this embodiment, the second metal layer 10B is arranged to individually correspond to a plurality of electrodes 34 and a plurality of electrodes 35 of the semiconductor element 30, which will be described later. In FIGS. 9 to 12, the electrodes 34 and 35 are simply shown with the reference numerals, but the portions on the z2 side in the thickness direction z of the regions represented by the reference numerals of the electrodes 34 and 35 correspond to the second metal layer 10B. Details of the second metal layer 10B will be described later.

[0019] In this embodiment, the wiring portion 10 (wiring base 10A) includes a pair of first wirings 101, a pair of second wirings 102, a plurality of third wirings 103, a plurality of fourth wirings 104, a fifth wiring 105, a sixth wiring 106 and a plurality of seventh wirings 107.

[0020] The above-mentioned wiring main surface 11 has a first wiring main surface 111, a second wiring main surface 112, a third wiring main surface 113, a fourth wiring main surface 114, a fifth wiring main surface 115, a sixth wiring main surface 116, and a seventh wiring main surface 117. These first wiring main surface 111 to seventh wiring main surface 117 belong to any of the first wiring 101 to seventh wiring 107.

[0021] The wiring back surface 13 has a first wiring back surface 131, a second wiring back surface 132, a third wiring back surface 133, a fourth wiring back surface 134, a fifth wiring back surface 135, a sixth wiring back surface 136, and a seventh wiring back surface 137. These first wiring back surfaces 131 to seventh wiring back surfaces 137 belong to any of the first wiring 101 to seventh wiring 107.

[0022] As shown in FIG. 3 , a pair of first wirings 101 are arranged spaced apart in the second direction y. One first wiring 101 is located on the y1 side of the semiconductor device A10 in the second direction y (left side in the figure), and the other first wiring 101 is located on the y2 side of the semiconductor device A10 in the second direction y (right side in the figure). Each of the pair of first wirings 101 extends in the first direction x. Each of the pair of first wirings 101 is an input terminal to which DC power (voltage) to be converted in the semiconductor device A10 is input. The first wiring 101 is a positive electrode (P terminal). As shown in FIGS. 3 , 9 , and 10 , the first wiring 101 has a first wiring main surface 111 and a first wiring back surface 131. The semiconductor element 30 is supported by the first wiring main surface 111.

[0023] As shown in FIG. 3 , the pair of second wirings 102 are spaced apart in the second direction y. Each of the pair of second wirings 102 is disposed between the pair of first wirings 101 in the second direction y and extends in the first direction x. One of the second wirings 102 is located on the y1 side of the semiconductor device A10 in the second direction y (left side in the figure) and is adjacent to one of the first wirings 101 (left side in the figure) on the y2 side of the second direction y. The other of the second wirings 102 is located on the y2 side of the semiconductor device A10 in the second direction y (right side in the figure) and is adjacent to the other of the first wirings 101 (right side in the figure) on the y1 side of the second direction y. Each of the pair of second wirings 102 outputs AC power (voltage) converted by a switching circuit 321 configured in the semiconductor element 30. As shown in FIGS. 3 , 9 , and 11 , the second wirings 102 have a second wiring main surface 112 and a second wiring back surface 132. The semiconductor element 30 is supported on the second wiring main surface 112 .

[0024] As shown in FIG. 3 , the plurality of third wirings 103 are located on the x1 side in the first direction x with respect to the first wirings 101. In this embodiment, three third wirings 103 are arranged corresponding to each pair of first wirings 101. To each of the plurality of third wirings 103, for example, power (voltage) for driving the control circuit 322 or an electrical signal for transmission to the control circuit 322 is input. As shown in FIGS. 3 and 10 , the third wiring 103 has a third wiring main surface 113 and a third wiring back surface 133. The semiconductor element 30 is supported by the third wiring main surface 113.

[0025] As shown in FIG. 3 , the multiple fourth wirings 104 are located on the x2 side in the first direction x with respect to the second wirings 102. In this embodiment, two fourth wirings 104 are arranged corresponding to each pair of first wirings 101. An electrical signal to be transmitted to, for example, the control circuit 322 is input to each of the multiple fourth wirings 104. As shown in FIGS. 3 and 11 , the fourth wirings 104 have a fourth wiring main surface 114 and a fourth wiring back surface 134. The semiconductor element 30 is supported by the fourth wiring main surface 114.

[0026] As shown in FIG. 3 , the fifth wiring 105 is located on the y1 side in the second direction y relative to the first wiring 101 located on the left side in the figure. The fifth wiring 105 is arranged adjacent to the first wiring 101 located on the y1 side in the second direction y relative to the first wiring 101 located on the left side in the figure, and extends in the first direction x. The fifth wiring 105 is an input terminal to which DC power (voltage) to be converted in the semiconductor device A10 is input. The fifth wiring 105 is a negative electrode (N terminal). As shown in FIGS. 3 and 9 , the fifth wiring 105 has a fifth wiring main surface 115 and a fifth wiring back surface 135. The semiconductor element 30 is supported by the fifth wiring main surface 115.

[0027] As shown in FIG. 3 , the sixth wiring 106 is located on the y2 side in the second direction y relative to the first wiring 101 located on the right side in the figure. The sixth wiring 106 is arranged adjacent to the first wiring 101 located on the y2 side in the second direction y relative to the first wiring 101 located on the right side in the figure, and extends in the first direction x. The sixth wiring 106 is an input terminal to which DC power (voltage) to be converted in the semiconductor device A10 is input. The sixth wiring 106 is a negative electrode (N terminal). As shown in FIGS. 3 and 9 , the sixth wiring 106 has a sixth wiring main surface 116 and a sixth wiring back surface 136. The semiconductor element 30 is supported by the sixth wiring main surface 116.

[0028] As shown in FIG. 3 , the seventh wirings 107 are located between a pair of second wirings 102 in the second direction y. The seventh wirings 107 are located on the x1 side (upper side in the figure) of the semiconductor device A10 in the first direction x. An electrical signal to be transmitted to, for example, the control circuit 322 is input to each of the seventh wirings 107. As shown in FIGS. 3 and 12 , the seventh wirings 107 have a seventh wiring main surface 117 and a seventh wiring back surface 137. The semiconductor element 30 is supported by the seventh wiring main surface 117.

[0029] The above-described wiring base 10A (first wiring 101 to seventh wiring 107) is made of metal plating. The metal material constituting the wiring base 10A (first wiring 101 to seventh wiring 107) is, for example, copper (Cu) or a copper alloy.

[0030] As shown in Figures 13 and 14, the second metal layer 10B is located on the z1 side of the wire base 10A in the thickness direction z and is laminated on the wire base 10A (the wire main surface 11). The second metal layer 10B is interposed between the wire base 10A and the conductive bonding material 40 and is in contact with the conductive bonding material 40. The second metal layer 10B has, for example, a circular or rectangular shape when viewed in the thickness direction z. The second metal layer 10B is made of metal plating. The metal material constituting the second metal layer 10B is not particularly limited. The second metal layer 10B has better barrier properties against the conductive bonding material 40 than the wire base 10A. The constituent material of the second metal layer 10B includes, for example, nickel (Ni).

[0031] As shown in FIGS. 4 , 9 , and 10 , the terminal portion 21 is connected to the first wiring 101 on the z2 side in the thickness direction z and extends in the first direction x. The terminal portion 21 has a back surface 211 and two end surfaces 212, 213. The back surface 211 faces the opposite side (the z2 side in the thickness direction z) from the first wiring main surface 111 and is exposed from the sealing resin 50. The end surface 212 is connected to the back surface 211 and faces the x1 side in the first direction x. The end surface 212 is covered with the sealing resin 50. The end surface 213 is connected to the back surface 211 and faces the x2 side in the first direction x. The end surface 213 is exposed from the sealing resin 50.

[0032] As shown in FIGS. 4 , 9 , and 11 , the terminal portion 22 is connected to the second wiring 102 on the z2 side in the thickness direction z and extends in the first direction x. The terminal portion 22 has a back surface 221 and two end surfaces 222, 223. The back surface 221 faces the opposite side (the z2 side in the thickness direction z) from the second wiring main surface 112 and is exposed from the sealing resin 50. The end surface 222 is connected to the back surface 221 and faces the x1 side in the first direction x. The end surface 222 is exposed from the sealing resin 50. The end surface 223 is connected to the back surface 221 and faces the x2 side in the first direction x. The end surface 223 is covered with the sealing resin 50.

[0033] 4 and 10 , the terminal portion 23 is connected to the third wiring 103 on the z2 side in the thickness direction z. The terminal portion 23 has a back surface 231 and an end surface 232. The back surface 231 faces the opposite side (the z2 side in the thickness direction z) from the third wiring main surface 113 and is exposed from the sealing resin 50. The end surface 232 is connected to the back surface 231 and faces the x1 side in the first direction x. The end surface 232 is exposed from the sealing resin 50.

[0034] 4 and 11 , the terminal portion 24 is connected to the fourth wiring 104 on the z2 side in the thickness direction z. The terminal portion 24 has a back surface 241 and an end surface 242. The back surface 241 faces the opposite side (the z2 side in the thickness direction z) from the fourth wiring main surface 114 and is exposed from the sealing resin 50. The end surface 242 is connected to the back surface 241 and faces the x2 side in the first direction x. The end surface 242 is exposed from the sealing resin 50.

[0035] As shown in FIGS. 4 and 9 , the terminal portion 25 is connected to the fifth wiring 105 on the z2 side in the thickness direction z. In this embodiment, a plurality of terminal portions 25 are arranged at intervals in the first direction x. The terminal portion 25 has a back surface 251 and an end surface 252. The back surface 251 faces the opposite side to the fifth wiring main surface 115 (the z2 side in the thickness direction z) and is exposed from the sealing resin 50. The end surface 252 is connected to the back surface 251 and faces the y1 side in the second direction y. The end surface 252 is exposed from the sealing resin 50.

[0036] As shown in FIGS. 4 and 9 , the terminal portion 26 is connected to the sixth wiring 106 on the z2 side in the thickness direction z. In this embodiment, a plurality of terminal portions 26 are arranged at intervals in the first direction x. The terminal portion 26 has a back surface 261 and an end surface 262. The back surface 261 faces the opposite side to the sixth wiring main surface 116 (the z2 side in the thickness direction z) and is exposed from the sealing resin 50. The end surface 262 is connected to the back surface 261 and faces the y2 side in the second direction y. The end surface 262 is exposed from the sealing resin 50.

[0037] 4 and 12 , the terminal portion 27 is connected to the seventh wiring 107 on the z2 side in the thickness direction z. The terminal portion 27 has a back surface 271 and an end surface 272. The back surface 271 faces the opposite side (the z2 side in the thickness direction z) from the seventh wiring main surface 117 and is exposed from the sealing resin 50. The end surface 272 is connected to the back surface 271 and faces the x1 side in the first direction x. The end surface 272 is exposed from the sealing resin 50.

[0038] The terminals 21 to 27 are made of, for example, metal plating, and the metal material constituting each of the terminals 21 to 27 is, for example, copper or a copper alloy.

[0039] 2, 3, etc., the semiconductor element 30 has a rectangular shape when viewed in the thickness direction z. As shown in Figures 9 to 12, the semiconductor element 30 is supported by a pair of first wirings 101, a pair of second wirings 102, a plurality of third wirings 103, a plurality of fourth wirings 104, a fifth wiring 105, a sixth wiring 106, and a plurality of seventh wirings 107. The semiconductor element 30 is covered with a sealing resin 50.

[0040] 9 to 14, the semiconductor element 30 has a semiconductor substrate 31, a semiconductor layer 32, a plurality of electrodes 34, a plurality of electrodes 35, a conductive layer 36, a passivation film 391, and a surface protection film 392. As shown in Figures 9 to 12, the semiconductor substrate 31 supports the semiconductor layer 32, the conductive layer 36, the electrodes 34, 35, the passivation film 391, and the surface protection film 392 below it. The constituent material of the semiconductor substrate 31 is, for example, Si (silicon) or silicon carbide (SiC).

[0041] As shown in FIGS. 9 to 12 , the semiconductor layer 32 is stacked on the semiconductor substrate 31 on the side facing the wiring main surface 11 in the thickness direction z. The semiconductor layer 32 includes multiple types of p-type and n-type semiconductors based on differences in the amount of doped elements. The semiconductor layer 32 includes a switching circuit 321 and a control circuit 322 that is electrically connected to the switching circuit 321. The switching circuit 321 is, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT). In the example shown in the semiconductor device A10, the switching circuit 321 is divided into two regions: a high-voltage region (upper arm circuit) and a low-voltage region (lower arm circuit). Each region is composed of a single n-channel MOSFET. The control circuit 322 includes a gate driver for driving the switching circuit 321 and a bootstrap circuit corresponding to the high-voltage region of the switching circuit 321, and performs control to ensure that the switching circuit 321 operates normally. A wiring layer (not shown) is further formed on the semiconductor layer 32. The wiring layer provides electrical continuity between the switching circuit 321 and the control circuit 322.

[0042] 9 to 12 , the plurality of electrodes 34 and the plurality of electrodes 35 are provided on the side facing the wiring main surface 11 (the first wiring main surface 111 to the seventh wiring main surface 117) in the thickness direction z. The plurality of electrodes 34 and the plurality of electrodes 35 are located on the z2 side of the semiconductor element 30 in the thickness direction z, and are in contact with the semiconductor layer 32.

[0043] The plurality of electrodes 34 are electrically connected to the switching circuit 321 of the semiconductor layer 32 via the conductive layer 36. Each of the plurality of electrodes 34 is connected to any one of the first wiring main surface 111 of the pair of first wirings 101, the second wiring main surface 112 of the pair of second wirings 102, the fifth wiring main surface 115 of the fifth wiring 105, and the sixth wiring main surface 116 of the sixth wiring 106. As a result, the pair of first wirings 101, the pair of second wirings 102, the fifth wiring 105, and the sixth wiring 106 are electrically connected to the switching circuit 321.

[0044] The plurality of electrodes 35 are electrically connected to a control circuit 322 of the semiconductor layer 32 via the conductive layer 36. Each of the plurality of electrodes 35 is connected to any one of the third wiring main surfaces 113 of the plurality of third wirings 103, the fourth wiring main surfaces 114 of the plurality of fourth wirings 104, and the seventh wiring main surfaces 117 of the plurality of seventh wirings 107. As a result, the plurality of third wirings 103, the plurality of fourth wirings 104, and the plurality of seventh wirings 107 are electrically connected to the control circuit 322.

[0045] The conductive layer 36 is in contact with a wiring layer formed in the semiconductor layer 32. As a result, the conductive layer 36 is electrically connected to either the switching circuit 321 or the control circuit 322 of the semiconductor layer 32. The conductive layer 36 is formed, for example, from an aluminum (Al) layer or a plurality of metal layers stacked in this order from the semiconductor layer 32 downward, including copper, nickel, and palladium.

[0046] As shown in FIGS. 13 and 14 , the plurality of electrodes 34 and the plurality of electrodes 35 each include an electrode base 37A, a plurality of electrode columnar portions 37B, and a first metal layer 37C. The electrode base 37A is in contact with the conductive layer 36. The electrode base 37A is made of metal plating. The metal material constituting the electrode base 37A is, for example, copper (Cu) or a copper alloy. The electrode base 37A is laminated across the surface of the conductive layer 36 facing the z2 side in the thickness direction z and the surface of the surface protective film 392 facing the z2 side in the thickness direction z.

[0047] Each of the multiple electrode column portions 37B protrudes from the electrode base portion 37A toward the z2 side in the thickness direction z. When viewed in the thickness direction z, the electrode column portion 37B has, for example, a circular or rectangular shape. In this embodiment, the electrode column portion 37B has a first surface 381 and a first side surface 382. The first surface 381 faces the z2 side in the thickness direction z. The first side surface 382 is connected to the first surface 381 and extends toward the z1 side in the thickness direction z. The electrode column portion 37B is made of metal plating. The metal material constituting the electrode column portion 37B is not particularly limited. The constituent material of the electrode column portion 37B includes, for example, copper.

[0048] The first metal layer 37C is interposed between the electrode column 37B and the conductive bonding material 40 and is in contact with the conductive bonding material 40. In the present embodiment, the first metal layer 37C has a first portion 383, a second portion 384, and a third portion 385. The first portion 383 covers the entire first surface 381 of the electrode column 37B. The second portion 384 is connected to the first portion 383 and covers the first side surface 382 of the electrode column 37B. In the present embodiment, the second portion 384 covers the entire first side surface 382. The third portion 385 is connected to the second portion 384 on the z1 side in the thickness direction z. The third portion 385 covers a portion of the electrode base 37A and surrounds the second portion 384 in the thickness direction z.

[0049] The first metal layer 37C is made of metal plating. There are no particular limitations on the metal material constituting the first metal layer 37C. The first metal layer 37C has better barrier properties against the conductive bonding material 40 than the electrode column 37B. The constituent material of the first metal layer 37C includes, for example, nickel (Ni).

[0050] 13 and 14 , in the present embodiment, the second metal layer 10B of the wiring portion 10 overlaps the entire electrode column 37B in the thickness direction z. The second metal layer 10B overlaps the entire first metal layer 37C in the thickness direction z. For example, the ratio of the length L2 of the first metal layer 37C in the direction perpendicular to the thickness direction z to the length L1 of the second metal layer 10B in the direction perpendicular to the thickness direction z is 100% or less, and preferably 50% to 90% (see FIG. 13 ).

[0051] 13 and 14 , the passivation film 391 covers the lower surface of the semiconductor layer 32 and a portion of the conductive layer 36. The passivation film 391 has electrical insulation properties. The passivation film 391 is composed of, for example, a silicon oxide film (SiO 2 ) that contacts the lower surface of the semiconductor layer 32 and a portion of the conductive layer 36, and a silicon nitride film (Si 3 N 4 ) that is laminated on the silicon oxide film. The passivation film 391 has a plurality of openings 391 a. A portion of the conductive layer 36 is exposed through the openings 391 a.

[0052] The surface protective film 392 covers the passivation film 391. A portion of the conductive layer 36 and a portion of the electrode base portions 37A of the electrodes 34 and 35 are in contact with the surface protective film 392. The surface protective film 392 has electrical insulation properties. The surface protective film 392 is made of, for example, polyimide.

[0053] As shown in FIGS. 9 to 14 , the conductive bonding material 40 is interposed between the second metal layer 10B of the wiring portion 10 and the first metal layer 37C of the plurality of electrodes 34 and the plurality of electrodes 35. The conductive bonding material 40 contacts both the second metal layer 10B and the first metal layer 37C. In the example of the semiconductor device A10, the conductive bonding material 40 is, for example, solder (a metal containing tin and silver). The conductive bonding material 40 individually bonds the plurality of electrodes 34 and the plurality of electrodes 35 to the wiring portion 10 (the second metal layer 10B). As shown in FIGS. 13 and 14 , the conductive bonding material 40 contacts all or almost all of the upper surface (the surface facing the z1 side in the thickness direction z) of the second metal layer 10B. The conductive bonding material 40 contacts all of the first portion 383 and the second portion 384 of the first metal layer 37C and most of the third portion 385.

[0054] 5 to 8, the sealing resin 50 has a resin main surface 51, a resin back surface 52, a first resin side surface 531, a second resin side surface 532, a third resin side surface 533, and a fourth resin side surface 534. The constituent material of the sealing resin 50 is, for example, a black epoxy resin.

[0055] As shown in FIGS. 9 to 12 , the resin main surface 51 faces the same side as the wiring main surface 11 (the first wiring main surface 111 to the seventh wiring main surface 117) in the thickness direction z. As shown in FIGS. 5 to 8 , the resin back surface 52 faces the opposite side from the resin main surface 51. As shown in FIGS. 4 and 9 to 12 , the back surfaces 211, 221, 231, 241, 251, 261, and 271 of the terminal portion 21, 251, 261, and 271 exposed from the resin back surface 52 (sealing resin 50) may be plated with tin, for example. Instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold layered in this order, may be used.

[0056] As shown in FIGS. 7 and 8 , the first resin side surface 531 is connected to both the resin main surface 51 and the resin back surface 52 and faces the x1 side in the first direction x. The second resin side surface 532 is connected to both the resin main surface 51 and the resin back surface 52 and faces the x2 side in the first direction x. The first resin side surface 531 and the second resin side surface 532 are spaced apart in the first direction x. As shown in FIGS. 10 to 12 , the end faces 222 of the terminal portions 22, 232 of the terminal portions 23, and 272 of the terminal portions 27 are exposed from the first resin side surface 531 so as to be flush with the first resin side surface 531. The end faces 213 of the terminal portions 21 and 242 of the terminal portions 24 are exposed from the second resin side surface 532 so as to be flush with the second resin side surface 532. For example, tin plating may be applied to the end faces 222, 272, 213, and 242 exposed from the first resin side face 531 and the second resin side face 532 (sealing resin 50). Instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold layered in this order, may be used.

[0057] As shown in FIGS. 5 and 6 , the third resin side surface 533 is connected to all of the resin main surface 51, the resin back surface 52, the first resin side surface 531, and the second resin side surface 532, and faces the y1 side in the second direction y. The fourth resin side surface 534 is connected to all of the resin main surface 51, the resin back surface 52, the first resin side surface 531, and the second resin side surface 532, and faces the y2 side in the second direction y. The third resin side surface 533 and the fourth resin side surface 534 are spaced apart from each other in the second direction y. As shown in FIG. 9 , the end surface 252 of the terminal portion 25 is exposed from the third resin side surface 533 so as to be flush with the third resin side surface 533. The end surface 262 of the terminal portion 26 is exposed from the fourth resin side surface 534 so as to be flush with the fourth resin side surface 534. The end surfaces 252 and 262 exposed from the third resin side surface 533 and the fourth resin side surface 534 (sealing resin 50) may be plated with tin, for example. Instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold layered in this order, may be used.

[0058] Next, an example of a method for manufacturing the semiconductor device A10 will be described below with reference to Figures 17 to 25. Figures 17 to 25 are cross-sectional views showing a step in the method for manufacturing the semiconductor device A10, and are enlarged cross-sectional views similar to the cross-sectional view shown in Figure 13. The semiconductor element 30 shown in Figures 17 to 24 is in a position that is upside down compared to the semiconductor element 30 shown in Figure 13.

[0059] 17 shows the state after the electrode base 37A has been formed. The electrode base 37A is made of metal plating. The electrode base 37A is formed by, for example, electrolytic plating. Although detailed illustrations are omitted, a seed layer, for example, is interposed between the conductive layer 36 or the surface protective film 392 and the electrode base 37A. The seed layer is a thin film layer, for example, made up of a titanium (Ti) layer and a copper (Cu) layer stacked together, and is formed in a predetermined region on the conductive layer 36 or the surface protective film 392 by, for example, sputtering using a mask.

[0060] Next, as shown in Fig. 18 , a first resist 91 is placed on the electrode base 37A. The first resist 91 has a first opening 911. The first opening 911 exposes a portion of the electrode base 37A. Although only one first opening 911 is shown in Fig. 18 , the first resist 91 has a plurality of first openings 911 corresponding to the plurality of electrode columnar portions 37B. The plurality of first openings 911 are formed, for example, by placing a photomask on a film of the first resist 91 made of a photosensitive resist material, exposing it to light, and developing it.

[0061] Next, as shown in FIG. 19 , electrode columns 37B are formed by layering on the exposed portions of the electrode base 37A in the first openings 911. The electrode columns 37B are made of metal plating. The electrode columns 37B are formed by, for example, electrolytic plating. When forming the electrode columns 37B, for example, copper, which is the metal material constituting the electrode columns 37B, is layered on the exposed portions of the electrode base 37A. Next, as shown in FIG. 20 , the first resist 91 is removed. In this manner, a plurality of electrode columns 37B are formed on the electrode base 37A.

[0062] Next, as shown in FIG. 21 , a second resist 92 is placed on the electrode base 37A. The second resist 92 has a second opening 921. The second opening 921 exposes the electrode column 37B and a portion of the electrode base 37A that surrounds the electrode column 37B as viewed in the thickness direction z. The size of the second opening 921 as viewed in the thickness direction z is larger than the size of the first opening 911 as viewed in the thickness direction z. Although only one second opening 921 is shown in FIG. 21 , the second resist 92 has multiple second openings 921 corresponding to the multiple electrode column portions 37B. The multiple second openings 921 are formed, for example, by exposing and developing a film of the second resist 92 made of a photosensitive resist material through a photomask.

[0063] Next, as shown in FIG. 22 , a first metal layer 37C is formed by laminating on the exposed portions of the electrode column 37B and the electrode base 37A in the second opening 921. The first metal layer 37C is made of metal plating. The first metal layer 37C is formed, for example, by electrolytic plating. When forming the first metal layer 37C, for example, nickel, which is the metal material constituting the first metal layer 37C, is laminated on the exposed portions of the electrode column 37B and the electrode base 37A. In this manner, the first metal layer 37C is formed. The first metal layer 37C covers the electrode column 37B and a portion of the electrode base 37A that surrounds the electrode column 37B when viewed in the thickness direction z.

[0064] Next, as shown in FIG. 23 , a conductive bonding material 41 is formed by laminating on the first metal layer 37C in the second opening 921. The conductive bonding material 41 is made of metal plating. The conductive bonding material 41 is formed, for example, by electrolytic plating. The conductive bonding material 41 is a part of the conductive bonding material 40. In forming the conductive bonding material 41, a metal material (e.g., a metal containing tin and silver) that constitutes the conductive bonding material 40 (solder) is laminated on the first metal layer 37C. Next, as shown in FIG. 24 , the second resist 92 is removed. In this manner, the conductive bonding material 41 is formed on the first metal layer 37C.

[0065] The semiconductor element 30 shown in Figure 25 is before flip-chip mounting. A conductive bonding material 42 is formed on the second metal layer 10B of the wiring portion 10. The conductive bonding material 42 is a part that constitutes the conductive bonding material 40. Next, the semiconductor element 30 is placed on the wiring portion 10 by flip-chip mounting. Each of the multiple electrodes 34, 35 of the semiconductor element 30 is electrically connected to the wiring portion 10 (second metal layer 10B) via the conductive bonding material 40. In flip-chip mounting of the semiconductor element 30, the conductive bonding material 41 and the conductive bonding material 42 are melted and integrated by a heat treatment (reflow treatment) to form the conductive bonding material 40.

[0066] In the semiconductor device A10 manufactured through the above-described flip-chip mounting, the wiring portion 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32) may be deformed due to the heating process (reflow process) during flip-chip mounting. When the wiring portion 10 or the semiconductor element 30 is deformed, the distance between the semiconductor element 30 and the wiring portion 10 may differ from the predetermined distance that was set. Figure 15 shows a case where the distance between the semiconductor element 30 and the wiring portion 10 becomes closer. Figure 16 shows a case where the distance between the semiconductor element 30 and the wiring portion 10 becomes larger.

[0067] Next, the operation of this embodiment will be described.

[0068] The semiconductor device A10 includes a wiring section 10 having a wiring main surface 11, a semiconductor element 30, and a conductive bonding material 40. The wiring main surface 11 faces the z1 side in the thickness direction z, and the semiconductor element 30 has a plurality of electrodes 34 and a plurality of electrodes 35 located on the z2 side in the thickness direction z. The plurality of electrodes 34 and a plurality of electrodes 35 include an electrode base 37A, a plurality of electrode column portions 37B, and a first metal layer 37C. The first metal layer 37C is interposed between the electrode column portion 37B and the conductive bonding material 40 and has better barrier properties against the conductive bonding material 40 than the electrode column portion 37B. The electrode column portion 37B has a first surface 381 and a first side surface 382 connected to the first surface 381. The first metal layer 37C (first portion 383 and second portion 384) covers the first surface 381 and the first side surface 382 of the electrode column portion 37B. In this manner, the first surface 381 and the first side surface 382 of the electrode column portion 37B are covered with the first metal layer 37C, so that the contact area between the conductive bonding material 40 and the first metal layer 37C can be increased.

[0069] The heat treatment (reflow treatment) during flip-chip mounting deforms the wiring portion 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32), and whether the semiconductor element 30 and the wiring portion 10 move closer to each other (see FIG. 15) or farther apart (see FIG. 16), the contact area between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C remains large, and the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C is good. The semiconductor device A10 can improve the bonding reliability of the semiconductor element 30 mounted by flip-chip mounting.

[0070] The first metal layer 37C has a third portion 385 connected to the second portion 384. The second portion 384 covers the entire first side surface 382 of the electrode column 37B. The third portion 385 covers a portion of the electrode base 37A and surrounds the second portion 384 in the thickness direction z. This configuration allows for a larger contact area between the conductive bonding material 40 and the first metal layer 37C. Therefore, even if the wiring portion 10 or the semiconductor element 30 is deformed by the heat treatment during flip-chip mounting, the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C is maintained more favorably. This further improves the reliability of the semiconductor device A10.

[0071] The wiring unit 10 includes a wiring base 10A and a second metal layer 10B. The second metal layer 10B is interposed between the wiring base 10A and the conductive bonding material 40 and has better barrier properties against the conductive bonding material 40 than the wiring base 10A. The second metal layer 10B overlaps the entire electrode column 37B in the thickness direction z. The ratio of the length L2 of the first metal layer 37C in the direction perpendicular to the thickness direction z to the length L1 of the second metal layer 10B in the direction perpendicular to the thickness direction z is 100% or less. This configuration ensures a large space between the second metal layer 10B and the first metal layer 37C covering the electrode column 37B for the conductive bonding material 40 to be interposed. This reduces leakage of the conductive bonding material 40 even when the semiconductor element 30 and the wiring unit 10 are brought close to each other by heat treatment during flip-chip mounting (see FIG. 15 ).

[0072] 26 to 35 show modified examples and other embodiments of the semiconductor device of the present disclosure. In these figures, elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals as in the above-described embodiment, and redundant explanations will be omitted. The configurations of the various parts in each modified example and each embodiment can be combined with each other as appropriate to the extent that no technical contradictions arise.

[0073] First Modification of First Embodiment: Fig. 26 shows a first modification of the semiconductor device A10. Fig. 26 is a partially enlarged cross-sectional view showing a semiconductor device A11 according to the first modification, showing a cross section similar to that of Fig. 13. The semiconductor device A11 differs from the semiconductor device A10 in the shape of the electrode columnar portion 37B.

[0074] In the semiconductor device A11, the first side surface 382 of the electrode column 37B is inclined with respect to the thickness direction z. As shown in Fig. 26 , the first side surface 382 is inclined so that the cross section of the electrode column 37B perpendicular to the thickness direction z becomes smaller toward the z1 side in the thickness direction z. As described with reference to Figs. 18 and 19 , when forming the electrode column 37B, the inclined first side surface 382 is formed by forming an inclined first opening 911 under predetermined conditions in patterning the first resist 91.

[0075] Second Modification of First Embodiment: Figure 27 shows a second modification of the semiconductor device A10. Figure 27 is a partially enlarged cross-sectional view showing a semiconductor device A12 according to the second modification, showing a cross section similar to that of Figure 13. The semiconductor device A12 differs from the semiconductor device A10 in the shape of the electrode columnar portion 37B.

[0076] In the semiconductor device A12, the first side surface 382 of the electrode column 37B is inclined with respect to the thickness direction z. As shown in Fig. 27 , the first side surface 382 is inclined so that the cross section of the electrode column 37B perpendicular to the thickness direction z increases toward the z1 side in the thickness direction z. As described with reference to Figs. 18 and 19 , when forming the electrode column 37B, the inclined first side surface 382 is formed by forming an inclined first opening 911 under predetermined conditions in patterning the first resist 91.

[0077] In the semiconductor devices A11 and A12, the multiple electrodes 34 (35) include an electrode base 37A, multiple electrode columnar portions 37B, and a first metal layer 37C. The first metal layer 37C is interposed between the electrode columnar portion 37B and the conductive bonding material 40 and has better barrier properties against the conductive bonding material 40 than the electrode columnar portion 37B. The electrode columnar portion 37B has a first surface 381 and a first side surface 382 connected to the first surface 381. The first metal layer 37C (first portion 383 and second portion 384) covers the first surface 381 and the first side surface 382 of the electrode columnar portion 37B. Covering the first surface 381 and the first side surface 382 of the electrode columnar portion 37B with the first metal layer 37C in this manner increases the contact area between the conductive bonding material 40 and the first metal layer 37C. With this configuration, the wiring portion 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32) is deformed by the heat treatment during flip-chip mounting. Whether the semiconductor element 30 and the wiring portion 10 move closer to or farther apart, the contact area between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C remains large, and the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C is excellent. The semiconductor devices A11 and A12 can improve the bonding reliability of the semiconductor element 30 mounted by flip-chip mounting. Additionally, the semiconductor devices A11 and A12 exhibit the same effects as the semiconductor device A10 of the above embodiment.

[0078] Third Modification of First Embodiment: Figure 28 shows a third modification of the semiconductor device A10. Figure 28 is a partially enlarged cross-sectional view showing a semiconductor device A13 according to the third modification, showing the same cross section as Figure 13. The semiconductor device A13 differs from the semiconductor device A10 in the shape of the first metal layer 37C.

[0079] In the semiconductor device A13, the first metal layer 37C has a first portion 383 and a second portion 384, but does not have a third portion 385. As described with reference to Figures 21 and 22, when forming the first metal layer 37C, a smaller second opening 921 is formed in patterning the second resist 92, thereby resulting in a configuration without the third portion 385.

[0080] In the semiconductor device A13, the multiple electrodes 34 (35) include an electrode base 37A, multiple electrode columnar portions 37B, and a first metal layer 37C. The first metal layer 37C is interposed between the electrode columnar portion 37B and the conductive bonding material 40 and has better barrier properties against the conductive bonding material 40 than the electrode columnar portion 37B. The electrode columnar portion 37B has a first surface 381 and a first side surface 382 connected to the first surface 381. The first metal layer 37C (first portion 383 and second portion 384) covers the first surface 381 and the first side surface 382 of the electrode columnar portion 37B. Covering the first surface 381 and the first side surface 382 of the electrode columnar portion 37B with the first metal layer 37C in this manner increases the contact area between the conductive bonding material 40 and the first metal layer 37C. With this configuration, the wiring portion 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32) is deformed by the heat treatment during flip-chip mounting. Whether the semiconductor element 30 and the wiring portion 10 approach or move apart, the contact area between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C remains large, and the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C is excellent. The semiconductor device A13 can improve the bonding reliability of the semiconductor element 30 mounted by flip-chip mounting. Additionally, the semiconductor device A13 achieves the same effects as the semiconductor device A10 within the same configuration as the semiconductor device A10 of the above embodiment.

[0081] Fourth Modification of First Embodiment: Fig. 29 shows a fourth modification of the semiconductor device A10. Fig. 29 is a partially enlarged cross-sectional view showing a semiconductor device A14 according to the fourth modification, and shows the same cross section as Fig. 13. The semiconductor device A14 differs from the semiconductor device A10 in the configuration of the semiconductor element 30.

[0082] In the semiconductor device A14, the semiconductor element 30 further includes an insulating film 393 and a seed layer 394. The insulating film 393 is located on the z2 side of the electrode base 37A in the thickness direction z. The insulating film 393 is formed on the electrode base 37A. The insulating film 393 is formed in a region of the electrode base 37A excluding a portion around the electrode columnar portion 37B. The insulating film 393 is made of, for example, polyimide. The third portion 385 of the first metal layer 37C is located on the z2 side of the insulating film 393 in the thickness direction z. The seed layer 394 is interposed between the insulating film 393 and the third portion 385. The seed layer 394 is provided to form the third portion 385 (first metal layer 37C) on the insulating film 393 by electrolytic plating. The seed layer 394 is a thin film layer, for example, a laminate of a titanium layer and a copper layer, and is formed, for example, by sputtering using a mask.

[0083] In the semiconductor device A14, the multiple electrodes 34 (35) include an electrode base 37A, multiple electrode columnar portions 37B, and a first metal layer 37C. The first metal layer 37C is interposed between the electrode columnar portion 37B and the conductive bonding material 40 and has better barrier properties against the conductive bonding material 40 than the electrode columnar portion 37B. The electrode columnar portion 37B has a first surface 381 and a first side surface 382 connected to the first surface 381. The first metal layer 37C (first portion 383 and second portion 384) covers the first surface 381 and first side surface 382 of the electrode columnar portion 37B. Covering the first surface 381 and first side surface 382 of the electrode columnar portion 37B with the first metal layer 37C in this manner increases the contact area between the conductive bonding material 40 and the first metal layer 37C. With this configuration, the wiring portion 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32) is deformed by the heat treatment during flip-chip mounting. Whether the semiconductor element 30 and the wiring portion 10 move closer to or farther apart, the contact area between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C remains large, and the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C is excellent. The semiconductor device A14 can improve the bonding reliability of the semiconductor element 30 mounted by flip-chip mounting. Additionally, the semiconductor device A14 exhibits the same effects as the semiconductor device A10 of the above embodiment.

[0084] Second Embodiment: Figure 30 shows a semiconductor device according to a second embodiment of the present disclosure. Figure 30 is a partially enlarged cross-sectional view showing a semiconductor device A20 according to this embodiment, and shows a cross section similar to that of Figure 13. The semiconductor device A20 differs from the semiconductor device A10 in the configuration of the wiring portion 10. In the semiconductor device A20, the wiring portion 10 has a wiring base 10A, a plurality of wiring pillar portions 10C, and a second metal layer 10B.

[0085] Each of the multiple wiring pillars 10C protrudes from the wiring base 10A toward the z1 side in the thickness direction z. When viewed in the thickness direction z, the wiring pillar 10C has, for example, a circular or rectangular shape. In this embodiment, the wiring pillar 10C has a second surface 121 and a second side surface 122. The second surface 121 faces the z1 side in the thickness direction z. The second side surface 122 is connected to the second surface 121 and extends toward the z2 side in the thickness direction z. The wiring pillar 10C is formed by metal plating. The metal material constituting the wiring pillar 10C is not particularly limited. The constituent material of the wiring pillar 10C includes, for example, copper. While only one wiring pillar 10C is shown in FIG. 30 , the wiring unit 10 has multiple wiring pillars 10C corresponding to the multiple electrode pillars 37B.

[0086] The second metal layer 10B is interposed between the wiring pillar 10C and the conductive bonding material 40. In this embodiment, the second metal layer 10B has a fourth portion 123, a fifth portion 124, and a sixth portion 125. The fourth portion 123 covers the entire second surface 121 of the wiring pillar 10C. The fifth portion 124 is connected to the fourth portion 123 and covers the second side surface 122 of the wiring pillar 10C. In this embodiment, the fifth portion 124 covers the entire second side surface 122. The sixth portion 125 is connected to the fifth portion 124 on the z2 side in the thickness direction z. The sixth portion 125 covers a portion of the wiring base 10A and surrounds the fifth portion 124 when viewed in the thickness direction z.

[0087] Although detailed illustrations are omitted, the wiring columnar section 10C and the second metal layer 10B formed on the wiring base 10A can be stacked using the same method as described above with reference to FIGS. 18 to 22 for the semiconductor device A10 of the above embodiment. A conductive bonding material is further stacked on the second metal layer 10B. A semiconductor element 30 is bonded to the wiring section 10 by flip-chip mounting. In flip-chip mounting of the semiconductor element 30, the wiring section 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32) may be deformed by a heat treatment (reflow treatment). Deformation of the wiring section 10 or the semiconductor element 30 may cause the distance between the semiconductor element 30 and the wiring section 10 to deviate from the predetermined distance. FIG. 31 illustrates a case where the semiconductor element 30 and the wiring section 10 are closer to each other. FIG. 32 illustrates a case where the semiconductor element 30 and the wiring section 10 are farther apart.

[0088] Next, the operation of this embodiment will be described.

[0089] In the semiconductor device A20, the multiple electrodes 34 (35) include an electrode base 37A, multiple electrode columnar portions 37B, and a first metal layer 37C. The first metal layer 37C is interposed between the electrode columnar portion 37B and the conductive bonding material 40 and has better barrier properties against the conductive bonding material 40 than the electrode columnar portion 37B. The electrode columnar portion 37B has a first surface 381 and a first side surface 382 connected to the first surface 381. The first metal layer 37C (first portion 383 and second portion 384) covers the first surface 381 and the first side surface 382 of the electrode columnar portion 37B. Covering the first surface 381 and the first side surface 382 of the electrode columnar portion 37B with the first metal layer 37C in this manner increases the contact area between the conductive bonding material 40 and the first metal layer 37C. With this configuration, the heat treatment during flip-chip mounting deforms the wiring portion 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32), and whether the semiconductor element 30 and the wiring portion 10 move closer to each other (see FIG. 31) or farther apart (see FIG. 32), the contact area between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C remains large, and the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C is good. The semiconductor device A20 can improve the bonding reliability of the semiconductor element 30 mounted by flip-chip mounting.

[0090] The first metal layer 37C has a third portion 385 connected to the second portion 384. The second portion 384 covers the entire first side surface 382 of the electrode column 37B. The third portion 385 covers a portion of the electrode base 37A and surrounds the second portion 384 in the thickness direction z. This configuration allows for a larger contact area between the conductive bonding material 40 and the first metal layer 37C. Therefore, even if the wiring portion 10 or the semiconductor element 30 is deformed by the heat treatment during flip-chip mounting, the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C is maintained more favorably. This further improves the reliability of the semiconductor device A20.

[0091] The wiring portion 10 includes a wiring base 10A, multiple wiring pillars 10C, and a second metal layer 10B. The second metal layer 10B is interposed between the wiring pillars 10C and the conductive bonding material 40 and includes a fourth portion 123, a fifth portion 124, and a sixth portion 125. The second metal layer 10B (the fourth portion 123 and the fifth portion 124) covers the second surface 121 and the second side surface 122 of the wiring pillars 10C. The second metal layer 10B (the sixth portion 125) covers a portion of the wiring base 10A and surrounds the fifth portion 124 in the thickness direction z. This configuration allows for a larger contact area between the conductive bonding material 40 and the second metal layer 10B. Therefore, even if the wiring portion 10 or the semiconductor element 30 is deformed by the heat treatment during flip-chip mounting, the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the first metal layer 37C is maintained in a better state, thereby further improving the reliability of the semiconductor device A20.

[0092] According to the configuration in which the wiring portion 10 includes the wiring columnar portion 10C and the second metal layer 10B having the fourth portion 123, the fifth portion 124, and the sixth portion 125, a larger space can be secured between the second metal layer 10B and the first metal layer 37C for the conductive bonding material 40 to be interposed therebetween. Therefore, even when the semiconductor element 30 and the wiring portion 10 are brought close to each other by the heat treatment during flip-chip mounting (see FIG. 31 ), leakage of the conductive bonding material 40 can be reduced.

[0093] Third Embodiment: Figure 33 shows a semiconductor device according to a third embodiment of the present disclosure. Figure 33 is a partially enlarged cross-sectional view showing a semiconductor device A30 according to this embodiment, and shows the same cross section as Figure 13. The semiconductor device A30 differs from the semiconductor device A10 in the configuration of the multiple electrodes 34 (35) and the wiring portion 10.

[0094] In the semiconductor device A30, the multiple electrodes 34 (35) include an electrode base 37A and multiple electrode protrusions 37D. Each of the multiple electrode protrusions 37D is connected to the electrode base 37A and located on the z2 side of the electrode base 37A in the thickness direction z. The electrode protrusions 37D are stacked on the electrode base 37A. Each of the multiple electrode protrusions 37D is interposed between the electrode base 37A and the conductive bonding material 40 and contacts the conductive bonding material 40. The electrode protrusions 37D are, for example, circular or rectangular when viewed in the thickness direction z. The electrode protrusions 37D are made of metal plating. The metal material constituting the electrode protrusions 37D is not particularly limited. The electrode protrusions 37D have better barrier properties against the conductive bonding material 40 than the electrode base 37A. The constituent material of the electrode protrusions 37D includes, for example, nickel (Ni).

[0095] In the semiconductor device A30, the wiring portion 10 has a wiring base 10A, a plurality of wiring pillars 10C, and a second metal layer 10B. The configurations of the plurality of wiring pillars 10C and the second metal layer 10B in the semiconductor device A30 are similar to the configurations of the plurality of wiring pillars 10C and the second metal layer 10B in the semiconductor device A20 described above.

[0096] Each of the multiple wiring pillars 10C protrudes from the wiring base 10A toward the z1 side in the thickness direction z. The wiring pillars 10C have, for example, a circular or rectangular shape when viewed in the thickness direction z. In this embodiment, the wiring pillars 10C have a second surface 121 and a second side surface 122. The second surface 121 faces the z1 side in the thickness direction z. The second side surface 122 is connected to the second surface 121 and extends toward the z2 side in the thickness direction z. The wiring pillars 10C are formed by metal plating. The metal material constituting the wiring pillars 10C is not particularly limited. The constituent material of the wiring pillars 10C includes, for example, copper. While only one wiring pillar 10C is shown in FIG. 33 , the wiring unit 10 has multiple wiring pillars 10C corresponding to the multiple electrode protrusions 37D.

[0097] The second metal layer 10B is interposed between the wiring pillar 10C and the conductive bonding material 40. In this embodiment, the second metal layer 10B has a fourth portion 123, a fifth portion 124, and a sixth portion 125. The fourth portion 123 covers the entire second surface 121 of the wiring pillar 10C. The fifth portion 124 is connected to the fourth portion 123 and covers the second side surface 122 of the wiring pillar 10C. In this embodiment, the fifth portion 124 covers the entire second side surface 122. The sixth portion 125 is connected to the fifth portion 124 on the z2 side in the thickness direction z. The sixth portion 125 covers a portion of the wiring base 10A and surrounds the fifth portion 124 when viewed in the thickness direction z.

[0098] 33 , the electrode protrusion 37D of the electrode 34 overlaps the entire wiring columnar portion 10C when viewed in the thickness direction z. The electrode protrusion 37D overlaps the entire second metal layer 10B when viewed in the thickness direction z. For example, the ratio of the length L4 of the second metal layer 10B in the direction perpendicular to the thickness direction z to the length L3 of the electrode protrusion 37D in the direction perpendicular to the thickness direction z is 100% or less, and preferably 50% or more and 90% or less.

[0099] Although detailed illustrations are omitted, the wiring columnar section 10C and the second metal layer 10B formed on the wiring base 10A can be stacked using the same method as described above with reference to FIGS. 18 to 22 for the semiconductor device A10 of the above embodiment. A conductive bonding material is further stacked on the second metal layer 10B. A semiconductor element 30 is bonded to the wiring section 10 by flip-chip mounting. During flip-chip mounting of the semiconductor element 30, the wiring section 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32) may be deformed by a heating process (reflow process). Deformation of the wiring section 10 or the semiconductor element 30 may result in the distance between the semiconductor element 30 and the wiring section 10 differing from the predetermined distance. FIG. 34 illustrates a case where the distance between the semiconductor element 30 and the wiring section 10 decreases. FIG. 35 illustrates a case where the distance between the semiconductor element 30 and the wiring section 10 increases.

[0100] Next, the operation of this embodiment will be described.

[0101] The wiring portion 10 includes a wiring base 10A, multiple wiring pillars 10C, and a second metal layer 10B. The second metal layer 10B is interposed between the wiring pillars 10C and the conductive bonding material 40 and includes a fourth portion 123, a fifth portion 124, and a sixth portion 125. The second metal layer 10B (the fourth portion 123 and the fifth portion 124) covers the second surface 121 and the second side surface 122 of the wiring pillars 10C. The second metal layer 10B (the sixth portion 125) covers a portion of the wiring base 10A and surrounds the fifth portion 124 in the thickness direction z. This configuration increases the contact area between the conductive bonding material 40 and the second metal layer 10B. Even if the wiring portion 10 or the semiconductor element 30 is deformed by the heat treatment during flip-chip mounting, the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the electrode protrusion 37D is good. According to the semiconductor device A30, it is possible to improve the bonding reliability of the semiconductor element 30 mounted by flip-chip mounting.

[0102] According to the configuration in which the wiring portion 10 includes the wiring columnar portion 10C and the second metal layer 10B having the fourth portion 123, the fifth portion 124, and the sixth portion 125, a large space can be secured between the second metal layer 10B and the electrode protrusion 37D for the conductive bonding material 40 to be interposed therebetween. Therefore, even when the semiconductor element 30 and the wiring portion 10 are brought close to each other by the heat treatment during flip-chip mounting (see FIG. 34 ), leakage of the conductive bonding material 40 can be reduced.

[0103] In the semiconductor device A30, the multiple electrodes 34 (35) include an electrode base 37A and multiple electrode protrusions 37D. The electrode protrusions 37D are interposed between the electrode base 37A and the conductive bonding material 40 and have better barrier properties against the conductive bonding material 40 than the electrode base 37A. The electrode protrusions 37D overlap the entire second metal layer 10B in the thickness direction z. The ratio of the length L4 of the second metal layer 10B in the direction perpendicular to the thickness direction z to the length L3 of the electrode protrusions 37D in the direction perpendicular to the thickness direction z is 100% or less. By making the length L3 of the electrode protrusions 37D in the direction perpendicular to the thickness direction z greater than the length L4 of the second metal layer 10B in the direction perpendicular to the thickness direction z, the contact area between the conductive bonding material 40 and the electrode protrusions 37D can be increased. With this configuration, the heat treatment during flip-chip mounting deforms the wiring portion 10 or the semiconductor element 30 (semiconductor substrate 31 and semiconductor layer 32), and whether the semiconductor element 30 and the wiring portion 10 move closer to each other (see FIG. 34) or farther apart (see FIG. 35), the contact area between the wiring portion 10 (second metal layer 10B) and the electrode protrusions 37D remains large, and the bonding state of the conductive bonding material 40 interposed between the wiring portion 10 (second metal layer 10B) and the electrode protrusions 37D is good. The semiconductor device A30 can further improve the bonding reliability of the semiconductor element 30 mounted by flip-chip mounting.

[0104] The semiconductor device according to the present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present disclosure can be freely modified in various ways.

[0105] The present disclosure includes embodiments described in the following appendices: Appendix 1. Supplementary Note 2. A semiconductor device comprising: a wiring section having a wiring main surface facing one side in a thickness direction; a semiconductor element located on one side of the wiring section in the thickness direction; and a conductive bonding material interposed between the wiring section and the semiconductor element in the thickness direction, wherein the semiconductor element has a plurality of electrodes located on the other side in the thickness direction, the plurality of electrodes including an electrode base and a plurality of electrode pillars each connected to the electrode base and protruding to the other side in the thickness direction, and a first metal layer, wherein the first metal layer is interposed between the electrode pillars and the conductive bonding material and has a better barrier property against the conductive bonding material than the electrode pillars, the electrode pillars have a first surface facing the other side in the thickness direction and a first side surface connected to the first surface and extending to one side in the thickness direction, and the first metal layer has a first portion covering the first side and a second portion connected to the first portion and covering at least a part of the first side surface. The semiconductor device according to Appendix 1, wherein the second portion covers the entire first side surface, the first metal layer has a third portion connected to the second portion, and the third portion covers a portion of the electrode base and surrounds the second portion when viewed in the thickness direction. Appendix 3. The semiconductor device according to Appendix 2, wherein the first side surface is inclined with respect to the thickness direction. Appendix 4. The semiconductor device according to any one of Appendixes 1 to 3, wherein the wiring portion has a wiring base having the wiring main surface and a second metal layer located on one side of the wiring base in the thickness direction, and the second metal layer is interposed between the wiring base and the conductive bonding material. Appendix 5. The semiconductor device according to Appendix 4, wherein the second metal layer has a better barrier property against the conductive bonding material than the wiring base. Appendix 6. The semiconductor device according to Appendix 4 or 5, wherein the second metal layer overlaps the entire electrode column when viewed in the thickness direction. Appendix 7. 7. The semiconductor device according to claim 6, wherein the ratio of the length of the first metal layer in a direction perpendicular to the thickness direction to the length of the second metal layer in a direction perpendicular to the thickness direction is 100% or less.Appendix 8. The semiconductor device according to Appendix 2 or 3, wherein the semiconductor element has an insulating film, and the third portion is located on the other side of the insulating film in the thickness direction. Appendix 9. The semiconductor device according to any of Appendixes 1 to 8, wherein the constituent material of the electrode base and the constituent material of the electrode columnar portion contain copper, and the constituent material of the first metal layer contains nickel. Appendix 10. The semiconductor device according to any of Appendixes 4 to 7, wherein the constituent material of the wiring base contains copper, and the constituent material of the second metal layer contains nickel. Appendix 11. The semiconductor device according to any of Appendixes 1 to 10, wherein the conductive bonding material is solder containing tin. Appendix 12. The semiconductor device according to any one of Supplementary Notes 4 to 7, wherein the wiring portion has a plurality of wiring pillars each connected to the wiring base and protruding to one side in the thickness direction, the wiring pillars have a second surface facing one side in the thickness direction and a second side surface connected to the second surface and extending to the other side in the thickness direction, and the second metal layer has a fourth portion covering the second surface and a fifth portion connected to the fourth portion and covering at least a part of the second side surface.Supplementary Note 13. The semiconductor device according to Supplementary Note 12, wherein the fifth portion covers the entire second side surface, the second metal layer has a sixth portion connected to the fifth portion, and the sixth portion covers a part of the wiring base and surrounds the fifth portion when viewed in the thickness direction.Supplementary Note 14. A semiconductor device comprising: a wiring portion having a wiring main surface facing one side in a thickness direction; a semiconductor element located on one side of the wiring portion in the thickness direction; and a conductive bonding material interposed between the wiring portion and the semiconductor element in the thickness direction, wherein the semiconductor element has a plurality of electrodes located on the other side in the thickness direction, the plurality of electrodes including an electrode base and a plurality of electrode protrusions each connected to the electrode base and located on the other side in the thickness direction, each of the plurality of electrode protrusions being interposed between the electrode base and the conductive bonding material, the wiring portion including a wiring base having the wiring main surface, a plurality of wiring pillars each connected to the wiring base and protruding to one side in the thickness direction, and a second metal layer, wherein the second metal layer is interposed between the wiring pillars and the conductive bonding material, and the wiring pillars have a second surface facing one side in the thickness direction and a second side surface connected to the second surface and extending to the other side in the thickness direction, The semiconductor device according to claim 15, wherein the second metal layer has a fourth portion covering the second surface, a fifth portion connected to the fourth portion and covering the second side surface, and a sixth portion connected to the fifth portion, and the sixth portion covers a portion of the wiring base and surrounds the fifth portion when viewed in the thickness direction. Appendix 15. The semiconductor device according to claim 14, wherein the plurality of electrode protrusions have a better barrier property against the conductive bonding material than the electrode base, and the second metal layer has a better barrier property against the conductive bonding material than the wiring base. Appendix 16. The semiconductor device according to claim 15, wherein a ratio of the length of the second metal layer in a direction perpendicular to the thickness direction to the length of the electrode protrusions in a direction perpendicular to the thickness direction is 100% or less. Appendix 17. A method for manufacturing a semiconductor device, comprising: a step of forming a plurality of electrode pillars on an electrode base; a step of forming a first metal layer that covers each of the plurality of electrode pillars and a portion of the electrode base that surrounds the electrode pillar when viewed in the thickness direction; and a step of forming a conductive bonding material on the first metal layer.Supplementary Note 18. The method for manufacturing a semiconductor device according to Supplementary Note 17, wherein the step of forming the plurality of electrode pillars comprises the steps of: arranging, on the electrode base, a first resist having a plurality of first openings exposing portions of the electrode bases; stacking a metal material constituting the electrode pillars in the exposed portions of the electrode bases in each of the plurality of first openings; and removing the first resist; the step of forming the first metal layer comprises the steps of: arranging, on the electrode base, a second resist having a plurality of second openings exposing each of the plurality of electrode pillars and a portion of the electrode base surrounding each of the plurality of electrode pillars as viewed in the thickness direction; and stacking a metal material constituting the first metal layer in each of the plurality of second openings in the exposed portions of the electrode pillars and the electrode bases; and the step of forming the conductive bonding material comprises the steps of: stacking a metal material constituting the conductive bonding material in each of the plurality of second openings on the first metal layer in

[0106] A10, A11, A12, A13, A14, A20, A30: semiconductor device 10: wiring portion 10A: wiring base 10B: second metal layer 10C: wiring pillar portion 101: first wiring 102: second wiring 103: third wiring 104: fourth wiring 105: fifth wiring 106: sixth wiring 107: seventh wiring 11: wiring main surface 111: first wiring main surface 112: second wiring main surface 113: third wiring main surface 114: fourth wiring main surface 115: fifth wiring main surface 116: sixth wiring main surface 117: seventh wiring main surface 121: second surface 122: second side surface 123: fourth portion 124: fifth portion 125: sixth portion 13: back surface of wiring 131: Back surface of first wiring 132: Back surface of second wiring 133: Back surface of third wiring 134: Back surface of fourth wiring 135: Back surface of fifth wiring 136: Back surface of sixth wiring 137: Back surface of seventh wiring 20, 21, 22, 23, 24, 25, 26, 27: Terminal portion 211, 221, 231, 241, 251, 261, 271: Back surface 212, 213, 222, 223, 232, 242, 252, 262, 272: End surface 30: Semiconductor element 31: Semiconductor substrate 32: Semiconductor layer 321: Switching circuit 322: Control circuit 34, 35: Electrode 36: Conductive layer 37A: Electrode base 37B: Electrode pillar portion 37C: First metal layer 37D: Electrode protrusion portion 381: First surface 382: First side surface 383: First portion 384: Second portion 385: Third portion 391: Passivation film 391a: Opening 392: Surface protective film 393: Insulating film 394: Seed layer 40, 41, 42: Conductive bonding material 50: Sealing resin 51: Main resin surface 52: Back resin surface 531: First resin side surface 532: Second resin side surface 533: Third resin side surface 534: Fourth resin side surface 91: First resist 911: First opening 92: Second resist 921: Second opening L1, L2, L3, L4: Length

Claims

1. A semiconductor device comprising: a wiring portion having a wiring main surface facing one side in the thickness direction; a semiconductor element located on one side in the thickness direction with respect to the wiring portion; and a conductive bonding material interposed between the wiring portion and the semiconductor element in the thickness direction, wherein the semiconductor element has a plurality of electrodes located on the other side in the thickness direction, the plurality of electrodes including an electrode base portion, a plurality of electrode columnar portions each connected to the electrode base portion and protruding to the other side in the thickness direction, and a first metal layer, the first metal layer being interposed between the electrode columnar portions and the conductive bonding material and having a barrier property against the conductive bonding material superior to that of the electrode columnar portions, the electrode columnar portions having a first surface facing the other side in the thickness direction and a first side surface connected to the first surface and extending to one side in the thickness direction, and the first metal layer having a first portion covering the first surface and a second portion connected to the first portion and covering at least a part of the first side surface.

2. The semiconductor device according to claim 1, wherein the second portion covers all of the first side surface, the first metal layer has a third portion connected to the second portion, and the third portion covers a part of the electrode base portion and surrounds the second portion when viewed in the thickness direction.

3. The semiconductor device according to claim 2, wherein the first side surface is inclined with respect to the thickness direction.

4. The semiconductor device according to any one of claims 1 to 3, wherein the wiring portion has a wiring base portion having the wiring main surface and a second metal layer located on one side in the thickness direction with respect to the wiring base portion, and the second metal layer is interposed between the wiring base portion and the conductive bonding material.

5. The semiconductor device according to claim 4, wherein the second metal layer has a barrier property against the conductive bonding material superior to that of the wiring base portion.

6. The semiconductor device according to claim 4 or 5, wherein the second metal layer overlaps all of the electrode columnar portions when viewed in the thickness direction.

7. The semiconductor device according to claim 6, wherein the ratio of the length of the first metal layer in a direction orthogonal to the thickness direction to the length of the second metal layer in a direction orthogonal to the thickness direction is 100% or less.

8. The semiconductor device according to claim 2 or 3, wherein the semiconductor element has an insulating film, and the third portion is located on the other side in the thickness direction with respect to the insulating film.

9. The semiconductor device according to any one of claims 1 to 8, wherein the constituent material of the electrode base portion and the constituent material of the electrode columnar portion contain copper, and the constituent material of the first metal layer contains nickel.

10. The semiconductor device according to any one of claims 4 to 7, wherein the constituent material of the wiring base portion contains copper, and the constituent material of the second metal layer contains nickel.

11. The semiconductor device according to any one of claims 1 to 10, wherein the conductive bonding material is a solder containing tin.

12. The wiring portion has a plurality of wiring columnar portions each connected to the wiring base portion and protruding on one side in the thickness direction. The wiring columnar portion has a second surface facing one side in the thickness direction and a second side surface connected to the second surface and extending on the other side in the thickness direction. The second metal layer has a fourth portion covering the second surface and a fifth portion connected to the fourth portion and covering at least a part of the second side surface. The semiconductor device according to any one of claims 4 to 7.

13. The semiconductor device according to claim 12, wherein the fifth portion covers all of the second side surface, the second metal layer has a sixth portion connected to the fifth portion, and the sixth portion covers a part of the wiring base portion and surrounds the fifth portion when viewed in the thickness direction.

14. A wiring portion having a wiring main surface facing one side in the thickness direction, a semiconductor element located on one side in the thickness direction with respect to the wiring portion, and a conductive bonding material interposed between the wiring portion and the semiconductor element in the thickness direction. The semiconductor element has a plurality of electrodes located on the other side in the thickness direction. The plurality of electrodes include an electrode base portion and a plurality of electrode protrusions each connected to the electrode base portion and located on the other side in the thickness direction. Each of the plurality of electrode protrusions is interposed between the electrode base portion and the conductive bonding material. The wiring portion includes a wiring base portion having the wiring main surface, a plurality of wiring columnar portions each connected to the wiring base portion and protruding on one side in the thickness direction, and a second metal layer. The second metal layer is interposed between the wiring columnar portion and the conductive bonding material. The wiring columnar portion has a second surface facing one side in the thickness direction and a second side surface connected to the second surface and extending on the other side in the thickness direction. The second metal layer has a fourth portion covering the second surface, a fifth portion connected to the fourth portion and covering the second side surface, and a sixth portion connected to the fifth portion. The sixth portion covers a part of the wiring base portion and surrounds the fifth portion when viewed in the thickness direction. A semiconductor device.

15. The plurality of electrode protrusions have a barrier property against the conductive bonding material that is superior to that of the electrode base portion, and the second metal layer has a barrier property against the conductive bonding material that is superior to that of the wiring base portion. The semiconductor device according to claim 14.

16. The ratio of the length of the second metal layer in a direction orthogonal to the thickness direction to the length of the electrode protrusion in a direction orthogonal to the thickness direction is 100% or less. The semiconductor device according to claim 15.

17. A method for manufacturing a semiconductor device, comprising: a step of forming a plurality of electrode columnar portions on an electrode base portion; a step of forming a first metal layer covering each of the plurality of electrode columnar portions and a part of the electrode base portion surrounding the electrode columnar portion when viewed in the thickness direction; and a step of forming a conductive bonding material on the first metal layer.

18. The step of forming the plurality of electrode columnar portions includes: disposing a first resist having a plurality of first openings exposing a part of the electrode base on the electrode base; laminating a metal material constituting the electrode columnar portion at the exposed portion of the electrode base in each of the plurality of first openings; and removing the first resist. The step of forming the first metal layer includes: disposing a second resist having a plurality of second openings exposing each of the plurality of electrode columnar portions and a portion of the electrode base surrounding each of the plurality of electrode columnar portions in the thickness direction on the electrode base; and laminating a metal material constituting the first metal layer at the exposed portions of the electrode columnar portions and the electrode base in each of the plurality of second openings. The step of forming the conductive bonding material includes: laminating a metal material constituting the conductive bonding material on the first metal layer in each of the plurality of second openings; and removing the second resist. A method of manufacturing a semiconductor device according to claim 17.

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