Task migration method and related apparatus

Abstract

The present application provides a task migration method and a related apparatus, which are applied to an electronic device, the electronic device comprising one or more processors. When the electronic device detects that a highest-priority task in an operating queue on a second processor has been executed, a highest-priority task in a waiting queue on a first processor is migrated to the second processor to be executed. A highest-priority task exists on each of the first processor and the second processor, the highest-priority task on the first processor waiting in a queue, and the highest-priority task on the second processor being currently executed. When the highest-priority task in the operating queue on the second processor has been executed, this can indicate that the highest-priority task does not exist on the second processor at the present moment, and balancing is performed at this moment, which can ensure that the highest-priority task migrated to the second processor is executed in a timely manner. Compared with existing load balancing, migration timeliness and success rate can be improved.

Description

A task migration method and related device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on January 26, 2024, with application number 202410121972X and application name “A Task Migration Method and Related Devices”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computer technology, and in particular to a task migration method and related devices. Background Art

[0003] With the continuous development of computer technology, electronic devices can be equipped with one or more central processing units (CPUs) to work together. For example, in electronic devices, an application can usually split a task into multiple small tasks (such as processes and threads) and distribute the small tasks to multiple CPUs for execution. This can achieve the purpose of load balancing.

[0004] Currently, load balancing is based on priority. For example, when assigning tasks across multiple CPUs, each task has its own priority, and the higher-priority task is run on the CPU based on that priority. However, the system has multiple scheduling classes, and tasks are scheduled using different scheduling classes based on different requirements. Therefore, the priority of a task depends on the priority of the scheduling class.

[0005] When a large number of certain scheduling tasks are queued for execution on each CPU, they are executed in a queue. Because the execution time on each CPU is inconsistent, some scheduling tasks may complete on one CPU while others are still waiting in queue. Reducing this waiting time is a current issue that needs to be addressed. Summary of the Invention

[0006] The embodiments of the present application provide a task migration method and related devices that can improve the timeliness and success rate of migration tasks.

[0007] In a first aspect, the present application provides a task migration method, applied to an electronic device, the electronic device including one or more processors, the method comprising:

[0008] Determining a first processor and a second processor from the plurality of processors, wherein the first processor corresponds to at least one waiting queue, and the second processor corresponds to at least one running queue, the waiting queue and / or the running queue being used to store tasks of multiple priorities, a task with the highest priority among the multiple priorities, tasks in the waiting queue being queued for execution by the first processor, and tasks in the running queue being executed by the second processor;

[0009] When the task with the highest priority (i.e., the first priority) in the run queue on the second processor is completed, the task with the highest priority (i.e., the first priority) in the wait queue on the first processor is migrated to the second processor for execution.

[0010] As can be seen, the priority of the task migrated from the first processor to the second processor is consistent with the priority of the task completed by the second processor. Therefore, when the first-priority task is completed on the second processor, the task of the same priority on the first processor is migrated to the second processor, allowing the second processor to execute the task promptly. In addition, because the second processor does not have the highest-priority task, the tasks of the same priority migrated to the second processor can be executed promptly, which increases the migration success rate.

[0011] In a possible implementation of the first aspect, when the highest-priority task in the run queue on the second processor is completed, migrating the highest-priority task in the wait queue on the first processor to the second processor for execution includes:

[0012] Determining a first time point, where the first time point is the time when all the highest-priority tasks in the run queue on the second processor are completed;

[0013] At the first time point, the task with the highest priority in the waiting queue on the first processor is migrated to the second processor for execution.

[0014] As can be seen, the migration timing is chosen when all the highest-priority tasks on a processor have been cleared. This is the point in time when the processor is guaranteed to be available for task migration, making migration more timely. Because the processor is fixed, that is, the processor where the highest-priority tasks have been cleared, the migration success rate is the highest.

[0015] In a possible implementation of the first aspect, determining the first processor and the second processor from the multiple processors includes:

[0016] Monitoring resource usage of the plurality of processors and determining a queuing status and an execution status of the highest priority task on the plurality of processors;

[0017] A first processor and a second processor are determined from the plurality of processors according to the queuing state and the execution state.

[0018] It can be seen that the electronic device can monitor the resource usage of each processor in real time, and determine the processor with the heaviest load and the processor with the lightest load. The processor with the heaviest load is the processor to which the tasks need to be migrated, and the processor with the lightest load is the processor to which the migrated tasks need to be executed. This can ensure the timeliness and accuracy of the migration.

[0019] In a possible implementation manner of the first aspect, the queuing state is used to indicate a first number and a to-be-executed time of the highest-priority tasks waiting in the queue;

[0020] The execution status is used to indicate the second number of the highest-priority tasks being executed and the remaining execution time.

[0021] In a possible implementation of the first aspect, determining the first processor and the second processor from the multiple processors according to the queuing state and the execution state includes:

[0022] Determine, from the plurality of processors according to the queue status, a first processor having the longest first total time, wherein the first total time is determined by the first number and the to-be-executed time;

[0023] A second processor having the shortest second total time is determined from the plurality of processors according to the execution status, wherein the second total time is determined by the second number and the remaining execution time.

[0024] It can be seen that the electronic device determines the most heavily loaded processor and the lightest loaded processor based on the execution status and the queuing status. The most heavily loaded processor is the processor on which the tasks need to be migrated, and the lightest loaded processor is the processor that needs to execute the migrated tasks. This can ensure the timeliness and accuracy of the migration.

[0025] In a possible implementation of the first aspect, the task with the highest priority includes a task in an interaction event related to user perception, and the task includes one or more of a process and a thread.

[0026] It is understandable that if the interaction events related to user perception are not handled in a timely manner, it may cause lag and affect the user experience. Therefore, this application will handle this task in a timely manner to improve the user experience.

[0027] In a possible implementation of the first aspect, the method further includes:

[0028] In response to a user operation on the first application, determining a task corresponding to the user operation;

[0029] When the task is used to indicate an interaction event related to user perception, the task is marked as the task with the highest priority.

[0030] It can be seen that the present application can determine the level of the task corresponding to the user operation based on the user operation, so that operations related to user perception can be processed in a timely manner, thereby avoiding lag and improving user experience.

[0031] In a second aspect, an embodiment of the present application provides an electronic device, which includes: one or more processors; a memory; wherein the memory is coupled to the one or more processors, the memory is used to store computer program code, the computer program code includes computer instructions, and the one or more processors call the computer instructions to enable the electronic device to execute the task migration method described in the first aspect or any possible implementation of the first aspect.

[0032] In a third aspect, the present application provides a chip or chip system, comprising at least one processor and a communication interface, wherein the communication interface and the at least one processor are interconnected via a line, and the at least one processor is configured to run a computer program or instruction to execute the task migration method described in the first aspect or any possible implementation of the first aspect. The communication interface in the chip may be an input / output interface, a pin, or a circuit.

[0033] In one possible implementation, the chip or chip system described above in the embodiments of the present application further includes at least one memory, in which instructions are stored. The memory may be a storage unit within the chip, such as a register, a cache, etc., or a storage unit of the chip (e.g., a read-only memory, a random access memory, etc.).

[0034] In a fourth aspect, an embodiment of the present application provides a computer storage medium storing a computer program. When the computer program is executed by a processor, the computer executes the task migration method described in the first aspect or any possible implementation of the first aspect.

[0035] In a fifth aspect, an embodiment of the present application provides a computer program product, which, when running on a communication device, enables the communication device to execute the task migration method described in the first aspect or any possible implementation of the first aspect.

[0036] It should be understood that the description of technical features, technical solutions, beneficial effects or similar language in this application does not imply that all features and advantages can be realized in any single embodiment. On the contrary, it is understood that the description of a feature or beneficial effect means that a specific technical feature, technical solution or beneficial effect is included in at least one embodiment. Therefore, the description of a technical feature, technical solution or beneficial effect in this specification does not necessarily refer to the same embodiment. Furthermore, the technical features, technical solutions and beneficial effects described in the present embodiment can also be combined in any appropriate manner. Those skilled in the art will understand that the embodiment can be implemented without one or more specific technical features, technical solutions or beneficial effects of a specific embodiment. In other embodiments, additional technical features and beneficial effects can also be identified in specific embodiments that do not embody all embodiments.

[0037] It should be understood that the description of technical features, technical solutions, beneficial effects or similar language in this application does not imply that all features and advantages can be realized in any single embodiment. On the contrary, it is understood that the description of a feature or beneficial effect means that a specific technical feature, technical solution or beneficial effect is included in at least one embodiment. Therefore, the description of a technical feature, technical solution or beneficial effect in this specification does not necessarily refer to the same embodiment. Furthermore, the technical features, technical solutions and beneficial effects described in the present embodiment can also be combined in any appropriate manner. Those skilled in the art will understand that the embodiment can be implemented without one or more specific technical features, technical solutions or beneficial effects of a specific embodiment. In other embodiments, additional technical features and beneficial effects can also be identified in specific embodiments that do not embody all embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The following is an introduction to the drawings used in the embodiments of this application.

[0039] FIG1 is a schematic diagram of a task queuing scenario provided by an embodiment of the present application;

[0040] FIG2 is a schematic diagram of a balanced scenario about to enter idle state provided by an embodiment of the present application;

[0041] FIG3 is a schematic diagram of a task migration scenario provided by an embodiment of the present application;

[0042] FIG4 is a schematic structural diagram of an electronic device 100 provided in an embodiment of the present application;

[0043] FIG5 exemplarily shows a schematic diagram of a software architecture of an electronic device 100;

[0044] FIG6 is a control flow timing diagram of a task migration method provided in an embodiment of the present application;

[0045] FIG7 is a schematic diagram of another task migration scenario provided in an embodiment of the present application. DETAILED DESCRIPTION

[0046] The terms used in the following examples of the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. As used in the specification and appended claims of the present application, the singular expressions "a," "an," "said," "above," "the," and "this" are intended to include plural expressions as well, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used in the present application refers to and encompasses any or all possible combinations of one or more of the listed items.

[0047] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to imply or suggest relative importance or implicitly indicate the number of the technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of this application, unless otherwise specified, "plurality" means two or more.

[0048] In order to better understand the method of the present application, the following introduces the terms involved in the embodiments of the present application:

[0049] 1. An event refers to a user's operation on the display screen, which is used to control the execution of threads, or control some threads to control other threads. The operating system can respond to events through a series of threads. For example, events can include touch events, drop events, move events, etc. A touch event refers to an event generated when a finger touches the display screen of an electronic device. Touch types include drop (down), move (move) and lift (up). The touch position can be the coordinates of the point where the finger contacts the display screen, and the sampling point can represent the timestamp of the touch operation. Touch events include drop events, move events or lift events.

[0050] If the touch type of a touch event is "down," the touch event is called a drop event. A drop event is generated when a finger first touches the display screen of an electronic device. A drop event includes the touch type "down," the touch location, and the sampling point. The sampling point of a drop event can be the time when the finger first touches the display screen.

[0051] If the touch type of a touch event is move, it is called a move event. A move event is generated when a finger touches the display of an electronic device and the electronic device samples the touch position at a fixed sampling frequency while the finger remains on the display. A move event includes the touch type move, the touch position, and the sampling point. Each time the electronic device samples the touch position at a fixed sampling frequency while the finger remains on the display, a move event is generated and transmitted.

[0052] If the touch type of a touch event is up, the touch event can be called a lift event. A lift event refers to an event generated by an electronic device when a finger is lifted from the display screen of the electronic device, that is, when the finger leaves the display screen. The lift event includes the touch type up, the touch position, and the sampling point. The sampling point of the lift event can be the first sampling point where the electronic device does not capture the touch position after the finger is lifted. The touch position in the lift event can be the touch position of the last move event before the finger is lifted. The touch position in the lift event can represent the position where the finger is lifted.

[0053] 2. A program is an ordered set of instructions. Programs can include operating system programs and application programs. A program is a static entity that does not inherently run.

[0054] 3. A task is an activity performed by software, or simply an operation to achieve a specific purpose. A task is typically a single execution of a program, such as reading data and storing it in memory, closing a file, or opening a dialog box. A task can be either a process or a thread. A task can be a startup task or any task during the execution of an application, such as a slide task. A startup task is a task that launches an application, while a slide task is a task that switches between applications on the display interface.

[0055] 4. A process refers to the execution of a program and can be thought of as a program currently running on the system. Simply put, a process can be considered an independent program with a complete data and code space in memory. The data and variables owned by the process belong only to it. Different processes are independent of each other, for example, in terms of address space and resource independence. Each process runs in its own dedicated and protected memory.

[0056] A process is the basic unit of resource allocation and can also be the basic unit of scheduling and operation. For example, when a user runs a program, the system creates a process and allocates resources to it (such as memory space, disk space, input / output (I / O) devices, tables, etc.). The process is then placed in the ready queue. If the process is selected by the process scheduler, the system allocates the CPU and other related resources to it, and the process actually runs. A process is a dynamic entity with its own lifecycle, reflecting the entire dynamic process of a program running on a specific data set.

[0057] 5. A thread is a program that runs independently within a process; that is, a thread exists within a process. Simply put, a thread is the basic execution unit of a process, and all tasks of a process are executed within a thread. A process can include one or more threads, and each thread shares the process's address space (e.g., code and global data or variables) and resources (e.g., memory resources, I / O resources, CPU resources, etc.), but each thread has its own stack and local variables. In other words, a process's global variables are shared by all threads, and the resources allocated to the process by the system are available to all threads.

[0058] A thread is the smallest unit of computation within a process and the fundamental unit of processor scheduling. If a process is considered a logical task performed by the operating system, then a thread represents one of many possible subtasks that complete that task. Threads can be independently scheduled for execution on a processor, so multiple threads within a process can run on different processors.

[0059] In short, a program has at least one process, and a process has exactly one corresponding program. A process can have multiple threads, but it must have at least one thread, and a thread can belong to only one process. A process is the basic unit for allocating resources (including CPU resources, memory resources, and input / output (I / O) resources). Resources are allocated to processes, and multiple threads within the same process share these resources. A thread is the basic unit of processor scheduling; it is what actually runs on the processor. Each thread has a program entry point, a sequential execution sequence, and a program exit. However, threads cannot execute independently and must form a process or exist within a program. Multiple threads within the same process can execute concurrently.

[0060] 6. Multi-core central processing unit (CPU), concurrent execution, refers to a processor consisting of multiple processor cores. Processor cores (also called CPU cores) vary in computing power. Generally, cores with higher computing power are called large cores, while cores with lower computing power are called small cores. Multi-core CPUs are scheduled according to specific rules, and all threads running on the processor cores are subject to the overall system scheduling. For example, when scheduling a multi-core CPU, a CPU core must be assigned to a thread, and the thread is added to the run queue of the assigned CPU core, allowing the thread to run on the assigned CPU core. Each processor core can be regarded as an independent processing unit, and a processor core can only execute one thread simultaneously.

[0061] 7. A timeslice is the time allocated to a thread on the CPU. After a thread's timeslice expires, it switches to another thread. Considering only a single CPU, it's impossible for the same CPU to run multiple tasks simultaneously. Timeslices allow processes or programs to run alternately. Because timeslices are so short (typically on the order of 10-100ms), they're imperceptible to the user, yet from a macro perspective, each process or program appears to be running simultaneously. Timeslices are typically assigned to each thread by the operating system kernel's scheduler.

[0062] Normally, all threads in a system are not assigned the same time slice. In order to achieve faster response speed, threads with strong interactivity are assigned longer time slices than threads with weak interactivity.

[0063] 8. A task scheduler (scheduler) for scheduling or assigning tasks to processor cores. In embodiments of the present application, the task scheduler may schedule or assign tasks in a multi-core processor system or a single-core processor, wherein the multi-core processor system may be a multi-core system or a multi-processor system. In a multi-core system, all processor cores are located in one processor core. In a multi-processor system, each processor core may be located in one processor core. The task scheduler may be implemented as the kernel of an operating system and may be referred to simply as a scheduler in some embodiments.

[0064] Tasks can be scheduled according to different scheduling strategies (or scheduling algorithms). For example, scheduling strategies may include completely fair schedule (CFS) strategy, real-time schedule (RTS) strategy, and so on. Among them, the scheduling priority of the RTS strategy is higher than the scheduling priority of the CFS strategy. In addition to the RTS strategy and the CFS strategy, there is also a VIP (very important) strategy. The VIP strategy is a type between the above two, which is derived from the CFS strategy. The scheduling priority of the VIP strategy is higher than the scheduling priority of the RTS strategy. Therefore, the scheduling priority is ranked as follows: RTS strategy is greater than VIP strategy, and VIP strategy is greater than CFS strategy. A task migration method provided in an embodiment of the present application is mainly used for tasks scheduled based on VIP strategy (referred to as VIP tasks). Accordingly, the scheduler that executes the VIP strategy can be called a VIP scheduler. Since the VIP strategy is derived from the CFS strategy, the scheduler that executes the VIP strategy can be called a CFS scheduler.

[0065] Among them, tasks scheduled according to the VIP policy may include VIP scheduling threads, which generally include threads created during process runtime for executing tasks related to interactive events. Threads used to execute tasks related to interactive events may include user interface (UI) threads, rendering threads, GL threads, user input event distribution threads, user input event detection threads, etc., where the GL thread is the rendering thread of the Open Graphics Library. It should be understood that the user involved here refers to the interface user, that is, the user who interacts with the user interface, or the user who uses the electronic device.

[0066] In recent years, with the advancement of technology, the number of CPUs integrated into electronic devices has increased. To exploit the parallel computing capabilities of these CPUs, most applications have evolved from single-threaded execution to multi-threaded execution. Through multi-threading, applications can split a task into multiple smaller tasks (such as processes and threads) and distribute these tasks across multiple CPUs. This reduces latency and improves throughput.

[0067] However, when the system load is heavy, task queuing may occur in the system. If the tasks related to the user's interactive events cannot be processed in time, it will bring a bad experience to the user. Please refer to Figure 1, which is a schematic diagram of a task queuing scenario provided by an embodiment of the present application. As shown in Figure 1, in an operating system of a multi-core CPU, one or more CPUs are included, such as CPU0, CPU1...CPUx. The operating system can assign a task queue to each CPU. When the system load is heavy, for example, there are a lot of tasks (such as task 1, task 2...task N) in the runnable task queue on CPU0, CPU1...CPUx. When the number of tasks currently running has reached the maximum number that the CPU can carry or the CPU usage exceeds a preset threshold, it means that the system load is heavy. Since each task in the system is competing for resources on the CPU, there may be tasks in the system that are in a runnable state (such as a runnable state), such as one or more tasks in a waiting task queue. Among them, the runnable state can be called a ready state. Tasks in a runnable state are in a waiting task queue, waiting to be selected by the scheduler to obtain CPU usage rights.

[0068] If there are high-priority tasks in the waiting task queue (for example, tasks scheduled based on the VIP policy, specifically including multiple threads such as u_input 12276), each CPU is already running other tasks, which may result in longer response delays for the high-priority tasks. If not handled promptly, the user experience will deteriorate. For example, if the frame drawing thread is not scheduled in a timely manner, it may cause serious frame drops.

[0069] In one implementation, when a system has many VIP tasks, they are distributed across various CPUs, queueing them for execution. Because the execution times of VIP tasks on each CPU vary, VIP tasks on some CPUs may finish executing while VIP tasks on other CPUs are still waiting in line. Therefore, a VIP task load balancing method is needed to reduce the waiting time for VIP tasks.

[0070] Currently, load balancing mainly includes the following three implementation methods:

[0071] 1) Periodic load balancing (or tick load balancing) involves periodically checking the system load during the tick phase, identifying the most heavily loaded CPU domains, groups, and CPUs, and then pulling runnable tasks from these CPUs to relatively idle CPUs. For example, tasks may be pulled to the current CPU to balance the load across the domains.

[0072] 2) Non-periodic load balancing (NOHZ load balancing) means that when a CPU in the system has entered the idle state, if a CPU is found to be overloaded, the idle CPU can be woken up through an inter-processor interrupt (IPI) to perform load balancing. That is, if idle load balancing is required, an IPI interrupt will be sent to the selected idle CPU through the general interrupt controller (GIC) to enable load balancing on this CPU.

[0073] 3) About to enter the idle balance (new-idle balance), which means that there is no task executing on the current CPU and it will enter the idle state immediately. At this time, it is necessary to check the load of other CPUs. If other CPUs are busy, it is necessary to pull tasks from the busy CPU to run on the current CPU to balance the load of the entire system. For example, please refer to Figure 2, which is a schematic diagram of a scenario of about to enter the idle balance provided by an embodiment of the present application. As shown in Figure 2, when CPU1 is in the new-idle balance, it means that there is no task being performed on CPU1 and it will enter the idle state immediately. At this time, if it is detected that the load on other CPUs (for example, CPU0) is relatively heavy, for example, there are tasks queued on CPU0, then CPU1 will try to migrate (pull) tasks from other CPUs (for example, CPU0) to this CPU to run, thereby reducing the waiting time of tasks on other CPUs.

[0074] It can be seen that the CPU does not consider the priority of tasks when migrating tasks. It may migrate lower-priority tasks to the CPU first and then migrate higher-priority tasks to the CPU. As a result, the higher-priority tasks cannot be run in a timely manner. Since the higher-priority tasks are related to user interaction events, if they cannot be run in a timely manner, it may affect the user experience.

[0075] Therefore, in the embodiments of the present application, a priority is set for a task. The priority of the task can be determined based on the response latency requirement of the task. For example, a task with a higher response latency requirement (for example, a low response latency, requiring a more timely and faster response latency) (such as a VIP task) is given a higher priority, while a task with a lower response latency requirement (such as a CFS task) is given a lower priority. Since VIP tasks have a higher low response latency requirement, the load balancing characteristics of VIP tasks are more proactive and timely during load balancing.

[0076] In view of this, the present application provides a task migration method, which is applied to an electronic device, and the method includes: determining a first CPU and a second CPU from multiple CPUs, wherein the first CPU includes a CPU that can perform load balancing, such as periodic load balancing, non-periodic load balancing, and balancing that is about to be idle, and the second CPU corresponds to at least one task queue, and the at least one task queue is used to store tasks of multiple priorities, and the tasks of multiple priorities include tasks of first priority (such as VIP tasks) and tasks of second priority (such as CFS tasks), and the first priority is greater than the second priority; the first priority task in the second CPU is preferentially migrated to the first CPU, and the first CPU executes the first priority task.

[0077] Please refer to Figure 3, which is a schematic diagram of a task migration scenario provided by an embodiment of the present application. As shown in Figure 3, CPU1 is a CPU that can perform load balancing (i.e., the first CPU). For example, a CPU that can perform load balancing refers to: there is no task executing on the CPU, and it immediately enters idle, or, when the CPU is in the tick phase, it periodically detects the waiting status of the first-priority tasks on other CPUs (for example, tasks scheduled based on the VIP policy, specifically including multiple threads including u_input 12276)). If it is detected that there are first-priority tasks waiting in line on other CPUs, CPU1 will prioritize migrating the first-priority tasks waiting in line on other CPUs (for example, CPU0) to this CPU for execution, so that the waiting first-priority tasks can be run more quickly.

[0078] However, existing load balancing can only be performed when the CPU is in new-idle or in the tick phase, resulting in poor timeliness. Alternatively, during the tick phase, when the task scheduler attempts to perform load balancing, there may be first-priority tasks queued on all CPUs, causing load balancing to fail. For example, as shown in Figure 3, during the tick phase, the task scheduler periodically checks the load of the currently running system, finds the CPU with the heaviest load (for example, CPU0), and pulls the first-priority tasks on CPU0 to a relatively idle CPU (for example, CPU1) for execution. However, because there may be multiple first-priority tasks on CPU1, the pulled first-priority tasks will not be executed in a timely manner, resulting in poor accuracy.

[0079] From the above content, we can see that in the current load balancing solution, there are problems with poor timeliness and accuracy for tasks with higher priorities.

[0080] Based on the above content, the present application provides a task migration method, which is applied to an electronic device, wherein the electronic device includes one or more processors, and the electronic device determines a first processor and a second processor from the multiple processors, wherein the first processor corresponds to at least one waiting queue, and the second processor corresponds to at least one running queue, and the waiting queue and / or running queue are used to store tasks of multiple priorities, and there is a task with the highest priority among the tasks of multiple priorities. The tasks in the waiting queue are waiting in line for execution by the first processor, and the tasks in the running queue are being executed by the second processor. When the electronic device detects that the highest priority task in the running queue on the second processor has been executed, the highest priority task in the waiting queue on the first processor is migrated to the second processor for execution.

[0081] For example, the highest priority tasks may include threads created during process execution for executing tasks related to interactive events. Threads used to execute tasks related to interactive events may include user interface (UI) threads, rendering threads, GL threads, user input event dispatch threads, user input event detection threads, and the like.

[0082] As can be seen, the highest-priority task exists on both the first and second processors. The highest-priority task on the first processor is waiting in the queue, while the highest-priority task on the second processor is currently being executed. The completion of the highest-priority task in the run queue on the second processor indicates that the highest-priority task no longer exists on the second processor. Balancing at this point ensures that the highest-priority task migrated to the second processor is promptly executed. Compared to existing load balancing, this improves migration timeliness and success rates.

[0083] First, the electronic devices in the embodiments of the present application can be smart screen devices, smart televisions (TVs), mobile phones, tablet computers, ultra-mobile personal computers (UMPCs), netbooks, as well as cellular phones, personal digital assistants (PDAs), wearable devices (such as smart watches and smart bracelets), and other devices with display functions. The embodiments of the present application do not impose any special restrictions on the specific form of the electronic devices.

[0084] For example, taking the electronic device as a mobile phone as an example, Figure 4 is a structural diagram of an electronic device 100 provided by an embodiment of the present application. That is, for example, the electronic device shown in Figure 4 can be a mobile phone.

[0085] As shown in Figure 4, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0086] It should be understood that the structure illustrated in the embodiments of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0087] The processor 110 may include one or more processing units, for example, the processor 110 may include a central processing unit (CPU), an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). Different processing units may be independent devices or integrated into one or more processors. A processor may include one or more processing cores.

[0088] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0089] A memory may also be provided in the processor 110 for storing instructions and data. In one embodiment, the instructions and data specifically include an operating system program and an application program, and the processor is used to read the operating system program in the memory, thereby running the operating system on the electronic device 100 and implementing various functions of the operating system, or reading one or more application programs, thereby running applications on the electronic device 100. In one embodiment, the memory in the processor 110 is a cache memory. The memory can save instructions or data that the processor 110 has just used or is cyclically used. If the processor 110 needs to use the instruction or data again, it can be directly called from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0090] The charging management module 140 is used to receive charging input from the charger. The power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140, and provides power to the processor 110, the internal memory 121, the display 194, the camera 193, and the wireless communication module 160. The power management module 141 can also be used to monitor parameters such as battery capacity, battery cycle count, battery health status (leakage, impedance), etc. In another embodiment, the power management module 141 can also be set in the processor 110. In another embodiment, the power management module 141 and the charging management module 140 can also be set in the same device.

[0091] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0092] Antenna 1 and Antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve antenna utilization. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In another embodiment, the antenna can be used in conjunction with a tuning switch.

[0093] The mobile communication module 150 can provide wireless communication solutions for the electronic device 100, including second generation (2G), third generation (3G), fourth generation (4G), fifth generation (5G), and sixth generation (6G). The mobile communication module 150 can include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), and the like. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, filter and amplify the received electromagnetic waves, and transmit them to the modem processor for demodulation. The mobile communication module 150 can also amplify the signals modulated by the modem processor and convert them into electromagnetic waves for radiation via the antenna 1. In one embodiment, at least some of the functional modules of the mobile communication module 150 can be located in the processor 110. In another embodiment, at least some of the functional modules of the mobile communication module 150 and at least some of the modules of the processor 110 can be located in the same device.

[0094] The modem processor may include a modulator and a demodulator. The modulator is used to modulate the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After being processed by the baseband processor, the low-frequency baseband signal is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to the speaker 170A, the receiver 170B, etc.) or displays an image or video through the display screen 194. In one embodiment, the modem processor may be an independent device. In another embodiment, the modem processor may be independent of the processor 110 and be set in the same device as the mobile communication module 150 or other functional modules.

[0095] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, frequency modulates and filters the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, frequency modulate it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0096] In one embodiment, the antenna 1 of the electronic device 100 is coupled to the mobile communication module 150, and the antenna 2 is coupled to the wireless communication module 160, so that the electronic device 100 can communicate with a network and other devices through wireless communication technology. The wireless communication technology may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology. The GNSS may include a global positioning system (GPS), a global navigation satellite system (GLONASS), a Beidou navigation satellite system (BDS), a quasi-zenith satellite system (QZSS) and / or a satellite based augmentation system (SBAS).

[0097] Electronic device 100 implements display functionality through a GPU, display screen 194, and an application processor. A GPU is a microprocessor for image processing that connects display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or modify display information.

[0098] The display screen 194 is used to display images, videos, user interfaces, controls, windows, etc. In one implementation, the display screen 194 is used to display the smooth rounded corners obtained by a smooth rounded corner drawing method provided in this application. The display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In one embodiment, the electronic device 100 may include 1 or N display screens 194, where N is a positive integer greater than 1.

[0099] The electronic device 100 can implement a shooting function through an ISP, a camera 193, a video codec, a GPU, a display screen 194, and an application processor.

[0100] The ISP processes data fed back by camera 193. For example, when taking a photo, the shutter is opened, and light is transmitted through the lens to the camera's photosensitive element. The light signal is converted into an electrical signal, which is then passed to the ISP for processing and transformed into a visible image. The ISP can also perform algorithmic optimization on image noise, brightness, and color. It can also optimize parameters such as exposure and color temperature of the captured scene. In one embodiment, the ISP can be located within camera 193.

[0101] The camera 193 is used to capture still images or videos. The object generates an optical image through the lens and projects it onto the photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the light signal into an electrical signal, and then passes the electrical signal to the ISP for conversion into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV or other format. In one embodiment, the electronic device 100 may include 1 or N cameras 193, where N is a positive integer greater than 1.

[0102] Camera 193 may include one or more of the following: a telephoto camera, a wide-angle camera, an ultra-wide-angle camera, a zoom camera, or a depth camera. A telephoto camera has a narrow shooting range and is suitable for capturing distant objects; a wide-angle camera has a larger shooting range; and an ultra-wide-angle camera has a wider shooting range than a wide-angle camera and is suitable for capturing large scenes such as panoramic views. A depth camera can be used to measure the distance to the object being photographed, that is, to measure the depth information of the object being photographed. For example, it may include a three-dimensional (3D) depth camera, a time-of-flight (TOF) depth camera, or a binocular depth camera.

[0103] The camera 193 may include a main camera and a secondary camera. The main camera may be used to capture images, and may include, for example, a telephoto camera, a wide-angle camera, an ultra-wide-angle camera, or a zoom camera. The secondary camera may be used for ranging or other auxiliary functions, and may include, for example, a depth camera.

[0104] The camera 193 may include a front camera and / or a rear camera. The front camera may include one or more main cameras, and the rear camera may also include one or more main cameras. When capturing an image, the target main camera used by the electronic device to capture the image may be a default main camera or a main camera selected by the user.

[0105] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 via the external memory interface 120 to implement data storage functions. For example, files such as music and videos can be stored on the external memory card.

[0106] The internal memory 121 can be used to store computer executable program codes, which include instructions. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc. The processor 110 executes various functional applications and data processing of the electronic device 100 by running instructions stored in the internal memory 121 and / or instructions stored in a memory provided in the processor.

[0107] The electronic device 100 can implement audio functions through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0108] The audio module 170 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signals. The audio module 170 can also be used to encode and decode audio signals.

[0109] The speaker 170A, also called a "horn", is used to convert audio electrical signals into sound signals.

[0110] The receiver 170B, also called a "handset", is used to convert audio electrical signals into sound signals.

[0111] Microphone 170C, also called "microphone" or "microphone", is used to convert sound signals into electrical signals.

[0112] The headphone jack 170D is used to connect a wired headphone.

[0113] The pressure sensor 180A is used to sense pressure signals and convert them into electrical signals. In one embodiment, the pressure sensor 180A can be set on the display screen 194. There are many types of pressure sensors 180A, such as resistive pressure sensors, inductive pressure sensors, capacitive pressure sensors, etc. A capacitive pressure sensor can be a device comprising at least two parallel plates with conductive material. When a force acts on the pressure sensor 180A, the capacitance between the electrodes changes. The electronic device 100 determines the intensity of the pressure based on the change in capacitance. When a touch operation is applied to the display screen 194, the electronic device 100 detects the intensity of the touch operation based on the pressure sensor 180A. The electronic device 100 can also calculate the position of the touch based on the detection signal of the pressure sensor 180A. In one embodiment, touch operations acting on the same touch position but with different touch operation intensities can correspond to different operation instructions.

[0114] The gyro sensor 180B may be used to determine the motion posture of the electronic device 100. In one embodiment, the angular velocity of the electronic device 100 around three axes (ie, x, y, and z axes) may be determined by the gyro sensor 180B.

[0115] The air pressure sensor 180C is used to measure air pressure.

[0116] The magnetic sensor 180D includes a Hall sensor, and the electronic device 100 can use the magnetic sensor 180D to detect the opening and closing of the flip leather case.

[0117] The acceleration sensor 180E can detect the magnitude of the acceleration of the electronic device 100 in various directions (generally three axes).

[0118] The distance sensor 180F is used to measure distance.

[0119] The proximity light sensor 180G may include, for example, a light emitting diode (LED) and a light detector, such as a photodiode. The light emitting diode may be an infrared light emitting diode. The electronic device 100 emits infrared light outward through the light emitting diode. The electronic device 100 uses the photodiode to detect infrared reflected light from nearby objects. When sufficient reflected light is detected, it can be determined that there is an object near the electronic device 100. When insufficient reflected light is detected, the electronic device 100 can determine that there is no object near the electronic device 100.

[0120] The ambient light sensor 180L is used to sense the brightness of the ambient light.

[0121] The fingerprint sensor 180H is used to collect fingerprints. The electronic device 100 can use the collected fingerprint characteristics to implement fingerprint unlocking, access application locks, fingerprint photography, fingerprint call answering, etc.

[0122] The temperature sensor 180J is used to detect temperature.

[0123] The touch sensor 180K is also called a "touch-sensitive device." The touch sensor 180K can be disposed on the display screen 194. The touch sensor 180K and the display screen 194 form a touch screen, also called a "touch screen." The touch sensor 180K is used to detect touch operations applied thereto or in the vicinity thereof. The touch sensor can transmit the detected touch operations to the application processor to determine the type of touch event. Visual output related to the touch operations can be provided via the display screen 194. In other embodiments, the touch sensor 180K can also be disposed on the surface of the electronic device 100, at a location different from that of the display screen 194.

[0124] The bone conduction sensor 180M can acquire vibration signals.

[0125] The buttons 190 include a power button, a volume button, and the like. The buttons 190 may be mechanical buttons or touch buttons. The electronic device 100 may receive key inputs and generate key signal inputs related to user settings and function control of the electronic device 100.

[0126] The motor 191 can generate a vibration prompt. The indicator 192 can be an indicator light, which can be used to indicate the charging status, power changes, messages, missed calls, notifications, etc. The SIM card interface 195 is used to connect a SIM card.

[0127] The software system of the electronic device 100 can adopt a layered architecture, an event-driven architecture, a microkernel architecture, a microservice architecture, or a cloud architecture. For example, the software system with a layered architecture can be an Android system, or a Harmony operating system (OS), or other software systems, or a system constructed by the above-mentioned multiple software systems. The embodiment of the present application takes the Android system with a layered architecture as an example to illustrate the software structure of the electronic device 100. The bottom layer of the Android system is implemented as Linux. Taking a smartphone as an example, each thread running on the smartphone needs to follow the scheduling rules of the Linux kernel. The thread runs on the CPU, and the CPU frequency is determined by the overall load of the threads running on it. The higher the frequency, the faster the execution speed.

[0128] FIG5 exemplarily shows a schematic diagram of a software architecture of an electronic device 100 .

[0129] A layered architecture divides software into several layers, each with distinct roles and responsibilities. Layers communicate with each other through software interfaces. In one embodiment, the Android system is divided into five layers: from top to bottom: the application layer, the application framework layer, the Android runtime and system libraries, the hardware abstraction layer (HAL), and the kernel layer.

[0130] The application layer includes a series of application packages. As shown in Figure 5, an application package can include applications such as Gallery, Messages, Files, Memos, Browser, Video, Calls, Navigation, and Bluetooth. Applications can include system applications and third-party applications.

[0131] The application framework layer provides an application programming interface (API) and programming framework for the series of services and systems hidden behind each application. The application framework layer includes some predefined functions.

[0132] As shown in FIG5 , the application framework layer may include a window manager, a content provider, a view system, a phone manager, a resource manager, a notification manager, an activity manager, and an input manager, etc.

[0133] The window manager is used to manage window programs. The window manager can obtain the size of the display screen, determine whether there is a status bar, lock the screen, take screenshots, etc.

[0134] Content providers are used to store and retrieve data and make it accessible to applications. This data can include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, and more. Content providers allow applications to publish and share data with each other.

[0135] The view system includes visual controls, such as a text control for displaying text and an image control for displaying images. The view system is used to build applications. A display interface can be composed of one or more views. For example, a display interface containing a text notification icon might include a view for displaying text and a view for displaying images.

[0136] The telephony manager is used to provide communication functions for the electronic device 100, such as management of call status (including answering, hanging up, etc.).

[0137] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0138] The notification manager enables applications to display notification information in the status bar. This can be used to convey notification-type messages and can disappear automatically after a short period of time without user interaction. For example, the notification manager is used to notify the completion of downloads, message reminders, etc. The notification manager can also be used to display notifications in the form of icons or scrolling text in the top status bar of the system, such as notifications from applications running in the background, or notifications that appear on the screen in the form of dialog windows. For example, a text message can be displayed in the status bar, a notification sound can be emitted, the electronic device 100 can vibrate, an indicator light can flash, etc.

[0139] The activity manager manages all aspects of the application lifecycle and activity stack, and provides common navigation back functionality. The activity manager provides information about currently running activities in the system, such as processes, applications, services, and tasks. For example, the activity manager can be used to obtain global memory usage information, aggregate memory usage for each process, and retrieve information about running processes (e.g., identifying the currently running activity and determining whether the application is currently running).

[0140] The input manager is used to obtain the original input event corresponding to the touch operation from the kernel layer (including touch coordinates, touch operation timestamp and other information) and identify the control corresponding to the input event.

[0141] The Android runtime, or Android runtime environment, includes core libraries and a virtual machine (VM). The Android runtime is responsible for scheduling and management of the Android system. The core library consists of two parts: one for Java-based functions and the other for the Android core library. The application layer and application framework layer run in the VM. The VM executes Java files from the application and framework layers as binary files. The VM is responsible for managing object lifecycles, stack management, thread management, security and exception management, and garbage collection.

[0142] The system library supports the application framework and is an important link between the application framework layer and the kernel layer. It can include multiple functional modules, such as: surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0143] The surface manager is used to manage the display subsystem and provide fusion of 2D and 3D layers for multiple applications.

[0144] The media library supports playback and recording of a variety of common audio and video formats, as well as static image files. The media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

[0145] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0146] A 2D graphics engine is a drawing engine for 2D drawings. 2D engines include, but are not limited to, vector graphics engines (such as the Skia Graphics Library (SGL)), browser engines (such as WebKit), and relational database engines (such as SQLite).

[0147] A 3D engine is a graphics engine for three-dimensional drawing, used to implement three-dimensional graphics drawing, image rendering, compositing, and layer processing. 3D engines include, but are not limited to, the Open Graphics Library for Embedded Systems (OpenGL ES).

[0148] The Hardware Abstraction Layer (HAL) is a hardware interface layer abstracted from a specific hardware platform. It implements the functionality and control of that specific hardware platform while providing a unified API for other software modules. Specifically, the HAL abstracts the commonalities of hardware operation and control, hiding the platform-specific hardware interface details. It then provides a unified virtual hardware platform and control interface to upper-level software, isolating other software modules from the underlying hardware and facilitating system porting to new hardware platforms.

[0149] The kernel layer is a layer between hardware and software that provides a standard interface for hardware (e.g., including processors, etc.) through the HAL, and is used to provide the essential functions of the operating system, such as file management, memory management, process management, network protocol stack, device management (e.g., camera, keyboard, display), etc. The kernel layer includes at least a display driver, a camera driver, an audio driver, and a sensor driver. In an embodiment of the present application, the kernel layer may also include a scheduler, a monitoring module, a decision module, and a migration module.

[0150] The monitoring module can be used to monitor resource usage across multiple processors and determine the queue status and execution status of the highest-priority tasks on the multiple processors. The queue status indicates a first number of the highest-priority tasks waiting in the queue and the pending execution time, while the execution status indicates a second number of the highest-priority tasks being executed and the remaining execution time. The pending execution time represents the time slice allocated for the task, and the remaining execution time represents the remaining execution time within the allocated time slice for the task.

[0151] For example, the resource usage of the processor can be determined by the system load, which may include the following situations:

[0152] In case 1, if the system load is 0, it means that the resources on the processor are not used and there is no task waiting to be executed or being executed on the processor. At this time, if there is a task to be executed, the time slice of the processor can be allocated to the task.

[0153] In the second scenario, if the system load is 0.5, this means the processor is processing the previous task at 50% capacity and has resources available, so there is a task currently being executed on this processor. If a task needs to be executed at this time, it can be allocated a time slice on this processor.

[0154] In case 3, if the system load is 1, it means that the processor is processing the previous task at 100% capacity and there are no resources available, indicating that there is a task currently being executed on the processor. At this time, if there is a task that needs to be executed, it needs to be retained until the previous task is completed or the previous task's time slice is exhausted.

[0155] In case 4, if the system load is 1.5, it means that the processor is processing at 100% capacity, no resources are available, and there are tasks waiting to be executed by the CPU. At this time, if there are tasks that need to be executed, they must wait in line to be executed.

[0156] The decision module may be configured to determine a first processor and a second processor from among the plurality of processors according to a queue state and an execution state.

[0157] In one implementation, the decision module is configured to determine, from among the multiple processors, a first processor having the longest first total execution time based on a queue status, wherein the first total execution time is determined by a first number of highest-priority tasks waiting in the queue and their corresponding execution times. It will be appreciated that the longest first total execution time indicates that the processor is the busiest and has the greatest resource pressure, and that waiting tasks on this processor are not being processed promptly, indicating that the highest-priority task on this processor needs to be migrated.

[0158] The decision module is configured to determine, from the plurality of processors, a second processor having the shortest second total time based on the execution state, wherein the second total time is determined by a second number of the highest-priority tasks currently being executed and the corresponding remaining execution times. It is understood that the shortest second total time indicates that the highest-priority task on this processor is about to be completed (the time taken to complete execution is the shortest, which can be understood as the processor being "least idle"). If the highest-priority task is migrated to this processor, it can be executed promptly.

[0159] The migration module migrates the task with the highest priority in the waiting queue on the first processor to the second processor for execution when the task with the highest priority in the running queue on the second processor is completed.

[0160] In addition, the application framework layer, Android runtime and system libraries, as well as the kernel layer, can constitute the operating system layer of the electronic device. It is understood that the virtual memory can be divided into kernel space and user space by the operating system, where the kernel space is where the kernel code runs, and the user space is where the user program code runs. When a task is executed in the kernel code, it can be said that the task is in the kernel running state (referred to as kernel state). When the task is executing the user's own code, it can be said that the process is in the user running state (referred to as user state). Specifically, kernel state and user state are two operating levels of the operating system. The user space is composed of the Android runtime (shown in Figure 5) and system libraries, as well as the application framework layer. The kernel space is based on the kernel layer. The kernel can control the computer's hardware resources and provide a standard interface for the hardware through the hardware abstraction layer.

[0161] The kernel is the first layer of software that extends the hardware system, providing the most basic operating system functionality and forming the foundation for its operation. The kernel is generally responsible for process scheduling and management, file system management, memory management, device driver management, and network system management. Therefore, the kernel can be divided into multiple modules based on their functionality. The module responsible for task migration is called the scheduler (the aforementioned task scheduler).

[0162] Please refer to Figure 6, which is a control flow timing diagram of a task migration method provided in an embodiment of the present application. The method can be implemented based on the hardware architecture of the electronic device shown in Figure 4 and / or the software architecture of the electronic device shown in Figure 6. The method includes steps S601-S615, which are described in this order and are not intended to be limited to execution in the above order. The embodiment of the present application does not limit the order of execution, execution time, number of executions, etc. of the above one or more steps.

[0163] S601: A first application transmits a user operation to an input manager.

[0164] The user operation may be an operation performed by the user on the display screen, including but not limited to a click operation, a slide operation, and an operation in which the user interface of the first application interacts with the system. For example, the user operation may be an operation on a control on the user interface of the first application, and the user operation is used to activate an animation corresponding to the control.

[0165] S602: The input manager identifies the task corresponding to the user operation.

[0166] The Input Manager identifies the events (event type and location) corresponding to user actions, and thus identifies the tasks associated with those events. A task indicates an activity performed by the software, typically an operation to achieve a specific purpose, such as activating an animation for a control.

[0167] S603: The input manager transmits the task corresponding to the user operation to the activity manager.

[0168] S604: The activity manager identifies the task as the task with the highest priority.

[0169] It is understandable that an activity is usually the running of a program, and a task can be either a process or a thread. The activity manager stores one or more tasks that the system is running, such as startup tasks, sliding tasks, display tasks, and so on. Based on the resources required for the event corresponding to the user operation, the activity manager can determine whether the event is an interactive event related to user perception. If the event is an interactive event, the task can be marked as a task with a higher priority. For example, the threads used to execute related tasks in interactive events may include user interface (UI) threads, rendering threads, GL threads, user input event distribution threads, user input event detection threads, and so on.

[0170] S605: The activity manager transmits the task with the highest priority to the scheduler.

[0171] S606: The scheduler allocates the first processor to the task with the highest priority.

[0172] S607: The first processor saves the task with the highest priority.

[0173] S608: The monitoring module monitors resource usage of the multiple processors and determines the queuing status and execution status of the highest priority tasks on the multiple processors.

[0174] The queue status is used to indicate the first number and execution time of the tasks with the highest priority waiting in the queue;

[0175] The execution status is used to indicate the second number of the tasks with the highest priority being executed and the remaining execution time.

[0176] S609: The monitoring module transmits the queuing status and execution status of the highest priority tasks on the multiple processors to the decision module.

[0177] S610: A decision module determines a first processor and a second processor from a plurality of processors according to a queuing state and an execution state.

[0178] Exemplarily, the decision module determines a first processor having the longest first total time from the plurality of processors according to the queue status, wherein the first total time is determined by the first quantity and the to-be-executed time;

[0179] The decision module determines a second processor having the shortest second total time from the plurality of processors according to the execution status, wherein the second total time is determined by the second number and the remaining execution time.

[0180] S611: The decision module sends the identifiers of the first processor and the second processor to the monitoring module.

[0181] S612: The monitoring module monitors the second processor to determine a migration instruction.

[0182] Specifically, the monitoring module can monitor the execution status of the highest priority task in the execution queue of the second processor in real time according to the identifier of the second processor, and send a migration instruction to the migration module when the highest priority task in the execution queue is fully executed.

[0183] In one implementation, the monitoring module monitors the second processor in real time and determines a first time point based on the first total time. The first time point is the moment when all the highest priority tasks in the running queue on the second processor are executed. The migration instruction includes the first time point, the task identifier to be migrated, and the first processor identifier.

[0184] S613: The monitoring module monitors and sends a migration instruction to the migration module.

[0185] S614: The migration module migrates the task with the highest priority in the waiting queue on the first processor to the second processor for execution.

[0186] Specifically, when the migration module receives a migration instruction from the monitoring module, it indicates that there is no highest priority task being executed or queued on the second processor at this time. Therefore, the migration module migrates the highest priority task in the waiting queue on the first processor to the second processor for execution at the first time point according to the migration instruction, so that the highest priority task can be executed in a timely manner.

[0187] S615: The second processor executes the task with the highest priority.

[0188] Please refer to Figure 7, which is a schematic diagram of another task migration scenario provided by an embodiment of the present application. As can be seen from Figure 7, in an operating system of a multi-core CPU, the processor includes one or more CPUs, such as CPU0, CPU1, CPU2, CPU3, CPU4, CPU5, CPU6, and CPU7. The operating system of the electronic device can allocate a task queue to each CPU. The task queue includes a runnable task queue and a waiting task queue. Tasks in the runnable task queue are being executed by the CPU, and tasks in the waiting task queue are waiting in line for execution by the CPU.

[0189] As shown in Figure 7, there are tasks with the highest priority on CPU4, CPU5, CPU6, and CPU7, and there is also a task with the highest priority waiting in line on CPU7. Therefore, in order to reduce the waiting time of the task with the highest priority, it needs to be migrated. Among them, the execution time of the task with the highest priority on CPU4 is the first time slice, the execution time of the task with the highest priority on CPU5 is the second time slice, and the execution time of the task with the highest priority on CPU6 is the third time slice. The third time slice is greater than the first time slice, and the first time slice is greater than the second time slice. Therefore, CPU5 may be the first CPU to complete the task with the highest priority. When CPU5 completes the task with the highest priority (i.e., after the second time slice), the electronic device can migrate the task waiting in line on CPU7 to CPU5 for execution, thereby reducing the response delay and improving the migration success rate.

[0190] The term "user interface (UI)" in the specification of this application refers to the media interface for interaction and information exchange between an application or operating system and a user, which realizes the conversion between the internal form of information and the form acceptable to the user. The user interface of an application is a source code written in a specific computer language such as Java and Extensible Markup Language (XML). The interface source code is parsed and rendered on the terminal device, and finally presented as content that the user can recognize, such as pictures, text, buttons and other controls. Controls, also known as widgets, are the basic elements of the user interface. Typical controls include toolbars, menu bars, text boxes, buttons, scroll bars, pictures and text. The properties and contents of controls in the interface are defined by tags or nodes, such as XML through <textview> 、 <imgview> 、 <videoview>The controls contained in the interface are specified by nodes such as <head> and <body>. A node corresponds to a control or attribute in the interface, and the node is presented as user-visible content after parsing and rendering. In addition, many applications, such as hybrid applications, usually also contain web pages in their interfaces. A web page, also known as a page, can be understood as a special control embedded in the application interface. A web page is a source code written in a specific computer language, such as hypertext markup language (HTML), cascading style sheets (CSS), JavaScript (JS), etc. The web page source code can be loaded and displayed as user-recognizable content by a browser or a web page display component with similar functions to a browser. The specific content contained in a web page is also defined by tags or nodes in the web page source code, such as HTML through <body>. 、 、 <video> 、 <canvas>To define the elements and attributes of a web page.

[0191] A common form of user interface is the graphical user interface (GUI), which refers to a user interface related to computer operations that uses graphics. It can be an icon, window, control, or other interface element displayed on the display of an electronic device. Controls can include icons, buttons, menus, tabs, text boxes, dialog boxes, status bars, navigation bars, widgets, and other visual interface elements.

[0192] It should be understood that each step in the above method embodiments provided herein can be implemented by hardware integrated logic circuits in a processor or by software instructions. The method steps disclosed in the embodiments of this application can be directly implemented as being executed by a hardware processor, or by a combination of hardware and software modules in a processor.

[0193] The present application also provides an electronic device, which may include a memory and a processor, wherein the memory may be used to store a computer program, and the processor may be used to call the computer program in the memory so that the electronic device executes the method in any one of the above embodiments.

[0194] The present application also provides a chip system, which includes at least one processor for implementing the functions involved in the method executed by the electronic device in any of the above embodiments.

[0195] In one possible design, the chip system further includes a memory, which is used to store program instructions and data, and the memory is located inside or outside the processor.

[0196] The chip system can be composed of chips, or can include chips and other discrete devices.

[0197] Optionally, there may be one or more processors in the chip system. The processor may be implemented in hardware or software. When implemented in hardware, the processor may be a logic circuit, an integrated circuit, etc. When implemented in software, the processor may be a general-purpose processor implemented by reading software code stored in a memory.

[0198] Optionally, the memory in the chip system may be one or more. The memory may be integrated with the processor or may be provided separately from the processor, which is not limited in the embodiments of the present application. For example, the memory may be a non-transient processor, such as a read-only memory (ROM), which may be integrated with the processor on the same chip or provided on different chips. The embodiments of the present application do not specifically limit the type of memory or the configuration of the memory and the processor.

[0199] Exemplarily, the chip system may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processor unit (CPU), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD) or other integrated chips.

[0200] The present application also provides a computer program product, which includes: a computer program (also referred to as code, or instruction), which, when executed, enables a computer to execute the method executed by the electronic device in any of the above embodiments.

[0201] The present application also provides a computer-readable storage medium storing a computer program (also referred to as code or instruction). When the computer program is executed, the computer executes the method executed by the electronic device in any of the above embodiments.

[0202] The various implementation modes of this application can be combined arbitrarily to achieve different technical effects.

[0203] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described herein are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated therein. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive).

[0204] Those skilled in the art will appreciate that all or part of the process steps in the above-described method embodiments can be implemented by a computer program instructing the relevant hardware. The program can be stored in a computer-readable storage medium, and when executed, the program can include the process steps in the above-described method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM or random access memory (RAM), magnetic disks, or optical disks.

[0205] In short, the above description is only an embodiment of the technical solution of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent replacements, improvements, etc. made based on the disclosure of the present invention should be included in the scope of protection of the present invention.< / canvas> < / video> < / videoview> < / imgview> < / textview>

Claims

1. A task migration method, characterized in that, Applied to an electronic device, the electronic device includes one or more processors, and the method includes: Determine a first processor and a second processor from the multiple processors, wherein the first processor corresponds to at least one waiting queue, and the second processor corresponds to at least one running queue. The waiting queue and / or the running queue are used to store tasks of multiple priorities. The tasks in the waiting queue are waiting in line for execution by the first processor, and the tasks in the running queue are being executed by the second processor; When the task with the highest priority in the running queue on the second processor finishes execution, migrate the task with the highest priority in the waiting queue on the first processor to the second processor for execution.

2. The method according to claim 1, characterized in that, When the task with the highest priority in the running queue on the second processor finishes execution, migrating the task with the highest priority in the waiting queue on the first processor to the second processor for execution includes: Determine a first time point, which is the time when all tasks with the highest priority in the running queue on the second processor finish execution; At the first time point, migrate the task with the highest priority in the waiting queue on the first processor to the second processor for execution.

3. The method according to claim 1 or 2, characterized in that, The determining a first processor and a second processor from the multiple processors includes: Monitor the resource usage of the multiple processors, and determine the queuing status and execution status of the tasks with the highest priority on the multiple processors; Determine a first processor and a second processor from the multiple processors according to the queuing status and the execution status.

4. The method according to claim 3, wherein The queuing status is used to indicate the first quantity and the waiting execution time of the tasks with the highest priority waiting in line; The execution status is used to indicate the second quantity and the remaining execution time of the tasks with the highest priority being executed.

5. The method according to claim 4, wherein The determining a first processor and a second processor from the multiple processors according to the queuing status and the execution status includes: Determine a first processor with the longest first total time from the multiple processors according to the queuing status, wherein the first total time is determined by the first quantity and the waiting execution time; Determine a second processor with the shortest second total time from the multiple processors according to the execution status, wherein the second total time is determined by the second quantity and the remaining execution time.

6. The method according to any one of claims 1-5, characterized in that, The tasks with the highest priority include tasks in interaction events related to user perception, and the tasks include one or more of processes and threads.

7. The method according to claim 6, wherein The method further includes: In response to a user operation on a first application, determine the task corresponding to the user operation; When the task is used to indicate an interaction event related to user perception, label the task as the task with the highest priority.

8. An electronic device, characterized in that, The electronic device includes: one or more processors; a memory; wherein, the memory is coupled to the one or more processors, and the memory is used to store computer program code, the computer program code includes computer instructions, and the one or more processors call the computer instructions to cause the electronic device to execute the method according to any one of claims 1-7.

9. A chip system, characterized in that, The chip system is applied to an electronic device, the chip system includes one or more processors, and the processors are used to call computer instructions to cause the electronic device to execute the method according to any one of claims 1-7.

10. A computer program product comprising instructions, characterized in that, When the computer program product runs on the electronic device, it causes the electronic device to execute the method according to any one of claims 1-7.

11. A computer-readable storage medium, comprising instructions, characterized in that, When the instruction runs on the electronic device, it causes the electronic device to execute the method according to any one of claims 1-7.

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