Display substrate and display

Abstract

A display substrate and a display. The display substrate is provided with a display area, wherein the display area comprises pixel openings. The display substrate comprises: a base, and a plurality of sub-pixels and a first signal line (10), which are arranged on the base, wherein at least one sub-pixel comprises a pixel driving circuit and a light-emitting device; the light-emitting device comprises a first electrode (20), a light-emitting layer at least partially arranged in a pixel opening, and a second electrode; the pixel driving circuit in the at least one sub-pixel is electrically connected to the first electrode of the light-emitting device, the first signal line is electrically connected to the second electrode of the light-emitting device or is electrically connected to the pixel driving circuit, and the first electrode comprises a main body portion and a connecting portion; and the first signal line (10) is at least partially located in the display area (100) and is of a mesh structure, and the orthographic projection of the main body portion of the first electrode (20) of the at least one light-emitting device on the base does not have an overlapping region with the orthographic projection of the first signal line (10) on the base.

Description

Display substrate and display device Technical Field

[0001] The present disclosure relates to, but is not limited to, the field of display, and in particular to a display substrate and a display device. Background Art

[0002] Organic Light Emitting Diodes (OLEDs) and Quantum-dot Light Emitting Diodes (QLEDs) are active light-emitting display devices with advantages such as self-luminescence, wide viewing angles, high contrast, low power consumption, extremely fast response times, thinness, flexibility, and low cost. With the continuous advancement of display technology, flexible displays using OLEDs or QLEDs as light-emitting devices and thin-film transistors (TFTs) for signal control have become mainstream products in the display field.

[0003] Summary of the Invention

[0004] The following is an overview of the subject matter described in detail in this disclosure. This overview is not intended to limit the scope of the claims.

[0005] In a first aspect, the present disclosure provides a display substrate having a display area, the display area including a pixel opening, the display substrate comprising: a substrate, and a plurality of sub-pixels and a first signal line disposed on the substrate, at least one sub-pixel comprising: a pixel driving circuit and a light-emitting device, the light-emitting device comprising: a first electrode, a light-emitting layer at least partially disposed in the pixel opening, and a second electrode; the pixel driving circuit in at least one sub-pixel is electrically connected to the first electrode of the light-emitting device; the first signal line is electrically connected to the second electrode of the light-emitting device, or is electrically connected to the pixel driving circuit;

[0006] The first electrode includes a main body portion and a connecting portion, wherein the orthographic projection of the main body portion on the substrate overlaps with the orthographic projection of the pixel opening on the substrate, and the connecting portion is used to connect the main body portion and the corresponding pixel driving circuit;

[0007] The first signal line is at least partially located in the display area and has a mesh structure. The orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate does not overlap with the orthographic projection of the first signal line on the substrate.

[0008] In an exemplary embodiment, the first signal line includes: a plurality of closed regions, and a main body portion of a first electrode of at least one light-emitting device is orthogonally projected onto a substrate within a range of an orthogonal projection of at least one closed region onto the substrate.

[0009] In an exemplary embodiment, the first signal line includes: a plurality of main signal lines, the main signal lines at least partially extend along a first direction, and the plurality of main signal lines are arranged along a second direction, and the first direction intersects with the second direction;

[0010] A plurality of connecting signal lines are disposed between adjacent main signal lines, the connecting signal lines at least partially extend along the second direction, and the plurality of connecting signal lines located between adjacent main signal lines are arranged along the first direction;

[0011] At least one connecting signal line among the plurality of connecting signal lines located between the i-th main signal line and the (i + 1)-th main signal line is respectively connected to the i-th main signal line and the (i + 1)-th main signal line, and adjacent two connecting signal lines located between the i-th main signal line and the (i + 1)-th main signal line form a first closed region with the i-th main signal line and the (i + 1)-th main signal line, where 1 ≤ i < M, and M is the number of main signal lines included in the first signal line.

[0012] In an exemplary embodiment, a main body portion of a first electrode of at least one light-emitting device is orthogonally projected onto a substrate within a range of an orthogonal projection of at least one first closed region onto the substrate.

[0013] In an exemplary embodiment, a main body portion of a first electrode of at least one light-emitting device is at least partially overlapped with an orthogonal projection of at least one main signal line onto a substrate, and there is no overlapping region with an orthogonal projection of at least one connecting signal line onto the substrate.

[0014] In an exemplary embodiment, at least one main signal line includes: a plurality of first main structures and a plurality of second main structures, the plurality of first main structures and the plurality of second main structures are alternately arranged along the first direction, and the first main structure is connected to an adjacent second main structure;

[0015] A midline along the second direction of the j-th first main structure of the i-th main signal line coincides with a midline along the second direction of the j-th first main structure of the (i + 1)-th main signal line, and a midline along the second direction of the k-th second main structure of the i-th main signal line coincides with a midline along the second direction of the k-th second main structure of the (i + 1)-th main signal line; 1 ≤ j < N, where N is the number of first main structures included in the main signal line, and 1 ≤ k < K, where K is the number of second main structures included in the main signal line;

[0016] At least one connection signal line between the ith body signal line and the (i+1)th body signal line is connected to the first body structure of the ith body signal line and the first body structure of the (i+1)th body signal line, respectively.

[0017] In an exemplary embodiment, at least one connection signal line between the i-th body signal line and the (i+1)-th body signal line and at least one connection signal line between the (i+1)-th body signal line and the (i+2)-th body signal line are arranged along the second direction.

[0018] In an exemplary embodiment, at least one main body signal line includes: a plurality of first main body structures and a plurality of second main body structures, the plurality of first main body structures and the plurality of second main body structures being alternately arranged along the first direction, the first main body structures being interconnected with adjacent second main body structures;

[0019] The maximum length of the first main structure along the second direction is greater than the maximum length of the second main structure along the second direction;

[0020] The length of the at least one connecting signal line along the second direction is smaller than the distance between the two second main body structures extending along the second direction.

[0021] In an exemplary embodiment, at least one main body signal line includes: a plurality of first main body structures and a plurality of second main body structures, the plurality of first main body structures and the plurality of second main body structures being alternately arranged along the first direction, the first main body structures being interconnected with adjacent second main body structures;

[0022] The orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate, and the orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate does not have an overlapping area with the orthographic projection of the second main structure on the substrate.

[0023] In an exemplary embodiment, at least one first body structure is an annular structure, or a solid structure;

[0024] When the at least one first main body structure is an annular structure, the first main body structure includes: a second closed area;

[0025] An orthographic projection of the main portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with an orthographic projection of the second closed region of the first body structure on the substrate.

[0026] In an exemplary embodiment, when at least one main body structure is a ring structure, the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is located within the range of the orthographic projection of the second closed area of ​​the first main body structure on the substrate, and the orthographic projection of the connecting portion of the first electrode of the at least one light-emitting device on the substrate partially overlaps with the orthographic projection of the first main body structure on the substrate;

[0027] When at least one main structure is a solid structure, the orthographic projection of the main portion of the first electrode of at least one light-emitting device on the substrate is located within the range of the orthographic projection of the first main structure on the substrate, and the orthographic projection of the connecting portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate.

[0028] In an exemplary embodiment, at least one second main body structure includes: a first connecting structure and a second connecting structure, wherein the first connecting structure and the second connecting structure extend along the first direction and are arranged along the second direction, and at least one of the first connecting structure and the second connecting structure in the at least one second main body structure is respectively connected to the two first main body structures connected to the second main body structure;

[0029] A third closed area is formed between the first connecting structure and the second connecting structure in at least one second main body structure and the two first main body structures connected to the second main body structure;

[0030] An orthographic projection of the main portion of the first electrode of at least one light-emitting device on the substrate and an orthographic projection of at least one third closed region on the substrate do not overlap with each other.

[0031] In an exemplary embodiment, the boundary of the first main structure is in one of the following shapes: polygonal, circular, or elliptical.

[0032] In an exemplary embodiment, the light-emitting device includes: a first light-emitting device, a second light-emitting device, and a third light-emitting device, the first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color, an area of ​​a first electrode of the first light-emitting device is smaller than an area of ​​a first electrode of the second light-emitting device, and an area of ​​a first electrode of the third light-emitting device is smaller than an area of ​​the first electrode of the first light-emitting device;

[0033] The light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction. The light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; the light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are arranged in a staggered manner, where 1 ≤ a < A and A is the total number of rows of the light-emitting devices;

[0034] The light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction. The light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; the light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are arranged in a staggered manner, where 1 ≤ b < B and B is the total number of columns of the light-emitting devices;

[0035] The orthographic projection of the main body portion of the first electrode of the first light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate. The orthographic projection of the main body portion of the first electrode of the second light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate. The region where the orthographic projection of the main body portion of the first electrode of the first light-emitting device on the substrate is located and the region where the orthographic projection of the main body portion of the first electrode of the second light-emitting device on the substrate is located are different first closed regions;

[0036] The orthographic projection of the main body portion of the first electrode of the third light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate, and the first main structures that overlap with the orthographic projections of the main body portions of the first electrodes of different third light-emitting devices on the substrate are different first main structures.

[0037] In an exemplary embodiment, the midline along the first direction of the main body portion of the first electrode of at least one light-emitting device is the first midline, the midline along the second direction of the main body portion of the first electrode of at least one light-emitting device is the second midline, the midline along the first direction of the first closed region or the first main structure that overlaps with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is the third midline, and the midline along the second direction of the first closed region or the first main structure that overlaps with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is the fourth midline;

[0038] The first midline coincides with the third midline, and the second midline coincides with the fourth midline.

[0039] In an exemplary embodiment, the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate does not overlap with the orthographic projection of at least one main body signal line on the substrate, and the orthographic projection on the substrate at least partially overlaps with the orthographic projection of at least one connection signal line on the substrate.

[0040] In an exemplary embodiment, the main body signal line is a solid signal line, and the connection signal line includes: a first connection line, a second connection line, and a third connection line. The first connection line and the second connection line extend along a second direction, and the third connection line extends along a first direction.

[0041] The first connection line is electrically connected to one of the main body signal lines connected by the connection signal line and the third connection line respectively, and the second connection line is electrically connected to the other main body signal line connected by the connection signal line and the third connection line respectively.

[0042] The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connection line of at least one connection signal line on the substrate.

[0043] In an exemplary embodiment, the light-emitting device includes: a first light-emitting device, a second light-emitting device, and a third light-emitting device. The first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The area of the first electrode of the first light-emitting device is smaller than the area of the first electrode of the second light-emitting device, and the area of the first electrode of the third light-emitting device is smaller than the area of the first electrode of the first light-emitting device.

[0044] The a-th row of light-emitting devices includes a plurality of third light-emitting devices arranged along the first direction. The (a + 1)-th row of light-emitting devices includes a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction. The a-th row of light-emitting devices and the (a + 1)-th row of light-emitting devices are staggered, where 1 ≤ a < A, and A is the total number of rows of light-emitting devices.

[0045] The b-th column of light-emitting devices includes a plurality of third light-emitting devices arranged along the second direction. The (b + 1)-th column of light-emitting devices includes: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction. The b-th column of light-emitting devices and the (b + 1)-th column of light-emitting devices are staggered, where 1 ≤ b < B, and B is the total number of columns of light-emitting devices.

[0046] There is no overlapping area between the orthographic projection of the main portion of the first electrode of at least one first light-emitting device, at least one second light-emitting device and at least one third light-emitting device on the substrate and the orthographic projection of at least one connecting signal line on the substrate; there is no overlapping area between the orthographic projection of the connecting portion of the first electrode of at least one first light-emitting device and at least one second light-emitting device on the substrate and the orthographic projection of the third connecting line of at least one connecting signal line on the substrate; and the orthographic projection of the connecting portion of the first electrode of at least one third light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connecting line of at least one connecting signal line on the substrate.

[0047] In an exemplary embodiment, the further comprising: a plurality of second signal lines disposed on the substrate, the pixel driving circuit of the at least one sub-pixel being electrically connected to the second signal lines;

[0048] The second signal line is at least partially located in the display area and is arranged in a different layer from the first signal line, and the second signal line at least partially extends along the second direction;

[0049] At least part of the pixel driving circuits of adjacent sub-pixels located in the same row are symmetrically arranged with respect to the second center line, the second center line extends along the second direction, the second signal lines connected to the pixel driving circuits of adjacent sub-pixels located in the same row are symmetrically arranged with respect to the second center line, and the center line of the main body of the first electrode of at least one light-emitting device extending along the second direction is the second center line.

[0050] In an exemplary embodiment, the first signal line includes one of: a first initial signal line, a second initial signal line, a first power line, or a second power line;

[0051] The second signal line includes at least one of a data signal line, a first initial signal line, a second initial signal line, a first power line, or a second power line;

[0052] The first signal line and the second signal line are different signal lines.

[0053] In an exemplary embodiment, the present invention further comprises: a plurality of first anode connection electrodes and a plurality of second anode connection electrodes disposed on the substrate and located in the display area, wherein the first signal line comprises: at least one first closed area;

[0054] The first anode connecting electrode and the second anode connecting electrode are respectively connected to the pixel driving circuit and the connecting portion of the first electrode of the light emitting device connected to the pixel driving circuit;

[0055] The plurality of first anode connecting electrodes correspond one-to-one to the plurality of second anode connecting electrodes, the orthographic projections of the first anode connecting electrodes on the substrate at least partially overlapping with the orthographic projections of the corresponding second anode connecting electrodes on the substrate, and being electrically connected to the corresponding second anode connecting electrodes;

[0056] The orthographic projections of the at least one first anode connecting electrode and the at least one second anode connecting electrode on the substrate are located within the orthographic projection range of the at least one first closed area on the substrate.

[0057] In an exemplary embodiment, when the second signal line includes a first power line, the first power line connected to the subpixel and the first power line connected to one of the adjacent subpixels are the same power line, and the first power line includes: a fourth closed area;

[0058] The orthographic projection of the main portion of the first electrode of the at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first power line on the substrate;

[0059] The orthographic projections of at least one first anode connecting electrode and at least one second anode connecting electrode on the substrate are located within the range of the orthographic projection of at least one fourth enclosed area on the substrate;

[0060] An orthographic projection of the at least one fourth closed area on the substrate at least partially overlaps with an orthographic projection of the at least one connecting signal line on the substrate.

[0061] In an exemplary embodiment, the first signal line includes: a main body signal line, the main body signal line includes: a plurality of first main body structures;

[0062] An orthographic projection of the at least one first power line on the substrate at least partially overlaps with an orthographic projection of the at least one first main body structure on the substrate.

[0063] In an exemplary embodiment, the display substrate includes: a driving structure layer and a light emitting structure layer sequentially stacked on the base, the light emitting device is located in the light emitting structure layer; the pixel driving circuit includes: at least one transistor;

[0064] The driving structure layer includes: a first conductive layer, a second conductive layer and a third conductive layer;

[0065] The first conductive layer includes: a first electrode and a second electrode of at least one transistor in at least one pixel driving circuit;

[0066] The second conductive layer includes: a second signal line and a second anode connecting electrode;

[0067] The third conductive layer includes a first signal line and a first anode connecting electrode.

[0068] In an exemplary embodiment, the first conductive layer is located on a side of at least one of the second conductive layer and the third conductive layer that is close to the substrate;

[0069] The third conductive layer is located on a side of the second conductive layer close to the substrate, or the third conductive layer is located on a side of the second conductive layer far from the substrate.

[0070] In an exemplary embodiment, the present invention further comprises: an optical structure layer, wherein the optical structure layer comprises: a plurality of filters and a black matrix structure;

[0071] The optical structure layer is located on a side of the light emitting structure layer away from the substrate;

[0072] An orthographic projection of at least one filter on the substrate at least partially overlaps with an orthographic projection of at least one pixel opening on the substrate.

[0073] In a second aspect, the present disclosure further provides a display device, comprising: the above-mentioned display substrate.

[0074] In an exemplary embodiment, the first signal line in the display substrate includes a third enclosed area, and the third enclosed area is a light-transmitting area;

[0075] The display device further includes: a plurality of photosensitive devices;

[0076] An orthographic projection of the at least one photosensitive device on the substrate at least partially overlaps with an orthographic projection of the at least one third enclosed area on the substrate.

[0077] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description.

[0078] Summary of the Figures

[0079] The accompanying drawings are used to provide an understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation to the technical solution of the present disclosure.

[0080] FIG1 is a schematic structural diagram of a display device;

[0081] FIG2 is a schematic diagram of an equivalent circuit of a pixel driving circuit;

[0082] FIG3 is a timing diagram of an operation of a pixel driving circuit;

[0083] FIG4 is a schematic diagram showing a planar structure of a display substrate;

[0084] FIG5A is a first structural diagram of a display substrate provided in an embodiment of the present disclosure;

[0085] FIG5B is a schematic structural diagram of a first signal line in the display substrate provided in FIG5A ;

[0086] FIG6A is a second structural schematic diagram of a display substrate provided in an embodiment of the present disclosure;

[0087] FIG6B is a schematic structural diagram of a first signal line in the display substrate provided in FIG6A ;

[0088] FIG7A is a third structural diagram of a display substrate provided in an embodiment of the present disclosure;

[0089] FIG7B is a schematic structural diagram of a first signal line in the display substrate provided in FIG7A ;

[0090] FIG8A is a fourth structural diagram of a display substrate provided in an embodiment of the present disclosure;

[0091] FIG8B is a schematic structural diagram of a first signal line in the display substrate provided in FIG8A ;

[0092] FIG9A is a fifth structural diagram of a display substrate provided in an embodiment of the present disclosure;

[0093] FIG9B is a schematic structural diagram of a first signal line in the display substrate provided in FIG9A ;

[0094] FIG10 is a schematic diagram showing a portion of the film layers of a substrate;

[0095] FIG11 is a second schematic diagram showing a portion of the film layers of a display substrate;

[0096] FIG12 is a third schematic diagram showing a portion of the film layer of a display substrate;

[0097] FIG13 is a fourth schematic diagram showing a portion of the film layers of the substrate.

[0098] Details

[0099] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Note that the embodiments can be implemented in a variety of different forms. A person of ordinary skill in the art can easily understand the fact that the methods and contents can be transformed into various forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. Unless there is a conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of some known functions and known components. The drawings of the embodiments of the present disclosure only involve structures related to the embodiments of the present disclosure. Other structures can refer to the general design

[0100] The scales in the figures in this disclosure are intended to serve as a reference for actual processes, but are not intended to be limiting. For example, the channel width-to-length ratio, the thickness and spacing of the various film layers, and the width and spacing of the various signal lines can be adjusted based on actual needs. The number of pixels in the display substrate and the number of sub-pixels within each pixel are not limited to the numbers shown in the figures. The figures described in this disclosure are merely schematic diagrams of the structures, and one embodiment of this disclosure is not limited to the shapes or values ​​shown in the figures.

[0101] In this specification, ordinal numbers such as “first”, “second” and “third” are provided to avoid confusion among constituent elements, and are not intended to limit the number.

[0102] In this specification, for convenience, words and phrases indicating orientation or positional relationships, such as "middle," "upper," "lower," "front," "back," "vertical," "horizontal," "top," "bottom," "inside," and "outside," are used to illustrate the positional relationships of constituent elements with reference to the accompanying drawings. This is merely for the purpose of facilitating the description of this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limiting the present disclosure. The positional relationships of constituent elements may be appropriately changed depending on the direction in which each constituent element is described. Therefore, the present disclosure is not limited to the words and phrases described in the specification and may be appropriately replaced according to the circumstances.

[0103] In this specification, unless otherwise specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed, removable, or integral connections; mechanical or electrical connections; direct connections, indirect connections through intermediaries, or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this disclosure.

[0104] In this specification, a transistor refers to a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to the region through which current primarily flows.

[0105] In this specification, the first electrode can be a drain electrode and the second electrode can be a source electrode, or vice versa. The functions of "source electrode" and "drain electrode" may be interchanged when using transistors with opposite polarity or when the direction of current changes during circuit operation. Therefore, in this specification, "source electrode" and "drain electrode" may be interchanged.

[0106] In this specification, "electrically connected" includes components connected together via an element having some electrical function. There are no particular limitations on the "element having some electrical function" as long as it enables the transfer of electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.

[0107] In this specification, "parallel" refers to a state where the angle formed by two straight lines is greater than -10° and less than 10°, and thus also includes a state where the angle is greater than -5° and less than 5°. Furthermore, "perpendicular" refers to a state where the angle formed by two straight lines is greater than 80° and less than 100°, and thus also includes a state where the angle is greater than 85° and less than 95°.

[0108] In this specification, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced with "conductive film." Similarly, "insulating film" may be replaced with "insulating layer."

[0109] In this specification, the term "same-layer arrangement" refers to a structure formed by patterning two (or more) structures using the same patterning process. The materials of these structures can be the same or different. For example, the precursor materials for forming the multiple structures arranged in the same layer can be the same, and the materials of the final structures can be the same or different.

[0110] The triangles, rectangles, trapezoids, pentagons or hexagons in this specification are not in the strict sense, but may be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

[0111] The term "about" in the present disclosure refers to a numerical value that is not strictly defined and allows for process and measurement errors.

[0112] Figure 1 is a schematic diagram of the structure of a display device. As shown in Figure 1, the display device may include a timing controller, a data driver, a scan driver, a light-emitting driver, and a pixel array. The timing controller is respectively connected to the data driver, the scan driver, and the light-emitting driver. The data driver is respectively connected to multiple data signal lines (D1 to Dn), the scan driver is respectively connected to multiple scan signal lines (S1 to Sm), and the light-emitting driver is respectively connected to multiple light-emitting signal lines (E1 to Eo). The pixel array may include multiple sub-pixels Pxij, where i and j can be natural numbers. At least one sub-pixel Pxij may include a circuit unit and a light-emitting device connected to the circuit unit. The circuit unit may include a pixel driving circuit, and the pixel driving circuit may be respectively connected to the scan signal lines, the light-emitting signal lines, and the data signal lines.

[0113] In an exemplary embodiment, the timing controller may provide grayscale values ​​and control signals suitable for the specifications of the data driver to the data driver; may provide clock signals, scan start signals, etc. suitable for the specifications of the scan driver to the scan driver; and may provide clock signals, emission stop signals, etc. suitable for the specifications of the light emitting driver to the light emitting driver. The data driver may use the grayscale values ​​and control signals received from the timing controller to generate data voltages to be provided to the data signal lines D1, D2, D3, ..., and Dn. For example, the data driver may sample grayscale values ​​using the clock signal and apply data voltages corresponding to the grayscale values ​​to the data signal lines D1 to Dn on a pixel row basis, where n may be a natural number. The scan driver may generate scan signals to be provided to the scan signal lines S1, S2, S3, ..., and Sm by receiving clock signals, scan start signals, etc. from the timing controller. For example, the scan driver may sequentially provide scan signals having on-level pulses to the scan signal lines S1 to Sm. For example, the scan driver can be constructed in the form of a shift register and can generate a scan signal by sequentially transmitting a scan start signal provided in the form of an on-level pulse to the next stage circuit under the control of a clock signal, and m can be a natural number. The light-emitting driver can generate an emission signal to be provided to the light-emitting signal lines EM1, E2, E3, ... and Eo by receiving a clock signal, an emission stop signal, etc. from a timing controller. For example, the light-emitting driver can sequentially provide an emission signal with an off-level pulse to the light-emitting signal lines EM1 to Eo. For example, the light-emitting driver can be constructed in the form of a shift register and can generate an emission signal by sequentially transmitting an emission stop signal provided in the form of an off-level pulse to the next stage circuit under the control of a clock signal, and o can be a natural number.

[0114] At least one subpixel includes a pixel driver circuit and a light-emitting device. The pixel driver circuit in the subpixel is respectively connected to a scan signal line, a data signal line, and a light-emitting signal line. The pixel driver circuit is configured to receive a data voltage transmitted by the data signal line under the control of the scan signal line and the light-emitting signal line, and output a corresponding current to the light-emitting device. The light-emitting device in the subpixel is respectively connected to the pixel driver circuit of the subpixel in which it is located. The light-emitting device is configured to emit light of corresponding brightness in response to the current output by the pixel driver circuit of the subpixel in which it is located.

[0115] FIG2 is a schematic diagram of an equivalent circuit of a pixel driving circuit. In an exemplary embodiment, the pixel driving circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C, or 8T1C structure. As shown in FIG4 , the pixel driving circuit may include seven transistors (a first transistor T1 to a seventh transistor T7) and a capacitor C. The pixel driving circuit may be connected to eight signal lines (a data signal line Data, a scan signal line Gate, a reset signal line Reset, an emission signal line EM, a first initial signal line INIT1, a second initial signal line INIT2, a first power line VDD, and a second power line VSS).

[0116] In an exemplary embodiment, the pixel driving circuit may include a first node N1, a second node N2, and a third node N3. The first node N1 is connected to the first electrode of the third transistor T3, the second electrode of the fourth transistor T4, and the second electrode of the fifth transistor T5, respectively. The second node N2 is connected to the second electrode of the first transistor T1, the first electrode of the second transistor T2, the control electrode of the third transistor T3, and the second end of the capacitor C, respectively. The third node N3 is connected to the second electrode of the second transistor T2, the second electrode of the third transistor T3, and the first electrode of the sixth transistor T6, respectively.

[0117] In an exemplary embodiment, a first end of the capacitor C is connected to the first power line VDD, and a second end of the capacitor C is connected to the second node N2 , ie, the second end of the capacitor C is connected to the control electrode of the third transistor T3 .

[0118] The control electrode of the first transistor T1 is connected to the reset signal line Reset, the first electrode of the first transistor T1 is connected to the first initialization signal line INIT1, and the second electrode of the first transistor is connected to the second node N2. When the on-level scan signal is applied to the reset signal line Reset, the first transistor T1 transmits an initialization voltage to the control electrode of the third transistor T3, thereby initializing the charge amount of the control electrode of the third transistor T3.

[0119] The control electrode of the second transistor T2 is connected to the scan signal line Gate, the first electrode of the second transistor T2 is connected to the second node N2, and the second electrode of the second transistor T2 is connected to the third node N3. When an on-level scan signal is applied to the scan signal line Gate, the second transistor T2 connects the control electrode of the third transistor T3 to the second electrode.

[0120] The control electrode of the third transistor T3 is connected to the second node N2, that is, the control electrode of the third transistor T3 is connected to the second end of the capacitor C. The first electrode of the third transistor T3 is connected to the first node N1, and the second electrode of the third transistor T3 is connected to the third node N3. The third transistor T3 can be called a driving transistor. The third transistor T3 determines the magnitude of the driving current flowing between the first power line VDD and the second power line VSS based on the potential difference between the control electrode and the first electrode.

[0121] A control electrode of the fourth transistor T4 is connected to the scan signal line Gate, a first electrode of the fourth transistor T4 is connected to the data signal line Data, and a second electrode of the fourth transistor T4 is connected to the first node N1. The fourth transistor T4 can be called a switching transistor, a scan transistor, etc. When an on-level scan signal is applied to the scan signal line Gate, the fourth transistor T4 inputs a data voltage of the data signal line Data into the pixel driving circuit.

[0122] The control electrode of the fifth transistor T5 is connected to the light-emitting signal line EM, the first electrode of the fifth transistor T5 is connected to the first power line VDD, and the second electrode of the fifth transistor T5 is connected to the first node N1. The control electrode of the sixth transistor T6 is connected to the light-emitting signal line EM, the first electrode of the sixth transistor T6 is connected to the third node N3, and the second electrode of the sixth transistor T6 is connected to the first electrode of the light-emitting device. The fifth transistor T5 and the sixth transistor T6 can be referred to as light-emitting transistors. When an on-level light-emitting signal is applied to the light-emitting signal line EM, the fifth transistor T5 and the sixth transistor T6 form a drive current path between the first power line VDD and the second power line VSS, thereby causing the light-emitting device to emit light.

[0123] A control electrode of the seventh transistor T7 is connected to the scan signal line Gate or the reset signal line Reset, a first electrode of the seventh transistor T7 is connected to the second initial signal line INIT2, and a second electrode of the seventh transistor T7 is connected to the first electrode of the light-emitting device L. When an on-level scan signal is applied to the scan signal line Gate or the reset signal line Reset, the seventh transistor T7 transmits an initialization voltage to the first electrode of the light-emitting device to initialize or release the charge accumulated in the first electrode of the light-emitting device.

[0124] In an exemplary embodiment, the second electrode of the light-emitting device is connected to a second power line VSS. The signal of the second power line VSS is a low-level signal, while the signal of the first power line VDD is a continuously high-level signal. The scan signal line Gate is a scan signal line in the pixel driving circuit of the current display row, and the reset signal line Reset is a scan signal line in the pixel driving circuit of the previous display row. The reset signal line Reset of the current display row is the same signal line as the scan signal line Gate in the pixel driving circuit of the previous display row. This can reduce the number of signal lines on the display substrate and achieve a narrow bezel on the display substrate.

[0125] Transistors can be divided into N-type transistors and P-type transistors according to their characteristics. When the transistor is a P-type transistor, the turn-on voltage is a low-level voltage (e.g., 0V, -5V, -10V, or other suitable voltages), and the turn-off voltage is a high-level voltage (e.g., 5V, 10V, or other suitable voltages). When the transistor is an N-type transistor, the turn-on voltage is a high-level voltage (e.g., 5V, 10V, or other suitable voltages), and the turn-off voltage is a low-level voltage (e.g., 0V, -5V, -10V, or other suitable voltages).

[0126] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 may be a P-type transistor or an N-type transistor. Using the same type of transistors in the pixel driving circuit can simplify the process flow, reduce the manufacturing difficulty of the display panel, and improve the product yield. In some possible implementations, the first transistor T1 to the seventh transistor T7 may include P-type transistors and N-type transistors.

[0127] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 may be low-temperature polysilicon thin-film transistors, or oxide thin-film transistors, or both. The active layer of the low-temperature polysilicon thin-film transistor is made of low-temperature polysilicon (LTPS), and the active layer of the oxide thin-film transistor is made of oxide semiconductor (Oxide). Low-temperature polysilicon thin-film transistors have advantages such as high mobility and fast charging, while oxide thin-film transistors have advantages such as low leakage current. Integrating low-temperature polysilicon thin-film transistors and oxide thin-film transistors on a display substrate to form a low-temperature polycrystalline oxide (LTPO) display substrate can leverage the advantages of both, enabling low-frequency driving, reducing power consumption, and improving display quality.

[0128] In an exemplary embodiment, the scan signal line Gate, the reset signal line Reset, and the emission signal line EM may extend in a horizontal direction.

[0129] In an exemplary embodiment, the light emitting device L may be an organic light emitting diode (OLED) including a first electrode (anode), an organic light emitting layer, and a second electrode (cathode) stacked.

[0130] In an exemplary embodiment, the organic light-emitting layer may include an emissive layer (EML) and any one or more of the following layers: a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL). In an exemplary embodiment, one or more of the hole injection layer, hole transport layer, electron blocking layer, hole blocking layer, electron transport layer, and electron injection layer of all sub-pixels may be a common layer connected together, and the emissive layers of adjacent sub-pixels may have a small overlap or may be isolated.

[0131] In an exemplary embodiment, the capacitor can be a capacitor device made by a process. For example, the capacitor device can be realized by making a special capacitor electrode, and the multiple capacitor electrodes of the capacitor can be realized by a metal layer, a semiconductor layer (such as doped polysilicon), etc. Alternatively, the capacitor can be a parasitic capacitance between multiple devices, which can be realized by the transistor itself and other devices and circuits. The connection method of the capacitor includes but is not limited to the method described above, and can be other applicable connection methods, and the level of the corresponding node can be stored. Here, the exemplary embodiment of the present disclosure is not limited to this.

[0132] Figure 3 is an operating timing diagram of a pixel driving circuit. The following illustrates exemplary embodiments of the present disclosure using the operating process of the pixel driving circuit illustrated in Figure 2. The pixel driving circuit in Figure 2 includes seven transistors (first transistor T1 to seventh transistor T7) and one capacitor C. All seven transistors are P-type transistors.

[0133] In an exemplary embodiment, taking the case where the control electrode of the seventh transistor T7 is electrically connected to the scanning signal line Gate as an example, the operation process of the pixel driving circuit may include:

[0134] The first phase A1 is called the reset phase. The signal on the reset signal line Reset is a low-level signal, while the signals on the scanning signal line Gate and the emission signal line EM are high-level signals. The low-level signal on the reset signal line Reset turns on the first transistor T1. The signal on the first initialization signal line INIT1 is supplied to the second node N2, initializing (resetting) the capacitor C and clearing the existing charge in the capacitor. The high-level signals on the scanning signal line Gate and the emission signal line EM turn off the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7. During this phase, the light-emitting device L does not emit light.

[0135] In the second phase A2, known as the data writing phase or threshold compensation phase, the signal on the scan signal line Gate is a low-level signal, the signals on the reset signal line Reset and the luminescence signal line EM are high-level signals, and the data signal line Data outputs a data voltage. During this phase, because the signal on the second terminal of capacitor C is a low-level signal, the third transistor T3 is turned on. The low-level signal on the scan signal line Gate turns on the second transistor T2, the fourth transistor T4, and the seventh transistor T7. The second and fourth transistors T2 and T4 are turned on, causing the data voltage output by the data signal line Data to be supplied to the second node N2 via the first node N1, the turned-on third transistor T3, the third node N3, and the turned-on second transistor T2. The difference between the data voltage output by the data signal line Data and the threshold voltage of the third transistor T3 is then charged into capacitor C. The voltage at the second terminal of capacitor C (second node N2) is Vdata - |Vth|, where Vdata is the data voltage output by the data signal line Data and Vth is the threshold voltage of the third transistor T3. The seventh transistor T7 is turned on, so that the initial voltage of the second initial signal line INIT2 is supplied to the first electrode of the light-emitting device L, initializing (resetting) the first electrode of the light-emitting device L, clearing the pre-stored voltage therein, completing the initialization, and ensuring that the light-emitting device L does not emit light. The signal of the reset signal line Reset is a high-level signal, turning off the first transistor T1. The signal of the emission signal line EM is a high-level signal, turning off the fifth transistor T5 and the sixth transistor T6.

[0136] In the third phase A3, referred to as the light-emitting phase, the signal on the light-emitting signal line EM is a low-level signal, while the signals on the scanning signal line Gate and the reset signal line Reset are high-level signals. The low-level signal on the light-emitting signal line EM turns on the fifth transistor T5 and the sixth transistor T6. The power supply voltage output from the first power supply line VDD provides a driving voltage to the first electrode of the light-emitting device L through the turned-on fifth transistor T5, third transistor T3, and sixth transistor T6, driving the light-emitting device L to emit light.

[0137] During the driving process of the pixel driving circuit, the driving current flowing through the third transistor T3 (driving transistor) is determined by the voltage difference between its gate electrode and the first electrode. Since the voltage of the second node N2 is Vdata-|Vth|, the driving current of the third transistor T3 is: I=K*(Vgs-Vth) 2 =K*[(Vdd-Vdata+|Vth|)-Vth] 2 =K*(Vdd-Vdata) 2

[0138] Wherein, I is the driving current flowing through the third transistor T3, that is, the driving current driving the light-emitting device L, K is a constant, Vgs is the voltage difference between the gate electrode and the first electrode of the third transistor T3, Vth is the threshold voltage of the third transistor T3, and Vdd is the power supply voltage output by the first power line VDD.

[0139] It can be seen from the derivation results of the above current formula that in the light-emitting stage, the driving current of the third transistor T3 is no longer affected by the threshold voltage of the third transistor T3, thereby eliminating the influence of the threshold voltage of the third transistor T3 on the driving current, ensuring uniform display brightness of the display product and improving the display effect of the entire display product.

[0140] The flatness of the anode of at least one light-emitting device in the display substrate is not high, which causes color cast on the display substrate, thereby affecting the display effect of the display substrate.

[0141] Figure 4 is a schematic diagram of the planar structure of the display substrate. Figure 5A is a schematic diagram of the structure of the display substrate provided in an embodiment of the present disclosure, Figure 6A is a schematic diagram of the structure of the display substrate provided in an embodiment of the present disclosure, Figure 7A is a schematic diagram of the structure of the display substrate provided in an embodiment of the present disclosure, Figure 8A is a schematic diagram of the structure of the display substrate provided in an embodiment of the present disclosure, and Figure 9A is a schematic diagram of the structure of the display substrate provided in an embodiment of the present disclosure. As shown in Figure 4, the display substrate provided in an embodiment of the present disclosure has a display area 100, and the display area includes a pixel opening. The display substrate includes: a substrate and a plurality of sub-pixels (not shown in the figure) and a first signal line 10 arranged on the substrate. At least one sub-pixel includes: a pixel driving circuit and a light-emitting device. Among them, the pixel opening is an effective light-emitting area.

[0142] As shown in Figures 5A to 9A, the light-emitting device includes a first electrode 20, a light-emitting layer at least partially disposed within the pixel opening, and a second electrode. A pixel driver circuit in at least one sub-pixel is electrically connected to the first electrode 20 of the light-emitting device. A first signal line 10 is electrically connected to the second electrode 20 of the light-emitting device, or to the pixel driver circuit.

[0143] In an exemplary embodiment, as shown in Figures 5A to 9A , the first electrode 20 of the light-emitting device includes a main portion 210 and a connecting portion 220. Exemplarily, the main portion 210 of the first electrode 20 of the light-emitting device refers to the portion of the first electrode 20 of the light-emitting device corresponding to the pixel opening, and the area of ​​the main portion of the first electrode 20 of the light-emitting device is larger than the area of ​​the pixel opening. The main portion 210 of the first electrode 20 of the light-emitting device is the portion indicated by the dashed box in Figures 5A to 9A .

[0144] In an exemplary embodiment, an orthographic projection of the main body portion 210 on the substrate overlaps with an orthographic projection of the pixel opening on the substrate, and the connecting portion 220 is used to connect the main body portion and the corresponding pixel driving circuit.

[0145] In which, in an exemplary embodiment, the shape of the main body 210 of at least one light-emitting device can be the same as the shape of the pixel opening. Exemplarily, the shape of the main body 210 of at least one light-emitting device can be square, circular or elliptical, and the shape of the connecting portion 220 of at least one light-emitting device can be polygonal. Exemplarily, the shape of the connecting portion 220 of at least one light-emitting device can be rectangular, and the corners of the rectangle can be chamfered.

[0146] In an exemplary embodiment, as shown in Figures 5A to 9A , the first signal line 10 is at least partially located in the display area 100 and has a mesh structure, and the orthographic projection of the main portion of the first electrode 20 of at least one light-emitting device on the substrate does not overlap with the orthographic projection of the first signal line 10 on the substrate. Figures 5A to 9A illustrate the film layer where the first signal line is located and the film layer where the first electrode of the light-emitting device is located.

[0147] In an exemplary embodiment, as shown in Figures 5A to 9A, the light-emitting device includes a first light-emitting device, a second light-emitting device, and a third light-emitting device. The first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The area of ​​the first electrode 21 of the first light-emitting device is smaller than the area of ​​the first electrode 22 of the second light-emitting device, and the area of ​​the first electrode 23 of the third light-emitting device is smaller than the area of ​​the first electrode 21 of the first light-emitting device.

[0148] In an exemplary embodiment, the main body of the first electrode 21 of the first light-emitting device is the portion marked by the dotted box in the first electrode 21 of the first light-emitting device, the main body of the first electrode 22 of the second light-emitting device is the portion marked by the dotted box in the first electrode 22 of the second light-emitting device, and the main body of the first electrode 23 of the third light-emitting device is the portion marked by the dotted box in the first electrode 23 of the third light-emitting device.

[0149] In an exemplary embodiment, the area of the main body portion of the first electrode 21 of the first light-emitting device is smaller than the area of the main body portion of the first electrode 22 of the second light-emitting device, and the area of the main body portion of the first electrode 23 of the third light-emitting device is smaller than the area of the main body portion of the first electrode 21 of the first light-emitting device.

[0150] In an exemplary embodiment, the first color, the second color, and the third color are different colors and are one of red, blue, and green. Exemplarily, the first color may be red, the second color may be blue, and the third color may be green.

[0151] In an exemplary embodiment, the light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction D1, the light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction D1, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction D1; the light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are staggered, 1 ≤ a < A, where A is the total number of rows of the light-emitting devices; the light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction D2, the light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction D2, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction D1; the light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are staggered, 1 ≤ b < B, where B is the total number of columns of the light-emitting devices.

[0152] In an exemplary embodiment, the first direction D1 and the second direction D2 intersect. Among them, the included angle between the first direction D1 and the second direction D2 may be 70 degrees to 90 degrees. Exemplarily, the included angle between the first direction D1 and the second direction D2 is 90 degrees.

[0153] In an exemplary embodiment, the display substrate includes: a plurality of pixel units, and at least one pixel unit includes: one first light-emitting device, one second light-emitting device, and two third light-emitting devices.

[0154] In an exemplary embodiment, the substrate may be a flexible substrate or a rigid substrate. The rigid substrate may include, but is not limited to, one or more of glass and quartz, and the flexible substrate may be, but is not limited to, one or more of polyethylene terephthalate, polyethylene terephthalate, polyether ether ketone, polystyrene, polycarbonate, polyarylate, polyarylate, polyimide, polyvinyl chloride, polyethylene, and textile fibers.

[0155] In a plane parallel to the display substrate, the display substrate may further include: a binding area 200 and a border area (not shown in the figure). The border area is provided on at least one side of the display area. The border area may include a gate drive circuit. The binding area 200 is located on one side of the display area 100 and may include a first fan-out area, a bending area, a second fan-out area, a driver chip area, and a binding pin area, which are sequentially arranged in a direction away from the display area. The first fan-out area includes at least data fan-out lines, wherein the plurality of data fan-out lines are configured to connect to the data signal lines of the display area in a fan-out routing manner. The bending area may include a composite insulating layer provided with grooves, configured to bend the binding area to the back of the display area. The second fan-out area may include a plurality of data fan-out lines extending in a fan-out routing manner. The anti-static area may include an anti-static circuit configured to prevent electrostatic damage to the display substrate by eliminating static electricity. The driver chip area may include an integrated circuit (IC) configured to connect to the plurality of data fan-out lines. The binding pin area may include a binding pad configured to be bound and connected to an external flexible printed circuit (FPC).

[0156] In an exemplary embodiment, the first signal line 10 may provide a constant voltage signal.

[0157] In exemplary embodiments, the first signal line 10 may be a first power line VDD, or may be a second power line VSS, or may be a first initial signal line INIT1 , or may be a second initial signal line INIT2 .

[0158] In the display substrate provided by the embodiment of the present disclosure, the first signal line has a mesh structure, which can reduce the voltage drop of the first signal line, improve the image quality of the display substrate and reduce the power consumption of the display substrate. In addition, in the present disclosure, the orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate and the orthographic projection of the first signal line on the substrate do not have an overlapping area, which means that the first signal line avoids the first electrode of at least one light-emitting device, which can improve the flatness of the first electrode of at least one light-emitting device, thereby improving the color cast phenomenon of the display substrate and improving the display effect of the display substrate.

[0159] In an exemplary embodiment, as shown in Figures 5A to 9A, the first signal line 10 may include: a plurality of closed regions R, and the orthographic projection of the main portion 210 of the first electrode 20 of at least one light-emitting device on the substrate is located within the range of the orthographic projection of at least one closed region R on the substrate.

[0160] In an exemplary embodiment, FIG. 5B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 5A, FIG. 6B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 6A, FIG. 7B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 7A, FIG. 8B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 8A, and FIG. 9B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 9A. As shown in FIGS. 5B to 9B, the first signal line 10 may include: a plurality of main signal lines 11, the main signal lines 11 at least partially extend along the first direction D1, and the plurality of main signal lines 11 are arranged along the second direction D2. A plurality of connecting signal lines 12 are provided between adjacent main signal lines 11, the connecting signal lines 12 at least partially extend along the second direction D2, and the plurality of connecting signal lines 12 located between adjacent main signal lines 11 are arranged along the first direction D1.

[0161] As shown in FIGS. 5B to 9B, at least one of the plurality of connecting signal lines 12 between the i-th main signal line and the (i + 1)-th main signal line is respectively connected to the i-th main signal line 11 and the (i + 1)-th main signal line 11, and an adjacent two connecting signal lines 12 between the i-th main signal line 11 and the (i + 1)-th main signal line 11 form a first closed region R1 with the i-th main signal line 11 and the (i + 1)-th main signal line 11, where 1 ≤ i < M, and M is the number of main signal lines 11 included in the first signal line.

[0162] In an exemplary embodiment, the boundary of the first closed region R1 may be a polygon, and chamfers may be provided at the corners of the polygon. The present disclosure does not make any limitation thereto.

[0163] In an exemplary embodiment, in the display substrate provided in FIGS. 5A to 9A, the orthographic projection of the main part 210 of the first electrode 20 of at least one light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region R1 on the substrate. FIGS. 5A to 7A are described by taking the orthographic projection of the main part 210 of the first electrode 20 of one light-emitting device on the substrate being within the range of the orthographic projection of one first closed region R1 on the substrate as an example, FIG. 8A is described by taking the orthographic projection of the main parts 210 of the first electrodes 20 of two light-emitting devices on the substrate being within the range of the orthographic projection of one first closed region R1 on the substrate as an example, and FIG. 9A is described by taking the orthographic projection of the main parts 210 of the first electrodes 20 of four light-emitting devices on the substrate being within the range of the orthographic projection of one first closed region R1 on the substrate as an example. The present disclosure does not make any limitation thereto.

[0164] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate at least partially overlaps the orthographic projection of at least one main body signal line 11 on the substrate, and there is no overlapping area with the orthographic projection of at least one connection signal line 12 on the substrate.

[0165] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, at least one main body signal line 11 includes: a plurality of first main body structures 111 and a plurality of second main body structures 112, the plurality of first main body structures 111 and the plurality of second main body structures 112 are alternately arranged along the first direction D1, and the first main body structure 111 is connected to the adjacent second main body structure 112. Among them, the center line of the j-th first main body structure 111 of the i-th main body signal line 11 extending along the second direction D2 coincides with the center line of the j-th first main body structure 111 of the (i + 1)-th main body signal line 11 extending along the second direction D2, and the center line of the k-th second main body structure 112 of the i-th main body signal line 11 extending along the second direction D2 coincides with the center line of the k-th second main body structure 112 of the (i + 1)-th main body signal line 11 extending along the second direction D2; 1 ≤ j < N, N is the number of first main body structures 111 included in the main body signal line 11, 1 ≤ k < K, and K is the number of second main body structures 112 included in the main body signal line 11.

[0166] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, at least one connection signal line 12 between the i-th main body signal line 11 and the (i + 1)-th main body signal line 11 is respectively connected to the first main body structure 111 of the i-th main body signal line 11 and the first main body structure 111 of the (i + 1)-th main body signal line 11.

[0167] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, at least one connection signal line 12 located between the i-th main body signal line 11 and the (i + 1)-th main body signal line 11 and at least one connection signal line 12 located between the (i + 1)-th main body signal line 11 and the (i + 2)-th main body signal line 11 are arranged along the second direction D2.

[0168] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, a plurality of first closed regions R1 are arranged in a matrix along the first direction D1 and the second direction D2.

[0169] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, the maximum length L1 of the first main body structure 111 along the second direction D2 is greater than the maximum length L2 of the second main body structure 112 along the second direction D2.

[0170] In an exemplary embodiment, in the display substrates provided in FIG. 5A , FIG. 6A , and FIG. 7A , a length L3 of at least one connection signal line 12 along the second direction D2 is smaller than a distance L4 between two second body structures 112 extending along the second direction D2 .

[0171] In an exemplary embodiment, in the display substrate provided in Figures 5A, 6A and 7A, the orthographic projection of the main body 210 of the first electrode 20 of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure 111 on the substrate, and the orthographic projection of the main body 210 of the first electrode 20 of at least one light-emitting device on the substrate and the orthographic projection of the second main structure 112 on the substrate do not have an overlapping area.

[0172] In an exemplary embodiment, in the display substrate provided in Figures 5A, 6A and 7A, at least one second main body structure 112 includes: a first connecting structure 112A and a second connecting structure 112B, the first connecting structure 112A and the second connecting structure 112B extend along the first direction D1 and are arranged along the second direction D2, and at least one of the first connecting structure 112A and the second connecting structure 112B in at least one second main body structure 112 is respectively connected to the two first main body structures 111 to which the second main body structure 112 is connected.

[0173] In an exemplary embodiment, in the display substrate provided in Figures 5A, 6A and 7A, a third closed area R3 is formed between the first connection structure 112A and the second connection structure 112B in at least one second main structure 112 and the two first main structures 111 to which the second main structure 112 is connected.

[0174] In an exemplary embodiment, in the display substrate provided in FIG. 5A , FIG. 6A , and FIG. 7A , a plurality of third closed regions R3 are arranged in a matrix along the first direction D1 and the second direction D2 .

[0175] There is no overlapping area between the orthographic projection of the main portion 210 of the first electrode 20 of at least one light-emitting device on the substrate and the orthographic projection of at least one third closed region R3 on the substrate.

[0176] The multiple enclosed areas of the first signal line in the display substrate provided in FIG5A include: multiple first enclosed areas R1, multiple second enclosed areas R2, and multiple third enclosed areas R3. The multiple enclosed areas of the first signal line in the display substrate provided in FIG6A and FIG6B include: multiple first enclosed areas R1 and multiple third enclosed areas R3.

[0177] In an exemplary embodiment, at least one first main structure 111 is an annular structure or a solid structure. FIG5A illustrates the display substrate using an example in which the first main structure 111 is an annular structure, i.e., a hollow structure. FIG6A and FIG7A illustrate the display substrate using an example in which the first main structure 111 is a solid structure.

[0178] In an exemplary embodiment, in the display substrate provided in FIG. 5A , when at least one first body structure 111 is a ring-shaped structure, the first body structure 111 includes a second enclosed region R2. The orthographic projection of the main portion 210 of the first electrode 20 of the at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the second enclosed region R2 of the first body structure 111 on the substrate.

[0179] In an exemplary embodiment, in the display substrate provided in FIG. 5A , a plurality of second closed regions R2 are arranged in a matrix along the first direction D1 and the second direction D2 .

[0180] In an exemplary embodiment, in the display substrate provided in FIG. 5A , when at least one main structure is a ring-shaped structure, the orthographic projection of the main portion 210 of the first electrode 20 of the at least one light-emitting device on the substrate is located within the orthographic projection of the second enclosed region R2 of the first main structure 111 on the substrate, and the orthographic projection of the connection portion 220 of the first electrode 20 of the at least one light-emitting device on the substrate partially overlaps with the orthographic projection of the first main structure 111 on the substrate. In the present disclosure, the orthographic projection of the main portion 210 of the first electrode 20 of the at least one light-emitting device on the substrate being located within the orthographic projection of the second enclosed region R2 of the first main structure 111 on the substrate ensures that no structure of the first signal line is disposed below the main portion of the first electrode of the at least one light-emitting device, thereby improving the flatness of the first electrode of the light-emitting device.

[0181] In exemplary embodiments, in the display substrates provided in Figures 6A and 7A, when at least one main structure is a solid structure, the orthographic projection of the main portion 220 of the first electrode 20 of the at least one light-emitting device on the substrate is located within the orthographic projection of the first main structure 111 on the substrate, and the orthographic projection of the connecting portion 210 of the first electrode 20 of the at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure 111 on the substrate. In the present disclosure, the orthographic projection of the main portion 210 of the first electrode 20 of the at least one light-emitting device on the substrate being located within the orthographic projection of the second enclosed region R2 of the first main structure 111 on the substrate ensures that the first signal line is located below the main portion of the first electrode of the at least one light-emitting device, thereby improving the flatness of the first electrode of the light-emitting device.

[0182] In an exemplary embodiment, the boundary of the first main structure 111 is in the shape of a polygon, a circle, or an ellipse. The display substrate provided in FIG6A is illustrated by taking the boundary of the first main structure 111 as a polygon, and the angle of the polygon can be set as a chamfer as an example, and the display substrate provided in FIG7A is illustrated by taking the boundary of the first main structure 111 as an example. When the boundary of the first main structure 111 is a circle, the first main structure 111 has the same shape as the main body of the first electrode of at least one light-emitting device. In the present disclosure, the first main structure 111 has the same shape as the main body of the first electrode of at least one light-emitting device, which can reduce the influence of the film layer where the first signal line is located on the light transmittance.

[0183] In an exemplary embodiment, in the display substrates provided in FIG. 5A , FIG. 6A and FIG. 7A , the orthographic projection of the main portion 210 of the first electrode of the first light emitting device 21 on the substrate is located within the range of the orthographic projection of at least one first closed region R1 on the substrate.

[0184] In an exemplary embodiment, in the display substrates provided in FIG. 5A , FIG. 6A and FIG. 7A , the orthographic projection of the main portion 210 of the first electrode of the second light emitting device 22 on the substrate is located within the range of the orthographic projection of at least one first closed region R1 on the substrate.

[0185] In an exemplary embodiment, in the display substrate provided in Figures 5A, 6A and 7A, the area where the orthographic projection of the main body 210 of the first electrode of the first light-emitting device 21 is located on the substrate and the area where the orthographic projection of the main body 210 of the first electrode of the second light-emitting device 22 is located on the substrate are different first closed areas.

[0186] In an exemplary embodiment, in the display substrate provided in Figures 5A, 6A and 7A, the orthographic projection of the main body 210 of the first electrode of the third light-emitting device 23 on the substrate at least partially overlaps with the orthographic projection of the first main structure 111 on the substrate, and the first main structure 111 overlapped with the orthographic projection of the main body 210 of the first electrode of a different third light-emitting device 23 on the substrate is a different first main structure 111.

[0187] In exemplary embodiments, in the display substrates provided in FIG5A, FIG6A, and FIG7A, a midline extending along the first direction D1 of a main body portion of at least one light-emitting device is a first midline O1, a midline extending along the second direction D2 of the main body portion of at least one light-emitting device is a second midline O2, a midline extending along the first direction D1 of a first enclosed region R1 or a midline of the first body structure 111 overlapping with an orthographic projection of the main body portion of the at least one light-emitting device on the substrate is a third midline O3, and a midline extending along the second direction D2 of the first enclosed region R1 or a midline of the first body structure 111 overlapping with an orthographic projection of the main body portion of the at least one light-emitting device on the substrate is a fourth midline O4. The first midline O1 coincides with the third midline O3, and the second midline O2 coincides with the fourth midline O4. Exemplarily, the first closed area R1 overlaps with the orthographic projection of the main body of the first electrode of the first light-emitting device and the main body of the first electrode of the second light-emitting device on the substrate, and the first main structure 111 overlaps with the orthographic projection of the main body of the first electrode of the third light-emitting device on the substrate.

[0188] In the display panel provided in FIG5A , the orthographic projections of the main portion 210 of the first electrode of the first light-emitting device and the main portion 210 of the first electrode of the second light-emitting device on the substrate do not overlap with the orthographic projection of the first signal line on the substrate. The orthographic projection of the main portion 210 of the first electrode of the third light-emitting device on the substrate is located within the orthographic projection of the second enclosed area of ​​the first main structure on the substrate. In other words, the first signal line is not disposed below the main portion 210 of the first electrode of the light-emitting device, thereby preventing the first signal line from affecting the flatness of the first electrode of the light-emitting device. The first electrodes of the light-emitting devices in the display substrate provided in FIG5A have good flatness.

[0189] In the display substrates provided in FIG6A and FIG7A , the orthographic projections of the main body of the first electrode of the first light-emitting device and the main body of the first electrode of the second light-emitting device on the substrate do not overlap with the orthographic projection of the first signal line on the substrate. The orthographic projection of the main body of the first electrode of the third light-emitting device on the substrate is located within the orthographic projection of the first main structure on the substrate. In other words, the first signal line is not disposed below the main body of the first electrode of the first light-emitting device and the main body of the first electrode of the second light-emitting device, thereby avoiding the first signal line from affecting the flatness of the first electrode of the first light-emitting device and the first electrode of the second light-emitting device. The first signal line is disposed below the main body of the first electrode of the third light-emitting device, but the area of ​​the first signal line is larger than the area of ​​the main body of the first electrode, thereby also avoiding the first signal line from affecting the flatness of the first electrode of the third light-emitting device. The first electrodes of the light-emitting devices in the display substrates provided in FIG6A and FIG7A have good flatness.

[0190] In the display substrate provided in Figures 6A and 7A, the first main structure of the first signal line is arranged below the main body of the first electrode of the third light-emitting device, and the first signal line is not arranged below the first electrode of the first light-emitting device and the first electrode of the second light-emitting device, so that the difference in the parasitic capacitance of the first electrodes of different light-emitting devices can be achieved.

[0191] In an exemplary embodiment, in the display substrate provided in Figures 8A and 9A, the orthographic projection of the main portion 210 of the first electrode 20 of at least one light-emitting device on the substrate does not have an overlapping area with the orthographic projection of at least one main signal line 11 on the substrate, and the orthographic projection on the substrate at least partially overlaps with the orthographic projection of at least one connecting signal line 12 on the substrate.

[0192] In an exemplary embodiment, in the display substrate provided in FIG. 8A and FIG. 9A , the body signal line 11 is a solid signal line.

[0193] In an exemplary embodiment, the shape of the main body signal line 11 may be a straight line or a broken line, which is not limited in the present disclosure.

[0194] The multiple closed areas in the display substrate provided in FIG. 8A and FIG. 9A include: multiple first closed areas R1.

[0195] In an exemplary embodiment, in the display substrate provided in Figures 8A and 9A, the connecting signal line 12 may include: a first connecting line 12A, a second connecting line 12B and a third connecting line 12C, the first connecting line 12A and the second connecting line 12B extending along the second direction D2, and the third connecting line 12C extending along the first direction D1, wherein the first connecting line 12A is electrically connected to one of the main signal lines 11 and the third connecting line 12C to which the connecting signal line 12 is connected, respectively, and the second connecting line 12B is electrically connected to another main signal line 11 and the third connecting line 12C to which the connecting signal line 12 is connected, respectively.

[0196] In an exemplary embodiment, in the display substrate provided in FIG8A and FIG9A , the orthographic projection of the main portion 210 of the first electrode 20 of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the at least one third connection line 12C connected to the signal line 12 on the substrate. Exemplarily, the orthographic projection of the connecting portion of the first electrode 23 of at least one third light-emitting device on the substrate at least partially overlaps with the orthographic projection of the at least one third connection line 12C connected to the signal line 12 on the substrate.

[0197] In the exemplary embodiment, in the display substrate provided in FIG8A and FIG9A , the orthographic projection of the main portion 220 of the first electrode 20 of the at least one light-emitting device on the substrate does not overlap with the orthographic projection of the at least one connection signal line 12 on the substrate, and the orthographic projection of the connection portion of the first electrode of the at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connection line 12C of the at least one connection signal line 12 on the substrate. The absence of an overlapping orthographic projection of the main portion 220 of the first electrode 20 of the at least one light-emitting device on the substrate and the orthographic projection of the at least one connection signal line 12 on the substrate ensures that no first signal line is located below the main portion of the first electrode 20 of the at least one light-emitting device, thereby ensuring the flatness of the first electrode 20 of the at least one light-emitting device.

[0198] In an exemplary embodiment, the mth connecting signal line 12 located between the i-th main signal line 11 and the i+1-th main signal line 11 and the m-th connecting signal line 12 located between the i+1-th main signal line 11 and the i+2-th main signal line 11 are arranged along the second direction D2; or, an extension line of at least one connecting signal line 12 located between the i-th main signal line 11 and the i+1-th main signal line 11 is located between the extension lines of two adjacent connecting signal lines 12 between the i+1-th main signal line 11 and the i+2-th main signal line 11. The extension line of at least one connecting signal line 12 located between the i-th main signal line 11 and the i+1-th main signal line 11 is located between the extension lines of two adjacent connecting signal lines 12 between the i+1-th main signal line 11 and the i+2-th main signal line 11. This refers to the multiple connecting signal lines 12 located between the i-th main signal line 11 and the i+1-th main signal line 11 and the multiple connecting signal lines 12 located between the i+1-th main signal line 11 and the i+2-th main signal line 11 being interlaced.

[0199] FIG8A illustrates a display substrate in which the mth connecting signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 and the mth connecting signal line 12 located between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11 are arranged along the second direction D2. The plurality of first enclosed areas in FIG8A are arranged in a matrix along the first direction D1 and the second direction D2.

[0200] In an exemplary embodiment, in the display substrate provided in Figure 8A, when the mth connecting signal line 12 located between the i-th main signal line 11 and the i+1-th main signal line 11 and the m-th connecting signal line 12 located between the i+1-th main signal line 11 and the i+2-th main signal line 11 are arranged along the second direction D2, the orthographic projection of the main body of the first electrode 21 of at least one first light-emitting device on the substrate and the orthographic projection of the main body of the first electrode 23 of at least one third light-emitting device on the substrate are located in the same first closed area R1; the orthographic projection of the main body of the first electrode 22 of at least one second light-emitting device on the substrate and the orthographic projection of the main body of the first electrode 23 of at least one third light-emitting device on the substrate are located in the same first closed area R1; the first closed area R1 where the orthographic projection of the main body of the first electrode 21 of the first light-emitting device on the substrate is located and the first closed area R1 where the orthographic projection of the main body of the first electrode 22 of the second light-emitting device on the substrate is located are different closed areas. Illustratively, in the display substrate provided in FIG8A , the orthographic projections of the main body of the first electrode 21 of a first light-emitting device and the main body of the first electrode 23 of a third light-emitting device on the substrate are located in the same first closed area R1, and the orthographic projections of the main body of the first electrode 22 of a second light-emitting device and the main body of the first electrode 23 of a third light-emitting device on the substrate are located in the same first closed area R1.

[0201] The display substrate provided in FIG9A is illustrated by taking as an example the case where the extension line of at least one connecting signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 is located between the extension lines of two adjacent connecting signal lines 12 between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11. In FIG9A , the multiple first enclosed areas located in the same row are arranged along the first direction D1, and the multiple first enclosed areas in adjacent rows are staggered.

[0202] In an exemplary embodiment, in the display substrate provided in FIG9A , when the extension line of at least one connecting signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 is located between the extension lines of two adjacent connecting signal lines 12 between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11, the orthographic projection on the substrate of the main body portion of the first electrode of at least one first light-emitting device, the main body portion of the first electrode of at least one second light-emitting device, and the orthographic projection on the substrate of the main body portion of the first electrode of at least one third light-emitting device are located in the same first enclosed region R1. Exemplarily, in the display substrate provided in FIG9A , the orthographic projection on the substrate of the main body portion of the first electrode 21 of one first light-emitting device, the main body portion of the first electrode 22 of one second light-emitting device, and the main body portions of the first electrodes 23 of two third light-emitting devices are located in the same first enclosed region R1.

[0203] In the display panels provided in Figures 8A and 9A, the orthographic projections of the main body of the first electrode of the first light-emitting device, the main body of the first electrode of the second light-emitting device, and the main body of the first electrode of the third light-emitting device on the substrate do not overlap with the orthographic projections of the first signal line on the substrate. In other words, the first signal line is not disposed below the main body of the first electrode of the light-emitting device, thereby preventing the first signal line from affecting the flatness of the first electrode of the light-emitting device. The first electrodes of the light-emitting devices in the display substrates provided in Figures 8A and 9A have good flatness.

[0204] In an exemplary embodiment, Figure 10 is a schematic diagram of a portion of the film layer of the display substrate, and Figure 11 is a schematic diagram of a portion of the film layer of the display substrate, as shown in Figures 10 and 11. The display substrate provided by the embodiment of the present disclosure may further include: a plurality of second signal lines provided on the substrate, and the pixel driving circuit of at least one sub-pixel is electrically connected to the second signal line. Figures 10 and 11 include: a first electrode 21 of a first light-emitting device, a first electrode 22 of a second light-emitting device, and a first electrode 23 of a third light-emitting device. Figure 10 includes the film layer where the second signal line is located and the film layer where the first electrode of the light-emitting device is located, and Figure 11 includes the film layer where the first and second electrodes of at least one transistor in the pixel driving circuit are located and the film layer where the first electrode of the light-emitting device is located. Figure 11 includes: the second electrode 64 of the sixth transistor in the pixel driving circuit (also the second electrode 74 of the seventh transistor)

[0205] In an exemplary embodiment, the second signal line may include at least one of a data signal line Data, a first initial signal line INIT1, a second initial signal line INIT2, a first power line VDD, and a second power line VSS. The second signal line and the first signal line are different signal lines. Exemplarily, when the first signal line is the second power line VSS, the second signal line may include at least one of the data signal line Data, the first initial signal line INIT1, the second initial signal line INIT2, and the first power line VDD. For example, the second signal line may include the first power line VDD and the data signal line Data. FIG10 illustrates an example in which the second signal line includes the first power line VDD and the data signal line Data.

[0206] In an exemplary embodiment, the second signal line is at least partially located in the display area and disposed in a different layer from the first signal line. The second signal line at least partially extends along the second direction D2.

[0207] As shown in Figures 10 and 11, at least part of the pixel driving circuits of adjacent sub-pixels located in the same row are symmetrically arranged with respect to the second center line, the second center line O2 extends along the second direction, the second signal lines connected to the pixel driving circuits of adjacent sub-pixels located in the same row are symmetrically arranged with respect to the second center line O2, and the center line of the main body of the first electrode of at least one light-emitting device extending along the second direction is the second center line O2.

[0208] In the present invention, at least a portion of the pixel driving circuits of adjacent sub-pixels located in the same row is symmetrically arranged relative to the second center line, and the second signal lines connected to the pixel driving circuits of adjacent sub-pixels located in the same row are symmetrically arranged relative to the second center line O2. The center line of the main body of the first electrode of at least one light-emitting device extending along the second direction is the second center line O2. The center line of the main body of the first electrode of at least one light-emitting device extending along the second direction is the same center line as the center line of at least a portion of the pixel driving circuits of adjacent sub-pixels located in the same row and the center line of the second signal lines connected to the pixel driving circuits of adjacent sub-pixels located in the same row. This can avoid the influence of partial structures of the pixel driving circuit and the second signal line on the flatness of the first electrode of the light-emitting device, and can ensure the flatness of the first electrode of the light-emitting device.

[0209] In an exemplary embodiment, FIG12 is a third schematic diagram of a partial film layer of a display substrate, and FIG13 is a fourth schematic diagram of a partial film layer of a display substrate. As shown in FIG5A to FIG9A, FIG10, FIG12 and FIG13, the display substrate may further include: a plurality of first anode connection electrodes 30 and a plurality of second anode connection electrodes 40 arranged on a substrate and located in a display area, and the first signal line includes: at least one first closed area R1. The first anode connection electrode 30 and the second anode connection electrode 40 are respectively connected to the pixel driving circuit in which they are located and the connection portion of the first electrode of the light-emitting device connected to the pixel driving circuit in which they are located. The first anode connection electrode 30 and the second anode connection electrode 40 are respectively connected to the second electrode 64 of the sixth transistor (also the second electrode 74 of the seventh transistor) of the pixel driving circuit in which they are located. FIG12 is illustrated by taking the example of the main signal line including: a plurality of first main structures and a plurality of second main structures. FIG13 is illustrated by taking the example of the main signal line being a solid signal line.

[0210] In an exemplary embodiment, as shown in Figures 11 to 13, a plurality of first anode connecting electrodes 30 correspond one-to-one to a plurality of second anode connecting electrodes 40, and the orthographic projections of the first anode connecting electrodes 30 on the substrate at least partially overlap with the orthographic projections of the corresponding second anode connecting electrodes 40 on the substrate, and are electrically connected to the corresponding second anode connecting electrodes 40.

[0211] In an exemplary embodiment, as shown in FIG. 12 and FIG. 13 , orthographic projections of at least one first anode connecting electrode 30 and at least one second anode connecting electrode 40 on the substrate are located within the orthographic projection range of at least one first enclosed region on the substrate.

[0212] In an exemplary embodiment, as shown in FIG10 , FIG12 , and FIG13 , when the second signal line includes a first power line VDD, the first power line connected to the subpixel and the first power line connected to one of the adjacent subpixels are the same power line, and the first power line includes a fourth enclosed region R4. An orthographic projection of a main portion of a first electrode of at least one light-emitting device on the substrate at least partially overlaps with an orthographic projection of the first power line VDD on the substrate.

[0213] In an exemplary embodiment, an orthographic projection of a body portion of the first electrode of the at least one third light emitting device on the substrate at least partially overlaps with an orthographic projection of the first power line VDD on the substrate.

[0214] In an exemplary embodiment, when the first main structure is a solid structure, since the orthographic projection of the main portion of the first electrode of at least one third light-emitting device on the substrate partially overlaps with the orthographic projection of the first main structure on the substrate, the orthographic projection of the main portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first power line VDD on the substrate. That is, both the first main structure and the first power line are provided below the main portion of the first electrode of the third light-emitting device, which can better protect the flatness of the main portion of the first electrode of the third light-emitting device.

[0215] In an exemplary embodiment, when the first main structure is a ring structure, since the orthographic projection of the main portion of the first electrode of at least one third light-emitting device on the substrate is within the range of the orthographic projection of the second closed area of ​​the first main structure on the substrate, the orthographic projection of the main portion of the first electrode of at least one light-emitting device on the substrate and the orthographic projection of the first power line VDD on the substrate at least partially overlap, that is, the first power line is arranged below the main portion of the first electrode of the third light-emitting device, which can well protect the flatness of the first electrode of the third light-emitting device.

[0216] As shown in FIG. 12 and FIG. 13 , the orthographic projections of at least one first anode connecting electrode 30 and at least one second anode connecting electrode 40 on the substrate are located within the range of the orthographic projection of at least one fourth closed region R4 on the substrate.

[0217] As shown in Figures 12 and 13, the orthographic projection of at least one fourth enclosed region R4 on the substrate at least partially overlaps with the orthographic projection of at least one connection signal line 12 on the substrate. Exemplarily, the connection signal line 12 that overlaps with the fourth enclosed region passes through the midline of the fourth enclosed region R4 extending along the second direction D2.

[0218] In an exemplary embodiment, when the first signal line includes a main body signal line 11, the main body signal line 11 includes a plurality of first main body structures 111. As shown in Figures 12 and 13, the orthographic projection of at least one first power line VDD on the substrate at least partially overlaps with the orthographic projection of at least one first main body structure 111 on the substrate. This at least partially overlaps the orthographic projection of at least one first power line VDD on the substrate with the orthographic projection of at least one first main body structure 111 on the substrate. This allows the first power line and the first main body structure to be disposed below the main body portion of the first electrode of at least one light-emitting device, further ensuring the flatness of the first electrode of the at least one light-emitting device.

[0219] As shown in FIG. 12 , the third enclosed region R3 may be used as a light-transmitting region, and the display substrate may be provided with a via hole in the third enclosed region R3 , and a photosensitive device may be provided at the position of the via hole.

[0220] In an exemplary embodiment, a display substrate may include: a driving structure layer and a light-emitting structure layer sequentially stacked on a base, wherein the light-emitting device is located in the light-emitting structure layer; a pixel driving circuit includes: at least one transistor; the driving structure layer includes: a first conductive layer, a second conductive layer, and a third conductive layer;

[0221] The first conductive layer includes: a first electrode and a second electrode of at least one transistor in at least one pixel driving circuit;

[0222] The second conductive layer includes a second signal line and a second anode connecting electrode.

[0223] The third conductive layer includes a first signal line and a first anode connecting electrode.

[0224] In an exemplary embodiment, the first conductive layer is located on a side of at least one of the second conductive layer and the third conductive layer that is close to the substrate.

[0225] In exemplary embodiments, the third conductive layer may be located on a side of the second conductive layer close to the substrate, or the third conductive layer may be located on a side of the second conductive layer far from the substrate.

[0226] In an exemplary embodiment, when the third conductive layer is located on a side of the second conductive layer closer to the substrate, the second electrode of the sixth transistor of the pixel driving circuit (also the second electrode of the seventh transistor) is electrically connected to the connection portion of the first electrode of the light-emitting device via the first anode connection electrode and the second anode connection electrode, respectively. When the third conductive layer is located on a side of the second conductive layer farther from the substrate, the second electrode of the sixth transistor of the pixel driving circuit (also the second electrode of the seventh transistor) is electrically connected to the connection portion of the first electrode of the light-emitting device via the second anode connection electrode and the first anode connection electrode, respectively.

[0227] In an exemplary embodiment, the display substrate may further include a third signal line disposed on the base and located in the display area, wherein at least a portion of the third signal line extends along the first direction.

[0228] In an exemplary embodiment, the third signal line may include at least one of a reset signal line, a scan signal line, and a light emitting signal line.

[0229] In an exemplary embodiment, the pixel driving circuit further includes a capacitor. The driving structure layer may further include: a semiconductor layer, a fourth conductive layer, and a fifth conductive layer.

[0230] The semiconductor layer may include at least an active pattern of at least one transistor in at least one pixel driving circuit.

[0231] The fourth conductive layer may include at least a third signal line, a gate electrode of at least one transistor in at least one pixel driving circuit, and a first plate of a capacitor.

[0232] The fifth conductive layer may include at least a second plate of a capacitor located in at least one pixel driving circuit.

[0233] In an exemplary embodiment, the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer and the fifth conductive layer can be made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and can be a single-layer structure or a multi-layer composite structure, such as Mo / Cu / Mo, etc.

[0234] In an exemplary embodiment, the first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer and the fifth insulating layer can be made of any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON), and can be a single layer, a multilayer or a composite layer.

[0235] In an exemplary embodiment, the driving structure layer may further include: a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, and a fifth insulating layer. The first insulating layer is located between the semiconductor layer and the fourth conductive layer, the second insulating layer is located between the fourth conductive layer and the fifth conductive layer, the third insulating layer is located between the fifth conductive layer and the first conductive layer, the fourth insulating layer is located between the first conductive layer and the second conductive layer, and the fifth insulating layer is located between the second conductive layer and the third conductive layer.

[0236] In an exemplary embodiment, a planar layer is provided on a side of at least one of the first to fifth conductive layers away from the substrate.

[0237] In an exemplary embodiment, the planar layer may be made of an organic material such as resin.

[0238] In an exemplary embodiment, the light emitting structure layer may include a sixth conductive layer, an organic layer, and a seventh conductive layer sequentially stacked on the driving structure layer.

[0239] The sixth conductive layer may include at least a first electrode of at least one light emitting device.

[0240] The organic layer may include at least: an organic structure layer of at least one light emitting device.

[0241] The seventh conductive layer may include at least a second electrode of at least one light emitting device.

[0242] In an exemplary embodiment, the display substrate may further include an encapsulation structure layer. The encapsulation structure layer may include a stacked first encapsulation layer, a second encapsulation layer, and a third encapsulation layer. The first and third encapsulation layers may be made of inorganic materials, and the second encapsulation layer may be made of an organic material. The second encapsulation layer is disposed between the first and third encapsulation layers to prevent external moisture from entering the light-emitting structure layer.

[0243] In an exemplary embodiment, the display substrate may further include a touch structure layer. The touch structure layer may include a first touch insulation layer disposed on the encapsulation structure layer, a first touch metal layer disposed on the first touch insulation layer, a second touch insulation layer covering the first touch metal layer, a second touch metal layer disposed on the second touch insulation layer, and a touch protection layer covering the second touch metal layer. The first touch metal layer may include a plurality of bridging electrodes, and the second touch metal layer may include a plurality of first touch electrodes and second touch electrodes. The first touch electrodes or the second touch electrodes may be connected to the bridging electrodes through vias.

[0244] In an exemplary embodiment, the display substrate may further include an optical structure layer comprising a plurality of color filters and a black matrix structure. The optical structure layer is located on a side of the light-emitting structure layer away from the substrate. The orthographic projection of at least one color filter on the substrate at least partially overlaps with the orthographic projection of at least one pixel opening on the substrate.

[0245] In an exemplary embodiment, the filter includes: a first filter, a second filter, and a third filter, the orthographic projection of the first filter on the substrate at least partially overlaps with the orthographic projection of the main portion of the first electrode of the first light-emitting device on the substrate, the orthographic projection of the second filter on the substrate at least partially overlaps with the orthographic projection of the main portion of the first electrode of the second light-emitting device on the substrate, and the orthographic projection of the third filter on the substrate at least partially overlaps with the orthographic projection of the main portion of the first electrode of the third light-emitting device on the substrate.

[0246] In an exemplary embodiment, the filter can be prepared on the packaging structure layer through a coating, exposure and development process to achieve further in-screen integration.

[0247] An embodiment of the present disclosure further provides a display device, comprising: a display substrate provided by any one of the aforementioned embodiments.

[0248] In an exemplary embodiment, the display device may be any product or component with a display function, such as an organic light-emitting diode (OLED) display device, an active-matrix organic light-emitting diode (AMOLED) display device, a mobile phone, a tablet computer, a flexible display device, a television, and a monitor.

[0249] In an exemplary embodiment, the display apparatus further includes: a plurality of photosensitive devices.

[0250] In an exemplary embodiment, the first signal line in the display substrate includes a third enclosed area, which is a light-transmitting area. The orthographic projection of the at least one photosensitive device on the substrate at least partially overlaps with the orthographic projection of the at least one third enclosed area on the substrate.

[0251] The drawings of the embodiments of the present disclosure only involve the structures involved in the embodiments of the present disclosure, and other structures may refer to general designs.

[0252] For the sake of clarity, the thickness and size of layers or microstructures are exaggerated in the drawings used to describe the embodiments of the present disclosure. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, the element can be "directly on" or "under" the other element, or intervening elements may be present.

[0253] Although the embodiments disclosed in this disclosure are as described above, the contents described are merely embodiments adopted to facilitate understanding of the disclosure and are not intended to limit the disclosure. Any person skilled in the art to which the disclosure belongs may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope of the disclosure. However, the scope of patent protection of the disclosure shall still be based on the scope defined by the attached claims.

Claims

1. A display substrate having a display area, wherein the display area includes pixel openings, the display substrate comprising: A substrate, a plurality of sub-pixels disposed on the substrate, and a first signal line. At least one sub-pixel includes: a pixel driving circuit and a light-emitting device. The light-emitting device includes: a first electrode, a light-emitting layer disposed at least partially in the pixel aperture, and a second electrode. The pixel driving circuit in at least one sub-pixel is electrically connected to the first electrode of the light-emitting device. The first signal line is electrically connected to the second electrode of the light-emitting device or to the pixel driving circuit. The first electrode includes a main body portion and a connecting portion. The orthographic projection of the main body portion on the substrate overlaps with the orthographic projection of the pixel aperture on the substrate. The connecting portion is used to connect the main body portion and the corresponding pixel driving circuit. At least part of the first signal line is located in the display area and has a mesh structure. The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate does not have an overlapping area with the orthographic projection of the first signal line on the substrate.

2. The display substrate according to claim 1, wherein The first signal line includes: a plurality of closed regions. The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is within the range of the orthographic projection of at least one closed region on the substrate.

3. The display substrate according to claim 1 or 2, wherein: The first signal line includes: a plurality of main signal lines. The main signal lines extend at least partially in a first direction, and the plurality of main signal lines are arranged in a second direction. The first direction and the second direction intersect. A plurality of connecting signal lines are disposed between adjacent main signal lines. The connecting signal lines extend at least partially in the second direction, and the plurality of connecting signal lines located between adjacent main signal lines are arranged in the first direction. At least one of the plurality of connecting signal lines located between the i-th main signal line and the (i + 1)-th main signal line is respectively connected to the i-th main signal line and the (i + 1)-th main signal line. And an adjacent two connecting signal lines located between the i-th main signal line and the (i + 1)-th main signal line form a first closed region with the i-th main signal line and the (i + 1)-th main signal line, where 1 ≤ i < M, and M is the number of main signal lines included in the first signal line.

4. The display substrate according to claim 3, wherein: The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate.

5. The display substrate according to claim 4, wherein: The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of at least one main signal line on the substrate, and there is no overlapping area with the orthographic projection of at least one connecting signal line on the substrate. The display substrate according to claim 5 , wherein: At least one main signal line includes: a plurality of first main structures and a plurality of second main structures. The plurality of first main structures and the plurality of second main structures are alternately arranged in the first direction. The first main structure is connected to the adjacent second main structure. The midline of the j-th first main structure of the i-th main signal line extending in the second direction coincides with the midline of the j-th first main structure of the (i + 1)-th main signal line extending in the second direction, and the midline of the k-th second main structure of the i-th main signal line extending in the second direction coincides with the midline of the k-th second main structure of the (i + 1)-th main signal line extending in the second direction; 1 ≤ j < N, where N is the number of first main structures included in the main signal line, and 1 ≤ k < K, where K is the number of second main structures included in the main signal line; At least one connecting signal line between the i-th main signal line and the (i + 1)-th main signal line is respectively connected to the first main structure of the i-th main signal line and the first main structure of the (i + 1)-th main signal line.

7. The display substrate according to claim 6, wherein: At least one connecting signal line between the i-th main signal line and the (i + 1)-th main signal line and at least one connecting signal line between the (i + 1)-th main signal line and the (i + 2)-th main signal line are arranged along the second direction.

8. The display substrate according to claim 3, wherein: At least one main signal line includes: a plurality of first main structures and a plurality of second main structures, the plurality of first main structures and the plurality of second main structures are alternately arranged along the first direction, and the first main structure is connected to the adjacent second main structure; The maximum length of the first main structure in the second direction is greater than the maximum length of the second main structure in the second direction; The length of at least one connecting signal line in the second direction is less than the distance between two second main structures extending in the second direction.

9. The display substrate according to claim 3, wherein: At least one main signal line includes: a plurality of first main structures and a plurality of second main structures, the plurality of first main structures and the plurality of second main structures are alternately arranged along the first direction, and the first main structure is connected to the adjacent second main structure; The orthographic projection of the main part of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate, and there is no overlapping area between the orthographic projection of the main part of the first electrode of at least one light-emitting device on the substrate and the orthographic projection of the second main structure on the substrate.

10. The display substrate according to claim 9, wherein: At least one first main structure is a ring structure or a solid structure; When at least one first main structure is a ring structure, the first main structure includes: a second closed area; The orthographic projection of the main part of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the second closed area of the first main structure on the substrate.

11. The display substrate according to claim 10, wherein: When at least one main structure is a ring structure, the orthographic projection of the main part of the first electrode of at least one light-emitting device on the substrate is within the range of the orthographic projection of the second closed area of the first main structure on the substrate, and the orthographic projection of the connecting part of the first electrode of at least one light-emitting device on the substrate partially overlaps with the orthographic projection of the first main structure on the substrate; When at least one main structure is a solid structure, the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is within the range of the orthographic projection of the first main structure on the substrate, and the orthographic projection of the connecting portion of the first electrode of at least one light-emitting device on the substrate overlaps at least partially with the orthographic projection of the first main structure on the substrate.

12. The display substrate according to claim 8, wherein: At least one second main structure includes: a first connecting structure and a second connecting structure. The first connecting structure and the second connecting structure extend along the first direction and are arranged along the second direction. At least one of the first connecting structure and the second connecting structure in at least one second main structure is respectively connected to two first main structures connected to the second main structure. A third closed region is formed between the first connecting structure and the second connecting structure in at least one second main structure and the two first main structures connected to the second main structure. There is no overlapping region between the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate and the orthographic projection of at least one third closed region on the substrate.

13. The display substrate according to claim 12, wherein: The boundary of the first main structure is one of the shapes of a polygon, a circle or an ellipse.

14. The display substrate according to claim 12, wherein: The light-emitting device includes: a first light-emitting device, a second light-emitting device and a third light-emitting device. The first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The area of the first electrode of the first light-emitting device is smaller than the area of the first electrode of the second light-emitting device, and the area of the first electrode of the third light-emitting device is smaller than the area of the first electrode of the first light-emitting device. The light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction. The light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction. The light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are arranged staggeredly, where 1 ≤ a < A and A is the total number of rows of the light-emitting devices. The light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction. The light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction. The light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are arranged staggeredly, where 1 ≤ b < B and B is the total number of columns of the light-emitting devices. The orthographic projection of the main body portion of the first electrode of the first light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate. The orthographic projection of the main body portion of the first electrode of the second light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate. The region where the orthographic projection of the main body portion of the first electrode of the first light-emitting device on the substrate is located and the region where the orthographic projection of the main body portion of the first electrode of the second light-emitting device on the substrate is located are different first closed regions. The orthographic projection of the main body portion of the first electrode of the third light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate, and the first main structures overlapping with the orthographic projections of the main body portions of the first electrodes of different third light-emitting devices on the substrate are different first main structures.

15. The display substrate according to claim 12, wherein: The median line along the first direction of the main body portion of the first electrode of at least one light-emitting device is the first median line, the median line along the second direction of the main body portion of the first electrode of at least one light-emitting device is the second median line, the median line along the first direction of the first closed region or the first main structure overlapping with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is the third median line, and the median line along the second direction of the first closed region or the first main structure overlapping with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is the fourth median line; The first median line coincides with the third median line, and the second median line coincides with the fourth median line.

16. The display substrate according to claim 4, wherein: The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate has no overlapping region with the orthographic projection of at least one main signal line on the substrate, and at least partially overlaps with the orthographic projection of at least one connection signal line on the substrate.

17. The display substrate according to claim 16, wherein: The main signal line is a solid signal line, and the connection signal line includes: a first connection line, a second connection line, and a third connection line. The first connection line and the second connection line extend along the second direction, and the third connection line extends along the first direction; The first connection line is electrically connected to one of the main signal lines connected by the connection signal line and the third connection line respectively, and the second connection line is electrically connected to the other main signal line connected by the connection signal line and the third connection line respectively; The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connection line of at least one connection signal line on the substrate.

18. The display substrate according to claim 17, wherein: The light-emitting device includes: a first light-emitting device, a second light-emitting device, and a third light-emitting device. The first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The area of the first electrode of the first light-emitting device is smaller than the area of the first electrode of the second light-emitting device, and the area of the first electrode of the third light-emitting device is smaller than the area of the first electrode of the first light-emitting device; The light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction, and the light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; The light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are staggered, where 1 ≤ a < A and A is the total number of rows of the light-emitting devices; The light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction. The light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; the light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are arranged in a staggered manner, where 1 ≤ b < B, and B is the total number of columns of the light-emitting devices. The positive projection of the main body portion of the first electrodes of at least one first light-emitting device, at least one second light-emitting device, and at least one third light-emitting device on the substrate does not overlap with the positive projection of at least one connection signal line on the substrate. The positive projection of the connection portion of the first electrodes of at least one first light-emitting device and at least one second light-emitting device on the substrate does not overlap with the positive projection of the third connection line of at least one connection signal line on the substrate. The positive projection of the connection portion of the first electrodes of at least one third light-emitting device on the substrate at least partially overlaps with the positive projection of the third connection line of at least one connection signal line on the substrate.

19. The display substrate according to claim 1, further comprising: A plurality of second signal lines are provided on the substrate, and the pixel driving circuit of at least one sub-pixel is electrically connected to the second signal lines. At least a part of the second signal lines is located in the display area and is provided in a different layer from the first signal lines, and at least a part of the second signal lines extends along the second direction. At least a part of the pixel driving circuits of adjacent sub-pixels in the same row is symmetrically arranged with respect to the second median line. The second median line extends along the second direction. The second signal lines connected to the pixel driving circuits of adjacent sub-pixels in the same row are symmetrically arranged with respect to the second median line. The median line along the second direction of the main body portion of the first electrode of at least one light-emitting device is the second median line.

20. The display substrate according to claim 19, wherein The first signal line includes: one of a first initial signal line, a second initial signal line, a first power supply line, or a second power supply line. The second signal line includes: at least one of a data signal line, a first initial signal line, a second initial signal line, a first power supply line, or a second power supply line. The first signal line and the second signal line are different signal lines.

21. The display substrate according to claim 20, further comprising: A plurality of first anode connection electrodes and a plurality of second anode connection electrodes are provided on the substrate and are located in the display area. The first signal line includes: at least one first closed area. The first anode connection electrode and the second anode connection electrode are respectively connected to the pixel driving circuit where they are located and the connection portion of the first electrode of the light-emitting device connected to the pixel driving circuit where they are located. The plurality of first anode connection electrodes and the plurality of second anode connection electrodes correspond to each other one by one. The positive projection of the first anode connection electrode on the substrate at least partially overlaps with the positive projection of the corresponding second anode connection electrode on the substrate and is electrically connected to the corresponding second anode connection electrode. The positive projections of at least one first anode connection electrode and at least one second anode connection electrode on the substrate are within the range of the positive projection of at least one first closed area on the substrate.

22. The display substrate according to claim 21, wherein When the second signal line includes a first power line, the first power line connected to the sub-pixel and the first power line connected to one of the adjacent sub-pixels are the same power line, and the first power line includes: a fourth closed area; The orthographic projection of the main portion of the first electrode of the at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first power line on the substrate; The orthographic projections of at least one first anode connecting electrode and at least one second anode connecting electrode on the substrate are located within the range of the orthographic projection of at least one fourth enclosed area on the substrate; An orthographic projection of the at least one fourth closed area on the substrate at least partially overlaps with an orthographic projection of the at least one connecting signal line on the substrate.

23. The display substrate according to claim 22, wherein: The first signal line includes: a main body signal line, and the main body signal line includes: a plurality of first main body structures; An orthographic projection of the at least one first power line on the substrate at least partially overlaps with an orthographic projection of the at least one first main body structure on the substrate.

24. The display substrate according to claim 21, wherein The display substrate comprises: a driving structure layer and a light emitting structure layer sequentially stacked on the base, the light emitting device is located in the light emitting structure layer; the pixel driving circuit comprises: at least one transistor; The driving structure layer includes: a first conductive layer, a second conductive layer and a third conductive layer; The first conductive layer includes: a first electrode and a second electrode of at least one transistor in at least one pixel driving circuit; The second conductive layer includes: a second signal line and a second anode connecting electrode; The third conductive layer includes a first signal line and a first anode connecting electrode.

25. The display substrate according to claim 24, wherein: The first conductive layer is located on a side of at least one of the second conductive layer and the third conductive layer that is close to the substrate; The third conductive layer is located on a side of the second conductive layer close to the substrate, or the third conductive layer is located on a side of the second conductive layer far from the substrate.

26. The display substrate according to claim 24, wherein: Also includes: An optical structure layer, comprising: a plurality of filters and a black matrix structure; The optical structure layer is located on a side of the light emitting structure layer away from the substrate; An orthographic projection of at least one filter on the substrate at least partially overlaps with an orthographic projection of at least one pixel opening on the substrate.

27. A display device comprising: The display substrate according to any one of claims 1 to 26.

28. The display device according to claim 27, wherein: The first signal line in the display substrate includes a third closed area, and the third closed area is a light-transmitting area; The display device further includes: a plurality of photosensitive devices; An orthographic projection of the at least one photosensitive device on the substrate at least partially overlaps with an orthographic projection of the at least one third enclosed area on the substrate.

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