Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device (100) according to the present disclosure comprises: a printed circuit board (10) which has arranged on the surface thereof at least a semiconductor chip (15) and other components, and has, in the plane of the printed circuit board (10), a plurality of holes (40, 40a) penetrating the printed circuit board (10) and each having an opening (41) that exhibits a circular shape or a rectangular shape (41a), the holes being arranged to form a preset pattern; and a mold resin layer (20) formed on the surface of the printed circuit board (10) and in the holes (40, 40a).

Description

Semiconductor device and manufacturing method thereof

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In order to ensure the mechanical and thermal stability of semiconductor devices, packaging technology is commonly used in which printed circuit boards are molded with resin or the like. The application of molding improves the reliability, mechanical strength, environmental resistance, etc. of semiconductor devices. It also protects the semiconductor device from the influence of various external factors.

[0003] In a molded semiconductor device, a semiconductor chip is placed on a printed circuit board made of an insulating material such as epoxy resin, and the semiconductor chip and electrode pattern are electrically connected by wires. To protect the semiconductor chip, the printed circuit board is molded with a molding resin. As the molding resin, generally, a plastic material such as epoxy resin or silicone, or a ceramic material is used.

[0004] Patent No. 5971566

[0005] In a semiconductor device in which a printed circuit board is molded with a mold resin, there is a problem in that the printed circuit board and, in turn, the semiconductor device may warp or bend due to the difference in the linear expansion coefficient between the printed circuit board and the mold resin layer. If the semiconductor device warps or bends, the mold resin layer may peel off from the printed circuit board, which may result in a loss of reliability of the semiconductor device.

[0006] To address the problem of warpage in semiconductor devices, for example, Patent Document 1 discloses a wireless module that uses a connecting member to reduce warpage and bending of the wireless module. However, even with this configuration, there is a risk that warpage and bending may not be sufficiently reduced.

[0007] The present disclosure has been made to solve the above-mentioned problems, and has an object to provide a semiconductor device and a method for manufacturing the semiconductor device that are highly reliable and have reduced warpage and deflection.

[0008] The semiconductor device according to the present disclosure comprises: a substrate having a plurality of holes arranged in its surface and having at least a semiconductor chip arranged on its surface; and a molded resin layer formed on the surface of the substrate and in the holes.

[0009] The method for manufacturing a semiconductor device according to the present disclosure comprises the steps of: arranging at least a semiconductor chip on a surface of a substrate; pressing the substrate against a curved surface made of metal to provide a warp having a predetermined curvature in the substrate; and integrally molding the warped substrate with a molding resin at a temperature of 140°C or higher and 250°C or lower, wherein warping of the substrate is suppressed when the substrate is returned to room temperature after integral molding.

[0010] According to the semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure, it is possible to obtain a semiconductor device and a method for manufacturing the semiconductor device that are highly reliable and have reduced warpage and deflection.

[0011] FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. FIG. 2 is a schematic diagram illustrating a method for manufacturing a semiconductor device according to a first embodiment. FIG. 3 is a schematic diagram illustrating a method for manufacturing a semiconductor device according to a first embodiment. FIG. 4 is a cross-sectional view of a portion of a semiconductor device according to a first embodiment. FIG. 6A and FIG. 6B are schematic diagrams illustrating an arrangement of holes provided in a substrate of a semiconductor device according to a first embodiment. FIG. 8A and FIG. 8B are schematic diagrams illustrating an arrangement of holes provided in a substrate of a semiconductor device according to a first embodiment. FIG. 11A and FIG. 11B are schematic diagrams illustrating an arrangement of holes provided in a substrate of a semiconductor device according to a first embodiment. FIG. 12A and FIG. 12B are schematic diagrams illustrating an arrangement of holes provided in a substrate of a semiconductor device according to a first embodiment. FIG. 13A, FIG. 13B, and FIG. 13C are cross-sectional views of holes provided in a substrate of a semiconductor device according to a first embodiment. FIG. 1 is a cross-sectional view of a hole provided in a substrate of a semiconductor device according to a first embodiment. FIG. 2 is a schematic diagram showing various shapes of an opening of a hole provided in a substrate of a semiconductor device according to the first embodiment. FIG. 3 is a schematic diagram showing a method for manufacturing a semiconductor device according to a second embodiment. FIG. 4 is a schematic diagram showing a method for manufacturing a semiconductor device according to a third embodiment. FIG. 5 is a cross-sectional view of a semiconductor device manufactured by the method for manufacturing a semiconductor device according to the third embodiment. FIG. 6 is a diagram showing an example of the layer thickness of each layer constituting a printed circuit board of a semiconductor device manufactured by the method for manufacturing a semiconductor device according to the third embodiment. FIG. 7 is a diagram explaining a simulation result of warpage of a substrate by the method for manufacturing a semiconductor device according to the third embodiment. FIG. 8 is a diagram explaining a simulation result of warpage of a substrate by a comparative example. FIG. 9 is a diagram explaining a simulation result of warpage of a substrate by the method for manufacturing a semiconductor device according to the third embodiment.

[0012] 1 is a cross-sectional view of a semiconductor device 100 according to embodiment 1. The semiconductor device 100 includes a printed circuit board 10 having a hole 40 arranged in its surface, a semiconductor chip 15 arranged via an adhesive member 11c on a pattern 11a made of a copper layer on the surface of the printed circuit board 10, a wire 12 having one end wire-bonded to the semiconductor chip 15 and the other end wire-bonded to the pattern 11b made of the copper layer, and a molded resin layer 20 formed to cover the surface of the printed circuit board 10.

[0013] The printed circuit board 10 has a rectangular shape when viewed from above, i.e., in a plan view. However, the shape of the printed circuit board 10 is not limited to a rectangle, and may have a more complex shape.

[0014] Specific examples of the printed circuit board 10 include a glass epoxy board, a multilayer wiring board, an organic board, a circuit board, and a high-frequency circuit board. A lead frame may also be used instead of the printed circuit board 10. The printed circuit boards, lead frames, and the like listed above are collectively referred to as a board.

[0015] <Method of Manufacturing Semiconductor Device> An outline of a method of manufacturing the semiconductor device 100 according to the first embodiment will be described below. Figures 2 to 4 are schematic diagrams illustrating a method of manufacturing the semiconductor device 100 according to the first embodiment.

[0016] First, the semiconductor chip 15, matching components, etc. are mounted on the printed circuit board 10. Fig. 2 is a schematic view of the printed circuit board, in which the semiconductor chip 15, etc. are omitted.

[0017] After mounting, a molded resin layer 20 is formed so as to cover the entire surface of the printed circuit board 10. Fig. 3 is a schematic view of the printed circuit board 10 and the molded resin layer 20 after being integrally molded.

[0018] 4, the printed circuit board 10 on which the molded resin layer 20 is formed is separated into pieces 100a corresponding to the individual semiconductor devices 100, thereby completing the semiconductor devices 100. The above is an outline of the method for manufacturing the semiconductor device 100 according to the first embodiment.

[0019] <Structure of Printed Circuit Board> The printed circuit board 10 constituting the semiconductor device 100 according to the first embodiment is provided with a plurality of holes 40 penetrating the printed circuit board 10. When the molded resin layer 20 is formed on the printed circuit board 10, some of the molten molded resin flows into the holes 40 and hardens inside the holes 40. Figure 5 is a cross-sectional view showing a portion of the semiconductor device 100 after the molded resin layer 20 has been formed on the printed circuit board 10.

[0020] The molded resin that flows into the hole 40 hardens inside the hole 40, thereby strengthening the adhesion between the printed circuit board 10 and the molded resin layer 20, thereby preventing the molded resin layer 20 from peeling off from the printed circuit board 10.

[0021] <Arrangement of Holes in Printed Circuit Board> The arrangement of holes 40 in the printed circuit board 10 will be described below with reference to FIGS. 6 to 12. FIG.

[0022] The printed circuit board 10a shown in FIG. 6A is characterized in that the holes 40, each having a circular opening 41 on the front side of the printed circuit board 10a, are arranged in a grid pattern within the surface of the printed circuit board 10a. By uniformly arranging the holes 40 within the printed circuit board 10a, it is possible to prevent the molded resin layer 20 from peeling off from the printed circuit board 10a throughout the semiconductor device 100. The openings 41 may also be elliptical. The hole 40 penetrates from the front side to the back side of the printed circuit board 10a while maintaining the shape of the opening 41 as its cross-sectional shape. However, the cross-sectional shape may be partially enlarged, i.e., change, within the hole 40. The multiple holes 40 may be arranged at equal intervals as shown in FIG. 6A, but they do not necessarily have to be arranged at equal intervals.

[0023] The printed circuit board 10b shown in Figure 6B is characterized in that the hole portions 40, each having a circular opening 41 on the surface side of the printed circuit board 10b, are arranged in a row parallel to one side of the printed circuit board 10b within the plane of the printed circuit board 10b, and the pitch of the hole portions 40 is shifted by a predetermined distance between the even-numbered arrays and the odd-numbered arrays from the one side of the printed circuit board 10b.

[0024] 6B , in an even-numbered array from one end of the printed circuit board 10b, a hole 40 in the even-numbered array is located at a position corresponding to the midpoint between two consecutive holes 40 in the adjacent odd-numbered array. In each array, multiple holes 40 are aligned at equal intervals, but they do not necessarily have to be aligned at equal intervals. By arranging the holes 40 uniformly across the printed circuit board 10b, it is possible to prevent peeling of the molded resin layer 20 from the printed circuit board 10b throughout the entire semiconductor device 100.

[0025] The printed circuit board 10c shown in Figure 7 is characterized in that a plurality of holes 40, each with a circular opening 41 on the front surface side of the printed circuit board 10c, are arranged along each side of the rectangle of the printed circuit board 10c. The holes 40 may be arranged at equal intervals as shown in Figure 7, but they do not necessarily have to be arranged at equal intervals. By arranging the holes 40 only on the outer periphery of the printed circuit board 10c, space for mounting components can be secured in the center of the printed circuit board 10c, which not only prevents peeling of the molded resin layer 20 throughout the entire semiconductor device 100, but also has the synergistic effect of further improving component mounting efficiency.

[0026] The printed circuit board 10d shown in Fig. 8A is characterized in that a plurality of holes 40, each having a circular opening 41 on the front surface side of the printed circuit board 10d, are arranged along the two long sides of the printed circuit board 10d. The plurality of holes 40 may be arranged at equal intervals as shown in Fig. 8A, but they do not necessarily have to be arranged at equal intervals.

[0027] The printed circuit board 10e shown in Fig. 8B is characterized in that a plurality of holes 40, each having a circular opening 41 on the front surface side of the printed circuit board 10e, are arranged along the two short sides of the printed circuit board 10e. The plurality of holes 40 may be arranged at equal intervals as shown in Fig. 8B, but do not necessarily have to be arranged at equal intervals.

[0028] In other words, the printed circuit board 10d shown in Figure 8A and the printed circuit board 10e shown in Figure 8B can be said to have multiple holes 40 arranged at equal intervals along two opposing sides of the four rectangular sides of the printed circuit board.

[0029] By arranging multiple holes 40 as in the printed circuit board 10d shown in Figure 8A or the printed circuit board 10e shown in Figure 8B, in addition to the effect of preventing peeling of the molded resin layer 20 from the printed circuit board 10e throughout the semiconductor device 100, a synergistic effect of further improving component mounting efficiency is achieved.

[0030] 9 is characterized in that four holes 40 are arranged at the four corners of the rectangle of the printed circuit board 10e. By arranging the holes 40 only at the four corners, peeling of the molded resin layer 20 is prevented throughout the entire semiconductor device 100, and a synergistic effect of further improving component mounting efficiency is achieved.

[0031] The printed circuit board 10g shown in Figure 10 is characterized in that the rectangular printed circuit board 10e is virtually divided into two virtual rectangles of the same area, and the hole portions 40 are arranged along each side of the virtually divided virtual rectangles.

[0032] 10, the rectangular printed circuit board 10g is virtually divided into two virtual rectangles of the same area, but the division into two virtual rectangles is not limited to this and the printed circuit board may be divided into more than two virtual rectangles. In other words, it is sufficient if the printed circuit board is virtually divided into a plurality of virtual rectangles of the same area and a plurality of holes are arranged along each side of the virtually divided virtual rectangles.

[0033] Arranging the hole 40 in the printed circuit board 10g as shown in Figure 10 not only prevents the molded resin layer 20 from peeling off from the printed circuit board 10g throughout the entire semiconductor device 100, but also has the synergistic effect of improving the efficiency of component mounting in the center of the printed circuit board.

[0034] 11A is characterized in that the opening 41a on the front side of the printed circuit board 10h is rectangular, and the long sides of the two holes 40a are arranged along the two long sides of the rectangular printed circuit board 10h. Note that the shape of the opening 41a on the front side does not need to be strictly rectangular, as long as it is elongated and follows the long sides of the printed circuit board 10h.

[0035] 11B is characterized in that the opening 41a on the front side of the printed circuit board 10i is rectangular, and the long sides of the two holes 40a are arranged along the two short sides of the rectangular printed circuit board 10i. Note that the shape of the opening 41a on the front side does not need to be strictly rectangular, as long as it is an elongated shape that follows the short sides of the printed circuit board 10i.

[0036] In other words, the printed circuit board 10h shown in Figure 11A and the printed circuit board 10i shown in Figure 11B can be said to be arranged so that the long sides of the two hole portions 40a, each with a rectangular opening, are aligned along two opposing sides of the four sides of the printed circuit board.

[0037] 11A and 11B, the proportion of the molded resin embedded in the printed circuit board can be increased, so that the linear expansion coefficient of the printed circuit board becomes closer to the linear expansion coefficient of the molded resin. In other words, by arranging the pattern of the hole portion 40a so that as much molded resin as possible is embedded in the printed circuit board, the warpage of the semiconductor device can be reduced.

[0038] The printed circuit board 10j shown in Figure 12A is characterized in that the opening 41a on the surface side of the printed circuit board 10j is arranged so that the long sides of the two rectangular hole portions 40a are aligned along the two long sides of the rectangular printed circuit board 10j, the opening 41b on the surface side is arranged so that the long sides of the four rectangular hole portions 40b are aligned in the direction along the two short sides of the printed circuit board 10j, and the distance between the second hole portion 40b and the third hole portion 40b is larger than the distance between the first hole portion 40b and the second hole portion 40b and the distance between the third hole portion 40b and the fourth hole portion 40b.

[0039] In other words, the opening 41a on the surface side of the printed circuit board 10j is characterized in that the long sides of the two rectangular hole portions 40a are arranged along two opposing sides of the four sides of the printed circuit board 10j, and the long sides of the four or more hole portions 40b are arranged along the other two sides of the printed circuit board 10j, and the spacing between the hole portions 40b in the center of the printed circuit board 10j is greater than the spacing between the hole portions 40b in the peripheral parts of the printed circuit board 10j.

[0040] The printed circuit board 10k shown in Figure 12B is characterized in that the openings 41c on the front surface side of the four rectangular hole portions 40c are arranged so that the long sides of each of the four holes 40c are aligned along the four sides of the rectangular printed circuit board 10k.

[0041] 12A and 10k shown in Fig. 12B, the proportion of the molded resin embedded in the printed circuit board can be increased, so that the linear expansion coefficient of the printed circuit board becomes closer to the linear expansion coefficient of the molded resin. In other words, by arranging the pattern of the hole 40 so that as much molded resin as possible is embedded in the printed circuit board, not only is warping of the semiconductor device reduced, but there is also the synergistic effect of improving the efficiency of mounting components in the center of the printed circuit board.

[0042] <Cross-sectional shape of hole in printed circuit board> In the above description, hole 40 has a circular opening 41 and a cylindrical shape in the depth direction of printed circuit board 10. However, to further prevent peeling of molded resin layer 20 from printed circuit board 10, a hole having a cross-sectional shape as described below may be used.

[0043] 13A is characterized in that the opening area of ​​the opening 46 on the back surface side of the printed circuit board 10 is larger than the opening area of ​​the opening 45 on the front surface side of the printed circuit board 10. In other words, the area of ​​the opening 46 on the back surface side of the printed circuit board 10 is larger than the area of ​​the opening 45 on the front surface side of the hole 40d in the direction perpendicular to the front surface of the printed circuit board 10.

[0044] By applying the hole portion 40d having the cross-sectional shape shown in Figure 13A, the molded resin adheres more closely to the bottom side of the hole portion 40d, thereby further enhancing the effect of preventing peeling of the molded resin layer 20 from the printed circuit board 10 in the semiconductor device 100.

[0045] In the hole portion 40e shown in FIG. 13B, a portion 47 having a larger cross-sectional area than the opening 41b on the front surface side of the printed circuit board 10 is provided in the middle of the cylindrical portion extending from the opening 45a on the front surface side of the hole portion 40e to the opening 46a on the back surface side.

[0046] By applying the hole portion 40e having the cross-sectional shape shown in Figure 13B, the molding resin adheres more closely at the portion 47 of the hole portion 40e, thereby further enhancing the effect of preventing peeling of the molding resin layer 20 from the printed circuit board 10 in the semiconductor device 100.

[0047] 13B, hole 40f shown in Fig. 13C is characterized in that hole 40f is closed on the back surface side of printed circuit board 10, i.e., has bottom surface 46b. In other words, hole 40f is characterized in that it has bottom surface 46b at a predetermined depth from opening 45a on the front surface side of printed circuit board 10.

[0048] By applying the hole portion 40f having the cross-sectional shape shown in Figure 13C, the adhesion between the molded resin and the hole portion 40f is further improved, thereby further enhancing the effect of preventing peeling of the molded resin layer 20 from the printed circuit board 10 in the semiconductor device 100.

[0049] The hole portion 40g shown in Figure 14 is characterized by having a cylindrical portion that penetrates from the front side to the back side of the printed circuit board 10, and a portion 47a consisting of a space formed diagonally from the side of the cylindrical portion toward the front side of the printed circuit board 10.

[0050] By applying the hole portion 40g having the cross-sectional shape shown in Figure 14, the molded resin adheres more closely at the portion 47a of the hole portion 40g, thereby further enhancing the effect of preventing peeling of the molded resin layer 20 from the printed circuit board 10 in the semiconductor device 100.

[0051] <Shape of the Opening of the Hole> In the above description, the shape of the opening of the hole is generally circular or rectangular. However, various shapes such as those shown in Fig. 15 may also be used as the shape of the opening of the hole.

[0052] The shape of the opening of the hole may be, as shown in FIG. 15, a square opening 48a, a triangular opening 48b, a pentagonal opening 48c, a hexagonal opening 48d, an octagonal opening 48e, a crescent-shaped opening 48f, a double ring-shaped opening 48g, a cross-shaped opening 48h, an opening 48i with round trips at the corners of the cross, a star-shaped opening 48j, an opening 48k in the shape of two overlapping circles, an elliptical opening 48l, or the like.

[0053] <Effects of First Embodiment> As described above, according to the semiconductor device of the first embodiment, the adhesion with the molded resin layer is improved by arranging a plurality of holes within the surface of the substrate, and it becomes possible to prevent peeling of the molded resin layer from the substrate, thereby achieving the effect of obtaining a semiconductor device with excellent reliability.

[0054] 16 is a schematic diagram showing a method for manufacturing a semiconductor device according to a second embodiment. The method for manufacturing a semiconductor device according to the second embodiment will be described below.

[0055] First, components required for the semiconductor device 100, such as semiconductor chips and electronic components, are arranged on the surface of the printed circuit board 50.

[0056] The printed circuit board 50, on which the semiconductor chip 15 and other components are mounted, is pressed against a curved metal surface, thereby forming a warp with a predetermined curvature in the printed circuit board 50. An example of a curved metal surface is a curved metal mold. As a result of this processing, the printed circuit board 50 is warped at room temperature, i.e., about 25°C.

[0057] The warped printed circuit board 50 is integrally molded with a molding resin at a temperature of 140° C. or higher and 250° C. or lower.

[0058] After integral molding with the mold resin, the printed circuit board 50 covered with the mold resin layer 20 is returned to room temperature, that is, about 25°C.

[0059] After integral molding, when the temperature is returned to room temperature, i.e., about 25°C, the molding resin shrinks, thereby suppressing warping of the printed circuit board 50 before integral molding after integral molding. As a result, peeling of the molding resin from the printed circuit board 50 due to warping of the printed circuit board 50 can be prevented.

[0060] <Effects of the manufacturing method of the semiconductor device according to the second embodiment> As described above, according to the manufacturing method of the semiconductor device according to the second embodiment, the substrate before integral molding is processed to have a warp, and then the substrate and the molded resin are integrally molded at a high temperature. Therefore, warping of the substrate is suppressed after integral molding, and it is possible to prevent peeling of the molded resin layer from the substrate, resulting in the effect of obtaining a semiconductor device with excellent reliability.

[0061] 17 is a schematic diagram showing a method for manufacturing a semiconductor device according to a third embodiment. The method for manufacturing a semiconductor device according to the third embodiment will be described below.

[0062] First, the printed circuit board 51 has a multilayer structure in which multiple materials with different linear expansion coefficients are laminated. In the example of the printed circuit board 51 shown in Figure 17, the printed circuit board 51 has a multilayer structure in which a first member 51a, a second member 51b, a third member 51c, and a fourth member 51d are laminated, each made of a material with a different linear expansion coefficient. However, it is not necessary for all members to be made of different materials; it is sufficient for the printed circuit board 51 to be made of members made of at least two or more materials with different linear expansion coefficients. By making the printed circuit board 51 have a multilayer structure, a warp with a predetermined curvature is provided in the printed circuit board 51.

[0063] On the surface of the printed circuit board 51, components required for the semiconductor device, such as semiconductor chips, are arranged.

[0064] The warped printed circuit board 51 is integrally molded with a molding resin at a temperature of 140° C. or higher and 250° C. or lower.

[0065] After the printed circuit board 51 and the mold resin are integrally molded, the printed circuit board 51 covered with the mold resin layer 20 is returned to room temperature, that is, about 25°C.

[0066] After integral molding, when the temperature is returned to room temperature, i.e., about 25°C, the molding resin shrinks, thereby suppressing warping of the printed circuit board 51 before integral molding after integral molding. As a result, peeling of the molding resin from the printed circuit board 51 due to warping of the printed circuit board 51 can be prevented.

[0067] FIG. 18 is a cross-sectional view of a semiconductor device 150 having a printed circuit board 51 with a multi-layer structure made of materials with different linear expansion coefficients.

[0068] The semiconductor device 150 comprises a printed circuit board 51, a semiconductor chip 15 arranged on a pattern 11a made of a copper layer on the surface of the printed circuit board 51 via an adhesive member 11c, a wire 12 having one end wire-bonded to the semiconductor chip 15 and the other end wire-bonded to a pattern 11b made of a copper layer, a solder resist 16a formed on the printed circuit board 51, and a molded resin layer 20 formed to cover the surface of the printed circuit board 51.

[0069] As shown in Figure 18, the printed circuit board 51 has a multilayer structure including copper layers 31a, 31b, 31c, and 31d, core materials 32a and 32b, and prepregs 33a, 33b, and 33c. A solder resist 16b and a copper layer 31e are formed on the back side of the printed circuit board 51. Figure 19 shows an example of the thickness of each layer. When viewed from above, that is, in a plan view, the printed circuit board 51 has a rectangular shape. However, the shape of the printed circuit board 51 is not limited to a rectangle and may have a more complex shape.

[0070] The copper layers 31a, 31b, 31c, and 31d, the core materials 32a and 32b, and the prepregs 33a, 33b, and 33c that make up the printed circuit board 51 all have different linear expansion coefficients. Therefore, at room temperature, i.e., approximately 25°C, the printed circuit board 51 warps due to the differences in the linear expansion coefficients of the copper layers, core materials, and prepregs that make up the printed circuit board 51. The amount of warping, or curvature, of the printed circuit board 51 can be adjusted by appropriately setting various parameters of the multilayer structure. In other words, it is possible to fabricate a printed circuit board 51 with a warp having a predetermined curvature. The core materials and prepregs are made of glass fiber cloth impregnated with a resin such as epoxy resin. Generally, the linear expansion coefficients of the core and prepregs are smaller than that of copper.

[0071] The results of a simulation of the effect of the semiconductor device manufacturing method according to the third embodiment are described below. Figure 20 shows the results of a simulation based on the semiconductor device manufacturing method according to the third embodiment, which shows that by forming a printed circuit board with a multi-layer structure, warping of the printed circuit board at room temperature, i.e., about 25°C, before integral molding is suppressed after integral molding with the mold resin. After integral molding, the printed circuit board assumes a substantially flat shape.

[0072] 21 shows the results of a simulation conducted at room temperature, i.e., about 25° C., as a comparative example, in which a flat printed circuit board without warpage before integral molding is integrally molded with a mold resin. It can be seen that warpage occurs in the printed circuit board after integral molding.

[0073] FIG. 22 shows the results of a simulation confirming that, assuming that the temperature during manufacturing of a printed circuit board is 170° C. and the printed circuit board is flat, if the temperature is lowered to room temperature, i.e., about 25° C., a printed circuit board can be manufactured in which the prepreg side, which is the back side of the printed circuit board, is warped convexly.

[0074] <Effects of the Manufacturing Method of the Semiconductor Device According to the Third Embodiment> As described above, according to the manufacturing method of the semiconductor device according to the third embodiment, the substrate is made of a multi-layer structure using materials with different linear expansion coefficients, so that the substrate is in a warped state before being integrally molded, and such substrate and molded resin are integrally molded at a high temperature. Therefore, warping of the substrate is suppressed after integral molding, and it becomes possible to prevent peeling of the molded resin layer from the substrate, resulting in an effect of obtaining a manufacturing method of a semiconductor device with excellent reliability.

[0075] Although the present disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations.

[0076] Therefore, countless variations not illustrated are conceivable within the scope of the technology of the present disclosure, including, for example, cases where at least one component is modified, added, or omitted, and even cases where at least one component is extracted and combined with a component of another embodiment.

[0077] 10, 10a, 10b, 10c, 10d, 10e, 10f, 10g, 10h, 10i, 10j, 10k, 50, 51 Printed circuit board, 11a, 11b Pattern, 11c Adhesive member, 12 Wire, 15 Semiconductor chip, 16a, 16b Solder resist, 20 Molded resin layer, 31a, 31b, 31c, 31d, 31e Copper layer, 32a, 32b Core material, 33a, 33b, 33c Prepreg, 40, 40a, 40b, 40c, 40d, 40e, 40f, 40g Hole, 41, 41a, 41b, 41c Opening, 45, 45a Opening on the front surface, 46, 46a Opening on the back surface, 46b Bottom surface, 47, 47a Part, 48a: square opening, 48b: triangular opening, 48c: pentagonal opening, 48d: hexagonal opening, 48e: octagonal opening, 48f: crescent opening, 48g: double ring opening, 48h: cross opening, 48i: opening with round trips at the corners of the cross, 48j: star opening, 48k: opening in the shape of two overlapping circles, 48l: elliptical opening, 51a: first member, 51b: second member, 51c: third member, 51d: fourth member, 100, 150: semiconductor device, 100a: individual piece

Claims

1. A semiconductor device comprising: a substrate having a plurality of holes arranged within its surface and having at least a semiconductor chip arranged on its surface; and a molded resin layer formed on the surface of the substrate and within the holes.

2. The semiconductor device according to claim 1, wherein the substrate is a printed circuit board.

3. The semiconductor device according to claim 1, wherein the substrate is a lead frame.

4. A semiconductor device according to any one of claims 1 to 3, characterized in that the openings of the plurality of holes on the surface side of the substrate are circular, and the plurality of holes are arranged in a lattice pattern within the surface of the substrate.

5. A semiconductor device according to any one of claims 1 to 3, characterized in that the substrate is rectangular in plan view, the openings of the plurality of holes on the surface side of the substrate are circular, there are a plurality of arrays of holes arranged in rows parallel to one side of the substrate within the plane of the substrate, and the pitch of the holes is shifted by a predetermined distance between the even-numbered arrays and the odd-numbered arrays from the side of the one side.

6. The semiconductor device according to any one of claims 1 to 3, wherein the substrate is rectangular in plan view, and the plurality of holes are arranged along each side of the rectangle.

7. A semiconductor device according to any one of claims 1 to 3, characterized in that the substrate is rectangular in plan view, and the plurality of holes are arranged along two opposing sides of the four sides of the rectangle.

8. The semiconductor device according to any one of claims 1 to 3, wherein the substrate is rectangular in plan view, and the plurality of holes are arranged at the four corners of the rectangle.

9. A semiconductor device according to any one of claims 1 to 3, characterized in that the substrate is rectangular in plan view, the substrate is virtually divided into a plurality of virtual rectangles of the same area, and the plurality of holes are arranged along each side of the virtually divided virtual rectangles.

10. A semiconductor device according to any one of claims 1 to 3, characterized in that the substrate is rectangular in plan view, and the long sides of the two rectangular hole portions on the front surface side of the substrate are respectively arranged along two opposing sides of the four sides of the substrate.

11. A semiconductor device according to any one of claims 1 to 3, characterized in that the substrate is rectangular in plan view, the long sides of the two rectangular hole portions on the surface side of the substrate are respectively arranged along two opposing sides of the four sides of the substrate, and the long sides of four or more hole portions are respectively arranged along the other two sides of the substrate, and the spacing between the hole portions in the center of the substrate is greater than the spacing between the hole portions in the peripheral parts of the substrate.

12. The semiconductor device according to any one of claims 1 to 3, wherein the area of the opening of the hole on the back surface side of the substrate is larger than the area of the opening of the hole on the front surface side of the substrate.

13. A semiconductor device according to any one of claims 1 to 3, characterized in that a portion having a cross-sectional area in a direction perpendicular to the surface of the substrate that is larger than the area of the opening on the surface side of the substrate is provided within the hole.

14. The semiconductor device according to any one of claims 1 to 3, wherein the hole has a bottom surface at a predetermined depth from the surface of the substrate.

15. A semiconductor device as described in any one of claims 1 to 3, characterized in that the multiple holes have a cylindrical portion that penetrates from the front side to the back side of the substrate, and a portion formed obliquely from the side of the cylindrical portion toward the front side of the substrate.

16. A method for manufacturing a semiconductor device, comprising the steps of: placing at least a semiconductor chip on the surface of a substrate; pressing the substrate against a curved surface made of metal to give the substrate a warp with a predetermined curvature; and molding the warped substrate with a molding resin at a temperature of 140°C or higher and 250°C or lower, wherein warping of the substrate is suppressed when the substrate is returned to room temperature after molding.

17. A method for manufacturing a semiconductor device, comprising the steps of: forming a substrate having a warp with a predetermined curvature by forming a multi-layer structure using a plurality of materials each having a different linear expansion coefficient; arranging at least a semiconductor chip on the surface of the substrate; and integrally molding the substrate having the warp with a molding resin at a temperature of 140°C or higher and 250°C or lower, wherein the warp is suppressed when the substrate is returned to room temperature after integral molding.

18. The method for manufacturing a semiconductor device according to claim 17, wherein the substrate has a multi-layer structure in which a copper layer, a core material, and a prepreg are laminated.

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